CN104469206A - Clock signal processing device and television signal generator - Google Patents
Clock signal processing device and television signal generator Download PDFInfo
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- CN104469206A CN104469206A CN201410718245.8A CN201410718245A CN104469206A CN 104469206 A CN104469206 A CN 104469206A CN 201410718245 A CN201410718245 A CN 201410718245A CN 104469206 A CN104469206 A CN 104469206A
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- clock signal
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Abstract
The invention provides a clock signal processing device. The clock signal processing device comprises an oscillator and a field programmable logic gate array chip. The oscillator is used for generating one clock frequency to be input to the field programmable logic gate array chip, a phase-locked loop unit is arranged in the field programmable logic gate array chip, and clock signals are subjected to frequency doubling through the phase-locked loop unit to obtain a global clock signal. The invention further provides a television signal generator which comprises the clock signal processing device. According to the clock signal processing device and the television signal generator, the global clock signal is output by a phase-locked loop directly, the signals are stable, the circuit is simple, the phase-locked loop in the field programmable logic gate array chip is used directly, the clock signals which have the low frequencies and are generated by the oscillator are subjected to frequency doubling to obtain the needed whole clock signal, and therefore the stability and the quality of a final high definition television signal in the television signal generator are guaranteed.
Description
Technical field
The invention belongs to field of broadcast televisions, particularly relate to a kind of clock signal processing unit and the television signal generator comprising described clock signal processing unit.
Background technology
Along with the development of science and technology and the raising of people's lives, high definition TV equipment is more and more subject to the favor of vast electronic consumer, television signal generator become play a part in the scientific research of high definition TV, production and after-sale service process indispensable, the quality good or not of the signal of television signal generator, also can affect and HDTV (High-Definition Television) is produced, evaluate; A kind of based in the high definition TV signal generator of field programmable gate array chip, field programmable gate array chip, the output interface HDMI (High Definition Multimedia Interface) chip of high definition digital television signal, the output interface digital analog converter of high definition anolog TV signals needs same global clock signal to control; Described global clock signal is directly produced by oscillator, and because global clock signal frequency is high, in transmitting procedure, decay is serious, and the high-definition-television signal causing output is unstable, and off and on, audio card such as to be paused at the problem.
Summary of the invention
Realize above-mentioned purpose and other relevant objects, the invention provides a kind of clock signal processing unit, it is characterized in that, comprising: oscillator, produce a clock frequency and be input to field programmable gate array chip; Field programmable gate array chip, inside has phase locked-loop unit, and described clock signal obtains global clock signal through frequency multiplication of phase locked loop.The global clock signal stabilization obtained by phase-locked loop, solves high-definition TV signal instability, and off and on, audio card such as to be paused at the problem.
Further, described oscillator is active oscillator.In the present invention, need the clock signal that a kind of frequency stabilization is constant, active oscillator signal quality is good, more stable, and connected mode relatively simple (mainly carry out power filter, usually use the PI type filter network that an electric capacity and inductance are formed, the output resistance trap signal of a little resistance), do not need complicated configuration circuit so in the present invention, preferably adopt active oscillator.
Further, described oscillator is active quartz (controlled) oscillator.Because quartz (controlled) oscillator is because quartz oscillator has, volume is little, lightweight, reliability is high, frequency stability advantages of higher, precision is that 1PPM (1,000,000/) is to 100PPM, and television signal generator is responsive for timing requirements, so have employed active quartz (controlled) oscillator in the present invention.
Further, the frequency of described global clock signal is 148.5MHz.In the present invention, the global clock signal frequency that high-definition-television signal generator needs is 148.5MHz, because this signal frequency is higher, can not directly produce from oscillator.
Further, the frequency that described oscillator produces is the clock signal of 74.25MHz.The clock signal of 74.25MHz after frequency multiplication of phase locked loop, the global clock signal 148.5MHz that just must need.
Further, described oscillator output pin is relative with the clock input pin forward of described field programmable gate array chip, and on the same line, and distance is less than 2 millimeters.The clock input pin of the output pin distance field programmable gate array chip of oscillator, apart from time excessive, can cause input clock waveform deterioration, and then cause phase locked-loop unit work abnormal.Employing pin is relative, apart from close mode, can settle the matter once and for all.
Further, described field programmable gate array chip provides output pin, and described global clock signal is connected to HDMI (High Definition Multimedia Interface) chip and digital analog converter, controls the output of digital TV in high resolution signal.Directly global clock signal is supplied to HDMI (High Definition Multimedia Interface) chip, reduces output attenuatoin link, ensure that the stability of digital TV in high resolution signal.
The present invention also provides a kind of television signal generator, comprising: clock signal processing unit as above.Clock signal processing unit as above, solves the jitter of television signal generator, and off and on, audio card such as to be paused at the problem.
As mentioned above, clock signal processing unit of the present invention, has following beneficial effect:
1, global clock signal of the present invention is directly exported by phase-locked loop, signal stabilization, ensures the stable of high definition TV signal final in television signal generator and quality.
2, circuit of the present invention is simple, the phase-locked loop in direct site of deployment programmable gate array chip, and the clock lower to the frequency of oscillator generation carries out the global clock signal that frequency multiplication obtains needing.
4, in the present invention, oscillator output pin and field programmable gate array chip clock input pin dock near straight line, the clock signal solving oscillator because of transmission range excessive, generation clock waveform worsens, and then causes the abnormal problem of phase locked-loop unit work.
Accompanying drawing explanation
Fig. 1 is clock signal processing unit structural representation of the present invention.
Fig. 2 is the structural representation of original technology.
Fig. 3 is oscillator and field programmable logic array door chip annexation figure.
Piece mark illustrates: 1, oscillator; 2, field programmable logic array door chip; 3, phase locked-loop unit; 4, HDMI (High Definition Multimedia Interface) chip; 5, digital analog converter.
Embodiment
By particular specific embodiment, embodiments of the present invention are described below, person skilled in the art scholar the content disclosed by this specification can understand other advantages of the present invention and effect easily.
In order to can the present invention be described in detail, clock signal processing unit of the present invention is illustrated:
As shown in Figure 1, a kind of clock signal processing unit of television signal generator, comprising: oscillator 1, produces a clock frequency and is input to field programmable gate array chip 2; Field programmable gate array chip 2, inside has clock signal described in phase locked-loop unit 3 and obtains global clock signal through phase locked-loop unit 3 frequency multiplication.
Wherein said oscillator 1 is active oscillator.In the present invention, need the clock signal that a kind of frequency stabilization is constant, active oscillator signal quality is good, more stable, and connected mode relatively simple (mainly carry out power filter, usually use the PI type filter network that an electric capacity and inductance are formed, the output resistance trap signal of a little resistance), do not need complicated configuration circuit so in the present invention, preferably adopt active oscillator.
Wherein, described oscillator is active quartz (controlled) oscillator.Because quartz (controlled) oscillator is because quartz oscillator has, volume is little, lightweight, reliability is high, frequency stability advantages of higher, precision is that 1PPM (1,000,000/) is to 100PPM, and television signal generator is responsive for timing requirements, so have employed active quartz (controlled) oscillator in the present invention.
Wherein, the frequency of described global clock signal is 148.5MHz.In embodiments of the present invention, the global clock signal frequency that high-definition-television signal generator needs is 148.5MHz.As shown in Figure 2, in original technology, oscillator 1 is directly programmable gate array chip 2, and HDMI (High Definition Multimedia Interface) chip 4 and digital analog converter 5 provide 148.5MHz synchronizing signal; Because this signal frequency is higher, directly produce from oscillator, when being transferred to HDMI (High Definition Multimedia Interface) chip 4 and the digital analog converter 5 of control signal output, decay is serious, cause high-definition TV signal instability, off and on, audio card such as to be paused at the problem.So need oscillator 1 to produce the phase locked-loop unit 3 of the low clock signal of frequency through field programmable gate array chip 2, obtain stable high-frequency global clock signal; This global clock is not only inner for field programmable gate array chip 2, and field programmable gate array chip 2 also provides output pin, global clock signal is connected to HDMI (High Definition Multimedia Interface) chip 4 and digital analog converter 5 uses.
Wherein, as shown in Figure 3, described oscillator output pin is relative with the clock input pin forward of described field programmable gate array chip, on the same line; Distance is less than 2 millimeters, and the clock input pin of the output pin distance field programmable gate array chip 2 of oscillator 1, apart from time excessive, can cause input clock waveform deterioration, so cause phase locked-loop unit 3 to work abnormal.In practice, due to the area requirements of printed board, start oscillating circuit to be arranged on the distant position from field programmable gate array chip, phase locked-loop unit 3 is cisco unity malfunction often, or does not simply work.Adopt oscillator output pin is relative with field programmable gate array chip 2 clock input pin forward, on the same line, and when distance is no more than 2 millimeters, this problem is solved completely.
Wherein, described field programmable gate array chip 2 provides output pin, and described global clock signal is connected to HDMI (High Definition Multimedia Interface) chip 4, controls the output of high definition digital television signal.Directly global clock signal is supplied to HDMI (High Definition Multimedia Interface) chip 4, reduces output attenuatoin link, ensure that the stability of high definition digital television signal.
Wherein, described field programmable gate array chip 2 provides output pin, and described global clock signal is connected to digital analog converter 5, controls the output of high definition anolog TV signals.Directly global clock signal is supplied to digital analog converter 5, reduces output attenuatoin link, ensure that the stability of high definition anolog TV signals.
In the present invention, the clock signal of the 74.25MHz that active quartz (controlled) oscillator 1 sends, through phase locked-loop unit 3 circuit of field programmable gate array chip 2, obtains the global clock signal that frequency is 148.5MHz; Field programmable gate array chip 2 pairs of global clock signals carry out count operation etc., and form synchronous sequence signal, this synchronous sequence signal is directly inputted to HDMI (High Definition Multimedia Interface) chip 4 and digital analog converter 5 together with described global clock signal; As synchronous control signal, the stability of clear degree TV signal can be ensured.
Wherein, include the television signal generator of above-described clock signal processing unit, belong to protection scope of the present invention.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any person skilled in the art scholar all without prejudice under spirit of the present invention and category, can modify above-described embodiment or changes.Therefore, such as have in art usually know the knowledgeable do not depart from complete under disclosed spirit and technological thought all equivalence modify or change, must be contained by claim of the present invention.
Claims (8)
1. a clock signal processing unit, is characterized in that, comprising:
Oscillator (1), produces a clock signal and is input to field programmable gate array chip (2);
Field programmable gate array chip (2), inside has phase locked-loop unit (3), and described clock signal obtains global clock signal through phase locked-loop unit (3) frequency multiplication.
2. clock signal processing unit according to claim 1, is characterized in that: described oscillator (1) is active oscillator.
3. clock signal processing unit according to claim 2, is characterized in that: described oscillator (1) is active quartz (controlled) oscillator.
4. clock signal processing unit according to claim 1, is characterized in that: the frequency of described global clock signal is 148.5MHz.
5. clock signal processing unit according to claim 4, is characterized in that: the frequency that described oscillator (1) produces is the clock signal of 74.25MHz.
6. clock signal processing unit according to claim 1, it is characterized in that: described oscillator (1) output interface (6) is relative with clock input pin (7) forward of described field programmable gate array chip (2), on the same line, and distance is less than 2 millimeters.
7. clock signal processing unit according to claim 1, device is characterised in that: described field programmable gate array chip (2) provides output pin, described global clock signal is connected to HDMI (High Definition Multimedia Interface) chip (4) and digital analog converter (5), controls the output of digital TV in high resolution signal.
8. a television signal generator, is characterized in that: comprising:
As above clock signal processing unit according to any one of claim 1 to 7.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410718245.8A CN104469206A (en) | 2014-12-01 | 2014-12-01 | Clock signal processing device and television signal generator |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410718245.8A CN104469206A (en) | 2014-12-01 | 2014-12-01 | Clock signal processing device and television signal generator |
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| CN104469206A true CN104469206A (en) | 2015-03-25 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104835434A (en) * | 2015-05-20 | 2015-08-12 | 昆山龙腾光电有限公司 | Signal generation device |
| CN109256072A (en) * | 2018-09-19 | 2019-01-22 | 昆山龙腾光电有限公司 | The lighting test system of display device |
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| CN201194413Y (en) * | 2008-03-27 | 2009-02-11 | 深圳市同洲电子股份有限公司 | Time clock jitter reducing circuit and digital high-resolution television |
| US20090161809A1 (en) * | 2007-12-20 | 2009-06-25 | Texas Instruments Incorporated | Method and Apparatus for Variable Frame Rate |
| CN203747934U (en) * | 2014-02-20 | 2014-07-30 | 深圳市同洲电子股份有限公司 | Audio-video synchronization device |
| CN204217045U (en) * | 2014-12-01 | 2015-03-18 | 重庆洪深现代视声技术有限公司 | Clock signal processing unit, television signal generator |
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2014
- 2014-12-01 CN CN201410718245.8A patent/CN104469206A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090161809A1 (en) * | 2007-12-20 | 2009-06-25 | Texas Instruments Incorporated | Method and Apparatus for Variable Frame Rate |
| CN201194413Y (en) * | 2008-03-27 | 2009-02-11 | 深圳市同洲电子股份有限公司 | Time clock jitter reducing circuit and digital high-resolution television |
| CN203747934U (en) * | 2014-02-20 | 2014-07-30 | 深圳市同洲电子股份有限公司 | Audio-video synchronization device |
| CN204217045U (en) * | 2014-12-01 | 2015-03-18 | 重庆洪深现代视声技术有限公司 | Clock signal processing unit, television signal generator |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104835434A (en) * | 2015-05-20 | 2015-08-12 | 昆山龙腾光电有限公司 | Signal generation device |
| CN109256072A (en) * | 2018-09-19 | 2019-01-22 | 昆山龙腾光电有限公司 | The lighting test system of display device |
| CN109256072B (en) * | 2018-09-19 | 2022-03-25 | 昆山龙腾光电股份有限公司 | Lighting test system of display device |
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Application publication date: 20150325 |