CN104465926B - Graphical sapphire substrate and light emitting diode - Google Patents
Graphical sapphire substrate and light emitting diode Download PDFInfo
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- CN104465926B CN104465926B CN201410832667.8A CN201410832667A CN104465926B CN 104465926 B CN104465926 B CN 104465926B CN 201410832667 A CN201410832667 A CN 201410832667A CN 104465926 B CN104465926 B CN 104465926B
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- 239000000758 substrate Substances 0.000 title claims abstract description 72
- 229910052594 sapphire Inorganic materials 0.000 title claims abstract description 70
- 239000010980 sapphire Substances 0.000 title claims abstract description 70
- 238000003475 lamination Methods 0.000 claims description 6
- 230000000994 depressogenic effect Effects 0.000 claims description 4
- 239000004575 stone Substances 0.000 claims description 2
- 238000002360 preparation method Methods 0.000 abstract description 10
- 229910002601 GaN Inorganic materials 0.000 abstract description 5
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 abstract description 5
- 229910017083 AlN Inorganic materials 0.000 description 12
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 12
- 230000015572 biosynthetic process Effects 0.000 description 12
- 239000004065 semiconductor Substances 0.000 description 11
- 239000000463 material Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 5
- 239000013078 crystal Substances 0.000 description 4
- 238000001039 wet etching Methods 0.000 description 4
- LICUQAFOHXHWQC-UHFFFAOYSA-N [S].OP(O)(O)=O Chemical compound [S].OP(O)(O)=O LICUQAFOHXHWQC-UHFFFAOYSA-N 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 229910015844 BCl3 Inorganic materials 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000000605 extraction Methods 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- 241001062009 Indigofera Species 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000010437 gem Substances 0.000 description 1
- 229910001751 gemstone Inorganic materials 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 239000004038 photonic crystal Substances 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 239000013079 quasicrystal Substances 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000009738 saturating Methods 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention discloses a kind of graphical sapphire substrate, its preparation method and the light emitting diode using the substrate, there is wherein described graphical sapphire substrate the bonding pad between relative first surface and second surface, each described first connecting portion C faces are not present（I.e.（0001）Face）.C faces can be not present on the growing surface of the graphical sapphire substrate, so as to reduce the threading dislocation density of gallium nitride epitaxial materialses in Sapphire Substrate.
Description
Technical field
Invention is related to a graphical sapphire substrate, its preparation method and the hair using the graphical sapphire substrate
Optical diode.
Background technology
PSS（Patterned Sapphire Substrate, patterned substrate）Be on a sapphire substrate using photoetching,
The techniques such as etching, form the Sapphire Substrate with patterned surface.On the one hand patterned substrate can effectively reduce epitaxy junction
The dislocation density of structure layer, improves the crystal mass and uniformity of epitaxial material, and then can improve the interior quantum hair of light emitting diode
Light efficiency, on the other hand, because array pattern structure adds the scattering of light, changes the optowire of light emitting diode, enters
And improve light extraction probability.
In existing patterned substrate, the C faces (i.e. sapphire (0001) face) of generally existing larger area.C faces
The threading dislocation of upper formation easily extends to the SQW of light emitting diode, causes non-radiative recombination.Chinese patent literature
CN102244170B discloses a kind of photonic quasicrystal graph sapphire substrate, and it attempts to reduce in Sapphire Substrate graphic structure
The C faces exposed proportion in whole Sapphire Substrate area, but be due to its graphic structure by a series of photonic crystal knots
Structure is constituted, and certainly exists gap 205 between each photon crystal structure, that is, there is C faces.
The content of the invention
The present invention proposes a kind of graphical sapphire substrate, its preparation method and using the graphical sapphire substrate
Light emitting diode, wherein C faces can be not present on the growing surface of the graphical sapphire substrate, so as to reduce sapphire lining
The threading dislocation density of gallium nitride epitaxial materialses on bottom.
According to the first aspect of the invention, graphical sapphire substrate, with relative first surface and second surface,
Wherein first surface has between the first size d1 of series of rules arrangement first connecting portion, each described first connecting portion
Bonding pad be not present C faces（I.e.（0001）Face）.
In certain embodiments, it is triangle between three adjacent first connecting portions, described each three
Angular inside has second size d2 second connecting portion, wherein d1>D2, the first connecting portion and second connecting portion are straight
Connect or be connected with curved surface so that C faces are not present in the bonding pad.
Preferably, the first connecting portion does not have C faces.
Preferably, the second connecting portion does not have C faces.
Preferably, the first surface does not have C faces completely.
Preferably, rhombus is constituted between four adjacent first connecting portions, wherein had between long-diagonal
There is a 3rd size d3 the 3rd jut, wherein d3 ＜ d2 between two second connecting portions, short diagonal.Preferably
There is a depressed part, its lowest part is the peak of the 3rd jut between ground, described two second connecting portions.
Preferably, the second connecting portion is mainly by three or three cones constituted with top incline, each mainly
Inclined plane is respectively to should three first connecting portions.Preferably, the inclined plane of the second connecting portion and Sapphire Substrate C
The angle in face is 10 ° ~ 40 °.In certain embodiments, there is a V-type between two closest first connecting portions
Groove, it is simultaneously between two adjacent second connecting portions, and two sides of the V-groove are dashed forward by described two second respectively
The inclined plane in the portion of rising is constituted.
Preferably, the height h1 of the first connecting portion and the height h2 of second connecting portion ratio are 2 ~ 50.
Preferably, the first connecting portion accounts for the 50% ~ 90% of the first surface gross area.
Preferably, the top of the first connecting portion be cone and C faces be projected as it is circular or polygonal.
According to the second aspect of the invention, the preparation method of graphical sapphire substrate, including step：1）There is provided one blue
Jewel substrate, with relative first surface and second surface, forms patterned mask layer on the first surface；2）Using dry corrosion
A series of join domain that quarter is formed between raised structures, each described raised structures on the first surface is etched into small convex
Face；3）Wet etching is carried out to the first surface of the Sapphire Substrate, so as to form patterned surface, the surface is with one
Bonding pad between the regularly arranged first size d1 of row first connecting portion, each described first connecting portion does not have C faces（I.e.
（0001）Face）.
Preferably, the step 1）The patterned mask layer of middle formation is by a series of column photoresistances, oxide or metal structure
Into.
Preferably, the step 1）Gap between a diameter of 0.5um~6um of pattern dimension of middle formation, each pattern
For 0.5um~6um.
Preferably, the step 2）The small convex surface of each raised structures of the connection of middle formation is curved surface.
Preferably, the step 2）Middle formation connection each raised structures small convex surface height for 0.05um ~
0.5um。
Preferably, the step 3）Middle use sulphur phosphoric acid mixed liquor etches the first surface of the Sapphire Substrate, is formed
The patterned surface.
According to the third aspect of the present invention, light emitting diode, including any one foregoing graphical sapphire substrate and
It is formed at the luminous extension lamination of the graphical sapphire substrate.
Preferably, there is one layer of AlN layer using PVD formation on the surface of the graphical sapphire substrate, it is described
Luminous extension lamination is formed on the AlN.
Preferably, described AlN layers thickness is 10 angstroms ~ 200 angstroms.
According to the fourth aspect of the present invention, the preparation method of light emitting diode：Including step：1）One sapphire lining is provided
Bottom, with relative first surface and second surface, forms patterned mask on the first surface；2）Using dry ecthing first
A series of join domain formed on surface between raised structures, each described raised structures is etched into small convex surface；3）To institute
The first surface for stating Sapphire Substrate carries out wet etching, so as to form patterned surface, the surface has series of rules row
It is connected between the first size d1 of row first connecting portion, each described first connecting portion with curved surface so that the connection
Area does not have C faces（I.e.（0001）Face）；4）Using one AlN layers of PVD formation on the patterned surface；5）On the AlN layers
Epitaxial growth lights extension lamination, and it comprises at least n-type semiconductor layer, luminescent layer and p-type semiconductor layer.
Preferably, the step 2）The small convex surface of each raised structures of the connection of middle formation is curved surface.
Preferably, the step 3）Middle use sulphur phosphoric acid mixed liquor etches the first surface of the Sapphire Substrate, is formed
The patterned surface.
Graphical sapphire substrate of the present invention, its picture on surface structure can be completely absent c faces, on the one hand can be with
The threading dislocation formed on C faces is effectively eliminated, the crystal mass of epitaxial structure is lifted, on the other hand, due in the absence of c faces,
Be conducive to more light to project light emitting diode, substantially increase LED light extraction efficiency.
Other features and advantages of the present invention will be illustrated in the following description, also, partly becomes from specification
Obtain it is clear that or being understood by implementing the present invention.The purpose of the present invention and other advantages can be by specification, rights
Specifically noted structure is realized and obtained in claim and accompanying drawing.
Brief description of the drawings
Accompanying drawing is used for providing a further understanding of the present invention, and constitutes a part for specification, the reality with the present invention
Applying example is used to explain the present invention together, is not construed as limiting the invention.In addition, accompanying drawing data be description summary, be not by
Ratio is drawn.
Fig. 1 is that a kind of SEM for the graphical sapphire substrate implemented according to the present invention schemes.
Fig. 2 is a kind of top view for the graphical sapphire substrate implemented according to the present invention.
Fig. 3 is the sectional view cut along Fig. 2 center lines A-A.
Fig. 4 is the sectional view cut along Fig. 2 center lines B-B.
Fig. 5 shows a kind of deformation of structure shown in Fig. 4.
Fig. 6 is a kind of flow chart for making graphical sapphire substrate implemented according to the present invention.
Fig. 7 ~ 8 are a kind of manufacturing process for the graphical sapphire substrate implemented according to the present invention.
Fig. 9 is a kind of flow chart for making light emitting diode implemented according to the present invention.
Figure 10 is a kind of structure chart for the light emitting diode implemented according to the present invention.
Each label is expressed as follows in figure：
100：Sapphire Substrate；110：AlN layers；120：Cushion；130：N-type semiconductor layer；140：Luminescent layer；150：p
Type semiconductor layer；200：Patterned mask layer；210：Raised structures；220：Small convex surface；P1：First connecting portion；P2：Second projection
Portion；P3：3rd jut；H1：First depressed part；H2：Second depressed part；S1~S3：The inclined plane of second connecting portion.
Embodiment
Specific implementation below in conjunction with embodiment and accompanying drawing to the present invention elaborates.
Accompanying drawing 1 ~ 4 shows the preferred embodiment of the present invention, and wherein Fig. 3 is the section view cut along Fig. 2 center lines A-A
Figure, Fig. 4 is the sectional view cut along Fig. 2 center lines B-B.
Accompanying drawing 1 and Fig. 2 are refer to, a kind of graphical sapphire substrate, its upper surface is made up of patterning, do not deposited completely
In C faces.The patterning includes the first connecting portion P for the first size d1 that series of rules is arranged1, wherein adjacent three
One jut P1-1、P1- 2 and P1Triangle or similar triangle between -4, it is internal to have second size d2's
Second connecting portion P2, adjacent four first connecting portion P1-1、P1-2、P1- 3 and P1Rhombus, wherein long-diagonal are constituted between -4
Between there is second connecting portion, the 3rd jut P between short diagonal with a 3rd size d33, wherein d3 ＜ d2 ＜
d1。
It refer to Fig. 2 and 3, first connecting portion P1Circular or similar circle is projected as in Sapphire Substrate C faces, is accounted for whole
The 50% ~ 90% of the individual sapphire upper surface gross area, its diameter d1 can use 0.5 ~ 6um, and height h1 can use 0.5um ~ 2um, specific root
Chosen according to actual design.First connecting portion P1It is divided into top and bottom, wherein top is made up of multiple inclined planes
Cone, bottom has the inclined plane of a closure, and the inclined plane at top and the angle in c faces are 20 ~ 40 °, the inclined plane and c of bottom
The angle in face is 40 ~ 70 °.
Second connecting portion P2By three or three with top incline S1~S3Constitute, each main inclined plane is just just to one
First connecting portion P1, the inclined plane and the angle in c faces are 10 ° ~ 40 °.Second connecting portion P2Diameter d2 be generally less than or equal to
First connecting portion P1Diameter d1, can use 0.1um ~ 3um, height h2 can use 0.1um ~ 1.5um.Fig. 1 and 3 are refer to, it is adjacent
Two second connecting portion P2Between there is dolly dimple H2。
Fig. 1 and 4 are refer to, positioned at adjacent first connecting portion P1Between the 3rd jut P3Peak be small recessed
Fall into H2Minimum point.
In the present embodiment, the first connecting portion of the upper surface design series of rules arrangement of graphical sapphire substrate,
It is projected as circular or polygonal, top for cone C faces, and adjacent three first connecting portions formation triangle, its
Indoor design second connecting portion, the second connecting portion is designed as main by three or three cones constituted with top incline, master
Three inclined planes wanted respectively to should three first connecting portions, so as to ensure that sapphire upper surface is completely absent c faces.
Fig. 5 shows one of above-described embodiment deformation, in the present embodiment, close to two first connecting portion P1Between
For a V-shaped groove, i.e., without the 3rd jut P shown in Fig. 13, it is simultaneously positioned at two adjacent second connecting portion P2It
Between, the inclined plane of two sides of the V-groove, two second connecting portions respectively is constituted.
Briefly described with reference to the preparation method of the above-mentioned graphical sapphire substrate in Fig. 6 ~ 8 pair.
Accompanying drawing 6, the preparation method of graphical sapphire substrate, including step S01 ~ S03 are refer to, including forms photomask
Layer, etch using dry ecthing mode substrate surface and using patterned surface of the wet method erosion substrate surface formation without c faces.
Step S01：Sapphire Substrate with relative first surface and second surface is provided, formed on the first surface
Patterned mask layer 200, as shown in Figure 7.It is specific as follows：One layer of photoresistance, this light are coated with first in smooth Sapphire Substrate
It can be 0.5um~3um to hinder thickness；Next figure is produced with gold-tinted processing procedure, this preparation method can include step printing
Machine, contact exposure machine, projection exposure machine or impressing mode, its dimension of picture diameter can be 0.5um~6um, each figure
Between gap can be 0.5um~6um.
Step S02：The first surface of dry etching Sapphire Substrate, forms a series of raised structures on the first surface
210, the region between each raised structures is etched into small convex surface 220, as shown in figure 8, preferably the small convex surface 220 is song
Face, the height of the curved surface is preferred with 0.05um ~ 0.5um.It is specific as follows：Will be precious by the indigo plant with photoresistance figure of aforementioned processing
The etching of ICP boards is delivered at stone lining bottom, and its program is mainly included：Upper electrode power, lower electrode power, chamber pressure, BCl3Gas
Flow, Top electrode can be 1 with lower electrode power:1~24:1, chamber pressure can be 0.1~1 Pa, BCl3Gas flow can be machine
The 20~100% of platform maximum.
Step S03：The first surface of wet etching Sapphire Substrate, forms patterned surface, as shown in Figure 1.Specifically such as
Under：The foregoing Sapphire Substrate after ICP is etched is put into high temperature sulphur phosphoric acid mixed liquor and is etched, wherein temperature is
150~300 degree, the ratio of sulfuric acid and phosphoric acid can be 1:1~10:1.
In above-mentioned steps, step 2）For the committed step of this preparation method, it is required between each raised structures 210
Join domain be etched into small convex surface 220 so that plane is not present in bonding pad between each raised structures 210, so as to ensure
Step 3）Patterning shown in Fig. 1 can be obtained by wet etching.
Fig. 9 shows a kind of flow chart for making light emitting diode implemented according to the present invention, including step S01 ~ S05,
Wherein step S01 ~ S03 formation graphical sapphire substrates, step S04 is to be formed using PVD on graphical sapphire substrate
AlN layers, step S05 is in the luminous extension lamination of AlN layers of Epitaxial growth.Each step is briefly described below, wherein walking
Rapid 01 ~ 03 refers to preceding description.
Step S04：Using PVD methods, the graphical sapphire substrate formed in the method using step S01 ~ S03
AlN layers of surface Shang Xing faces one, the thickness of this layer is 10 angstroms~200 angstroms.
Step S05：Using epitaxial growth regime, grown buffer layer 120, n-type semiconductor layer 130, the and of luminescent layer 140 successively
P-type semiconductor layer 150, wherein cushion 120 are the material based on III group-III nitride, it is preferred to use gallium nitride, can also be used
Aluminium nitride material or Al-Ga-N material；N-type semiconductor layer 130 is preferably gallium nitride, can also use Al-Ga-N material, silicon doping
Preferred concentration is 1 × 1019cm-3；Luminescent layer 140 is is preferably to have at least one quantum well structure, preferably with 5 ~ 50
To quantum well constitution；P layers of semiconductor layer 150 are preferably gallium nitride, using mg-doped, and doping concentration is 1 × 1019~5×1021
cm-3, preferably p-type semiconductor layer be sandwich construction, including p-type electronic barrier layer, p-type electric-conducting layer and P type contact layer, wherein p
Type electronic blocking is close to luminescent layer 140, thick for stopping that electronics enters p-type layer and hole-recombination, it is preferred to use Al-Ga-N material
Degree can be 50 ~ 200nm.
Figure 10 shows the light emitting diode using the formation of preparation method shown in Fig. 9, and its structure includes：Graphic sapphire
Substrate 100, AlN layers 110, cushion 120, n-type semiconductor layer 1300, luminescent layer 140 and p-type semiconductor layer 150.It is luminous at this
In diode, c faces are not present on the aufwuchsplate of the graphical sapphire substrate of use, wearing of being formed on C faces can be effectively eliminated
Saturating dislocation, lifts the crystal mass of epitaxial structure；An AlN layers is initially formed on a sapphire substrate by PVD modes, can be used as and be planted
Sublayer, beneficial to the growth of follow-up luminous extension lamination；In addition, being not present on the aufwuchsplate of whole figure Sapphire Substrate flat
Face, increases the region of reflection and the scattering of light, is conducive to more light to project light emitting diode, substantially increases LED light
Recovery rate.
Claims (12)
1. graphical sapphire substrate, with relative first surface and second surface, wherein first surface has a series of rule
The first size d1 then arranged first connecting portion, it is characterised in that：Do not deposit bonding pad between each described first connecting portion
In C faces（I.e.（0001）Face）, triangle between three adjacent first connecting portions, each triangle interior tool
Have a second size d2 second connecting portion, the first connecting portion with second connecting portion directly or with curved surface be connected so as to
So that the bonding pad, which is not present between C faces, four adjacent first connecting portions, constitutes rhombus, wherein, in long-diagonal
Between there are two second connecting portions, the 3rd jut between short diagonal with a 3rd size d3, wherein
D3 ＜ d2 ＜ d1.
2. graphical sapphire substrate according to claim 1, it is characterised in that：The first connecting portion does not have C faces.
3. graphical sapphire substrate according to claim 1, it is characterised in that：The second connecting portion does not have C faces.
4. graphical sapphire substrate according to claim 1, it is characterised in that：The first surface does not have C faces.
5. graphical sapphire substrate according to claim 1, it is characterised in that：Have between described two second connecting portions
There is a depressed part, its lowest part is the peak of the 3rd jut.
6. graphical sapphire substrate according to claim 1, it is characterised in that：The second connecting portion is to be main by three
The cone that individual inclined plane is constituted, each main inclined plane corresponds to three first connecting portions respectively.
7. graphical sapphire substrate according to claim 6, it is characterised in that：The inclined plane of the second connecting portion with
The angle in Sapphire Substrate C faces is 10 ° ~ 40 °.
8. graphical sapphire substrate according to claim 1, it is characterised in that：The height h1 of the first connecting portion with
The height h2 of second connecting portion ratio is 2 ~ 50.
9. graphical sapphire substrate according to claim 1, it is characterised in that：The first connecting portion accounts for described first
The 50% ~ 90% of total surface area.
10. graphical sapphire substrate according to claim 1, it is characterised in that：The top of the first connecting portion is
Cone and it is projected as circular or polygon in C faces.
11. light emitting diode, including graphical sapphire substrate, the luminous extension for being formed at the graphical sapphire substrate are folded
Layer, it is characterised in that：The graphical sapphire substrate uses graphical blue precious described in any one in claim 1 ~ 10
Stone lining bottom.
12. light emitting diode according to claim 11, it is characterised in that：On the surface of the graphical sapphire substrate
With one layer using the PVD AlN layers formed, the luminous extension lamination is formed on described AlN layers.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410832667.8A CN104465926B (en) | 2014-12-29 | 2014-12-29 | Graphical sapphire substrate and light emitting diode |
| PCT/CN2015/097562 WO2016107412A1 (en) | 2014-12-29 | 2015-12-16 | Patterned sapphire substrate and light emitting diode |
| US15/422,216 US9947830B2 (en) | 2014-12-29 | 2017-02-01 | Patterned sapphire substrate and light emitting diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410832667.8A CN104465926B (en) | 2014-12-29 | 2014-12-29 | Graphical sapphire substrate and light emitting diode |
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| Publication Number | Publication Date |
|---|---|
| CN104465926A CN104465926A (en) | 2015-03-25 |
| CN104465926B true CN104465926B (en) | 2017-09-29 |
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| CN201410832667.8A Active CN104465926B (en) | 2014-12-29 | 2014-12-29 | Graphical sapphire substrate and light emitting diode |
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Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016107412A1 (en) * | 2014-12-29 | 2016-07-07 | 厦门市三安光电科技有限公司 | Patterned sapphire substrate and light emitting diode |
| WO2017076119A1 (en) * | 2015-11-03 | 2017-05-11 | 厦门市三安光电科技有限公司 | Patterned sapphire substrate, light emitting diode, and manufacturing methods therefor |
| CN109103310A (en) * | 2018-09-03 | 2018-12-28 | 淮安澳洋顺昌光电技术有限公司 | A kind of epitaxial wafer and growing method promoting gallium nitride based LED light emitting diode antistatic effect |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103069541A (en) * | 2010-08-06 | 2013-04-24 | 日亚化学工业株式会社 | Sapphire substrate and semiconductor light emitting device |
| CN103337576A (en) * | 2013-06-09 | 2013-10-02 | 武汉迪源光电科技有限公司 | Patterned substrate, manufacturing method of patterned substrate, LED chip and manufacturing method of LED chip |
| CN103545411A (en) * | 2013-10-30 | 2014-01-29 | 华南理工大学 | LED patterned substrate with main patterns and secondary patterns and LED chip |
-
2014
- 2014-12-29 CN CN201410832667.8A patent/CN104465926B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103069541A (en) * | 2010-08-06 | 2013-04-24 | 日亚化学工业株式会社 | Sapphire substrate and semiconductor light emitting device |
| CN103337576A (en) * | 2013-06-09 | 2013-10-02 | 武汉迪源光电科技有限公司 | Patterned substrate, manufacturing method of patterned substrate, LED chip and manufacturing method of LED chip |
| CN103545411A (en) * | 2013-10-30 | 2014-01-29 | 华南理工大学 | LED patterned substrate with main patterns and secondary patterns and LED chip |
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| CN104465926A (en) | 2015-03-25 |
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