CN104461452A - Method and device for generating true random numbers in system on chip - Google Patents
Method and device for generating true random numbers in system on chip Download PDFInfo
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- CN104461452A CN104461452A CN201310424544.6A CN201310424544A CN104461452A CN 104461452 A CN104461452 A CN 104461452A CN 201310424544 A CN201310424544 A CN 201310424544A CN 104461452 A CN104461452 A CN 104461452A
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Abstract
The invention discloses a method and a device for generating true random numbers in a system on chip. The method includes that firstly, output of a single-ended ring oscillator in the system on chip serves as input of a noise clock; secondly, an independent reference clock serves as a sampling clock, and the input is sampled at the clock edge of the sampling clock; thirdly, 1bit output obtained by sampling by a Bit-to-word buffer is subjected to translocation store to obtain two groups of 128-bit data signals; finally, the obtained two groups of data signals are marked as a first group and a second group of random data, the first group of random data is taken as plaintext of an AES algorithm, the second group of random data is taken as a key of the AES algorithm, and the AES (advanced encryption standard) algorithm is carried out to acquire the true random numbers. The method and device can be applied to the system on chip in the field of information security, and is high in security performance, short in design cycle and easy to implement.
Description
Technical field
The present invention relates to a kind of data sampling and generate method and apparatus, particularly the production method of true random number and device in a kind of SOC (system on a chip), belong to information security field.
Background technology
Today of information age, various information products have become the indispensable articles for use of our life.The height of these information products security performances becomes the focus of manufacturer and customer concern.In order to ensure the use achievement enjoying these information products that consumer is good, therefore require implantation safety encipher system necessary in these products.Random number is the foundation stone of the information safety system based on contemporary cryptology.In RESEARCH OF CHAOS-BASED SECURITY COMMUNICATION system, cipher system and algorithm itself can be disclosed, and access strategy can be announced, and encryption device may be lost, and the security requirement of system is unaffected.The security of whole system places one's entire reliance upon the formation efficiency of random number sequence and quality.Therefore, the effect of high-quality random number in information safety system holds the balance, if the randomness of random number is safe not, whole system very likely victim is broken through.Random number sequence in information safety system requires to have enough length and cycle, and entropy high as far as possible, namely has randomness and the unpredictability of height.
The random number possessing good random character is the key successfully realizing safety encipher.For the security system of many use pseudo random numbers, pseudo random number is doomed to become the bottleneck that their performances improve.Even if the miscellaneous part of a security system all safe enoughs, use pseudo random number that whole system also can be made to become very fragile, be vulnerable to attack.True random number because of its randomness strong, extensive application in, intelligent decision auxiliary in data encryption, information and initialization vector;
Therefore, in the design of SOC (system on a chip), if having higher requirement to randomizer performance, then usually adopt real random number generator.The generation of true random number, then will by means of the digital physics that engineering design is good random source, namely utilize the random nature of some physical processes.But be not the random number that physical process (hardware) produces be exactly true random number, some of them physical process whether also it is hard to tell by true random, and more some system only adopts hardware fixed logic to accelerate the generation of pseudo random number.Just there is the problem that a quality of random numbers detects in this.In all random series quality determining methods, the AIS-31 testing standard that the Information Security Standard FIPS140-2 about cryptographic system issued with American National technical standard office NIST and German federal message safety office BSI issues is the most famous.Specify the quality index of multiple test mode to random number sequence in these standards to test, to replace conventional randomness statistical test.Compared with same class standard, the criterion of acceptability of FIPS140-2 and AIS-31 is stricter.
But the production method of existing true random number is too complicated tediously long, and its EM equipment module related to is also many, the generation of true random number fast and safely cannot be realized in SOC (system on a chip).
Summary of the invention
Technical matters to be solved by this invention is to provide a kind of method and apparatus generating true random number in SOC (system on a chip).
For solving the problems of the technologies described above, the present invention is achieved through the following technical solutions:
Generate a method for true random number in SOC (system on a chip), it comprises the following steps:
The output of the single-ended ring oscillator in SOC (system on a chip) is inputted as noisy clock;
Using independent reference clock as sampling clock, on the clock edge of sampling clock, input is sampled;
The 1bit utilizing Bit-to-word impact damper to obtain sampling exports and carries out shift LD, obtains the data-signal of two groups 128;
Obtain two groups of data-signals are designated as first group and second group, using the data in first group as aes algorithm (Advanced Encryption Standard, i.e. Advanced Encryption Standard) plaintext, using the key of the data in second group as aes algorithm, carry out aes algorithm computing, obtain true random number.
The method of true random number is generated, wherein: the single-ended ring oscillator in described SOC (system on a chip) is made up of 17 grades of reverser loops in above-mentioned SOC (system on a chip).
Further, in above-mentioned SOC (system on a chip), generate the method for true random number, wherein: described sampling adopts the mode of low speed ripple sampling fast wave to realize the generation of true random number.
Further, in above-mentioned SOC (system on a chip), generate the method for true random number, wherein: between the 1bit data that described sampling obtains and aes algorithm, adopt Bit-to-word impact damper to carry out data buffering.
The invention allows for the device generating true random number in a kind of SOC (system on a chip), described device comprises:
Oscillator, produces random number sequence, as the input of noisy clock;
Sampling thief, samples to above-mentioned input;
Data buffer, the 1bit obtained sampling exports and carries out shift LD, obtains the data-signal of two groups 128;
Two groups of data-signals obtained above are designated as first group and second group of random data, carry out aes algorithm computing by aes algorithm arithmetical unit, obtain true random number.
Generate the device of true random number in above-mentioned SOC (system on a chip), wherein said oscillator is differential oscillator, single ended oscillator or mixer oscillator.
Further, generate the device of true random number in above-mentioned SOC (system on a chip), wherein said oscillator is single-ended ring oscillator.
Further, generate the device of true random number in above-mentioned SOC (system on a chip), wherein said sampling thief is sampling clock, samples to input on the clock edge of sampling clock.
Further, generate the device of true random number in above-mentioned SOC (system on a chip), wherein sampling clock is sampled each time and can be produced a random order.
Further, generate the device of true random number in above-mentioned SOC (system on a chip), wherein said impact damper is Bit-to-word impact damper.
Further, generate the device of true random number in above-mentioned SOC (system on a chip), wherein aes algorithm arithmetical unit is using the plaintext of first group of random data as aes algorithm, using the key of second group of random data as aes algorithm, carries out aes algorithm computing.
The marked improvement of technical solution of the present invention is mainly reflected in: utilize the noise that the single-ended ring oscillator in SOC (system on a chip) produces, through over-sampling and data processing, obtain a random number sequence, on the not reproducible and equally distributed basis of guarantee random series, again by cryptographic algorithm, algorithm computing is carried out to random series, obtain true random number truly.Stochastic source of the present invention is based upon on the basis of natural statistics outline phenomenon, do not depend on any artificial seed, achieve very random generation, be used in the SOC (system on a chip) of information security field, not only condition restriction is little, security performance is high but also the design cycle is short, is a kind of design proposal of high performance-price ratio.As can be seen here, the present invention has significant technical progress, has broad application prospects.
Accompanying drawing explanation
Fig. 1 is the method implementation process schematic diagram generating true random number in embodiment of the present invention SOC (system on a chip);
Fig. 2 is the structure drawing of device generating true random number in embodiment of the present invention SOC (system on a chip).
Embodiment
True random-number generating method refers to the generation of the random number utilizing physical method to realize.Various random physical process such as the thermonoise of cosmic noise, circuit and radioactivity decay all can be used to produce random physical signal.Most of random number generating schemes can be classified as three classes usually: amplifying circuit noise, chaos circuit, vibration sampling.In SOC (system on a chip), shortage effective method shields the noise signal from voltage source and substrate, therefore cannot adopt amplifying circuit Noise Method; Having determinacy noise to deposit in case, due in sampling process along with nonlinear chaos phenomenon, so present invention employs the oscillator sample method having more superiority, compared with other two kinds of methods, it more simply, more easily realizes.
The present invention is the method and the device that generate true random number in a kind of SOC (system on a chip), utilize LF oscillator sampling high frequency oscillator, thus generation random number series, data buffering is carried out again by Bit-to-word impact damper, the data obtained are carried out the computing of AES encryption algorithm, obtains real random number.
Oscillator comprises differential oscillator, single ended oscillator and mixer oscillator, the susceptibility of usual differential oscillator to power supply and ground noise is not so good as single ended oscillator, in addition, differential oscillator design needs the circuit layout of customization, so cannot be integrated in the SOC (system on a chip) of standard block.Therefore, the simplest directly normally single-ended ring oscillator of solution in SOC (system on a chip), as shown in Figure 2, the output of single-ended ring oscillator inputs as noisy clock, i.e. the step S1 of Fig. 1.Described single-ended ring oscillator is made up of 17 grades of reverser loops.
As follows specifically: the method for oscillator sample utilizes the phase noise of free oscillation device to produce random series (ideally noise is the accessory substance of MOSFET thermonoise); The output of free oscillation device inputs as noisy clock, and independent reference clock, as sampling clock (Fig. 2), is sampled to input on the clock edge of sampling clock; The phase jitter of free oscillation device makes sampling have value to have uncertainty, and ideal situation is sampled each time and can be produced a random order; This randomness can adjust by selecting artificially noisy clock and sample clock frequency ratio, i.e. step S2.Described sampling adopts the mode of low speed ripple sampling fast wave to realize the generation of true random number.
Again further, produce in true random number method in actual design, also the random number that stochastic source produces will be processed, enable the random series of output better meet test for randomness.Therefore the present invention also comprises data buffer Bit-to-word Buffer, and the function of this impact damper is that the 1bit obtained sampling exports and carries out displacement and move and deposit, and obtains the random series of two groups 128, i.e. step S3.
Immediately, two groups 128 altogether the random series of 256 stored in rear, these two groups of random signals are designated as first group of random data and second group of random data respectively.Using first group of random data as the plaintext in aes algorithm, using the key of second group of random data as aes algorithm, in aes algorithm arithmetical unit, carry out once complete AES computing, be step S4.After this algorithm, obtain final true random number.
Also can see by reference to the accompanying drawings from above-mentioned character express, the noise that the present invention utilizes the single-ended ring oscillator of SOC (system on a chip) to produce, through over-sampling and data buffer storage, produce real random series, on the not reproducible and equally distributed basis of guarantee random series, again by cryptographic algorithm, algorithm computing is carried out to random series, obtain true random number truly.Stochastic source of the present invention is based upon on the basis of natural statistics outline phenomenon, do not depend on any artificial seed, achieve real random number generator, be used in the SOC (system on a chip) of information security field, not only condition restriction is little, widely applicable, and security performance is high, the design cycle is short, belongs to a kind of design proposal of high performance-price ratio.
Above embodiment is only for illustration of the present invention; and be not limitation of the present invention; the those of ordinary skill of relevant technical field; without departing from the spirit and scope of the present invention; can also make a variety of changes and modification; therefore all equivalent technical schemes also belong to category of the present invention, and scope of patent protection of the present invention should be defined by the claims.
Claims (11)
1. generate a method for true random number in SOC (system on a chip), it is characterized in that, comprise the following steps:
The output of the single-ended ring oscillator in SOC (system on a chip) is inputted as noisy clock;
Using independent reference clock as sampling clock, on the clock edge of sampling clock, input is sampled;
The 1bit utilizing Bit-to-word impact damper to obtain sampling exports and carries out shift LD, obtains the data-signal of two groups 128;
Obtain two groups of data-signals are designated as first group and second group of random data, using the plaintext of first group of random data as aes algorithm, using the key of second group of random data as aes algorithm, carry out aes algorithm computing, obtain true random number.
2. generate a method for true random number in SOC (system on a chip) as claimed in claim 1, it is characterized in that: the single-ended ring oscillator in described SOC (system on a chip) is made up of 17 grades of reverser loops.
3. in a SOC (system on a chip) as claimed in claim 1, generate the method for true random number, it is characterized in that: described using independent reference clock as sampling clock, at the clock of sampling clock along being adopt the mode of low speed ripple sampling fast wave to realize the generation of true random number to inputting the step of sampling.
4. generate a method for true random number in SOC (system on a chip) as claimed in claim 1, it is characterized in that: between the 1bit data that described sampling obtains and aes algorithm, adopt Bit-to-word impact damper to carry out data buffering.
5. generate a device for true random number in SOC (system on a chip), described device comprises:
Oscillator, produces random number sequence, as the input of noisy clock;
Sampling thief, samples to above-mentioned input;
Data buffer, the 1bit obtained sampling exports and carries out shift LD, obtains the data-signal of two groups 128;
Two groups of data-signals obtained above are designated as first group and second group of random data, carry out aes algorithm computing by aes algorithm arithmetical unit, obtain true random number.
6. generate a device for true random number in SOC (system on a chip) as claimed in claim 5, it is characterized in that: described oscillator is differential oscillator, single ended oscillator or mixer oscillator.
7. generate a device for true random number in SOC (system on a chip) as claimed in claim 5, it is characterized in that: described oscillator is single-ended ring oscillator.
8. generate a device for true random number in SOC (system on a chip) as claimed in claim 5, it is characterized in that: described sampling thief is sampling clock, on the clock edge of sampling clock, input is sampled.
9. generate a device for true random number in SOC (system on a chip) as claimed in claim 8, it is characterized in that: sampling clock is sampled each time and can be produced a random order.
10. in a SOC (system on a chip) as claimed in claim 5, generate the device of true random number, it is characterized in that: described impact damper is Bit-to-word impact damper, adopting Bit-to-word impact damper to carry out data buffering for what obtain sampling between 1bit data and aes algorithm.
The device of true random number is generated in 11. 1 kinds of SOC (system on a chip) as claimed in claim 5, it is characterized in that: aes algorithm arithmetical unit is using the plaintext of first group of random data as aes algorithm, using the key of second group of random data as aes algorithm, carry out aes algorithm computing.
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| CN107577964A (en) * | 2017-09-07 | 2018-01-12 | 西安电子科技大学 | Electromagnetic information hidden method based on random sequence interference and gate circuit path constraint |
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