CN107577964A - Electromagnetic information hidden method based on random sequence interference and gate circuit path constraint - Google Patents
Electromagnetic information hidden method based on random sequence interference and gate circuit path constraint Download PDFInfo
- Publication number
- CN107577964A CN107577964A CN201710798830.7A CN201710798830A CN107577964A CN 107577964 A CN107577964 A CN 107577964A CN 201710798830 A CN201710798830 A CN 201710798830A CN 107577964 A CN107577964 A CN 107577964A
- Authority
- CN
- China
- Prior art keywords
- electromagnetic information
- random sequence
- pin
- frequency
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Storage Device Security (AREA)
Abstract
The present invention proposes a kind of electromagnetic information hidden method based on random sequence interference and gate circuit path constraint, and serious technical problem is revealed for solving crypto chip electromagnetic information when small range present in prior art detects electromagnetic information.Realize that step is：Input clock is divided using frequency divider to obtain f1, the pseudo random number changed over time is obtained by random sequence generator, f1 is divided using pseudo random number to obtain the random sequence f2 of frequency accidental change；The electromagnetic information near password output pin is disturbed using random sequence f2, makes the mutual aliasing of electromagnetic information of the electromagnetic information and random sequence of the leakage of password output pin, can not separate；Crypto module electromagnetic information is broken up, realizes and concentrates electromagnetic information to disperse script, the electromagnetic information of crypto module can not be detected in a small range.The present invention can be used in the fields such as anti-bypass attack the confidentiality for strengthening password.
Description
Technical field：
The invention belongs to field of information security technology, is related to a kind of based on random sequence interference and gate circuit path constraint
Electromagnetic information hidden method, available for the confidentiality for strengthening password in the fields such as anti-bypass attack.
Background technology：
Human society now comes into the information age, and socially various activities all rely on information technology to people, so as to
So that Information Technology Equipment retrieves extensive help in human society.It brings rapid development to human society every field
While, also bring the problem of many unexpected.The security work of crypto chip be exactly wherein the most distinct issues it
One.
Crypto chip is the IC chip for having crypto-operation function, its core as information safety system
Part, its security concern the safety of whole information system.As long as in the past it has been recognized that can mathematically design enough
The cryptographic algorithm of intensity, and formulate some security protocol cans and preferably defend various types of attacks.But bypass attack
Theoretical appearance brings great challenge to chip secure.Attacker is by believing the lie revealed during crypto chip computing
Breath is collected the key messages such as processing and analysis, the key of decryption chip internal that can be rapidly and efficiently.In anti-bypass
In attack field, invader is obtained electromagnetic information or consumption information and analyzed by detection, will greatly reduce crack it is close
The difficulty of code.Energy consumption, the information such as electromagnetic information revealed when therefore by chip operation can stash in anti-bypass attack field
In have highly important effect.
It is the method by increasing clock crosstalk signal mostly in the method that existing electromagnetic information is hidden, adds dry
The electromagnetic information disturbed, the electromagnetic information that generation is disturbed can not be separated with the electromagnetic information for producing password.Such as apply for notification number
CN105607687A, the patent application of entitled " a kind of clock crosstalk implementation method of anti-bypass attack ", disclose a kind of anti-
The electromagnetic information hidden method of bypass attack.It is 1/4 cycle that phase delay is carried out to input clock and produces four phase differences
Clock, and point neck number are 2,3,4 or 5 switching at runtime frequency-dividing clock, totally five clock sources, by random in five clocks
Select to export as clock all the way in source, while frequency-dividing clock randomly chooses between 2 to 5 divider ratios, often selects clock all the way
Afterwards, this clock durations number also randomly chooses in 16 clocks between 31 clocks, eventually through random selection clock source,
The durations of each random clock source produce the crosstalk clock of a phase and frequency stochastic transformation, and bypass attack is to power consumption
Measurement with electromagnetic radiation is on the basis of the stabilizing clock cycle, and for the clock after scrambling, power consumption and electromagnetic radiation can not
Using the same clock cycle as reference measurement, increase the difficulty of bypass attack.When carrying out the measurement of large area electromagnetic information, the party
Method can stash electromagnetic information, but with high-precision small range detection device, can not will be close after repeatedly measurement
The electromagnetic information of crypto module working region is hidden in code output pin and chip, causes electromagnetic information to be revealed, the easy quilt of password
Crack.
The content of the invention：
The purpose of the present invention is to be to overcome above-mentioned the shortcomings of the prior art, it is proposed that one kind is done based on random sequence
The electromagnetic information hidden method with gate circuit path constraint is disturbed, increases random sequence interference near password output pin and passes through
Gate circuit path constraint is broken up to crypto module electromagnetic information, and electromagnetism is detected to solve small range present in prior art
Crypto chip electromagnetic information reveals serious technical problem during information.
To achieve the above object, the technical scheme that the present invention takes comprises the following steps：
(1) random sequence f2 is obtained：
(1a) divides to FPGA input clock, obtains the clock that frequency triggers n times of clock frequency for crypto module
F1, wherein n >=20；
(1b) carries out computing using the shift register of setting to any nonlinear function, obtains pseudo random number t, displacement is posted
The getable greatest measure value of storage institute is 2n；
(1c) is used and pseudo random number t is updated with clock f1 identicals frequency, the random number changed over time
t’；
(1d) is divided using random number t ' to clock f1, obtains the random output sequence f2 of output frequency；
(2) electromagnetic information near password output pin is disturbed using random sequence f2：
Using the output sequence f2 of frequency accidental as FPGA output sources, chip password output pin pin position is checked, and
The output sequence f2 of frequency accidental output pin is set at the pin that pin pin closes on, reveals password output pin
Electromagnetic information and random sequence f2 the mutual aliasing of electromagnetic information, realize to electromagnetic information near password output pin pin
Hide；
(3) crypto module electromagnetic information is broken up：User is interior when working fpga chip using FPGA exploitation softwares
Department's circuit paths enter row constraint, and the gate circuit for carrying out crypto-operation will be concentrated to be distributed to logic array in original working region
Edge, realize disperseing for the electromagnetic information concentrated originally to chip surface.
The present invention compared with prior art, has advantages below：
1. the present invention random output sequence of output frequency near chip password output pin, lets out password output pin
The mutual aliasing of electromagnetic information of the electromagnetic information and random sequence f2 of dew, is realized to the small range electromagnetism near password output pin
Information is disturbed, avoid password output pin in the prior art a small range leakage electromagnetic information the defects of, effectively
Improve the security of crypto chip.
Interior door circuit paths enter row constraint when 2. the present invention is by working fpga chip, by original working region Zhong Ji
The middle part for carrying out crypto-operation is distributed to the edge of logic array, realizes and concentrates electromagnetic information to divide originally chip surface
Dissipate, avoid the electromagnetic information that chip surface crypto module working region is revealed in a small range in the prior art, further carry
The high security of crypto chip.
Brief description of the drawings
Fig. 1 is the structural representation that the applicable electromagnetic information of the present invention hides system；
Fig. 2 is the implementation process figure of the present invention.
Fig. 3 crypto modules output sequence and the electromagnetic information reference picture for not making any processing
Fig. 4 crypto modules output sequence and crypto module add the electromagnetic information reference picture of random sequence
Fig. 5 does not carry out gate circuit path constraint crypto module working region electromagnetic information and after gate circuit path enters row constraint
The electromagnetic information reference picture of crypto module working region
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention will be described in further detail：
Reference picture 1, the applicable electromagnetic information of the present invention, which hides system, includes random sequence interference module and crypto module electricity
Magnetic information breaks up part；Random sequence interference module is made up of two frequency dividers and a random number generator, and frequency divider 1 is first
FPGA input clocks are divided, random number generator produces the pseudo random number changed over time, and frequency divider 2 passes through random number
The pseudo random number that maker obtains divides to the output clock that frequency divider 1 obtains.Crypto module electromagnetic information breaks up part,
Interior door circuit paths enter row constraint when working fpga chip, and by being concentrated in original working region, the door for carrying out crypto-operation is electric
Road is distributed to the edge of logic array.
Reference picture 2, the electromagnetic information hidden method based on random sequence interference and gate circuit constraint, comprises the following steps：
Step 1：Obtain random sequence f2：
Step 1a：FPGA input clock is divided, obtain frequency for crypto module trigger n times of clock frequency when
Clock f1, wherein n >=20；
The implementation case is based on Xilinx FPGA exploitation versions and realized, utilizes Xilinx FPGA programming devices, Ke Huke
With the circuit for quickly designing and verifying them, electromagnetism observation platform is built, electromagnetic probe, oscillograph, introduces FPGA exploitation versions
Crystal oscillator clock be clk, clk=50MHz, triggered using rising edge and divide clk to obtain f1, the f1 frequencies are touched for crypto module
The value of n times, n >=20, n of clock frequency of hair is relevant with the digit of following shift registers, and n value is smaller, the digit of register
Fewer, the randomness of pseudo random number is poor, causes random sequence f2 randomnesss poor, and the implementation case takes n=64, crypto module triggering
Clock frequency is 5KHz, using magnetic field near field probes, resolution ratio 10mm, crypto module output sequence and electromagnetic information reference picture 3,
Top half is the electromagnetic information of crypto module, and the latter half is crypto module output sequence, finds the output in crypto module
Electromagnetism has obvious pulse when sequence 0-1 changes, and electromagnetic information and crypto module list entries are mutually corresponding；
Step 1b：Computing is carried out to any nonlinear function using the shift register of setting, pseudo random number t is obtained, moves
The getable greatest measure value of bit register institute is 2n；
Set 7 bit shift register ff, 27=2 × 64, pseudo random number t is generated using 7 bit register ff, first 7 are posted
Storage ff assigns initial value ff=7 ' b1010011, pseudo random number t is obtained by the way of the lowest order linear operation of displacement, using f1
Rising edge triggering is updated to t:
T=ff [6]:Ff [6] value is assigned to t
Ff [6]=(ff [0] ^ff [1]) ^ (ff [2] ^~ff [3]) ^ (ff [4] ^~ff [5]):Ff [6] passes through above 6
Nonlinear operation obtains
Ff [5]=ff [4]:Ff [4] is assigned to ff [5]
Ff [4]=ff [3]：Ff [3] is assigned to ff [4]
Ff [3]=ff [2]：Ff [2] is assigned to ff [3]
Ff [2]=ff [1]：Ff [1] is assigned to ff [2]
Ff [1]=ff [0]：Ff [0] is assigned to ff [1]
Ff [0]=ff [6]：Ff [6] is assigned to ff [0]
Step 1c：Pseudo random number t is updated using with clock f1 identicals frequency, what is changed over time is random
Number t '；
Step 1d:Clock f1 is divided using random number t ', obtains the random output sequence f2 of output sequence width,
Using magnetic field near field probes, resolution ratio 10mm, crypto module output sequence and electromagnetic information reference picture 4, top half is password
Module adds the electromagnetic information of random sequence, and the latter half is crypto module output sequence, and observation obtains：Add random sequence
Electromagnetic information conceals the electromagnetic information of crypto module output sequence；
Step 2：The electromagnetic information near password output pin is disturbed using random sequence f2：
Using the output sequence f2 of frequency accidental as FPGA output sources, chip password output pin pin position is checked, and
The output sequence f2 of frequency accidental output pin is set at the pin that pin pin closes on, reveals password output pin
Electromagnetic information and random sequence f2 the mutual aliasing of electromagnetic information, realize to electromagnetic information near password output pin pin
Hide；
Step 3：Crypto module electromagnetic information is broken up：User uses Xilinx FPGA exploitation softwares PlanAhead
Interior door circuit paths when constraining chip operation, the distribution situation of gate circuit inside fpga chip is understood by software, will be original
Concentrate the part for carrying out crypto-operation to be distributed to the edge of logic array in working region, realize and electromagnetic information is concentrated to script
It is scattered, using the magnetic field near field probes of high-precision small range, resolution ratio 2mm probe detection, do not carried out gate circuit road
Footpath constrains crypto module working region electromagnetic information and the electromagnetism letter of crypto module working region after row constraint is entered in gate circuit path
Reference picture 5 is ceased, top half is not carry out gate circuit path constraint crypto module working region electromagnetic information, and the latter half is door
Circuit paths enter the electromagnetic information of crypto module working region after row constraint, and observation is obtained after gate circuit constrains, realized
The electromagnetic information concentrated to script it is scattered, it is ensured that realize crypto module when high-precision small range detects electromagnetic information it is hidden
Hide.
Above-described embodiment only with the implementation method of the specific implementation explanation present invention, can there is various deformation on this basis,
This structure change based on the present invention is all contained within protection scope of the present invention.
Claims (2)
1. a kind of electromagnetic information hidden method based on random sequence interference and gate circuit path constraint, it is characterised in that including such as
Lower step：
(1) random sequence f2 is obtained：
(1a) divides to FPGA input clock, obtains the clock f1 that frequency triggers n times of clock frequency for crypto module, its
Middle n >=20；
(1b) carries out computing using the shift register of setting to any nonlinear function, obtains pseudo random number t, shift register
The getable greatest measure value of institute is 2n；
(1c) is used and pseudo random number t is updated with clock f1 identicals frequency, the random number t ' changed over time；
(1d) is divided using random number t ' to clock f1, obtains the random output sequence f2 of output frequency；
(2) electromagnetic information near password output pin is disturbed using random sequence f2：
Using the output sequence f2 of frequency accidental as FPGA output sources, chip password output pin pin position is checked, and incite somebody to action frequency
The random output sequence f2 of rate output pin is set at the pin that pin pin closes on, the electricity for revealing password output pin
The mutual aliasing of magnetic information and random sequence f2 electromagnetic information, realize and electromagnetic information near password output pin pin is hidden；
(3) crypto module electromagnetic information is broken up：User is using FPGA exploitation softwares, interior door when working fpga chip
Circuit paths enter row constraint, the corner that the gate circuit for carrying out crypto-operation will be concentrated to be distributed to logic array in original working region
Place, realize disperseing for the electromagnetic information concentrated originally to chip surface.
2. the electromagnetic information hidden method according to claim 1 based on random sequence interference and gate circuit constraint, it is special
Sign is that interior door circuit paths when working fpga chip described in step (3) enter row constraint, is specially：For
Altera development boards, directly sql files are modified and set, realize interior door circuit paths when working fpga chip
Constraint, for xilinx development boards, interior door circuit paths when working fpga chip are directly realized by using PlanAhead softwares
Constraint.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710798830.7A CN107577964B (en) | 2017-09-07 | 2017-09-07 | Electromagnetic information hiding method based on random sequence interference and gate circuit path constraint |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710798830.7A CN107577964B (en) | 2017-09-07 | 2017-09-07 | Electromagnetic information hiding method based on random sequence interference and gate circuit path constraint |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107577964A true CN107577964A (en) | 2018-01-12 |
| CN107577964B CN107577964B (en) | 2019-12-31 |
Family
ID=61031106
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710798830.7A Active CN107577964B (en) | 2017-09-07 | 2017-09-07 | Electromagnetic information hiding method based on random sequence interference and gate circuit path constraint |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN107577964B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109861818A (en) * | 2019-03-06 | 2019-06-07 | 京东方科技集团股份有限公司 | Encryption and decryption circuit, encryption and decryption device and encryption and decryption method |
| CN109885960A (en) * | 2019-03-05 | 2019-06-14 | 中国人民解放军32082部队 | A kind of embedded chip hardware Trojan horse design method based on electromagnetism bypass analysis |
| CN114760003A (en) * | 2022-06-14 | 2022-07-15 | 北京密码云芯科技有限公司 | Encryption protection device for electromagnetic perception attack and use method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201352349Y (en) * | 2008-12-18 | 2009-11-25 | 成都立鑫新技术科技有限公司 | Electronic information protector |
| CN104461452A (en) * | 2013-09-17 | 2015-03-25 | 航天信息股份有限公司 | Method and device for generating true random numbers in system on chip |
| CN105607687A (en) * | 2015-12-22 | 2016-05-25 | 上海爱信诺航芯电子科技有限公司 | Anti-bypass attack clock crosstalk realization method |
| US20160284195A1 (en) * | 2015-03-26 | 2016-09-29 | Bell Helicopter Textron Inc. | Electrical load monitoring system |
-
2017
- 2017-09-07 CN CN201710798830.7A patent/CN107577964B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201352349Y (en) * | 2008-12-18 | 2009-11-25 | 成都立鑫新技术科技有限公司 | Electronic information protector |
| CN104461452A (en) * | 2013-09-17 | 2015-03-25 | 航天信息股份有限公司 | Method and device for generating true random numbers in system on chip |
| US20160284195A1 (en) * | 2015-03-26 | 2016-09-29 | Bell Helicopter Textron Inc. | Electrical load monitoring system |
| CN105607687A (en) * | 2015-12-22 | 2016-05-25 | 上海爱信诺航芯电子科技有限公司 | Anti-bypass attack clock crosstalk realization method |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109885960A (en) * | 2019-03-05 | 2019-06-14 | 中国人民解放军32082部队 | A kind of embedded chip hardware Trojan horse design method based on electromagnetism bypass analysis |
| CN109861818A (en) * | 2019-03-06 | 2019-06-07 | 京东方科技集团股份有限公司 | Encryption and decryption circuit, encryption and decryption device and encryption and decryption method |
| WO2020177438A1 (en) * | 2019-03-06 | 2020-09-10 | Boe Technology Group Co., Ltd. | Circuits for data encryption and decryption, and methods thereof |
| US11349650B2 (en) | 2019-03-06 | 2022-05-31 | Boe Technology Group Co., Ltd. | Circuits for data encryption and decryption, and methods thereof |
| CN114760003A (en) * | 2022-06-14 | 2022-07-15 | 北京密码云芯科技有限公司 | Encryption protection device for electromagnetic perception attack and use method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107577964B (en) | 2019-12-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Markettos et al. | The frequency injection attack on ring-oscillator-based true random number generators | |
| Baumgarten et al. | A case study in hardware Trojan design and implementation | |
| Alkatheiri et al. | An experimental study of the state-of-the-art PUFs implemented on FPGAs | |
| CN107577964A (en) | Electromagnetic information hidden method based on random sequence interference and gate circuit path constraint | |
| Guilley et al. | Security evaluation of WDDL and SecLib countermeasures against power attacks | |
| CN107994980B (en) | DPA attack resisting method adopting clock disorder technology and chaotic trigger | |
| Luo et al. | A high-performance and secure TRNG based on chaotic cellular automata topology | |
| Wang et al. | A silicon PUF based entropy pump | |
| Yao et al. | M-RO PUF: a portable pure digital RO PUF based on MUX Unit | |
| El-Moursy et al. | Chaotic clock driven cryptographic chip: Towards a DPA resistant AES processor | |
| Sangeetha et al. | Authentication of symmetric cryptosystem using anti-aging controller-based true random number generator | |
| Shiozaki et al. | Simple electromagnetic analysis attacks based on geometric leak on an ASIC implementation of ring-oscillator PUF | |
| Zhang et al. | A high reliability physically unclonable function based on multiple tunable ring oscillator | |
| Bahadur et al. | Reconfigurable side channel attack resistant true random number generator | |
| Thangam et al. | A novel logic locking technique for hardware security | |
| Kotipalli et al. | Asynchronous Advanced Encryption Standard Hardware with Random Noise Injection for Improved Side‐Channel Attack Resistance | |
| US9525457B1 (en) | Spread spectrum clock generation using a tapped delay line and entropy injection | |
| Tupparwar et al. | A hybrid true random number generator using ring oscillator and digital clock manager | |
| Gai et al. | Attacking the edge-of-things: A physical attack perspective | |
| Kulkarni et al. | A study on physical unclonable functions based security for internet of things applications | |
| Yevseiev et al. | A HARDWARE CRYPTOSYSTEM BASED ON A RANDOM NUMBER GENERATOR WITH TWO TYPES OF ENTROPY SOURCES | |
| Meka et al. | Metastability Influenced PUF for cryptographic key generation: a FPGA Approach | |
| CN105607687A (en) | Anti-bypass attack clock crosstalk realization method | |
| CN109522605A (en) | Power consumption leakage type hardware Trojan horse based on AES encryption circuit | |
| Hazari | Design and Analysis of Assured and Trusted ICs using Machine Learning and Blockchain Technology |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |