CN107577964A - An Electromagnetic Information Hiding Method Based on Random Sequence Interference and Gate Circuit Path Constraints - Google Patents

Abstract

The present invention proposes a kind of electromagnetic information hidden method based on random sequence interference and gate circuit path constraint, and serious technical problem is revealed for solving crypto chip electromagnetic information when small range present in prior art detects electromagnetic information.Realize that step is：Input clock is divided using frequency divider to obtain f1, the pseudo random number changed over time is obtained by random sequence generator, f1 is divided using pseudo random number to obtain the random sequence f2 of frequency accidental change；The electromagnetic information near password output pin is disturbed using random sequence f2, makes the mutual aliasing of electromagnetic information of the electromagnetic information and random sequence of the leakage of password output pin, can not separate；Crypto module electromagnetic information is broken up, realizes and concentrates electromagnetic information to disperse script, the electromagnetic information of crypto module can not be detected in a small range.The present invention can be used in the fields such as anti-bypass attack the confidentiality for strengthening password.

Description

An Electromagnetic Information Hiding Method Based on Random Sequence Interference and Gate Circuit Path Constraints

Technical field:

The invention belongs to the technical field of information security, and relates to an electromagnetic information hiding method based on random sequence interference and gate circuit path constraints, which can be used to enhance the confidentiality of passwords in fields such as anti-side channel attacks.

Background technique:

Human society has now entered the information age, and people's various activities in society depend on information technology, so that information technology equipment can get extensive help in human society again. While it has brought rapid development to various fields of human society, it has also brought many unexpected problems. The secret work of cryptographic chips is one of the most prominent problems.

A cryptographic chip is an integrated circuit chip with a cryptographic operation function. As the core component of an information security system, its security is related to the security of the entire information system. In the past, it was generally believed that as long as a cryptographic algorithm with sufficient strength can be designed mathematically and some security protocols can be formulated, various types of attacks can be better defended. However, the emergence of side-channel attack theory has brought great challenges to chip security. By collecting, processing and analyzing the bypass information leaked during the operation of the cryptographic chip, the attacker can quickly and efficiently decipher key information such as the key inside the cryptographic chip. In the field of anti-side-channel attacks, intruders can obtain and analyze electromagnetic information or energy consumption information through detection, which will greatly reduce the difficulty of cracking passwords. Therefore, hiding information such as energy consumption and electromagnetic information leaked during chip operation plays a very important role in the field of anti-side-channel attacks.

In the existing methods of hiding electromagnetic information, most of them add disturbing electromagnetic information by adding clock crosstalk signals, so that the electromagnetic information that generates interference and the electromagnetic information that generates passwords cannot be separated. For example, application announcement number CN105607687A, a patent application titled "A Method for Implementing Clock Crosstalk Against Side-Channel Attacks", discloses an electromagnetic information hiding method against side-channel attacks. Phase delay the input clock to generate four clocks with a phase difference of 1/4 cycle, and dynamically switch frequency-divided clocks with a number of points of 2, 3, 4 or 5, a total of five clock sources, through random in five One of the clock sources is selected as the clock output, and the frequency division clock is randomly selected between 2 and 5 frequency division numbers. After each clock is selected, the number of continuous cycles of this clock is also randomly selected between 16 clocks and 31 clocks. Finally, by randomly selecting the clock source, the continuous cycle of each clock source randomly generates a crosstalk clock with random phase and frequency changes. The power consumption and electromagnetic radiation measurement of the side-channel attack is based on the stable clock cycle. For the scrambled The clock, power consumption and electromagnetic radiation cannot be measured with the same clock cycle as a benchmark, which increases the difficulty of side channel attacks. When measuring large-area electromagnetic information, this method can hide the electromagnetic information, but with a high-precision small-range detection device, the electromagnetic information of the password output pin and the working area of the password module in the chip cannot be hidden after repeated measurements , leading to the leakage of electromagnetic information, and the password is easily cracked.

Invention content:

The purpose of the present invention is to overcome the deficiencies in the prior art above, and propose a method for hiding electromagnetic information based on random sequence interference and gate circuit path constraints, adding random sequence interference and pass gate circuit path constraints near the password output pin The electromagnetic information of the cryptographic module is scattered to solve the technical problem of serious leakage of the electromagnetic information of the cryptographic chip when the electromagnetic information is detected in a small range in the prior art.

In order to achieve the above object, the technical solution taken by the present invention comprises the following steps:

(1) Obtain random sequence f2:

(1a) frequency division is carried out to the input clock of FPGA, obtains the clock f1 that frequency is n times of the trigger clock frequency of the cryptographic module, wherein n≥20;

(1b) Use the set shift register to perform operations on any nonlinear function to obtain a pseudo-random number t, and the maximum numerical value that can be obtained by the shift register is 2n;

(1c) Use the same frequency as the clock f1 to update the pseudo-random number t to obtain a random number t' that changes with time;

(1d) Use random number t' to divide clock f1 to obtain output sequence f2 with random output frequency;

(2) Use the random sequence f2 to interfere with the electromagnetic information near the password output pin:

Use the output sequence f2 with random frequency as the FPGA output source, check the position of the chip password output pin, and set the output pin of the output sequence f2 with random frequency at the pin adjacent to the pin pin, so that the password output pin The electromagnetic information leaked by the pin and the electromagnetic information of the random sequence f2 are aliased with each other to realize the hiding of the electromagnetic information near the password output pin pin;

(3) Disperse the electromagnetic information of the cryptographic module: the user uses FPGA development software to restrict the internal gate circuit path when the FPGA chip is working, and disperse the gate circuits that focus on cryptographic operations in the original working area to the corners of the logic array , to realize the dispersion of the electromagnetic information originally concentrated on the chip surface.

Compared with the prior art, the present invention has the following advantages:

1. The present invention outputs an output sequence with a random frequency near the password output pin of the chip, so that the electromagnetic information leaked by the password output pin and the electromagnetic information of the random sequence f2 are aliased with each other, and the small-scale electromagnetic information near the password output pin is realized. The interference avoids the defect of leaking electromagnetic information in a small range of the password output pin in the prior art, and effectively improves the security of the password chip.

2. By constraining the internal gate circuit path when the FPGA chip is working, the present invention disperses the part of the original work area where the cryptographic calculation is concentrated to the corners of the logic array, so as to realize the dispersion of the original concentrated electromagnetic information on the chip surface and avoid In the prior art, the electromagnetic information leaked in a small area in the working area of the cryptographic module on the surface of the chip further improves the security of the cryptographic chip.

Description of drawings

Fig. 1 is a structural schematic diagram of an electromagnetic information hiding system applicable to the present invention;

Fig. 2 is the realization flowchart of the present invention.

Figure 3 The output sequence of the cryptographic module and the reference diagram of the electromagnetic information without any processing

Figure 4 The output sequence of the cryptographic module and the electromagnetic information reference diagram of the random sequence added by the cryptographic module

Figure 5 Reference diagram of electromagnetic information in the working area of the cryptographic module without gate circuit path constraints and electromagnetic information in the working area of the cryptographic module after the gate circuit path is constrained

Detailed ways

Below in conjunction with accompanying drawing and specific embodiment, the present invention is described in further detail:

With reference to Fig. 1, the applicable electromagnetic information hiding system of the present invention comprises random sequence jamming module and code module electromagnetic information break up part; Random sequence jamming module is made up of two frequency dividers and a random number generator, and frequency divider 1 first to The frequency of the FPGA input clock is divided, and the random number generator generates a pseudo-random number that changes with time. The frequency divider 2 divides the frequency of the output clock obtained by the frequency divider 1 through the pseudo-random number obtained by the random number generator. The electromagnetic information dispersal part of the cryptographic module restricts the internal gate circuit path when the FPGA chip is working, and disperses the gate circuits that focus on cryptographic operations in the original working area to the corners of the logic array.

Referring to Figure 2, the electromagnetic information hiding method based on random sequence interference and gate circuit constraints includes the following steps:

Step 1: Get random sequence f2:

Step 1a: Divide the frequency of the input clock of the FPGA to obtain a clock f1 whose frequency is n times the frequency of the trigger clock of the cryptographic module, where n≥20;

This implementation case is based on the Xilinx FPGA development version. Using Xilinx FPGA programmable devices, customers can design and verify their circuits faster, build electromagnetic observation platforms, electromagnetic probes, oscilloscopes, and introduce the crystal oscillator clock of the FPGA development version as clk, clk =50MHz, use rising edge trigger to divide clk frequency to obtain f1, the frequency of f1 is n times of the trigger clock frequency of the cryptographic module, n≥20, the value of n is related to the number of bits of the following shift register, the smaller the value of n , the fewer the number of bits in the register, the less random the pseudo-random number will be, resulting in poor randomness of the random sequence f2. In this implementation case, n=64, the trigger clock frequency of the cryptographic module is 5KHz, using a magnetic field near-field probe with a resolution of 10mm, and the cryptographic module Refer to Figure 3 for the output sequence and electromagnetic information. The upper part is the electromagnetic information of the cryptographic module, and the lower part is the output sequence of the cryptographic module. It is found that when the output sequence of the cryptographic module changes from 0 to 1, the electromagnetic has obvious pulses, electromagnetic information and passwords. Module input sequences correspond to each other;

Step 1b: Use the set shift register to perform operations on any nonlinear function to obtain a pseudo-random number t, and the maximum value that can be obtained by the shift register is 2n;

Set the 7-bit shift register ff, 2 ⁷ =2×64, use the 7-bit register ff to generate a pseudo-random number t, first assign the initial value ff=7'b1010011 to the 7-bit register ff, and use the lowest bit linear operation of the shift The pseudo-random number t is obtained by the method, and the rising edge of f ₁ is used to trigger the update of t:

t=ff[6]: Assign ff[6] value to t

ff[6]=(ff[0]^ff[1])^(ff[2]^~ff[3])^(ff[4]^~ff[5]): ff[6] passes the previous 6 bit nonlinear operation to get

ff[5]=ff[4]: ff[4] is assigned to ff[5]

ff[4]=ff[3]: ff[3] is assigned to ff[4]

ff[3]=ff[2]: ff[2] is assigned to ff[3]

ff[2]=ff[1]: ff[1] is assigned to ff[2]

ff[1]=ff[0]: ff[0] is assigned to ff[1]

ff[0]=ff[6]: ff[6] is assigned to ff[0]

Step 1c: Use the same frequency as the clock f1 to update the pseudo-random number t to obtain a random number t' that changes with time;

Step 1d: use the random number t' to divide the frequency of the clock f1 to obtain the output sequence f2 with a random output sequence width, use a magnetic field near-field probe with a resolution of 10mm, refer to Figure 4 for the output sequence and electromagnetic information of the cryptographic module, the upper part is The cryptographic module adds electromagnetic information of a random sequence, and the lower part is the output sequence of the cryptographic module. It is observed that the electromagnetic information added to the random sequence hides the electromagnetic information of the output sequence of the cryptographic module;

Step 2: Use the random sequence f2 to interfere with the electromagnetic information near the password output pin:

Use the output sequence f2 with random frequency as the FPGA output source, check the position of the chip password output pin, and set the output pin of the output sequence f2 with random frequency at the pin adjacent to the pin pin, so that the password output pin The electromagnetic information leaked by the pin and the electromagnetic information of the random sequence f2 are aliased with each other to realize the hiding of the electromagnetic information near the password output pin pin;

Step 3: Disperse the electromagnetic information of the cryptographic module: the user uses the Xilinx FPGA development software PlanAhead to constrain the internal circuit path of the chip when the chip is working, and understands the distribution of the internal circuit of the FPGA chip through the software, and concentrates the cryptographic operations in the original working area Part of it is scattered to the corners of the logic array to realize the dispersion of the original concentrated electromagnetic information. Using a high-precision and small-range magnetic field near-field probe with a resolution of 2mm for detection, the electromagnetic information in the working area of the cryptographic module without gate circuit path constraints is obtained. Refer to Figure 5 for the electromagnetic information of the working area of the cryptographic module after being constrained by the gate circuit path. Electromagnetic information, after being constrained by the gate circuit, realizes the dispersion of the original concentrated electromagnetic information, ensuring the hiding of electromagnetic information when the cryptographic module detects in a high-precision and small range.

The above-mentioned embodiments only illustrate the realization method of the present invention by specific implementation, and there may be various modifications on this basis, and such structural changes based on the present invention are all included in the protection scope of the present invention.

Claims (2)

1. an electromagnetic information hiding method based on random sequence interference and gate circuit path constraints, is characterized in that comprising the steps: (1) Obtain random sequence f2: (1a) frequency division is carried out to the input clock of FPGA, obtains the clock f1 that frequency is n times of the trigger clock frequency of the cryptographic module, wherein n≥20; (1b) Use the set shift register to perform operations on any nonlinear function to obtain a pseudo-random number t, and the maximum numerical value that can be obtained by the shift register is 2n; (1c) Use the same frequency as the clock f1 to update the pseudo-random number t to obtain a random number t' that changes with time; (1d) Use random number t' to divide clock f1 to obtain output sequence f2 with random output frequency; (2) Use the random sequence f2 to interfere with the electromagnetic information near the password output pin: Use the output sequence f2 with random frequency as the FPGA output source, check the position of the chip password output pin, and set the output pin of the output sequence f2 with random frequency at the pin adjacent to the pin pin, so that the password output pin The electromagnetic information leaked by the pin and the electromagnetic information of the random sequence f2 are aliased with each other to realize the hiding of the electromagnetic information near the password output pin pin; (3) Disperse the electromagnetic information of the cryptographic module: the user uses FPGA development software to restrict the internal gate circuit path when the FPGA chip is working, and disperse the gate circuits that focus on cryptographic operations in the original working area to the corners of the logic array , to realize the dispersion of the electromagnetic information originally concentrated on the chip surface. 2. the method for hiding electromagnetic information based on random sequence interference and gate circuit constraints according to claim 1, is characterized in that, when described in step (3), the internal gate circuit path is constrained when the FPGA chip is working, specifically: For the altera development board, directly modify and set the sql file to realize the constraints on the internal gate circuit path when the FPGA chip is working. For the xilinx development board, use the PlanAhead software to directly realize the constraints on the internal gate circuit path when the FPGA chip is working.