CN104393874A

CN104393874A - Touch scanning circuit, touch driving circuit and touch display screen

Info

Publication number: CN104393874A
Application number: CN201410742043.7A
Authority: CN
Inventors: 韦东梅; 邓银; 谭文
Original assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Chengdu BOE Optoelectronics Technology Co Ltd
Priority date: 2014-12-05
Filing date: 2014-12-05
Publication date: 2015-03-04
Anticipated expiration: 2034-12-05
Also published as: CN104393874B

Abstract

The invention discloses a touch scanning circuit, a touch driving circuit and a touch display screen. A third output end outputs a first potential signal and first and second output ends output a second potential signal under the control of an input signal of a shift register module in the touch screening circuit; the first output end outputs the first potential signal and the second and third output ends output the second potential signal under the control of a first clock signal; the second output end outputs the first potential signal and the first and third output ends output the second potential signal under the control of a second clock signal; a signal of a first reference signal end is provided for a scanning signal output end by an output module when a signal of a first input end is the first potential signal, and a signal of a second reference signal end is provided for a scanning signal output end when the signal of the second or third input end is the first potential signal. Through mutual match of the two modules, the touch scanning circuit of a simple structure is realized.

Description

Touch scanning circuit, touch driving circuit and touch display screen

Technical Field

The present invention relates to the field of touch technologies, and in particular, to a touch scanning circuit, a touch driving circuit and a touch display screen.

Background

With the rapid development of display technology, Touch Screen panels (Touch screens) have gradually spread throughout the lives of people. At present, a touch screen can be divided into: an Add On Touch Panel (Add On model Touch Panel), an overlay surface Touch Panel (On Cell Touch Panel), and an inline Touch Panel (InCell Touch Panel). The outer hanging touch screen is produced by separately producing the touch screen and the display screen and then is attached together to form the display screen with the touch function, and the outer hanging touch screen has the defects of higher manufacturing cost, lower light transmittance, thicker module and the like. And embedded touch-control electrode with the touch-sensitive screen of embedded touch-sensitive screen is embedded inside the display screen, can attenuate the holistic thickness of module, and the cost of manufacture that again can greatly reduced touch-sensitive screen receives each big panel producer and favours. In the embedded touch screen technology, the mutual capacitive touch screen becomes the mainstream of the development of the embedded touch screen technology at present by virtue of the advantages of higher sensitivity and multi-point touch.

In particular, the in-cell touch screen is a Device in which touch scan lines and touch sense lines in the touch screen are integrated in a display screen, such as a Liquid Crystal Display (LCD) or an Organic Light Emitting Display (OLED). In the conventional design, as shown in fig. 1, the touch scan signal on the touch scan line Txn (n is 1, 2, 3 …) is transmitted by an external driver (IC) through a trace located in the frame region. However, as the size of the display screen increases, the number of the touch scan lines Txn increases, and the number of the traces for transmitting the touch scan signals to the touch scan lines Txn increases accordingly, so that the occupied space of the traces increases, and the application of the embedded technology to the large-size and narrow-frame display screen is limited.

In order to solve the above problems, a touch driving circuit for outputting a touch scanning signal to a touch scanning line is usually integrated on an array substrate at present, so as to omit routing in a display frame region, thereby implementing a narrow frame design of a large-sized display screen. Therefore, it is an urgent technical problem in the art to provide a touch driving circuit integrated on an array substrate and having a simple structure.

Disclosure of Invention

In view of this, embodiments of the present invention provide a touch scanning circuit, a touch driving circuit and a touch display screen, so as to implement a touch driving circuit which is integrated on an array substrate and has a simple structure.

Therefore, an embodiment of the present invention provides a touch scan circuit, including: a shift register module and an output module; wherein,

the shift register module is provided with a first output end, a second output end and a third output end, the output module is provided with a first reference signal end, a second reference signal end, a first input end, a second input end, a third input end and a scanning signal output end, and the output ends of the shift register module are correspondingly connected with the input ends of the output module one by one;

the shift register module is used for outputting a first potential signal by a third output end under the control of an input signal, and outputting a second potential signal by a first output end and a second output end; under the control of a first clock signal, a first output end outputs a first potential signal, and a second output end and a third output end both output a second potential signal; under the control of a second clock signal, a second output end outputs a first potential signal, and a first output end and a third output end both output a second potential signal; when the effective pulse signal of the input signal is a high potential signal, the first potential is a high potential, and the second potential is a low potential; when the effective pulse signal of the input signal is a low potential signal, the first potential is a low potential, and the second potential is a high potential; and the first clock signal and the second clock signal alternately output a first potential signal after the input signal outputs an effective pulse signal;

the output module is used for providing the signal received by the first reference signal end to the scanning signal output end when the signal received by the first input end is a first potential signal; when the signal received by the second input end or the third input end is a second potential signal, providing the signal received by the second reference signal end to the scanning signal output end; the signal potential of the first reference signal terminal is greater than that of the second reference signal terminal, the signal received by the first reference signal terminal is a high-frequency signal, and the signal received by the second reference signal terminal is a direct-current signal.

In a possible implementation manner, in the touch scan circuit provided in an embodiment of the present invention, the output module specifically includes: a first switching transistor, a second switching transistor, and a third switching transistor; wherein,

the grid electrode of the first switch transistor is a first input end of the output module, the source electrode of the first switch transistor is connected with the first reference signal end, and the drain electrode of the first switch transistor is connected with the scanning signal output end;

the grid electrode of the second switch transistor is a second input end of the output module, the source electrode of the second switch transistor is connected with the second reference signal end, and the drain electrode of the second switch transistor is connected with the scanning signal output end;

and the grid electrode of the third switching transistor is the third input end of the output module, the source electrode of the third switching transistor is connected with the second reference signal end, and the drain electrode of the third switching transistor is connected with the scanning signal output end.

In a possible implementation manner, in the touch scan circuit provided in an embodiment of the present invention, the shift register module specifically includes: the system comprises an input submodule, a pull-up submodule, a first pull-down submodule and a pull-down control submodule; wherein,

the input submodule is used for providing the voltage of a first direct current source to a first node, providing the voltage of a second direct current source to a second node and the first output end and outputting a first potential signal to the third output end under the control of the input signal;

the pull-up submodule is configured to provide the first clock signal to the first output terminal when the potential of the first node is a first potential;

the first pull-down submodule is configured to provide a voltage of the first direct current source to the second node under the control of the second clock signal;

the pull-down control submodule is used for controlling the electric potential of the first node to be a second electric potential and outputting a second electric potential signal to the first output end when the electric potential of the second node is a first electric potential; when the potential of the first output end is a first potential, controlling the potential of the second node to be a second potential;

the first node is connected with the input submodule, the pull-down control submodule and the pull-up submodule, and the second node is connected with the input submodule, the first pull-down submodule, the pull-down control submodule and the second output end; the voltage of the first direct current source is a first potential, and the voltage of the second direct current source is a second potential.

In a possible implementation manner, in the touch scanning circuit provided in an embodiment of the present invention, the input sub-module specifically includes: a fourth switching transistor, a fifth switching transistor, and a sixth switching transistor; wherein,

the grid electrode of the fourth switching transistor is used for receiving the input signal, the source electrode of the fourth switching transistor is connected with the first direct current source, and the drain electrode of the fourth switching transistor is connected with the first node;

the grid electrode of the fifth switching transistor is used for receiving the input signal, the source electrode of the fifth switching transistor is connected with the second direct current source, and the drain electrode of the fifth switching transistor is connected with the second node;

and the grid electrode of the sixth switching transistor is used for receiving the input signal and is connected with the third output end, the source electrode of the sixth switching transistor is connected with the second direct current source, and the drain electrode of the sixth switching transistor is connected with the first output end.

In a possible implementation manner, in the touch scan circuit provided in an embodiment of the present invention, the pull-up sub-module specifically includes: a seventh switching transistor; wherein

And the seventh switching transistor has a gate connected to the first node, a source connected to the first clock signal, and a drain connected to the first output terminal.

In a possible implementation manner, in the touch scan circuit provided in an embodiment of the present invention, the first pull-down sub-module specifically includes: an eighth switching transistor; wherein,

and the eighth switching transistor is connected with the second clock signal at the grid electrode, the first direct current source at the source electrode and the second node at the drain electrode.

In a possible implementation manner, in the touch scan circuit provided in an embodiment of the present invention, the pull-down control sub-module specifically includes: a ninth switching transistor, a tenth switching transistor, and an eleventh switching transistor; wherein,

the ninth switching transistor has a gate connected to the second node, a source connected to the second dc source, and a drain connected to the first node;

the tenth switching transistor has a gate connected to the second node, a source connected to the first node, and a drain connected to the first output terminal;

and the grid electrode of the eleventh switching transistor is connected with the first output end, the source electrode of the eleventh switching transistor is connected with the second direct current source, and the drain electrode of the eleventh switching transistor is connected with the second node.

In a possible implementation manner, in the touch scan circuit provided in an embodiment of the present invention, the shift register module further includes: a second pull-down module, configured to provide a voltage of the first dc source to the first node under control of a third clock signal; and after the input signal outputs the effective pulse signal, the first clock signal, the second clock signal and the third clock signal alternately output a first potential signal.

In a possible implementation manner, in the touch scan circuit provided in an embodiment of the present invention, the second pull-down module specifically includes: a twelfth switching transistor; wherein,

and the twelfth switching transistor is connected with the third clock signal by the grid electrode, the first direct current source by the source electrode and the second node by the drain electrode.

In a possible implementation manner, in the touch scanning circuit provided in the embodiment of the present invention, when the effective pulse signal of the input signal is a high-potential signal, all the switch transistors are N-type transistors; when the effective pulse signal of the input signal is a low-potential signal, all the switch transistors are P-type transistors.

Correspondingly, the embodiment of the invention also provides a touch driving circuit, which comprises a plurality of cascaded touch scanning circuits provided by any one of the above embodiments of the invention; wherein,

except the last stage of touch scanning circuit, the first output end of the shift register module in each stage of touch scanning circuit inputs an input signal to the shift register module in the next stage of touch scanning circuit adjacent to the first output end;

the input signal of the shift register module in the first-stage touch scanning circuit is input from a frame start signal end.

Specifically, for convenience of implementation, in the touch driving circuit provided in the embodiment of the present invention, when each stage of the touch scanning circuit is controlled by three clock signals:

a first clock signal of the 3l +1 th-level touch scanning circuit and a second clock signal of the 3 m-level touch scanning circuit are output by the same clock signal output end; a second clock signal of the 3l + 1-level touch scanning circuit and a first clock signal of the 3l + 2-level touch scanning circuit are output by the same clock signal output end; a first clock signal of the 3 m-th-level touch scanning circuit and a second clock signal of the 3l + 2-th-level touch scanning circuit are output by the same clock signal output end; wherein l is a positive integer greater than or equal to 0 and m is a positive integer greater than or equal to 1.

Specifically, for convenience of implementation, in the touch driving circuit provided in the embodiment of the present invention, when each stage of the touch scanning circuit is controlled by four clock signals:

a first clock signal of the 4l + 1-level touch scanning circuit, a second clock signal of the 4 m-level touch scanning circuit and a third clock signal of the 4l + 3-level touch scanning circuit are output by the same clock signal output end; a second clock signal of the 4l + 1-th-level touch scanning circuit, a first clock signal of the 4l + 2-th-level touch scanning circuit and a third clock signal of the 4 m-th-level touch scanning circuit are output by the same clock signal output end; the third clock signal of the 4l + 1-level touch scanning circuit, the second clock signal of the 4l + 2-level touch scanning circuit and the first clock signal of the 4l + 3-level touch scanning circuit are output by the same clock signal output end; a first clock signal of the 4 m-th-level touch scanning circuit, a third clock signal of the 4l + 2-th-level touch scanning circuit and a second clock signal of the 4l + 3-th-level touch scanning circuit are output by the same clock signal output end; wherein l is a positive integer greater than or equal to 0 and m is a positive integer greater than or equal to 1.

Correspondingly, the embodiment of the invention also provides a touch display screen, which comprises a plurality of touch scanning lines positioned on an array substrate in the touch display screen, and a touch driving circuit positioned at a frame of the array substrate and used for sequentially outputting touch scanning signals to the touch scanning lines, wherein the touch driving circuit is any one of the touch driving circuits provided by the embodiment of the invention.

Preferably, in the touch display screen provided in the embodiment of the present invention, the touch scan lines are multiplexed into the common electrode layer; a signal received by a second reference signal end in the touch control driving circuit is a common electrode signal;

and in the display stage, a common electrode signal is loaded on each touch scanning line, and in the touch stage, a signal output by the touch driving circuit is loaded on each touch scanning line.

The touch scanning circuit, the touch driving circuit and the touch display screen provided by the embodiment of the invention comprise: a shift register module and an output module; the shift register module is used for outputting a first potential signal by a third output end under the control of an input signal, and outputting a second potential signal by a first output end and a second output end; under the control of a first clock signal, a first output end outputs a first potential signal, and a second output end and a third output end both output a second potential signal; under the control of a second clock signal, a second output end outputs a first potential signal, and a first output end and a third output end both output a second potential signal; the output module is used for providing the signal of the first reference signal end to the scanning signal output end when the signal received by the first input end is the first potential signal; and when the signal received by the second input end or the third input end is the first potential signal, the signal of the second reference signal end is provided for the scanning signal output end. Through the mutual matching of the shift register module and the output module, the touch control scanning circuit with a simple structure is realized.

Drawings

FIG. 1 is a schematic diagram of a conventional in-cell touch screen;

fig. 2 is a schematic structural diagram of a touch scanning circuit according to an embodiment of the present invention;

fig. 3a is a schematic structural diagram of a shift register module in a touch scan circuit according to an embodiment of the present invention;

fig. 3b is a second schematic structural diagram of a shift register module in the touch scan circuit according to the embodiment of the invention;

fig. 4a is a schematic structural diagram of a touch scan circuit according to an embodiment of the present invention;

fig. 4b is a second specific structural diagram of a touch scan circuit according to an embodiment of the present invention;

fig. 5a is a third schematic structural diagram of a touch scan circuit according to an embodiment of the present invention;

fig. 5b is a fourth schematic structural diagram of a touch scanning circuit according to an embodiment of the present invention;

FIG. 6a is a circuit timing diagram corresponding to the touch scan circuit shown in FIG. 4 a;

FIG. 6b is a timing diagram of the touch scan circuit shown in FIG. 4 b;

FIG. 7a is a circuit timing diagram corresponding to the touch scan circuit shown in FIG. 5 a;

FIG. 7b is a circuit timing diagram corresponding to the touch scan circuit shown in FIG. 5 b;

fig. 8 is a schematic structural diagram of a touch driving circuit according to an embodiment of the invention;

fig. 9a is a second schematic structural diagram of a touch driving circuit according to an embodiment of the invention;

fig. 9b is a third schematic structural diagram of a touch driving circuit according to an embodiment of the invention;

FIG. 10a is a timing diagram of the touch driving circuit shown in FIG. 9 a;

FIG. 10b is a timing diagram of the touch driving circuit shown in FIG. 9 b;

fig. 11 is a timing diagram of a circuit corresponding to the touch panel display provided in the embodiment of the present invention.

Detailed Description

The following describes in detail specific embodiments of a touch scan circuit, a touch driving circuit, and a touch display screen according to embodiments of the present invention with reference to the accompanying drawings.

An embodiment of the present invention provides a touch scanning circuit, as shown in fig. 2, including: a shift register module 10 and an output module 20; wherein,

the shift register module 10 has a first output terminal Out1, a second output terminal Out2 and a third output terminal Out3, the output module 20 has a first reference signal terminal TX _ In, a second reference signal terminal VSS, a first input terminal In1, a second input terminal In2 and a third input terminal In3, the first output terminal Out1 of the shift register module 10 is connected to the first input terminal In1 of the output module 20, the second output terminal Out2 of the shift register module 10 is connected to the second input terminal In2 of the output module 20, and the third output terminal Out3 of the shift register module 10 is connected to the third input terminal In3 of the output module 20;

the shift register module 10 is configured to output a first potential signal at a third output end Out3 under the control of an Input signal Input, and output a second potential signal at both the first output end Out1 and a second output end Out 2; under the control of a first clock signal CK1, a first output end Out1 outputs a first potential signal, and a second output end Out2 and a third output end Out3 both output a second potential signal; under the control of a second clock signal CK2, a first potential signal is output from the second output terminal Out2, and a second potential signal is output from both the first output terminal Out1 and the third output terminal Out 3; when the effective pulse signal of the Input signal is a high potential signal, the first potential is a high potential, and the second potential is a low potential; when the effective pulse signal of the Input signal is a low potential signal, the first potential is a low potential, and the second potential is a high potential; and after the Input signal Input outputs the effective pulse signal, the first clock signal CK1 and the second clock signal CK2 alternately output the first potential signal;

the output module 20 is configured to provide a signal received by the first reference signal terminal TX _ In to the scan signal output terminal TX _ Out when the signal received by the first input terminal In1 is a first potential signal; when the signal received by the second input terminal In2 or the third input terminal In3 is the first potential signal, the signal received by the second reference signal terminal VSS is provided to the scan signal output terminal TX _ Out; the potential of the signal of the first reference signal terminal TX _ In is greater than the potential of the signal of the second reference signal terminal VSS; the signal received by the first reference signal terminal TX _ In is a high frequency signal, and the signal received by the second reference signal terminal VSS is a dc signal.

The touch scanning circuit provided by the embodiment of the invention comprises: a shift register module and an output module; the shift register module is used for outputting a first potential signal by a third output end under the control of an input signal, and outputting a second potential signal by a first output end and a second output end; under the control of a first clock signal, a first output end outputs a first potential signal, and a second output end and a third output end both output a second potential signal; under the control of a second clock signal, a second output end outputs a first potential signal, and a first output end and a third output end both output a second potential signal; the output module is used for providing the signal of the first reference signal end to the scanning signal output end when the signal received by the first input end is the first potential signal; and when the signal received by the second input end or the third input end is the first potential signal, the signal of the second reference signal end is provided for the scanning signal output end. Through the mutual matching of the shift register module and the output module, the touch control scanning circuit with a simple structure is realized.

It should be noted that, in the touch scan circuit provided in the embodiment of the present invention, when the effective pulse signal of the input signal is a high-level signal, the first clock signal and the second clock signal alternately output high-level signals after the input signal outputs the high-level signal, and when the effective pulse signal of the input signal is a low-level signal, the first clock signal and the second clock signal alternately output low-level signals after the input signal outputs the low-level signal.

The present invention will be described in detail with reference to specific examples. It should be noted that the present embodiment is intended to better explain the present invention, but not to limit the present invention.

Specifically, as shown in fig. 4a and 4b, the output module 20 of the touch scanning circuit provided in the embodiment of the present invention may specifically include: a first switching transistor T1, a second switching transistor T2, and a third switching transistor T3; wherein,

a first switching transistor T1, having a gate terminal as a first input terminal of the output module 20, a source terminal connected to the first reference signal terminal TX _ In, and a drain terminal connected to the scan signal output terminal TX _ Out;

a second switching transistor T2, having a gate terminal as a second input terminal of the output module 20, a source terminal connected to the second reference signal terminal VSS, and a drain terminal connected to the scan signal output terminal TX _ Out;

a third switching transistor T3 has a gate terminal as a third input terminal of the output module 20, a source terminal connected to the second reference signal terminal VSS, and a drain terminal connected to the scan signal output terminal TX _ Out.

Further, in a specific implementation, as shown in fig. 4a, when the active pulse signal of the Input signal is a high-level signal, the first switching transistor T1, the second switching transistor T2, and the third switching transistor T3 are all N-type transistors. The N-type transistor is turned on when the gate potential thereof is high, and is turned off when the gate potential thereof is low. Alternatively, as shown in fig. 4b, when the active pulse signal of the Input signal Input is a low-level signal, the first switching transistor T1, the second switching transistor T2 and the third switching transistor T3 are all P-type transistors. The P-type transistor is turned on when the gate potential thereof is low, and is turned off when the gate potential thereof is high.

The above is merely an example of the specific structure of the output module in the touch scan circuit, and in the specific implementation, the specific structure of the output module is not limited to the above structure provided in the embodiment of the present invention, and may be other structures known to those skilled in the art, which is not limited herein.

Preferably, as shown in fig. 3a, the touch scan circuit provided in the embodiment of the present invention includes: an input sub-module 11, a pull-up sub-module 12, a first pull-down sub-module 13, and a pull-down control sub-module 14; wherein,

the Input submodule 11 is used for supplying the voltage of a first direct current source VG1 to a first node A, supplying the voltage of a second direct current source VG2 to a second node B and a first output end Out1 and outputting a first potential signal to a third output end Out3 under the control of an Input signal Input;

the pull-up submodule 12 is configured to provide the first clock signal CK1 to the first output terminal Out1 when the potential of the first node a is the first potential;

a first pull-down sub-module 13 for providing the voltage of the first dc source VG1 to the second node B under the control of the second clock signal CK 2;

a pull-down control submodule 14, configured to control the potential of the first node a to be a second potential when the potential of the second node B is the first potential, and output a second potential signal to the first output terminal Out 1; when the potential of the first output terminal Out1 is the first potential, controlling the potential of the second node B to be the second potential;

the first node A is connected with the input submodule 11, the pull-down control submodule 14 and the pull-up submodule 12, and the second node B is connected with the input submodule 11, the first pull-down submodule 13, the pull-down control submodule 14 and the second output end Out 2; the voltage of the first DC source VG1 is a first potential, and the voltage of the second DC source VG2 is a second potential.

The above is only an example of the specific structure of the shift register module in the touch scan circuit, and in the specific implementation, the specific structure of the shift register module is not limited to the above structure provided in the embodiment of the present invention, and may be other structures known to those skilled in the art, which is not limited herein.

Preferably, as shown in fig. 4a and 4b, the input sub-module 11 of the touch scanning circuit provided in the embodiment of the present invention may specifically include: a fourth switching transistor T4, a fifth switching transistor T5, and a sixth switching transistor T6; wherein,

a fourth switching transistor T4, having a gate for receiving the Input signal Input, a source connected to the first dc source VG1, and a drain connected to the first node a;

a fifth switching transistor T5, having a gate for receiving the Input signal Input, a source connected to the second dc source VG2, and a drain connected to the second node B;

a sixth switching transistor T6 has a gate for receiving the Input signal Input and is connected to the third output terminal Out3, a source connected to the second dc source VG2, and a drain connected to the first output terminal Out 1.

Further, in a specific implementation, as shown in fig. 4a, when the active pulse signal of the Input signal is a high-level signal, the fourth switching transistor T4, the fifth switching transistor T5, and the sixth switching transistor T6 are all N-type transistors. Alternatively, as shown in fig. 4b, when the active pulse signal of the Input signal Input is a low-level signal, the fourth switching transistor T4, the fifth switching transistor T5 and the sixth switching transistor T6 are all P-type transistors.

The above is only an example of the specific structure of the input sub-module in the touch scan circuit, and in the specific implementation, the specific structure of the input sub-module is not limited to the above structure provided in the embodiment of the present invention, and may be other structures known to those skilled in the art, which is not limited herein.

Preferably, in the touch scan circuit provided in the embodiment of the present invention, as shown in fig. 4a and 4b, the pull-up sub-module 12 may specifically include: a seventh switching transistor T7; wherein

The seventh switching transistor T7 has a gate connected to the first node a, a source connected to the first clock signal CK1, and a drain connected to the first output terminal Out 1.

Further, in a specific implementation, as shown in fig. 4a, when the active pulse signal of the Input signal is a high-level signal, the seventh switching transistor T7 is an N-type transistor in the touch scan circuit according to the embodiment of the present invention. Alternatively, as shown in fig. 4b, when the active pulse signal of the Input signal Input is a low-level signal, the seventh switching transistor T7 is a P-type transistor.

The above is only an example of the specific structure of the pull-up sub-module in the touch scan circuit, and in the specific implementation, the specific structure of the pull-up sub-module is not limited to the above structure provided in the embodiment of the present invention, and may be other structures known to those skilled in the art, which is not limited herein.

Preferably, in the touch scan circuit provided in the embodiment of the present invention, as shown in fig. 4a and 4b, the first pull-down sub-module 13 may specifically include: an eighth switching transistor T8; wherein,

the eighth switching transistor T8 has a gate connected to the second clock signal CK2, a source connected to the first dc source VG1, and a drain connected to the second node B.

Further, in a specific implementation, as shown in fig. 4a, when the active pulse signal of the Input signal is a high-level signal, the eighth switching transistor T8 is an N-type transistor in the touch scan circuit according to the embodiment of the present invention. Alternatively, as shown in fig. 4b, when the active pulse signal of the Input signal Input is a low-level signal, the eighth switching transistor T8 is a P-type transistor.

The above is merely an example of the specific structure of the first pull-down sub-module in the touch scan circuit, and in the specific implementation, the specific structure of the first pull-down sub-module is not limited to the above structure provided in the embodiment of the present invention, and may be other structures known to those skilled in the art, and is not limited herein.

Preferably, in the touch scan circuit provided in the embodiment of the present invention, as shown in fig. 4a and 4b, the pull-down control sub-module 14 may specifically include: a ninth switching transistor T9, a tenth switching transistor T10, and an eleventh switching transistor T11; wherein,

a ninth switching transistor T9 having a gate connected to the second node B, a source connected to the second dc source VG2, and a drain connected to the first node a;

a tenth switching transistor T10 having a gate connected to the second node B, a source connected to the first node a, and a drain connected to the first output terminal Out 1;

an eleventh switching transistor T11 has a gate connected to the first output terminal Out1, a source connected to the second dc source VG2, and a drain connected to the second node B.

Further, in a specific implementation, as shown in fig. 4a, when the active pulse signal of the Input signal is a high-level signal, the ninth switching transistor T9, the tenth switching transistor T10, and the eleventh switching transistor T11 are N-type transistors in the touch scanning circuit according to the embodiment of the present invention. Alternatively, as shown in fig. 4b, when the active pulse signal of the Input signal Input is a low-potential signal, the ninth switching transistor T9, the tenth switching transistor T10, and the eleventh switching transistor T11 are P-type transistors.

The above is only an example of a specific structure of the pull-down control sub-module in the touch scan circuit, and in the specific implementation, the specific structure of the pull-down control sub-module is not limited to the above structure provided in the embodiment of the present invention, and may also be other structures known to those skilled in the art, which is not limited herein.

Further, in a specific implementation, as shown in fig. 3b, in the touch scan circuit provided in the embodiment of the present invention, the shift register module 10 may further include: a second pull-down module 15 for providing the voltage of the first dc source VG1 to the second node B under the control of the third clock signal CK 3; and after the Input signal Input outputs the active pulse signal, the first clock signal CK1, the second clock signal CK2 and the third clock signal CK3 alternately output the first potential signal. Because the third clock signal and the second clock signal are both output through separate circuits, in the touch scanning circuit, when one of the first pull-down module or the second pull-down module fails, the working state of the touch scanning circuit is not affected, thereby ensuring the stability of the circuit.

Preferably, in the touch scan circuit provided in the embodiment of the present invention, as shown in fig. 5a and 5b, the second pull-down module 15 may specifically include: a twelfth switching transistor T12; wherein,

the twelfth switching transistor T2 has a gate connected to the third clock signal CK3, a source connected to the first dc source VG1, and a drain connected to the second node B.

Further, in a specific implementation, as shown in fig. 5a, the voltage of the first dc source VG1 is a first potential, and when the active pulse signal of the Input signal Input is a high potential signal, the first potential is a high potential, so that the twelfth switching transistor T12 is an N-type transistor. Alternatively, as shown in fig. 5b, when the active pulse signal of the Input signal Input is a low-level signal, the first potential is a low level, and therefore, the twelfth switching transistor T12 may be a P-type transistor.

The above is merely an example of the specific structure of the second pull-down module in the touch scan circuit, and in the specific implementation, the specific structure of the second pull-down module is not limited to the structure provided in the embodiment of the present invention, and may be other structures known to those skilled in the art, which is not limited herein.

Specifically, in the touch scanning circuit provided in the embodiment of the present invention, when the effective pulse signal of the input signal is a high-level signal, as shown in fig. 4a and 5a, all the switch transistors are N-type transistors; when the active pulse signal of the input signal is a low level signal, as shown in fig. 4b and fig. 5b, all the switching transistors are P-type transistors. Compared with the touch scanning circuit composed of the N-type transistor and the P-type transistor in the prior art, the touch scanning circuit provided by the embodiment of the invention has the advantages of high development reliability, simple structure, less switching transistors, space saving for design and contribution to narrow frame of a display product.

It should be noted that the switching Transistor mentioned in the above embodiments of the present invention may be a Thin Film Transistor (TFT) or a Metal Oxide semiconductor field effect Transistor (MOS), and is not limited herein. In specific implementation, the source and drain of these switching transistors may be interchanged according to the transistor type and the input signal, and their functions are not specifically distinguished here.

The following takes the touch scanning circuits shown in fig. 4a to fig. 5b as examples, and the operation process thereof will be described in detail. In the following description, a high potential signal is denoted by 1, and a low potential signal is denoted by 0.

Example one:

in the touch scan circuit shown in fig. 4a, the active pulse signal of the Input signal is a high-level signal, the first level is a high level, the second level is a low level, the voltage of the first dc source VG1 is a high level, the voltage of the second dc source VG2 is a low level, all the switching transistors are N-type transistors, and the corresponding Input/output timing diagram is shown in fig. 6 a. Specifically, three phases T1, T2, and T3 in the input-output timing diagram shown in fig. 6a are selected.

In stage T1, Input is 1, CK1 is 0, and CK2 is 0. Since Input is 1, the fourth switching transistor T4, the fifth switching transistor T5, and the sixth switching transistor T6 are turned on, the potential of the second node B is low, the second output terminal Out2 outputs a low potential signal, the third output terminal Out3 outputs a high potential signal, the potential of the first node a is high, the seventh switching transistor T7 is turned on, the low-potential first clock signal CK1 is output to the first output terminal Out1 through the turned-on seventh switching transistor T7, and the voltage of the low-potential second dc source VG2 is output to the first output terminal Out1 through the turned-on sixth switching transistor T6, so the first output terminal Out1 outputs a low potential signal;

therefore, the low-level signal output from the first output terminal Out1 controls the first switch transistor T1 to be in a turned-off state, the low-level signal output from the second output terminal Out2 controls the second switch transistor T2 to be in a turned-off state, the high-level signal output from the third output terminal Out3 controls the third switch transistor T3 to be in a turned-on state, and the scan signal output terminal TX _ Out outputs a signal of the second reference signal terminal VSS.

In stage T2, Input is 0, CK1 is 1, and CK2 is 0. Since Input is 0, the third output terminal Out3 outputs a low-level signal, the fourth switching transistor T4 is turned off, and the first node a is in a Floating (Floating) state, and since the first node a is at a high level in the last period of time and a voltage of the high level is stored at the gate of the seventh switching transistor T7 due to a coupling effect of a parasitic capacitance of the seventh switching transistor T7, the potential of the first node a in the Floating (Floating) state is maintained at the high level in the T1 stage in the T2 stage, and therefore the seventh switching transistor T7 is turned on, and the first clock signal CK1 at the high level is output to the first output terminal Out1 through the turned-on seventh switching transistor T7; since the first output terminal Out1 outputs a high-potential signal, the eleventh switching transistor T11 is turned on, the voltage of the second dc source VG2 with a low potential is output to the second node B through the turned-on eleventh switching transistor T11, and the voltage of the second node B is at a low potential, the second output terminal Out2 outputs a low-potential signal;

therefore, the high-level signal output from the first output terminal Out1 controls the first switch transistor T1 to be In a conducting state, the low-level signal output from the second output terminal Out2 controls the second switch transistor T2 to be In a blocking state, the low-level signal output from the third output terminal Out3 controls the third switch transistor T3 to be In a blocking state, and the scan signal output terminal TX _ Out outputs the signal of the first reference signal terminal TX _ In.

In stage T3, Input is 0, CK1 is 0, and CK2 is 1. Since CK2 is equal to 1, the eighth switching transistor T8 is turned on, the voltage of the first dc source VG1 at a high potential is output to the second node B through the turned-on eighth switching transistor T8, the potential of the second node B is a high potential, the second output terminal Out2 outputs a high potential signal, the ninth switching transistor T9 and the tenth switching transistor T10 are turned on, the voltage of the second dc source VG2 at a low potential is output to the first node a through the turned-on ninth switching transistor T9, the potential of the first node a is a low potential, the potential of the first node a is output to the first output terminal Out1 through the turned-on tenth switching transistor T10, and the first output terminal Out1 outputs a low potential signal, at this stage, Input is equal to 0, and the third output terminal Out3 outputs a low potential signal;

therefore, the low-level signal output from the first output terminal Out1 controls the first switch transistor T1 to be in a turned-off state, the high-level signal output from the second output terminal Out2 controls the second switch transistor T2 to be in a turned-on state, the low-level signal output from the third output terminal Out3 controls the third switch transistor T3 to be in a turned-off state, and the scan signal output terminal TX _ Out outputs a signal of the second reference signal terminal VSS.

The touch control scanning circuit is composed of single N-type transistors, development reliability is high, the structure is simple, only 11 switch transistors are used, the number of the transistors is small, and therefore space can be saved, and narrow frame of a display product is facilitated.

Example two:

in the touch scan circuit shown in fig. 4b, the active pulse signal of the Input signal is a low-potential signal, the first potential is a low potential, the second potential is a high potential, the voltage of the first dc source VG1 is a low potential, the voltage of the second dc source VG2 is a high potential, all the switching transistors are P-type transistors, and the corresponding Input/output timing diagram is shown in fig. 6 b. Specifically, three phases T1, T2, and T3 in the input-output timing diagram shown in fig. 6b are selected.

In stage T1, Input is 0, CK1 is 1, and CK2 is 1. Since Input is equal to 0, the fourth switching transistor T4, the fifth switching transistor T5, and the sixth switching transistor T6 are turned on, the potential of the second node B is a high potential, the second output terminal Out2 outputs a high potential signal, the third output terminal Out3 outputs a low potential signal, the potential of the first node a is a low potential, the seventh switching transistor T7 is turned on, the first clock signal CK1 at the high potential is output to the first output terminal Out1 through the turned-on seventh switching transistor T7, and the voltage of the second dc source VG2 at the high potential is output to the first output terminal Out1 through the turned-on sixth switching transistor T6, so that the first output terminal Out1 outputs a high potential signal;

therefore, the high-level signal output from the first output terminal Out1 controls the first switch transistor T1 to be in a turned-off state, the high-level signal output from the second output terminal Out2 controls the second switch transistor T2 to be in a turned-off state, the low-level signal output from the third output terminal Out3 controls the third switch transistor T3 to be in a turned-on state, and the scan signal output terminal TX _ Out outputs a signal of the second reference signal terminal VSS.

In stage T2, Input is 1, CK1 is 0, and CK2 is 1. Since Input is 1, the third output terminal Out3 outputs a high-potential signal, the fourth switching transistor T4 is turned off, and the first node a is in a Floating (Floating) state at this time, and since the first node a is at a low potential in the last time period, the voltage of the low potential is stored at the gate of the seventh switching transistor T7 due to the coupling effect of the parasitic capacitance of the seventh switching transistor T7, the potential of the first node a in the Floating (Floating) state is maintained at the low potential in the T1 stage at the T2 stage, so that the seventh switching transistor T7 is turned on, and the first clock signal CK1 at the low potential is output to the first output terminal Out1 through the turned-on seventh switching transistor T7; since the first output terminal Out1 outputs a low-potential signal, the eleventh switching transistor T11 is turned on, the voltage of the second dc source VG2 with a high potential is output to the second node B through the turned-on eleventh switching transistor T11, and the voltage of the second node B is a high potential, the second output terminal Out2 outputs a high-potential signal;

therefore, the low-level signal output from the first output terminal Out1 controls the first switch transistor T1 to be In a conducting state, the high-level signal output from the second output terminal Out2 controls the second switch transistor T2 to be In a blocking state, the high-level signal output from the third output terminal Out3 controls the third switch transistor T3 to be In a blocking state, and the scan signal output terminal TX _ Out outputs the signal of the first reference signal terminal TX _ In.

In stage T3, Input is 1, CK1 is 1, and CK2 is 0. Since CK2 is equal to 0, the eighth switching transistor T8 is turned on, the voltage of the first dc source VG1 with a low potential is output to the second node B through the turned-on eighth switching transistor T8, so that the potential of the second node B is a low potential, the second output terminal Out2 outputs a low potential signal, the ninth switching transistor T9 and the tenth switching transistor T10 are turned on, the voltage of the second dc source VG2 with a high potential is output to the first node a through the turned-on ninth switching transistor T9, the potential of the first node a is a high potential, the potential of the first node a is output to the first output terminal Out1 through the turned-on tenth switching transistor T10, so that the first output terminal Out1 outputs a high potential signal, at this stage, Input is equal to 1, and the third output terminal Out3 outputs a high potential signal;

therefore, the high level signal output from the first output terminal Out1 controls the first switch transistor T1 to be in a turned-off state, the low level signal output from the second output terminal Out2 controls the second switch transistor T2 to be in a turned-on state, the high level signal output from the third output terminal Out3 controls the third switch transistor T3 to be in a turned-off state, and the scan signal output terminal TX _ Out outputs a signal of the second reference signal terminal VSS.

The touch control scanning circuit is composed of single P-type transistors, is high in development reliability and simple in structure, only uses 11 switch transistors, and the number of the transistors is small, so that space can be saved, and narrow frames of display products can be better facilitated.

Example three:

in the touch scan circuit shown in fig. 5a, the active pulse signal of the Input signal is a high-level signal, the first level is a high level, the second level is a low level, the voltage of the first dc source VG1 is a high level, the voltage of the second dc source VG2 is a low level, all the switching transistors are N-type transistors, and the corresponding Input/output timing diagram is shown in fig. 7 a. Specifically, four phases of T1, T2, T3, and T4 in the input-output timing diagram shown in fig. 7a are selected.

Specifically, in the stages T1, T2, and T3, CK3 is equal to 0, and the twelfth switching transistor T12 is all in an off state, and the specific working process of the touch scanning circuit is the same as the working process of the three stages T1, T2, and T3 in the first example, and is not described herein again.

In stage T4, Input is 0, CK1 is 0, CK2 is 0, and CK3 is 1. Since CK3 is equal to 1, the twelfth switching transistor T12 is turned on, the voltage of the first dc source VG1 at a high potential is output to the second node B through the turned-on twelfth switching transistor T12, so that the potential of the second node B is at a high potential, the second output terminal Out2 outputs a high potential signal, the ninth switching transistor T9 and the tenth switching transistor T10 are turned on, the voltage of the second dc source VG2 at a low potential is output to the first node a through the turned-on ninth switching transistor T9, the potential of the first node a is at a low potential, the potential of the first node a is output to the first output terminal Out1 through the turned-on tenth switching transistor T10, so that the first output terminal Out1 outputs a low potential signal, at this stage, Input is equal to 0, and the third output terminal Out3 outputs a low potential signal;

In the touch scanning circuit, since the third clock signal and the second clock signal are both output through separate circuits, when one of the eighth switching transistor T8 and the twelfth switching transistor T12 fails, the operating state of the touch scanning circuit is not affected, thereby ensuring the stability of the touch scanning circuit. The touch scanning circuit is composed of single N-type transistors, development reliability is high, the structure is simple, only 12 switching transistors are used, and the number of the transistors is small, so that space can be saved, and narrow frames of display products can be facilitated.

Example four:

in the touch scan circuit shown in fig. 5b, the active pulse signal of the Input signal is a low-potential signal, the first potential is a low potential, the second potential is a high potential, the voltage of the first dc source VG1 is a low potential, the voltage of the second dc source VG2 is a high potential, all the switching transistors are P-type transistors, and the corresponding Input/output timing diagram is shown in fig. 7 b. Specifically, four phases of T1, T2, T3, and T4 in the input-output timing diagram shown in fig. 7b are selected.

Specifically, CK3 is equal to 1 in the stages T1, T2, and T3, the twelfth switching transistor T12 is all in the off state, and the specific working process of the touch scanning circuit is the same as the working process of the three stages T1, T2, and T3 in the second example, and is not described again here.

In stage T4, Input is 1, CK1 is 1, CK2 is 1, and CK3 is 0. Since CK3 is equal to 0, the twelfth switching transistor T12 is turned on, the voltage of the first dc source VG1 with a low potential is output to the second node B through the turned-on twelfth switching transistor T12, so that the potential of the second node B is a low potential, the second output terminal Out2 outputs a low potential signal, the ninth switching transistor T9 and the tenth switching transistor T10 are turned on, the voltage of the second dc source VG2 with a high potential is output to the first node a through the turned-on ninth switching transistor T9, the potential of the first node a is a high potential, the potential of the first node a is output to the first output terminal Out1 through the turned-on tenth switching transistor T10, so that the first output terminal Out1 outputs a high potential signal, at this stage, Input is equal to 1, and the third output terminal Out3 outputs a high potential signal;

In the touch scanning circuit, since the third clock signal and the second clock signal are both output through separate circuits, when one of the eighth switching transistor T8 and the twelfth switching transistor T12 fails, the operating state of the touch scanning circuit is not affected, thereby ensuring the stability of the touch scanning circuit. The touch scanning circuit is composed of single P-type transistors, development reliability is high, the structure is simple, only 12 switching transistors are used, and the number of the transistors is small, so that space can be saved, and narrow frames of display products can be facilitated.

Based on the same inventive concept, an embodiment of the present invention further provides a touch driving circuit, as shown in fig. 8, including any one of the touch scanning circuits provided by the cascaded multiple embodiments of the present invention: TX (1), TX (2) … TX (N) … TX (N-1), TX (N) (N touch scanning circuits are used in total, and N is more than or equal to 1 and less than or equal to N); wherein,

except for the last stage of touch scanning circuit TX (n), the first output end Out1(n) of the shift register module in each stage of touch scanning circuit TX (n) inputs an Input signal to the shift register module in the next stage of touch scanning circuit TX (n +1) adjacent to the first output end Out1 (n);

an Input signal Input of a shift register module in the first-stage touch scanning circuit TX (1) is Input from a frame start signal STV terminal.

Specifically, the specific structure of each touch scanning circuit in the touch driving circuit is the same as the touch scanning circuit of the present invention in function and structure, and repeated descriptions are omitted.

Further, In the touch driving circuit provided In the embodiment of the invention, the first reference signal TX _ In, the second reference voltage VSS, the first direct-current voltage source VG1, and the second direct-current voltage source VG2 are all input into each stage of the touch scanning circuit.

Preferably, in the touch driving circuit provided in the embodiment of the present invention, when each touch scanning circuit includes only 11 switching transistors shown in fig. 4a and 4b, each touch scanning circuit needs to be controlled by two clock signals, and the touch driving circuit formed by cascading the touch scanning circuits needs only three clock signal output ends. Specifically, as shown in fig. 9a, the first clock signal CK1 of the 3l +1 (where l is a positive integer greater than or equal to 0) th stage touch scan circuit and the second clock signal CK2 of the 3m (where m is a positive integer greater than or equal to 1) th stage touch scan circuit are output from the same clock signal output terminal, such as the clock signal output terminal CK1 shown in fig. 9 a; the second clock signal CK2 of the 3l +1 (where l is a positive integer greater than or equal to 0) th level touch scan circuit and the first clock signal CK1 of the 3l +2 th level touch scan circuit are output from the same clock signal output terminal, such as the clock signal output terminal CK2 shown in fig. 9 a; the first clock signal CK1 of the 3 m-th stage touch scan circuit and the second clock signal CK2 of the 3l + 2-th stage touch scan circuit are output from the same clock signal output terminal, such as the clock signal output terminal CK3 shown in fig. 9 a. Specifically, when the active pulse signal of the input signal is a high-level signal, the corresponding input/output timing diagram of the touch driving circuit shown in fig. 9a is shown in fig. 10a, and the specific operation principle of the touch driving circuit is similar to that of the touch scanning circuit shown in fig. 4a, and is not described in detail herein.

Preferably, in the touch driving circuit provided in the embodiment of the present invention, when each touch scanning circuit includes only 12 switching transistors shown in fig. 5a and 5b, each touch scanning circuit needs to be controlled by three clock signals, and the touch driving circuit formed by cascading the touch scanning circuits needs only four clock signal output terminals for control. Specifically, as shown in fig. 9b, the first clock signal CK1 of the touch scan circuit of the 4l +1 th (where l is a positive integer greater than or equal to 0), the second clock signal CK2 of the touch scan circuit of the 4m th (where m is a positive integer greater than or equal to 1), and the third clock signal CK3 of the touch scan circuit of the 4l +3 th stage are output from the same clock signal output terminal, such as the clock signal output terminal CK1 shown in fig. 9 b; the second clock signal CK2 of the 4l +1 th (where l is a positive integer greater than or equal to 0) stage touch scan circuit, the first clock signal CK1 of the 4l +2 th stage touch scan circuit, and the third clock signal CK3 of the 4m th stage touch scan circuit are output from the same clock signal output terminal, such as the clock signal output terminal CK2 shown in fig. 9 b; the third clock signal CK3 of the 4l +1 th touch scan circuit, the second clock signal CK2 of the 4l +2 th touch scan circuit, and the first clock signal CK1 of the 4l +3 th touch scan circuit are output from the same clock signal output terminal, such as the clock signal output terminal CK3 shown in fig. 9 b; the first clock signal CK1 of the 4 m-th touch scan circuit, the third clock signal CK3 of the 4l + 2-th touch scan circuit, and the second clock signal CK2 of the 4l + 3-th touch scan circuit are output from the same clock signal output terminal, such as the clock signal output terminal CK4 shown in FIG. 9 b. Specifically, when the active pulse signal of the input signal is a high-level signal, the corresponding input/output timing diagram of the touch driving circuit shown in fig. 9b is shown in fig. 10b, and the specific operation principle is similar to that of the touch scanning circuit shown in fig. 5a, and is not described in detail here.

Based on the same inventive concept, an embodiment of the present invention further provides a touch display screen, including a plurality of touch scan lines located on an array substrate in the touch display screen, and a touch driving circuit located at a frame of the array substrate and configured to sequentially output touch scan signals to the touch scan lines, where the touch driving circuit is provided for the embodiment of the present invention. The specific implementation of the touch display screen can refer to the description of the touch driving circuit, and the same parts are not described again.

Further, in the touch display screen provided by the embodiment of the invention, the touch scanning lines are multiplexed into the common electrode layer; a signal received by a second reference signal end in the touch control driving circuit is a common electrode signal;

in the display stage, a common electrode signal is loaded on each touch scanning line, and in the touch stage, a signal output by the touch driving circuit is loaded on each touch scanning line.

Specifically, for example: in the driving timing diagram shown in fig. 11, the time for displaying each frame (V-sync) on the Touch Display screen is divided into a Display time period (Display) and a Touch time period (Touch), for example, the time for displaying one frame on the Touch Display panel in the driving timing diagram shown in fig. 11 is 16.7ms, 5ms is selected as the Touch time period, and the other 11.7ms is selected as the Display time period, although the time lengths of the two time periods may be appropriately adjusted according to the processing capability of an Integrated Circuit (IC), which is not specifically limited herein. In a Display time period (Display), the touch driving circuit temporarily stops working, the Gate driving circuit sequentially applies a Gate scanning signal to each Gate signal line Gate1 and Gate2 … … Gate n in the touch Display screen, the source driving circuit applies a gray scale signal to the Data signal lines Data, and the driving chip respectively applies a common electrode signal to each touch scanning line Tx1 … … Txn to realize a Display function. In the Touch time period (Touch), the gate driving circuit stops operating, as shown in fig. 11, the Touch driving circuit connected to each Touch scanning line Tx1 … … Tx n sequentially applies a Touch scanning signal to the Touch scanning lines Tx1 … … Tx n, and analyzes and determines whether Touch occurs by detecting a feedback signal on the Touch sensing lines disposed in the Touch display screen and staggered with each Touch scanning line, so as to implement the Touch function.

The embodiment of the invention provides a touch scanning circuit, a touch driving circuit and a touch display screen, wherein the touch scanning circuit comprises: a shift register module and an output module; the shift register module is used for outputting a first potential signal by a third output end under the control of an input signal, and outputting a second potential signal by a first output end and a second output end; under the control of a first clock signal, a first output end outputs a first potential signal, and a second output end and a third output end both output a second potential signal; under the control of a second clock signal, a second output end outputs a first potential signal, and a first output end and a third output end both output a second potential signal; the output module is used for providing the signal of the first reference signal end to the scanning signal output end when the signal received by the first input end is the first potential signal; and when the signal received by the second input end or the third input end is the first potential signal, the signal of the second reference signal end is provided for the scanning signal output end. Through the mutual matching of the shift register module and the output module, the touch control scanning circuit with a simple structure is realized.

It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims

1. A touch scanning circuit, comprising: a shift register module and an output module; wherein,

the shift register module is used for outputting a first potential signal by a third output end under the control of an input signal, and outputting a second potential signal by a first output end and a second output end; under the control of a first clock signal, a first output end outputs a first potential signal, and a second output end and a third output end both output a second potential signal; under the control of a second clock signal, a second output end outputs a first potential signal, and a first output end and a third output end both output a second potential signal; when the effective pulse signal of the input signal is a high potential signal, the first potential is a high potential, and the second potential is a low potential; when the effective pulse signal of the input signal is a low potential signal, the first potential is a low potential, and the second potential is a high potential; and after the input signal outputs an effective pulse signal, the first clock signal and the second clock signal alternately output a first potential signal;

the output module is used for providing the signal received by the first reference signal end to the scanning signal output end when the signal received by the first input end is a first potential signal; when the signal received by the second input end or the third input end is a second potential signal, providing the signal received by the second reference signal end to the scanning signal output end; the potential of the signal of the first reference signal terminal is greater than the potential of the signal of the second reference signal terminal, the signal received by the first reference signal terminal is a high-frequency signal, and the signal received by the second reference signal terminal is a direct-current signal.

2. The touch scan circuit of claim 1, wherein the output module specifically comprises: a first switching transistor, a second switching transistor, and a third switching transistor; wherein,

3. The touch scan circuit of claim 1, wherein the shift register module specifically comprises: the system comprises an input submodule, a pull-up submodule, a first pull-down submodule and a pull-down control submodule; wherein,

4. The touch scan circuit of claim 3, wherein the input sub-module specifically comprises: a fourth switching transistor, a fifth switching transistor, and a sixth switching transistor; wherein,

5. The touch scan circuit of claim 3, wherein the pull-up sub-module specifically comprises: a seventh switching transistor; wherein

6. The touch scan circuit of claim 3, wherein the first pull-down sub-module specifically comprises: an eighth switching transistor; wherein,

7. The touch scan circuit of claim 3, wherein the pull-down control submodule specifically comprises: a ninth switching transistor, a tenth switching transistor, and an eleventh switching transistor; wherein,

8. The touch scan circuit of claim 2, wherein the shift register module further comprises: a second pull-down module, configured to provide a voltage of the first dc source to the second node under the control of a third clock signal; and after the input signal outputs the effective pulse signal, the first clock signal, the second clock signal and the third clock signal alternately output a first potential signal.

9. The touch scan circuit of claim 8, wherein the second pull-down module specifically comprises: a twelfth switching transistor; wherein,

10. The touch scan circuit of any of claims 1-9, wherein when the active pulse signal of the input signal is a high-level signal, all the switch transistors are N-type transistors; when the effective pulse signal of the input signal is a low-potential signal, all the switch transistors are P-type transistors.

11. A touch driving circuit, comprising a plurality of cascaded touch scanning circuits according to any one of claims 1 to 10; wherein,

12. The touch driver circuit as claimed in claim 11, wherein when each stage of the touch scan circuit is controlled by three clock signals:

a first clock signal of the 3l +1 th-level touch scanning circuit and a second clock signal of the 3 m-level touch scanning circuit are output by the same clock signal output end; a second clock signal of the 3l + 1-level touch scanning circuit and a first clock signal of the 3l + 2-level touch scanning circuit are output by the same clock signal output end; a first clock signal of the 3 m-th-level touch scanning circuit and a second clock signal of the 3l + 2-th-level touch scanning circuit are output by the same clock signal output end; wherein l is a positive integer greater than or equal to 0, and m is a positive integer greater than or equal to 1.

13. The touch driver circuit as claimed in claim 11, wherein when each stage of the touch scan circuit is controlled by four clock signals:

a first clock signal of the 4l + 1-level touch scanning circuit, a second clock signal of the 4 m-level touch scanning circuit and a third clock signal of the 4l + 3-level touch scanning circuit are output by the same clock signal output end; a second clock signal of the 4l + 1-th-level touch scanning circuit, a first clock signal of the 4l + 2-th-level touch scanning circuit and a third clock signal of the 4 m-th-level touch scanning circuit are output by the same clock signal output end; a third clock signal of the 4l + 1-level touch scanning circuit, a second clock signal of the 4l + 2-level touch scanning circuit and a first clock signal of the 4l + 3-level touch scanning circuit are output by the same clock signal output end; a first clock signal of the 4 m-th-level touch scanning circuit, a third clock signal of the 4l + 2-th-level touch scanning circuit and a second clock signal of the 4l + 3-th-level touch scanning circuit are output by the same clock signal output end; wherein l is a positive integer greater than or equal to 0, and m is a positive integer greater than or equal to 1.

14. A touch display screen, comprising a plurality of touch scanning lines on an array substrate in the touch display screen, and a touch driving circuit at a frame of the array substrate for sequentially outputting touch scanning signals to the touch scanning lines, wherein the touch driving circuit is the touch driving circuit according to any one of claims 11 to 13.

15. The touch display screen of claim 14, wherein the touch scan lines are multiplexed into a common electrode layer; a signal received by a second reference signal end in the touch control driving circuit is a common electrode signal;