CN104393573B - The system of frequency converter failure detection envelope wave circuit, frequency converter and application frequency converter - Google Patents

The system of frequency converter failure detection envelope wave circuit, frequency converter and application frequency converter Download PDF

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CN104393573B
CN104393573B CN201410767788.9A CN201410767788A CN104393573B CN 104393573 B CN104393573 B CN 104393573B CN 201410767788 A CN201410767788 A CN 201410767788A CN 104393573 B CN104393573 B CN 104393573B
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resistance
electric capacity
current
frequency converter
circuit
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CN104393573A (en
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张小龙
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Shenzhen Invt Electric Co Ltd
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Shenzhen Invt Electric Co Ltd
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Abstract

The system that the application provides a kind of frequency converter failure detection envelope wave circuit, frequency converter and application frequency converter; the voltage signal for the output current signal for characterizing frequency converter is gathered by current-limiting protection circuit; and after being changed compared with current limliting reference signal, the first current-limiting protection signal and the second current-limiting protection signal are exported according to comparative result；When there is current limliting failure in frequency converter; by driving lockout circuit to receive the first current-limiting protection signal; and pulse buffer chip realizes the drive signal of IGBT in frequency converter described in hardware lockout; processor receives the second current-limiting protection signal; realize that the pulse suppression on software exports by processor; after Failure elimination, the pulse suppression is released by processor and exported, realizes and lifts a blockade without a large amount of peripheral components；The reliability of circuit is improved with protecting using hardware and software joint-detection simultaneously.

Description

The system of frequency converter failure detection envelope wave circuit, frequency converter and application frequency converter
Technical field
The present invention relates to the fault detection technique field of frequency converter, more particularly to a kind of frequency converter failure detection Feng Bo electricity The system on road, frequency converter and application frequency converter.
Background technology
With the scarcity of natural resources, frequency converter is more and more applied to motor driving etc. as a kind of energy-conserving product Industrial occasions, but the industrial occasions of its application usually require that frequency converter copes with severe operating mode, have certain overload Ability, this requires frequency converter to need good fault detect and protection circuit.
The fault monitoring and protection device generally use hardware circuit on frequency converter is detected and protected in the prior art Shield, while need the hardware circuit to carry out the judgement of trouble shooting and the releasing work of protection act, so needing a lot Peripheral components；Meanwhile fault detect, protection and its releasing are carried out using hardware circuit and acted, its reliability is relatively low.
The content of the invention
In view of this, the invention provides a kind of frequency converter failure to detect envelope wave circuit, frequency converter and application frequency converter System, to solve the problems, such as more than peripheral components in the prior art and circuit reliability is low.
To achieve these goals, technical scheme provided in an embodiment of the present invention is as follows：
A kind of frequency converter failure detection envelope wave circuit, including：
The current-limiting protection circuit being connected with inverter output terminal, the output current signal of the frequency converter is characterized for gathering Voltage signal, after the voltage signal is changed compared with current limliting reference signal, according to comparative result generation simultaneously Export the first current-limiting protection signal and the second current-limiting protection signal；
The driving lockout circuit being connected with the current-limiting protection circuit, for receiving the first current-limiting protection signal, and Generated according to the level value of the first current-limiting protection signal and export locking signal；
The pulse buffer chip that enabled pin is connected with the driving lockout circuit, for receiving the locking signal, and root The drive signal of IGBT in the frequency converter is blocked according to the locking signal；
The processor being connected with the current-limiting protection circuit, for receiving the second current-limiting protection signal, and according to institute State the second current-limiting protection signal and judge whether the frequency converter needs current limliting, according to judged result carry out pulse suppression output or Release the pulse suppression output.
Preferably, the current-limiting protection circuit includes：
Three collection modular converters being connected respectively with the inverter output terminal, are respectively used to collection and characterize the frequency conversion The voltage signal of the three-phase output current signal of device is simultaneously changed；
Generate and export the current limliting base modules of the current limliting reference signal；
What input was connected with the output end of described three output ends for gathering modular converter and current limliting base modules respectively Window device comparison circuit, for the voltage signal after the conversion and the current limliting reference signal, and export comparative result；
The Shaping Module that input is connected with the output end of the window device comparison circuit, the output end of the Shaping Module It is connected with the driving lockout circuit, for carrying out shaping to the comparative result, and exports the first current-limiting protection signal To driving lockout circuit and the second current-limiting protection signal is exported to processor.
Preferably, the current limliting base modules are connected with the processor, the processor output pulse width modulation letter Number to the current limliting base modules；The current limliting base modules generate the current limliting benchmark according to the pulse width modulating signal Signal；
Wherein, the current limliting base modules include：
The 11st resistance that one end is connected with the processor；
The 7th electric capacity that one end is connected with the other end of the 11st resistance；The other end ground connection of 7th electric capacity；
The 3rd operational amplifier that in-phase input end is connected with the tie point of the 11st resistance and the 7th electric capacity；It is described The inverting input of 3rd operational amplifier is connected with output end；
The 12nd resistance that one end is connected with the output end of the 3rd operational amplifier；
The 13rd resistance that one end is connected with the other end of the 12nd resistance, the other end of the 13rd resistance with The second source of the frequency converter is connected；
The 8th electric capacity that one end is connected with the tie point of the 12nd resistance and the 13rd resistance, the 8th electric capacity The other end is grounded；The tie point of 12nd resistance, the 13rd resistance and the 8th electric capacity is as the current limliting base modules High current limliting reference signal output end；
The 14th resistance that one end is connected with the inverting input of the 3rd operational amplifier；
The four-operational amplifier that inverting input is connected with the other end of the 14th resistance；
The 15th resistance being connected between the in-phase input end and ground of the four-operational amplifier；
The 16th resistance being connected between the inverting input of the four-operational amplifier and output end；
The 17th resistance that one end is connected with the output end of the four-operational amplifier；
The 18th resistance being connected between the 17th resistance other end and the second source；
The 9th electric capacity that one end is connected with the tie point of the 17th resistance and the 18th resistance, the 9th electric capacity The other end is grounded；The tie point of 17th resistance, the 18th resistance and the 9th electric capacity is as the current limliting base modules Lower bound stream reference signal output end.
Preferably, the driving lockout circuit includes：
The 20th resistance that one end is connected with the current-limiting protection circuit；
The tenth electric capacity that one end is connected with the other end of the first resistor, the other end ground connection of the tenth electric capacity；
The NOT gate that input is connected with the tie point of the 20th resistance and the tenth electric capacity；
The 21st resistance that one end is connected with the second source of the frequency converter, the other end of the 21st resistance It is connected with the output end of the NOT gate, the output end of the NOT gate is connected with the enabled pin of the pulse buffer chip.
Preferably, in addition to：Input is connected with the current-limiting protection circuit, output end respectively with the processor and institute The connected over-current detection circuit of driving lockout circuit is stated, for receiving each collection modulus of conversion in the current-limiting protection circuit The voltage signal of block output, and by the voltage signal compared with the default excessively stream a reference value, according to comparative result The first overcurrent protection signal and the second overcurrent protection signal are generated, exports the first overcurrent protection signal to the driving block Circuit, the second overcurrent protection signal is exported to the processor.
Preferably, the over-current detection circuit includes：
Excessively stream base modules, for generating and exporting the default excessively stream a reference value；
Input gathers the output end and current limliting base modules of modular converter with three of the current-limiting protection circuit respectively The connected window device comparison circuit of output end, for respectively by the voltage signal of each collection modular converter output and institute State default excessively stream a reference value to be compared, and export comparative result；
The Shaping Module that input is connected with the output end of the window device comparison circuit, the output end of the Shaping Module It is connected with the driving lockout circuit, for carrying out shaping to the comparative result, generates and export first overcurrent protection Signal is to driving lockout circuit and exports the second overcurrent protection signal to processor.
Preferably, each collection modular converter includes：
The first resistor that one end is connected with the first power supply of the frequency converter；
The second resistance that one end is connected with the other end of the first resistor, the other end of the second resistance and the change Frequency device output end is connected, and gathers a wherein phase output current signal；The first resistor is identical with the resistance of the second resistance；
The 3rd resistor that one end is connected with the tie point of the first resistor and second resistance；
The first electric capacity that one end is connected with the other end of the 3rd resistor, the other end ground connection of first electric capacity；Institute The tie point for stating 3rd resistor and first electric capacity is the output end for gathering modular converter；
The window device comparison circuit includes：Three output ends window comparator in parallel, the 7th resistance, the 8th resistance and 4th electric capacity；Wherein：
Each window comparator includes：First comparator and the second comparator；The first comparator it is positive defeated Enter end with the inverting input of second comparator to be connected, first input end of the tie point as the window device comparison circuit It is connected with the output end of one of collection modular converter, the inverting input of the first comparator is as the window device ratio Compared with the second input of circuit, the normal phase input end of second comparator inputs as the 3rd of the window device comparison circuit End；The first comparator is connected with the output end of the second comparator；
One end of 7th resistance is connected with the second source of the frequency converter, the other end of the 7th resistance and institute The output end for stating window comparator is connected；
One end of 8th resistance is connected with the other end of the 7th resistance；
One end of 4th electric capacity is connected with the other end of the 8th resistance；Another termination of 4th electric capacity Ground；The tie point of 4th electric capacity and the 8th resistance is the output end of the window device comparison circuit；
The Shaping Module includes：
First NOT gate of the input as the input of the Shaping Module；
The second NOT gate that input is connected with the output end of first NOT gate, the output end of second NOT gate is described The output end of Shaping Module.
Preferably, the Shaping Module also includes：
The filtration module that input is connected with the output end of the Shaping Module, the output end of the filtration module with it is described Processor is connected, for being filtered to the first current-limiting protection signal or the first overcurrent protection signal, output described second Current-limiting protection signal or the second overcurrent protection signal.
Preferably, the filtration module includes：
Nineth resistance of the one end as the input of the filtration module；
The 5th electric capacity that one end is connected with the other end of the 9th resistance, the other end ground connection of the 5th electric capacity；Institute The tie point for stating the 9th resistance and the 5th electric capacity is the output end of the filtration module.
Preferably, the driving lockout circuit includes：
The 20th resistance that one end is connected with the current-limiting protection circuit；
The tenth electric capacity that one end is connected with the other end of the 20th resistance, the other end ground connection of the tenth electric capacity；
The 21st resistance that one end is connected with the over-current detection circuit；
The 11st electric capacity that one end is connected with the other end of the 21st resistance, the other end of the 11st electric capacity Ground connection；
The NAND gate that input is connected with two tie points respectively, described two tie points are the 20th resistance and the The tie point of ten electric capacity and the tie point of the 21st resistance and the 11st electric capacity；
The 22nd resistance that one end is connected with the second source of the frequency converter, the other end of the 22nd resistance It is connected with the output end of the NAND gate, tie point is connected with the enabled pin of the pulse buffer chip.
Preferably, in addition to：IGBT failure detector circuits；The input of the IGBT failure detector circuits receives the change The IGBT of frequency device output end fault feedback signal, the output end of the IGBT failure detector circuits and the driving lockout circuit It is connected；The driving lockout circuit is also connected with the processor.
Preferably, the IGBT failure detector circuits receive the three of the inverter output terminal respectively including three inputs The detection module of phase IGBT fault feedback signal, the output end of each detection module respectively with the driving lockout circuit It is connected；Each detection module includes：
30th resistance；
The 31st resistance that one end is connected with the other end of the 30th resistance；30th resistance and the 30th Input of the tie point of one resistance as the detection module；
The 20th electric capacity that one end is connected with the other end of the 31st resistance, the other end of the 20th electric capacity Ground connection；
The NOT gate that input is connected with the tie point of the 31st resistance and the 20th electric capacity；The output of the NOT gate Hold the output end as the detection module.
Preferably, the driving lockout circuit includes：
The 20th resistance that one end is connected with the current-limiting protection circuit；
The tenth electric capacity that one end is connected with the other end of the 20th resistance, the other end ground connection of the tenth electric capacity；
The 21st resistance that one end is connected with the over-current detection circuit；
The 11st electric capacity that one end is connected with the other end of the 21st resistance, the other end of the 11st electric capacity Ground connection；
The first diode that negative electrode is connected with the tie point of the 20th resistance and the tenth electric capacity；
The second diode that negative electrode is connected with the tie point of the 21st resistance and the 11st electric capacity；Described 1st The anode of pole pipe and the second diode is connected；
The 3rd diode, the 4th diode and the 5th that negative electrode is connected with the IGBT failure detector circuits output end respectively Diode；3rd diode, the 4th diode, the anode of the 5th diode are connected, and tie point is connected with the processor；
It is connected to the second source of the frequency converter and the sun of the 3rd diode, the 4th diode and the 5th diode The 22nd resistance between the tie point of pole；
Second be connected between the second source and first diode and the anode tie point of the second diode 13 resistance；
The NAND gate that input is connected with two tie points respectively, described two tie points are respectively the three or two pole The anode tie point of pipe, the 4th diode and the 5th diode, and first diode are connected with the anode of the second diode Point；
The 24th resistance that one end is connected with the second source, the other end of the 24th resistance with it is described with The output end of NOT gate is connected, and tie point is connected with the enabled pin of the pulse buffer chip；
Or the driving lockout circuit includes：
The 20th resistance that one end is connected with the current-limiting protection circuit；
The tenth electric capacity that one end is connected with the other end of the 20th resistance, the other end ground connection of the tenth electric capacity；
The 21st resistance that one end is connected with the over-current detection circuit；
The 11st electric capacity that one end is connected with the other end of the 21st resistance, the other end of the 11st electric capacity Ground connection；
First and the door that input is connected with two tie points respectively, described two tie points be the 20th resistance with The tie point of tenth electric capacity and the tie point of the 21st resistance and the 11st electric capacity；
Second and the door that input is connected with the output end of two detection modules respectively；
The 3rd and the door that input is connected with the output end of detection module another described；Described second is defeated with door Go out end with the described 3rd with the output end of door to be connected, tie point is connected with the processor；
One input and the described first NAND gate being connected with the output end of door, another input of the NAND gate It is connected with described second with gate output terminal and the described 3rd with the tie point of gate output terminal；
The 22nd resistance that one end is connected with the second source, the other end of the 22nd resistance with it is described with The output end of NOT gate is connected, and tie point is connected with the enabled pin of the pulse buffer chip.
Preferably, the driving lockout circuit also includes：
The 7th diode that negative electrode is connected with the DRIVE pins of the processor；
The 8th diode that negative electrode is connected with the RS-DRIVE pins of the processor；7th diode and described the The anode of eight diodes is connected, and tie point is connected with the anode tie point of first diode and the second diode；
Or the driving lockout circuit also includes：
The 4th and the door that input is connected with the DRIVE pins and RS-DRIVE pins of the processor respectively；Described Four are connected with the output end of door with described first with the output end of door.
A kind of frequency converter, it is characterised in that including any of the above-described described frequency converter failure detection envelope wave circuit.
A kind of system using frequency converter, the frequency converter in the system using frequency converter include any of the above-described described Frequency converter failure detection envelope wave circuit.
The application provides a kind of frequency converter failure detection envelope wave circuit, and the frequency conversion is characterized by current-limiting protection circuit collection The voltage signal of the output current signal of device, after the voltage signal is changed compared with current limliting reference signal, root Generated according to comparative result and export the first current-limiting protection signal and the second current-limiting protection signal；Then received by driving lockout circuit The first current-limiting protection signal, and generated according to the level value of the first current-limiting protection signal and export locking signal；Again The locking signal is received by pulse buffer chip, and the driving letter of IGBT in the frequency converter is blocked according to the locking signal Number；While the driving lockout circuit receives the first current-limiting protection signal, processor receives second current-limiting protection Signal, and judge whether the frequency converter needs current limliting according to the second current-limiting protection signal, carried out according to judged result soft Part processing.The frequency converter failure detection envelope wave circuit that the application provides, passes through said process so that the frequency converter needs current limliting When, by the drive signal of IGBT in the driving lockout circuit and the pulse buffer chip block frequency converter, by described Processor realizes the pulse suppression output on software, defeated after Failure elimination, then by the processor releasing pulse suppression Go out, the process lifted a blockade is realized without a large amount of peripheral components of the prior art；Simultaneously using hardware and software joint-detection With protection, the reliability of circuit is improved.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this The embodiment of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis The accompanying drawing of offer obtains other accompanying drawings.
Fig. 1 is a kind of frequency converter failure detection envelope wave circuit figure that the embodiment of the present application provides；
Fig. 2 is a kind of frequency converter failure detection envelope wave circuit figure that another embodiment of the application provides；
Fig. 3 is a kind of current-limiting protection circuit figure that another embodiment of the application provides；
Fig. 4 is a kind of driving lockout circuit figure that another embodiment of the application provides；
Fig. 5 is a kind of frequency converter failure detection envelope wave circuit figure that another embodiment of the application provides；
Fig. 6 is a kind of frequency converter failure detection envelope wave circuit figure that another embodiment of the application provides；
Fig. 7 is a kind of over-current detection circuit figure that another embodiment of the application provides；
Fig. 8 is a kind of driving lockout circuit figure that another embodiment of the application provides；
Fig. 9 is a kind of IGBT failure detector circuits figure that another embodiment of the application provides；
Figure 10 is a kind of frequency converter failure detection envelope wave circuit figure that another embodiment of the application provides；
Figure 11 is a kind of driving lockout circuit figure that another embodiment of the application provides；
Figure 12 is a kind of driving lockout circuit figure that another embodiment of the application provides；
Figure 13 is a kind of driving lockout circuit figure that another embodiment of the application provides；
Figure 14 is a kind of driving lockout circuit figure that another embodiment of the application provides.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.It is based on Embodiment in the present invention, those of ordinary skill in the art are obtained every other under the premise of creative work is not made Embodiment, belong to the scope of protection of the invention.
The invention provides a kind of frequency converter failure to detect envelope wave circuit, to solve in the prior art more than peripheral components and electricity The problem of road reliability is low.
Specifically, as shown in figure 1, frequency converter failure detection envelope wave circuit includes：
Respectively with the first power supply VCC1, second source VCC2, and the current-limiting protection circuit that is connected of inverter output terminal 101；
It is connected between second source VCC2 and ground, and the driving lockout circuit 102 being connected with current-limiting protection circuit 101；
Enabled pin is with driving the pulse buffer chip 103 that lockout circuit 102 is connected；
The processor 104 being connected with current-limiting protection circuit 101.
What deserves to be explained is in specific practical application, the commonly provided 3V operating voltages of the first power supply VCC1 can also 3.3V operating voltages are used according to actual conditions, the commonly provided 3.3V operating voltages of second source VCC2, do not do specific limit herein It is fixed, depending on can making its application environment.
Specifically operation principle is：
The collection of current-limiting protection circuit 101 characterizes the voltage signal of the output current signal of the frequency converter, by the voltage Signal changed after compared with the current limliting reference signal, generated according to comparative result and export the first current-limiting protection letter Number OCL1 and the second current-limiting protection signal OCL2；Lockout circuit 102 is driven to receive the first current-limiting protection signal OCL1, and according to the One current-limiting protection signal OCL1 level value generates and exports locking signal DRIVE-EN；Pulse buffer chip 103 receives block Signal DRIVE-EN, and according to the drive signal of IGBT in the locking signal DRIVE-EN blocks frequency converter；Wherein, IGBT can To be the switching tube of inverter bridge in the frequency converter；Processor 104 receives the second current-limiting protection signal OCL2, and according to the second limit Stream protection signal OCL2 level value judges whether the output of the frequency converter needs current limliting, and software arteries and veins is carried out according to judged result Punching suppresses output or releases the pulse suppression output.
What deserves to be explained is there is also the side for the fault monitoring and protection that frequency converter is realized using pure software in the prior art Case, this scheme is fewer than using the peripheral components used in hardware circuit, while reliability is high, but uses pure software to realize block Process it is slower than using the implementation process of hardware circuit, easily cause protection to cause the device damage of the frequency converter not in time； And the frequency converter failure detection envelope wave circuit described in the present embodiment, pass through said process so that when the frequency converter needs current limliting, The drive signal of IGBT in frequency converter described in driving lockout circuit 102 and pulse buffer chip 103 can be first passed through, then passes through place Reason device 104 realizes the pulse suppression output on software, ensures reliable in time, it is ensured that the safety of device；Work as Failure elimination Afterwards, then release the pulse suppression by processor 104 to export, i.e., realized without a large amount of peripheral components of the prior art and release envelope The process of lock；The reliability of circuit is improved with protecting using hardware and software joint-detection simultaneously.
Preferably, as shown in Fig. 2 current-limiting protection circuit 101 includes：
It is connected between the first power supply VCC1 and ground, and three collection conversions being connected respectively with the inverter output terminal Module 111；
The current limliting base modules 112 being connected between the first power supply VCC1 and ground；
Be connected between second source VCC2 and ground, input respectively with three collection modular converter 111 output ends and The connected window device comparison circuit 113 of the output end of current limliting base modules 112；
The Shaping Module 114 that input is connected with the output end of window device comparison circuit 113, the output of Shaping Module 114 End is connected with driving lockout circuit 102；
Preferably, in addition to：The filtration module 115 that input is connected with the output end of Shaping Module 114, filtration module 115 output end is connected with processor 104.
Specifically operation principle is：
Three collection modular converters 111 gather respectively the output current signal for characterizing the frequency converter voltage signal IU, IV and IW, voltage signal IU is converted into corresponding voltage signal IU-1, voltage signal IV is converted to voltage signal IV-1, will Voltage signal IW is converted to voltage signal IW-1；Current limliting base modules 112 export the current limliting reference signal；Window device is more electric Road 113 respectively by voltage signal IU-1, voltage signal IV-1 and voltage signal IW-1 compared with the current limliting reference signal, Generate and export comparative result；Shaping Module 114 carries out shaping to the comparative result, generates and exports the first current-limiting protection letter Number OCL1 and the second current-limiting protection signal OCL2.Preferably, current-limiting protection circuit 101 also includes filtration module 115, filtration module 115 can be filtered to the first current-limiting protection signal OCL1, generate and export the second current-limiting protection signal OCL2, also i.e. by the One current-limiting protection signal OCL1 is exported to processor 104 after being filtered.
Preferably, as shown in figure 3, each collection modular converter 111 includes：
The first resistor R1 that one end is connected with the first power supply VCC1；
The second resistance R2 that one end is connected with the first resistor R1 other end, the second resistance R2 other end and the frequency conversion Device output end is connected, and gathers a wherein phase output current signal；First resistor R1 is identical with second resistance R2 resistance；
The 3rd resistor R3 that one end is connected with first resistor R1 and second resistance R2 tie point；
The other end ground connection for the first electric capacity C1, the first electric capacity C1 that one end is connected with the 3rd resistor R3 other end；3rd Resistance R3 and the first electric capacity C1 tie point are the output end of collection modular converter 111；
Window device comparison circuit 113 includes：Three output ends window comparator 110 in parallel, the 7th resistance R7, the 8th electricity Hinder R8 and the 4th electric capacity C4；Wherein：
Each window comparator 110 includes：First comparator U1 and the second comparator U2；First comparator U1's is same mutually defeated Enter end with the second comparator U2 inverting input to be connected, first input end and wherein of the tie point as window comparator 110 The output end of one collection modular converter 111 is connected, first comparator U1 inverting input as window comparator 110 the Two inputs a reference value output end low with current limliting base modules 112 is connected, and the second comparator U2 in-phase input end is as window Mouth the 3rd input of comparator 110 is connected with the high a reference value output end of current limliting base modules 112；First comparator U1 and Two comparator U2 output end is connected；
7th resistance R7 one end is connected with second source VCC2；
8th resistance R8 one end is connected with the 7th resistance R7 other end and first comparator U1 output end；
4th electric capacity C4 one end is connected with the 8th resistance R8 other end；4th electric capacity C4 other end ground connection；4th Electric capacity C4 and the 8th resistance R8 tie point are the output end of window device comparison circuit 113；
Shaping Module 114 includes：
First NOT gate F1 of the input as the input of Shaping Module 114；
The output end for the second NOT gate F2, the second NOT gate F2 that input is connected with the first NOT gate F1 output end is sizing die The output end of block 114；
In specific application, Shaping Module 114 can be realized using even number of inverters (such as NOT gate), Huo Zheqi Several same phase devices (such as with door) realize that Fig. 3 is only a kind of example, is not specifically limited herein, depending on making its application environment.
Preferably, processor 104 is additionally operable to output pulse width modulated signal OCREF to current-limiting protection circuit 101；Current limliting Protection circuit 101 is additionally operable to generate the current limliting reference signal according to pulse width modulating signal OCREF；
Current-limiting protection circuit 101 generates the current limliting reference signal according to pulse width modulating signal OCREF so that described Current limliting reference signal is controllable, can be adjusted according to specific application environment.
Fig. 3 show a kind of example of current limliting base modules 112 in current-limiting protection circuit 101, specifically includes：
The 11st resistance R11 that one end is connected with processor 104；
The 7th electric capacity C7 that one end is connected with the 11st resistance R11 other end；7th electric capacity C7 other end ground connection；
The 3rd operational amplifier U3 that in-phase input end is connected with the 11st resistance R11 and the 7th electric capacity C7 tie point； 3rd operational amplifier U3 inverting input is connected with output end；
The 12nd resistance R12 that one end is connected with the 3rd operational amplifier U3 output end；
The 13rd resistance R13 that one end is connected with the 12nd resistance R12 other end, the 13rd resistance R13 other end It is connected with second source VCC2；
The 8th electric capacity C8 that one end is connected with the 12nd resistance R12 and the 13rd resistance R13 tie point, the 8th electric capacity C8 The other end ground connection；12nd resistance R12, the 13rd resistance and the 8th electric capacity C8 tie point are as current limliting base modules 112 High current limliting reference signal output end, the higher limit REFH of output current limiting reference signal；
The 14th resistance R14 that one end is connected with the 3rd operational amplifier U3 inverting input；
The four-operational amplifier U4 that inverting input is connected with the 14th resistance R14 other end；
The 15th resistance R15 being connected between four-operational amplifier U4 in-phase input end and ground；
The 16th resistance R16 being connected between four-operational amplifier U4 inverting input and output end；
The 17th resistance R17 that one end is connected with four-operational amplifier U4 output end；
The 18th resistance R18 being connected between the 17th resistance R17 other ends and second source VCC；
The 9th electric capacity C9 that one end is connected with the 17th resistance R17 and the 18th resistance R18 tie point, the 9th electric capacity C9 The other end ground connection；17th resistance R17, the 18th resistance R18 and the 9th electric capacity C9 tie point are as current limliting base modules 112 lower bound stream reference signal output end, the lower limit REFL of output current limiting reference signal.
Pulse width modulating signal OCREF is provided by processor 104, and passes through the tenth resistance R10 and the 6th electric capacity C6 And the 11st resistance R11 and the 7th electric capacity C7 composition two-stage low pass filter filter, pulse width modulating signal OCREF is filtered Into direct current signal, then the higher limit REFH and lower limit REFL for generating the current limliting reference signal are handled by follow-up component.
What deserves to be explained is the pulse width modulating signal OCREF that processor 104 provides can be by one-level filtering Can, but only the signal after one-level filtering carries ripple, and direct current signal can be obtained after two-stage LPF, profit In the processing of follow-up component.Fig. 3 show the example using two stage filter, and current limliting base modules 112 also include being connected to place Manage the tenth resistance R10 between device 104 and the 11st resistance R11, and one end be connected with the tenth resistance R10 other end the 6th Electric capacity C6；6th electric capacity C6 other end ground connection.
In specific practical application, the specific implementation forms of current limliting base modules 112 can depending on its application environment, It is not specifically limited herein.
Preferably, as shown in figure 3, filtration module 115 includes：
Nineth resistance R9 of the one end as the input of filtration module 115；
The 5th electric capacity C5 that one end is connected with the 9th resistance R9 other end, the 5th electric capacity C5 other end ground connection；9th Resistance R9 and the 5th electric capacity C5 tie point are the output end of filtration module 115.
Specifically operation principle is：
Voltage signal IU, IV and the IW of the frequency converter three-phase output current signal after amplification is changed believe for exchange Number, peak-peak is that positive and negative VCC1 corresponds to current-limiting protection point, and voltage signal IU, IV and IW pass through first resistor R1 and second respectively The half lifting processing of circuit of resistance R2 compositions, then the RC LPFs formed by 3rd resistor R3 and the first electric capacity C1 Device filtering after, filter out high-frequency interferencing signal, be converted to direct current biasing be superimposed with alternating voltage voltage signal IU-1, IV-1 and IW-1；Voltage signal IU-1, IV-1 and IW-1 are again in the interior higher limit with the current limliting reference signal of window comparator circuit 113 REEH and lower limit REEL are compared, and the comparative result exports after the first NOT gate F1 and the second NOT gate F2 shaping One current-limiting protection signal OCL1 extremely drives lockout circuit 102；First current-limiting protection signal OCL1 passes through the 9th resistance R9 and the 5th After the RC low pass filters filtering of electric capacity C5 compositions, generate and export the second current-limiting protection signal OCL2 to processor 104.
When the frequency converter three-phase output current is normal, by taking U phase currents as an example, voltage signal IU filters by lifting The voltage signal IU-1=(VCC1+IU)/2 obtained afterwards, its magnitude of voltage the current limliting reference signal higher limit REEH with Between limit value REEL, window comparator 110 is high-impedance state, and output signal is high level by pull-up outside the 7th resistance R7, then After the 8th resistance R8 and the 4th electric capacity C4 LPFs, export to Shaping Module 114 and pass through the first NOT gate F1 of inside and After the two-stage schmitt inverter shaping of two NOT gate F2 compositions, the first current-limiting protection signal OCL1 of high level is exported；First limit Stream protection signal OCL1 after the 9th resistance R9 and the 5th electric capacity C5 LPFs, is generated again and is exported the second limit of high level Protection signal OCL2 is flowed to processor 104；I.e. normal condition when, current-limiting protection circuit 101 export the first current-limiting protection signal OCL1 and the second current-limiting protection signal OCL2 is high level.When the frequency converter three-phase output current current limliting, with U phase currents Exemplified by, voltage signal IU magnitude of voltage exceedes the higher limit REEH of the current limliting reference signal, and window comparator 110 exports low electricity Flat voltage signal, then it is filtered involve low level first current-limiting protection signal OCL1 is exported after shaping to driving lockout circuit 102, realize the drive signal that IGBT in the frequency converter is blocked on hardware；First current-limiting protection signal OCL1 is again by the 9th electricity After hindering R9 and the 5th electric capacity C5 LPFs, generate and export low level second current-limiting protection signal OCL2 to processor 104, Processor 104 is determined as current limliting, then realizes the pulse suppression on software；Reach the drive that hardware first blocks IGBT in the frequency converter Signal is moved, is suppressed again on software, realizes that hardware and software combines, the pulse suppression is released after Failure elimination, then by processor 104 Output, improve block speed and reliability.The Cleaning Principle and said process of the output current of the other two-phase of the frequency converter Identical, here is omitted.
Preferably, as shown in figure 4, driving lockout circuit 102 includes：
The 20th resistance R20 that one end is connected with current-limiting protection circuit 101；
The tenth electric capacity C1 that one end is connected with the first resistor R1 other end, the tenth electric capacity C10 other end ground connection；
The NOT gate F that input is connected with the 20th resistance R20 and the tenth electric capacity C10 tie point；
The 21st resistance R21 that one end is connected with second source VCC2, the 21st resistance R21 other end NAND gate F output end is connected, and tie point is connected with the enabled pin of pulse buffer chip 103.
Specifically operation principle is：
When the frequency converter three-phase output current needs current limliting, current-limiting protection circuit 101 exports low level first limit Protection signal OCL1 is flowed to lockout circuit 102 is driven, and after the 20th resistance R20 and the tenth electric capacity C10 LPF, is passed through The locking signal DRIVE-EN for exporting high level is crossed after NOT gate F shapings to pulse buffer chip 103, by pulse buffer chip 103 Block the drive signal of IGBT in the frequency converter.
Preferably, as shown in figure 5, frequency converter failure detection envelope wave circuit also includes：
The over-current detection circuit 105 being connected between the first power supply VCC1, second source VCC2 and ground, over-current detection circuit 105 input is connected with current-limiting protection circuit 101, the output end of over-current detection circuit 105 respectively with processor 104 and driving Lockout circuit 102 is connected.
Over-current detection circuit 105 receives the voltage signal that each collection modular converter 111 exports in current-limiting protection circuit 101 IU-1, IV-1 and IW-1, by voltage signal IU-1, IV-1 and IW-1 compared with the default excessively stream a reference value, according to Comparative result generates the first overcurrent protection signal OCH1 and the second overcurrent protection signal OCH2, exports the first overcurrent protection signal OCH1 exports the second overcurrent protection signal OCH2 to processor 104 to lockout circuit 102 is driven.
Driving lockout circuit 102 is additionally operable to export the locking signal of high level according to the first overcurrent protection signal OCH1 DRIVE-EN is blocked the drive signal of IGBT in the frequency converter by pulse buffer chip 103 to pulse buffer chip 103.
Processor 104 is additionally operable to be determined as excessively stream according to the second overcurrent protection signal OCH2, realizes the pulse envelope on software Lock.
Preferably, as shown in fig. 6, over-current detection circuit 105 includes：
The preset reference module 151 being connected between the first power supply VCC1 and ground；
Be connected between second source VCC2 and ground, input respectively with current-limiting protection circuit 101 and preset reference module The connected window device comparison circuit 152 of 151 output end；
The Shaping Module 153 that input is connected with the output end of window device comparison circuit 152, the output of Shaping Module 153 End is connected with driving lockout circuit 102；
Preferably, in addition to：The filtration module 154 that input is connected with the output end of Shaping Module 153, filtration module 154 output end is connected with processor 104.
Specifically operation principle is：
Preset reference module 151 generates and exports the default excessively stream a reference value；Window device comparison circuit 152 respectively will Voltage signal IU-1, IV-1 and IW-1 and default excessively stream that each collection modular converter 111 exports in current-limiting protection circuit 101 A reference value is compared, and is generated and is exported comparative result；Shaping Module 153 carries out shaping to the comparative result, generates and defeated Go out the first overcurrent protection signal OCH1；When over-current detection circuit 105 includes filtration module 154, filtration module 154 is to the first mistake Stream protection signal OCH1 is filtered, and is generated and is exported the second overcurrent protection signal OCH2.
Preferably, as shown in fig. 7, window device comparison circuit 152 includes：Three output ends window comparator 150 in parallel, 7th resistance R7, the 8th resistance R8 and the 4th electric capacity C4；Wherein：
Each window comparator 150 includes：First comparator U1 and the second comparator U2；First comparator U1's is positive defeated Enter end be connected with the second comparator U2 inverting input, tie point as window device comparison circuit 152 first input end and The output end of one of collection modular converter 111 is connected, receiving voltage signal IU-1, IV-1 or IW-1, first comparator Second input of the U1 inverting input as window device comparison circuit 152, the second comparator U2 normal phase input end conduct 3rd input of window device comparison circuit 152；First comparator U1 is connected with the second comparator U2 output end；
7th resistance R7 one end is connected with second source VCC2, the 7th resistance the R7 other end and window comparator 150 Output end be connected；
8th resistance R8 one end is connected with the 7th resistance R7 other end；
4th electric capacity C4 one end is connected with the 8th resistance R8 other end；4th electric capacity C4 other end ground connection；4th Electric capacity C4 and the 8th resistance R8 tie point are the output end of window device comparison circuit 152；
Shaping Module 153 includes：
First NOT gate F1 of the input as the input of Shaping Module 153；
The output end for the second NOT gate F2, the second NOT gate F2 that input is connected with the first NOT gate F1 output end is sizing die The output end of block 153；
Fig. 7 show a kind of example of the way of realization of preset reference module 151, specifically includes：
The 4th resistance R4 that one end is connected with the first power supply VCC1；
The 5th resistance R5 that one end is connected with the 4th resistance R4 other ends；4th resistance R4 and the 5th resistance R5 tie point For the high a reference value output end of preset reference module 151, the higher limit of the output default excessively stream a reference value；
The 6th resistance R6 that one end is connected with the 5th resistance R5 other end, the 6th resistance R6 other end ground connection；
The second electric capacity C2 being connected between the first power supply VCC1 and ground；
The 3rd electric capacity C3 being connected between the 5th resistance R5 and the 6th resistance R6 tie point and ground, the 3rd electric capacity C3's The other end is grounded, and the 5th resistance R5, the 6th resistance R6 and the 3rd electric capacity C3 tie point are the low benchmark of preset reference module 151 It is worth output end, exports the lower limit of the default excessively stream a reference value；
In specific practical application, the specific implementation form of preset reference module 151 can depending on its application environment, It is not specifically limited herein.
Preferably, filtration module 154 includes：
Nineth resistance R9 of the one end as the input of filtration module 154；
The 5th electric capacity C5 that one end is connected with the 9th resistance R9 other end, the 5th electric capacity C5 other end ground connection；9th Resistance R9 and the 5th electric capacity C5 tie point are the output end of filtration module 154；
The operation principle of each component is substantially identical with current-limiting protection circuit 101 in over-current detection circuit 105, different It is the higher limit of the default excessively stream a reference value in over-current detection circuit 105 and lower limit is default, is not to pass through processor 104 offers；In specific practical application, two kinds of a reference values can be 0V and 3.3V, and current-limiting protection circuit 101 can be with Adjusted according to the signal of processor 104, be not specifically limited herein accordingly.
Preferably, as shown in figure 8, driving lockout circuit 102 includes：
The 20th resistance R20 that one end is connected with current-limiting protection circuit 101；
The tenth electric capacity C10 that one end is connected with the 20th resistance R20 other end, the tenth electric capacity C10 other end ground connection；
The 21st resistance R21 that one end is connected with over-current detection circuit 105；
The 11st electric capacity C11 that one end is connected with the 21st resistance R21 other end, the 11st electric capacity C11's is another End ground connection；
The NAND gate U that input is connected with two tie points respectively, described two tie points are the 20th resistance R20 and the Ten electric capacity C10 tie point and the 21st resistance R21 and the 11st electric capacity C11 tie point；
The 22nd resistance R22 that one end is connected with second source VCC2, the 22nd resistance R22 other end with it is non- Door U output end is connected, and tie point is connected with the enabled pin of pulse buffer chip 103.
The first current-limiting protection signal OCL1 that current-limiting protection circuit 101 exports and the first of the output of over-current detection circuit 105 Overcurrent protection signal OCH1 is respectively after LPF, via exporting locking signal after NAND gate U logical process and shaping DRIVE-EN is to pulse buffer chip 103.When the first current-limiting protection signal OCL1 and the first overcurrent protection signal OCH1 wherein it One when to be low level or both be low level, and NAND gate U outputs are the locking signal DRIVE-EN of high level, now pulse Buffer chip 103 blocks the drive signal of IGBT in the frequency converter.
Preferably, as shown in figure 9, frequency converter failure detection envelope wave circuit also includes：It is connected to the 3rd power supply VCC3 IGBT failure detector circuits 106 between ground；The input of IGBT failure detector circuits 106 receives the inverter output terminal IGBT fault feedback signal, the output ends of IGBT failure detector circuits 106 is connected with driving lockout circuit 102；Driving envelope Lock circuit 102 is also connected with processor 104.
IGBT failure detector circuits 106 are monitored to the IGBT of the inverter output terminal, when short circuit event occurs in IGBT During barrier, IGBT failure detector circuits 106 output signal to driving lockout circuit 102, make the output of driving lockout circuit 102 for high electricity Flat locking signal DRIVE-EN, control pulse buffer chip 103 carry out hardware lockout.
In specific practical application, the 3rd power supply VCC3 can be 5V, can also depending on specific application environment, It is not specifically limited herein.
Preferably, as shown in Figure 10, IGBT failure detector circuits 106 receive the frequency converter respectively including three inputs The detection module 161 of the three-phase IGBT of output end fault feedback signal, the output end of each detection module 161 respectively with driving Lockout circuit 102 is connected；Each detection module 161 includes：
The 30th resistance R30 that one end is connected with the 3rd power supply VCC3；
The 31st resistance R31 that one end is connected with the 30th resistance R30 other end；30th resistance R30 and the 3rd Input of the 11 resistance R31 tie point as detection module 161；
The 20th electric capacity C20 that one end is connected with the 31st resistance R31 other end, the 20th electric capacity C20's is another End ground connection；
The NOT gate F that input is connected with the 31st resistance R31 and the 20th electric capacity C20 tie point；NOT gate F output Hold the output end as detection module 161.
IGBT failure detector circuits 106 are monitored to the IGBT of the inverter output terminal, when inversion part U, there is fault feedback signal F-IPMU, F-IPMV or the F-IPMW that are exported during short trouble in the IGBT of any phase of V, W three-phase High level will be corresponded to, after filtering after shaping, voltage signal F-U, F-V or F-W of output correspond to low level, make driving The output of lockout circuit 102 is the locking signal DRIVE-EN of high level, controls pulse buffer chip 103 to carry out hardware lockout.
Preferably, as shown in figure 11, driving lockout circuit 102 includes：
The 20th resistance R20 that one end is connected with the OCL1 output ends of current-limiting protection circuit 101；
The tenth electric capacity C10 that one end is connected with the 20th resistance R20 other end, the tenth electric capacity C10 other end ground connection；
The 21st resistance R21 that one end is connected with the OCH1 output ends of over-current detection circuit 105；
The 11st electric capacity C11 that one end is connected with the 21st resistance R21 other end, the 11st electric capacity C11's is another End ground connection；
The first diode D1 that negative electrode is connected with the 20th resistance R20 and the tenth electric capacity C10 tie point；
The second diode D2 that negative electrode is connected with the 21st resistance R21 and the 11st electric capacity C11 tie point；One or two Pole pipe D1 and the second diode D2 anode are connected；
The 3rd diode D3 that negative electrode is connected with the output end of a detection module 161；
The 4th diode D4 that negative electrode is connected with the output end of another detection module 161；
The 5th diode D5 that negative electrode is connected with the output end of the 3rd detection module 161；3rd diode D3, the 4th Diode D4 and the 5th diode D5 anode are connected, and tie point is connected with processor 104；
The anode that second source VCC2 is connected to the 3rd diode D3, the 4th diode D4 and the 5th diode D5 is connected The 22nd resistance R22 between point；
Be connected between institute second source VCC2 and the first diode D1 and the second diode D2 anode tie point 23 resistance R23；
The NAND gate U0 that input is connected with two tie points respectively, described two tie points are respectively the 3rd diode D3, the 4th diode D4 and the 5th diode D5 anode tie point, and the first diode D1 and the second diode D2 anode Tie point；
The 24th resistance R24 that one end is connected with second source VCC2, the 24th resistance R24 other end with it is non- Door U0 output end is connected, and tie point is connected with the enabled pin of pulse buffer chip 103.
Preferably, as shown in figure 12, driving lockout circuit 102 also includes：
The 7th diode D7 that negative electrode is connected with the DRIVE pins of processor 104；
The 8th diode D8 that negative electrode is connected with the RS-DRIVE pins of processor 104；7th diode D7 and the eight or two Pole pipe D8 anode is connected, and tie point is connected with the first diode D1 and the second diode D2 anode tie point.
7th diode D7, the 8th diode D8, the first diode D1 and the second diode D2 anode are connected and caused Block during DRIVE pins and DRIVE-EN pin electrification resets is achieved, and can effectively prevent the frequency converter is standby to stop The hair pulse of machine mistiming causes machine malfunction.
Or as shown in figure 13, driving lockout circuit 102 includes：
The 20th resistance R20 that one end is connected with the OCH1 output ends of current-limiting protection circuit 101；
The tenth electric capacity C10 that one end is connected with the 20th resistance R20 other end, the tenth electric capacity C10 other end ground connection；
The 21st resistance R21 that one end is connected with the OCL1 output ends of over-current detection circuit 105；
The 11st electric capacity C11 that one end is connected with the 21st resistance R21 other end, the 11st electric capacity C11's is another End ground connection；
The first and door U1 that input is connected with two tie points respectively, described two tie points are the 20th resistance R20 With the tenth electric capacity C10 tie point and the 21st resistance R21 and the 11st electric capacity C11 tie point；
The second and door U2 that input is connected with the output end of two detection modules 161 respectively；
The 3rd and door U3 that input is connected with the output end of another detection module 161；Second is defeated with door U2 Go out end with the 3rd with door U3 output end to be connected, tie point is connected with processor 104；
One input and the first NAND gate U0 being connected with door U1 output end, NAND gate U0 another input with Second is connected with door U2 output ends and the 3rd with the tie point of door U3 output ends；
The 22nd resistance R22 that one end is connected with second source VCC2, the 22nd resistance R22 other end with it is non- Door U0 output end is connected, and tie point is connected with the enabled pin of pulse buffer chip 103.
Voltage signal F-U, F-V and F-W that IGBT failure detector circuits 106 export are by two and behind the door, by signal F0 Output is to processor 104, for carrying out software blocked or lifting a blockade.The voltage signal that IGBT failure detector circuits 106 export F-U, F-V and F-W, the first current-limiting protection signal OCL1 and over-current detection circuit 105 exported with current-limiting protection circuit 101 are exported The first overcurrent protection signal OCH1 respectively after LPF again via the signal of the logical process with door U, pass through simultaneously NAND gate U0 logical process so that voltage signal F-U, F-V, F-W, the first current-limiting protection signal OCL1 and the first overcurrent protection When signal OCH1, wherein any one signal are low level, locking signal DRIVE-EN is high level, you can control pulse buffer Chip 103 carries out hardware lockout.
What deserves to be explained is the operation principle of driving lockout circuit 102 is：The signal of reception is subjected to NAND operation, obtained The locking signal DRIVE-EN arrived then controls pulse buffer chip 103 to carry out hardware lockout if high level.In addition, when described When only including current-limiting protection circuit 101 in frequency converter failure detection envelope wave circuit, driving lockout circuit 102 is entered to the signal of reception Row inverse；Include current-limiting protection circuit 101 and over-current detection simultaneously when the frequency converter failure is detected in envelope wave circuit During circuit 105, driving lockout circuit 102 needs to carry out NAND operation to the signal of reception；Sealed when the frequency converter failure detects When also including IGBT failure detector circuits 106 in wave circuit, driving lockout circuit 102 is further added by needing to carry out and computing all the way Input.
Include current-limiting protection circuit 101 and over-current detection circuit simultaneously when the frequency converter failure is detected in envelope wave circuit During 105 and IGBT failure detector circuits 106, driving in lockout circuit 102 can use the circuit shown in Figure 11 real with computing Existing form, the circuit implementation shown in Figure 13 can also be used, the difference is that driving lockout circuit 102 is from shown in Figure 11 Anti-phase diode and pull-up resistor, than shown in Figure 13 and door, its device cost is lower, can be with prioritizing selection；Herein simultaneously It is not specifically limited, can be selected according to specific actual conditions.
Preferably, as shown in figure 14, driving lockout circuit 102 also includes：
The 4th and door U4 that input is connected with the DRIVE pins and DRIVE-EN pins of processor 104 respectively；4th with Door U4 output end is connected with first with door U1 output end.
4th is connected with door U4 with first with door U1 output end so that DRIVE pins and DRIVE-EN pin electrification resets The block of period is achieved, and can effectively prevent the standby shutdown mistiming hair pulse of the frequency converter from causing machine malfunction.
In addition, present invention also offers a kind of frequency converter, the frequency converter includes any described frequency conversion of above-described embodiment Wave circuit is sealed in device fault detect.
Specific operation principle is same as the previously described embodiments, and here is omitted.
Present invention also offers a kind of system using frequency converter, the frequency converter in the system using frequency converter includes Any described frequency converter failure detection envelope wave circuit of above-described embodiment.
Specific operation principle is same as the previously described embodiments, and here is omitted.
Each embodiment is described by the way of progressive in the present invention, and what each embodiment stressed is and other realities Apply the difference of example, between each embodiment identical similar portion mutually referring to.For device disclosed in embodiment Speech, because it is corresponded to the method disclosed in Example, so description is fairly simple, related part is referring to method part illustration .
It the above is only the preferred embodiment of the present invention, make skilled artisans appreciate that or realizing of the invention.It is right A variety of modifications of these embodiments will be apparent to one skilled in the art, as defined herein general former Reason can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, the present invention will not Be intended to be limited to the embodiments shown herein, and be to fit to it is consistent with principles disclosed herein and features of novelty most Wide scope.

Claims (16)

  1. A kind of 1. frequency converter failure detection envelope wave circuit, it is characterised in that including：
    The current-limiting protection circuit being connected with inverter output terminal, for gathering the electricity for the output current signal for characterizing the frequency converter Signal is pressed, after the voltage signal is changed compared with current limliting reference signal, is generated and exported according to comparative result First current-limiting protection signal and the second current-limiting protection signal；
    The driving lockout circuit being connected with the current-limiting protection circuit, for receiving the first current-limiting protection signal, and according to The level value of the first current-limiting protection signal generates and exports locking signal；
    The pulse buffer chip that enabled pin is connected with the driving lockout circuit, for receiving the locking signal, and according to institute State the drive signal that locking signal blocks IGBT in the frequency converter；
    The processor being connected with the current-limiting protection circuit, for receiving the second current-limiting protection signal, and according to described Two current-limiting protection signals judge whether the frequency converter needs current limliting, and pulse suppression output or releasing are carried out according to judged result The pulse suppression output.
  2. 2. frequency converter failure detection envelope wave circuit according to claim 1, it is characterised in that the current-limiting protection circuit bag Include：
    Three collection modular converters being connected respectively with the inverter output terminal, are respectively used to collection and characterize the frequency converter The voltage signal of three-phase output current signal is simultaneously changed；
    Generate and export the current limliting base modules of the current limliting reference signal；
    The window that input is connected with the output end of described three output ends for gathering modular converter and current limliting base modules respectively Device comparison circuit, for the voltage signal after the conversion and the current limliting reference signal, and export comparative result；
    The Shaping Module that input is connected with the output end of the window device comparison circuit, the output end of the Shaping Module and institute State driving lockout circuit to be connected, for carrying out shaping to the comparative result, and export the first current-limiting protection signal to drive Lockout circuit and output the second current-limiting protection signal are moved to processor.
  3. 3. frequency converter failure according to claim 2 detection envelope wave circuit, it is characterised in that the current limliting base modules with The processor is connected, the processor output pulse width modulated signal to the current limliting base modules；The current limliting benchmark Module generates the current limliting reference signal according to the pulse width modulating signal；
    Wherein, the current limliting base modules include：
    The 11st resistance that one end is connected with the processor；
    The 7th electric capacity that one end is connected with the other end of the 11st resistance；The other end ground connection of 7th electric capacity；
    The 3rd operational amplifier that in-phase input end is connected with the tie point of the 11st resistance and the 7th electric capacity；Described 3rd The inverting input of operational amplifier is connected with output end；
    The 12nd resistance that one end is connected with the output end of the 3rd operational amplifier；
    The 13rd resistance that one end is connected with the other end of the 12nd resistance, the other end of the 13rd resistance with it is described The second source of frequency converter is connected；
    The 8th electric capacity that one end is connected with the tie point of the 12nd resistance and the 13rd resistance, the 8th electric capacity it is another End ground connection；High limit of the tie point of 12nd resistance, the 13rd resistance and the 8th electric capacity as the current limliting base modules Flow reference signal output end；
    The 14th resistance that one end is connected with the inverting input of the 3rd operational amplifier；
    The four-operational amplifier that inverting input is connected with the other end of the 14th resistance；
    The 15th resistance being connected between the in-phase input end and ground of the four-operational amplifier；
    The 16th resistance being connected between the inverting input of the four-operational amplifier and output end；
    The 17th resistance that one end is connected with the output end of the four-operational amplifier；
    The 18th resistance being connected between the 17th resistance other end and the second source；
    The 9th electric capacity that one end is connected with the tie point of the 17th resistance and the 18th resistance, the 9th electric capacity it is another End ground connection；Lower bound of the tie point of 17th resistance, the 18th resistance and the 9th electric capacity as the current limliting base modules Flow reference signal output end.
  4. 4. frequency converter failure detection envelope wave circuit according to claim 1, it is characterised in that the driving lockout circuit bag Include：
    The 20th resistance that one end is connected with the current-limiting protection circuit；
    The tenth electric capacity that one end is connected with the other end of the 20th resistance, the other end ground connection of the tenth electric capacity；
    The NOT gate that input is connected with the tie point of the 20th resistance and the tenth electric capacity；
    The 21st resistance that one end is connected with the second source of the frequency converter, the other end of the 21st resistance and institute The output end for stating NOT gate is connected, and the output end of the NOT gate is connected with the enabled pin of the pulse buffer chip.
  5. 5. frequency converter failure detection envelope wave circuit according to claim 2, it is characterised in that also include：Input and institute State current-limiting protection circuit to be connected, the over-current detection electricity that output end is connected with the processor and the driving lockout circuit respectively Road, for receiving in the current-limiting protection circuit voltage signal of each collection modular converter output, and by the voltage signal Compared with default excessively stream a reference value, the first overcurrent protection signal is generated according to comparative result and the second overcurrent protection is believed Number, the first overcurrent protection signal is exported to the driving lockout circuit, exports the second overcurrent protection signal to described Processor.
  6. 6. frequency converter failure detection envelope wave circuit according to claim 5, it is characterised in that the over-current detection circuit bag Include：
    Excessively stream base modules, for generating and exporting the default excessively stream a reference value；
    Input respectively with three of the current-limiting protection circuit output ends for gathering modular converters and the excessively stream base modules The connected window device comparison circuit of output end, for respectively by the voltage signal of each collection modular converter output and institute State default excessively stream a reference value to be compared, and export comparative result；
    The Shaping Module that input is connected with the output end of the window device comparison circuit, the output end of the Shaping Module and institute State driving lockout circuit to be connected, for carrying out shaping to the comparative result, generate and export the first overcurrent protection signal To driving lockout circuit and the second overcurrent protection signal is exported to processor.
  7. 7. frequency converter failure detection envelope wave circuit according to claim 6, it is characterised in that each collection modulus of conversion Block includes：
    The first resistor that one end is connected with the first power supply of the frequency converter；
    The second resistance that one end is connected with the other end of the first resistor, the other end of the second resistance and the frequency converter Output end is connected, and gathers a wherein phase output current signal；The first resistor is identical with the resistance of the second resistance；
    The 3rd resistor that one end is connected with the tie point of the first resistor and second resistance；
    The first electric capacity that one end is connected with the other end of the 3rd resistor, the other end ground connection of first electric capacity；Described The tie point of three resistance and first electric capacity is the output end for gathering modular converter；
    The window device comparison circuit includes：Three output ends window comparator in parallel, the 7th resistance, the 8th resistance and the 4th Electric capacity；Wherein：
    Each window comparator includes：First comparator and the second comparator；The positive input of the first comparator It is connected with the inverting input of second comparator, tie point is as the first input end of the window device comparison circuit and its In one collection modular converter output end be connected, the inverting input of the first comparator is more electric as the window device Second input on road, the 3rd input of the normal phase input end of second comparator as the window device comparison circuit； The first comparator is connected with the output end of the second comparator；
    One end of 7th resistance is connected with the second source of the frequency converter, the other end and the window of the 7th resistance The output end of mouth comparator is connected；
    One end of 8th resistance is connected with the other end of the 7th resistance；
    One end of 4th electric capacity is connected with the other end of the 8th resistance；The other end ground connection of 4th electric capacity；Institute The tie point for stating the 4th electric capacity and the 8th resistance is the output end of the window device comparison circuit；
    The Shaping Module includes：
    First NOT gate of the input as the input of the Shaping Module；
    The second NOT gate that input is connected with the output end of first NOT gate, the output end of second NOT gate is the shaping The output end of module.
  8. 8. frequency converter failure detection envelope wave circuit according to claim 7, it is characterised in that the Shaping Module also wraps Include：
    The filtration module that input is connected with the output end of the Shaping Module, the output end of the filtration module and the processing Device is connected, and for being filtered to the first current-limiting protection signal or the first overcurrent protection signal, exports second current limliting Protection signal or the second overcurrent protection signal.
  9. 9. frequency converter failure detection envelope wave circuit according to claim 8, it is characterised in that the filtration module includes：
    Nineth resistance of the one end as the input of the filtration module；
    The 5th electric capacity that one end is connected with the other end of the 9th resistance, the other end ground connection of the 5th electric capacity；Described The tie point of nine resistance and the 5th electric capacity is the output end of the filtration module.
  10. 10. frequency converter failure detection envelope wave circuit according to claim 5, it is characterised in that the driving lockout circuit Including：
    The 20th resistance that one end is connected with the current-limiting protection circuit；
    The tenth electric capacity that one end is connected with the other end of the 20th resistance, the other end ground connection of the tenth electric capacity；
    The 21st resistance that one end is connected with the over-current detection circuit；
    The 11st electric capacity that one end is connected with the other end of the 21st resistance, another termination of the 11st electric capacity Ground；
    The NAND gate that input is connected with two tie points respectively, described two tie points are the 20th resistance and the tenth electricity The tie point of appearance and the tie point of the 21st resistance and the 11st electric capacity；
    The 22nd resistance that one end is connected with the second source of the frequency converter, the other end of the 22nd resistance and institute The output end for stating NAND gate is connected, and tie point is connected with the enabled pin of the pulse buffer chip.
  11. 11. frequency converter failure detection envelope wave circuit according to claim 5, it is characterised in that also include：IGBT failures are examined Slowdown monitoring circuit；The input of the IGBT failure detector circuits receives the IGBT of inverter output terminal fault feedback signal, The output end of the IGBT failure detector circuits is connected with the driving lockout circuit；It is described driving lockout circuit also with the place Reason device is connected.
  12. 12. frequency converter failure detection envelope wave circuit according to claim 11, it is characterised in that the IGBT fault detects Circuit receives the detection module of the three-phase IGBT of inverter output terminal fault feedback signal including three inputs respectively, The output end of each detection module is connected with the driving lockout circuit respectively；Each detection module includes：
    The 30th resistance that one end is connected with the 3rd power supply；
    The 31st resistance that one end is connected with the other end of the 30th resistance；30th resistance and the 31st electricity Input of the tie point of resistance as the detection module；
    The 20th electric capacity that one end is connected with the other end of the 31st resistance, another termination of the 20th electric capacity Ground；
    The NOT gate that input is connected with the tie point of the 31st resistance and the 20th electric capacity；The output end of the NOT gate is made For the output end of the detection module.
  13. 13. frequency converter failure detection envelope wave circuit according to claim 12, it is characterised in that the driving lockout circuit Including：
    The 20th resistance that one end is connected with the current-limiting protection circuit；
    The tenth electric capacity that one end is connected with the other end of the 20th resistance, the other end ground connection of the tenth electric capacity；
    The 21st resistance that one end is connected with the over-current detection circuit；
    The 11st electric capacity that one end is connected with the other end of the 21st resistance, another termination of the 11st electric capacity Ground；
    The first diode that negative electrode is connected with the tie point of the 20th resistance and the tenth electric capacity；
    The second diode that negative electrode is connected with the tie point of the 21st resistance and the 11st electric capacity；First diode And second the anode of diode be connected；
    The 3rd diode, the 4th diode and the five or two pole that negative electrode is connected with the IGBT failure detector circuits output end respectively Pipe；3rd diode, the 4th diode, the anode of the 5th diode are connected, and tie point is connected with the processor；
    The anode of the second source and the 3rd diode, the 4th diode and the 5th diode that are connected to the frequency converter connects The 22nd resistance between contact；
    The 23rd be connected between the second source and first diode and the anode tie point of the second diode Resistance；
    The NAND gate that input is connected with two tie points respectively, described two tie points are respectively the 3rd diode, The anode tie point of four diodes and the 5th diode, and the anode tie point of first diode and the second diode；
    The 24th resistance that one end is connected with the second source, the other end and the NAND gate of the 24th resistance Output end be connected, tie point is connected with the enabled pin of the pulse buffer chip；
    Or the driving lockout circuit includes：
    The 20th resistance that one end is connected with the current-limiting protection circuit；
    The tenth electric capacity that one end is connected with the other end of the 20th resistance, the other end ground connection of the tenth electric capacity；
    The 21st resistance that one end is connected with the over-current detection circuit；
    The 11st electric capacity that one end is connected with the other end of the 21st resistance, another termination of the 11st electric capacity Ground；
    First and the door that input is connected with two tie points respectively, described two tie points are the 20th resistance and the tenth The tie point of electric capacity and the tie point of the 21st resistance and the 11st electric capacity；
    Second and the door that input is connected with the output end of two detection modules respectively；
    The 3rd and the door that input is connected with the output end of detection module another described；Described second with the output end of door It is connected with the described 3rd with the output end of door, tie point is connected with the processor；
    One input and the described first NAND gate being connected with the output end of door, another input of the NAND gate and institute Second is stated with gate output terminal and the described 3rd with the tie point of gate output terminal to be connected；
    The 22nd resistance that one end is connected with the second source, the other end and the NAND gate of the 22nd resistance Output end be connected, tie point is connected with the enabled pin of the pulse buffer chip.
  14. 14. frequency converter failure detection envelope wave circuit according to claim 13, it is characterised in that the driving lockout circuit Also include：
    The 7th diode that negative electrode is connected with the DRIVE pins of the processor；
    The 8th diode that negative electrode is connected with the RS-DRIVE pins of the processor；7th diode and the described 8th 2 The anode of pole pipe is connected, and tie point is connected with the anode tie point of first diode and the second diode；
    Or the driving lockout circuit also includes：
    The 4th and the door that input is connected with the DRIVE pins and RS-DRIVE pins of the processor respectively；Described 4th with The output end of door is connected with described first with the output end of door.
  15. 15. a kind of frequency converter, it is characterised in that detect Feng Bo electricity including any described frequency converter failure of claim 1 to 14 Road.
  16. 16. a kind of system using frequency converter, it is characterised in that the frequency converter in the system using frequency converter includes right It is required that 1 to 14 any described frequency converter failure detection envelope wave circuit.
CN201410767788.9A 2014-12-12 2014-12-12 The system of frequency converter failure detection envelope wave circuit, frequency converter and application frequency converter Active CN104393573B (en)

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Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105048415A (en) * 2015-09-09 2015-11-11 广东科动电气技术有限公司 Cycle-by-cycle current limiting circuit
CN106451368A (en) * 2016-09-29 2017-02-22 珠海格力节能环保制冷技术研究中心有限公司 Parallel transistor protection circuit, protection method, and automobile inverter system
CN106353573B (en) * 2016-11-10 2023-09-22 沈阳工业大学 Overcurrent fault monitoring protection device and method for flexible direct-current power transmission inversion station
CN107482582A (en) * 2017-10-09 2017-12-15 赵东顺 A kind of guard method of motor circuit
CN107786077B (en) * 2017-12-08 2024-05-31 深圳瑞丰恒激光技术有限公司 Q-switch driving power supply controller fault detection device and method
CN113484697A (en) * 2021-05-19 2021-10-08 北京宏优科技发展有限公司 Insulator leakage analysis system and method
CN113484696A (en) * 2021-05-19 2021-10-08 北京宏优科技发展有限公司 Intelligent insulator flashover analysis system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN203708095U (en) * 2013-12-19 2014-07-09 李永红 Output current limiting circuit
CN103944141A (en) * 2014-04-02 2014-07-23 美的集团股份有限公司 Air conditioner and compressor protection circuit thereof
CN203859488U (en) * 2014-04-02 2014-10-01 美的集团股份有限公司 Air conditioner and compressor protection circuit thereof

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102175943B (en) * 2011-02-12 2013-12-11 中兴通讯股份有限公司 Load overcurrent protector state detection device and method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN203708095U (en) * 2013-12-19 2014-07-09 李永红 Output current limiting circuit
CN103944141A (en) * 2014-04-02 2014-07-23 美的集团股份有限公司 Air conditioner and compressor protection circuit thereof
CN203859488U (en) * 2014-04-02 2014-10-01 美的集团股份有限公司 Air conditioner and compressor protection circuit thereof

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
一种大功率变频器的过流保护控制方案研究;曲延昌;《电气传动》;20140831;第44卷(第8期);第76-80页 *

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