CN104378072A - 放大器电路 - Google Patents

放大器电路 Download PDF

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CN104378072A
CN104378072A CN201410363787.8A CN201410363787A CN104378072A CN 104378072 A CN104378072 A CN 104378072A CN 201410363787 A CN201410363787 A CN 201410363787A CN 104378072 A CN104378072 A CN 104378072A
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amplifier circuit
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ldmos
substrate
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CN104378072B (zh
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杰拉德·简-路易斯·布伊斯
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Samba Holdings Netherlands Ltd
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    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
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Abstract

本发明提供了一种差分放大器电路，该差分放大器电路用于基于LDMOS的放大器。差分放大器电路包含高电阻率衬底和独立的DC接地和AC接地。这种放大器电路可以不需要用于接地的通过衬底的通孔。

Description

放大器电路
技术领域
本发明涉及放大器电路领域，并且特别涉及横向扩散金属氧化物半导体(LDMOS)放大器的差分放大器电路。
背景技术
LDMOS功率放大器电路广泛用于射频(RF)应用。传统的LDMOS设备(包括LDMOS功率放大器)一般使用低电阻率衬底，该衬底具有大约或者小于10mΩ*cm的电阻率。低电阻率衬底的使用限制LDMOS性能。
使用较高电阻率衬底可以改善有源LDMOS设备的最高频率和功率性能衰减和大大改善无源LDMOS设备(例如电感和传输线)。因此，驱使在LDMOS设备中使用较高电阻率衬底。
然而，对于在LDMOS设备中使用较高电阻率衬底的已知技术需要制造通过衬底的通孔用于接地连接。这种通孔的实现是复杂的并且是昂贵的。尽管如此，由于在LDMOS设备中使用较高电阻率衬底可以获得的性能方面的改善，所以已经开始(并正在进行)大量的投资和研究工作以便优化在较高电阻率衬底中使用这种通过衬底的通孔。
发明内容
根据本发明的一个方面，提供一种差分放大器电路，该差分放大器电路用于基于LDMOS的放大器，该电路包括高电阻率衬底和独立的DC接地和AC接地。
本发明提出一种差分放大器电路使用高电阻率衬底。与使用传统的低电阻率衬底相比，使用高电阻率衬底可以改善有源LDMOS设备的最高频率和功率性能衰减和大大改善无源LDMOS设备(例如电感和传输线)。另外，不同于传统的使用高电阻率衬底的电路，本发明所提出的放大器电路可以不需要用于接地的通过衬底的通孔。因此，本发明的实施可以使能使用高电阻率硅衬底而不需要昂贵的通过硅的通孔。这种实施对未来的的LDMOS技术是有用的，特别是由于在通常使用的低电阻率硅衬底中的射频损失，目前传统的LDMOS技术在有源或者无源器件中的改进非常有限。
为了便于理解，高电阻率被认为是大约50Ω*cm或以上，优选地为100Ω*cm或以上，并且甚至更优选地1KΩ*cm或以上。相反的，低电阻率被认为是大约或小于10mΩ*cm。因此，本发明的实施例可以使用高电阻率衬底，该衬底具有的电阻率比传统的低电阻率衬底的电阻率(10mΩ*cm或者更小)大几个数量级。
通过实现使用高电阻率硅衬底而不需要用于接地的通过硅的通孔，本发明的实施例可以减少射频衬底损失同时避免复杂的和昂贵的通过衬底的通孔的制造。
本发明的实施例使用高电阻率衬底可以提供以下优点:
-改善晶体管衰减(在较宽的频率范围内，例如从1-2GHz升到3-4GHz，获得更高的Ft，恒定的功率密度和改善的效率)；和
-电感和传输线极大地改善Q。
实施例可以使用分离AC接地和DC接地的构思，其中AC接地是通过电路的差分操作提供的虚拟接地，和其中DC接地是物理电连接接地。这样，可以不需要用于接地的通过衬底的通孔。
在实施例中，可以通过两个源极连接的晶体管之间的源极到源极的连接提供虚拟接地。
高电阻率衬底可以包含硅和可以具有大于或等于50Ω*cm的电阻率。
根据本发明的一个方面，提供一种基于LDMOS的放大器，包括根据本发明的实施例的差分放大器电路。
通过示例的方式，本发明的实施例可以用于集成电路(IC)，单片微波集成电路(MMIC)，或者高功率射频放大器电路。因此实施例可以用于例如，移动通信基站或者其他的可以使用射频放大器电路的设备/系统。
附图说明
现在将将参考附图详细地描述本发明的实施例，其中：
图1示出了根据本发明实施例的用于LDMOS放大器的差分放大器电路的示意图；
图2示出了根据本发明实施例的MMIC放大器电路的平面图；
图3示出了根据本发明实施例的用于LDMOS放大器的末级差分(即推挽)放大器电路100的示意图；
图4示出了根据本发明实施例的封装的放大器电路的平面示意图，其中除去封装以示出电路和引线键合连接；
图5A示出了对于使用低电阻率衬底的多个传统的放大器电路，和对于根据本发明的实施例的使用高电阻率衬底的两个放大器电路，电感Q随着工作频率的变化；
图5B示出了对于使用低电阻率衬底的多个传统的放大器电路，和对于根据本发明的实施例的使用高电阻率衬底的两个放大器电路，串联电感随着工作频率的变化；和
图5C示出了对于使用低电阻率衬底的多个传统的放大器电路，和对于根据本发明的实施例的使用高电阻率衬底的两个放大器电路，串联电阻随着工作频率的变化。
具体实施方式
图1示出了根据本发明实施例的用于LDMOS放大器的差分(即推挽)多级放大器MMIC 10的示意图。这里，电路10是驱动电路，用于具有19dB小的信号增益的55dBm P3dB末级。
电路10与传统的LDMOS放大器的不同在于电路10包括高电阻率衬底和地连接，地连接被分成：AC接地；和DC接地。AC接地是由于电路的差分操作而导致的虚拟接地，而DC接地(它可以经历寄生电感)是使用物理接地的电连接实现(例如引线键合连接或者类微带连接)。
图1的实施例中，对于差分放大器电路，AC(例如射频)和DC接地可以被分离(例如彼此独立地提供)，因此可以使AC接地通过虚拟接地提供和DC接地通过物理的(感应的)连接得到。通过分离AC(例如射频)和DC接地，不需要用于接地的通过衬底的通孔。
图1的电路10的显著特征存在于源极连接的晶体管LDMOS 1，LDMOS 2和LDMOS 3和LDMOS 4的源极之间。更具体地，它在电路中的位置是实现DC和AC接地之间的分离的地方。
连接到LDMOS 1和LDMOS 2的源极的是第一物理的地G1。因此，每个LDMOS 1和LDMOS 2的源极是DC接地的，在本实施例中，接地是使用源极和地之间的多个引线键合连接实现的。由于与引线键合连接的相关联的电感，这种DC接地不适于AC(例如射频)接地。LDMOS 1和LDMOS 2的源极到源极连接的实现是使用中间层的金属连接LDMOS的源极到LDMOS的源极从而由于放大器电路的差分操作中间的点成为一种虚拟的AC地VG。
类似地，连接到LDMOS 3和LDMOS 4的源极的是第二物理的地G2。因此，每个LDMOS 3和LDMOS 4的源极是DC接地的，再一次，在本实施例中，使用源极和地之间的多个引线键合连接。LDMOS 3和LDMOS 4的源极到源极连接的实现也是使用中间层的金属连接LDMOS 3的源极到LDMOS 4的源极从而由于差分操作中间的点成为一种虚拟的AC地VG。
现在开始看图2，图2示出了根据本发明的实施例的MMIC放大器电路的平面图。场效应晶体管的DC接地连接是由多个引线键合连接50提供的。这种接地布置提供短的连接的电感到放大器电路。
在其他的实施例中，用于放大器电路的DC接地连接可以经由大的类微带连接提供，这种大的类微带具有低阻抗，并因此在pH范围具有小的电感。
图3是根据本发明实施例的用于LDMOS放大器的末级差分(即推挽)放大器电路100的示意图。这里，电路10是末级推挽放大器：在P3dB，P3dB 55dBm/16dB。
在放大器电路中，使用两类接地连接：RF接地，这是通过来自电路的差分操作的虚拟接地提供的；和DC接地，这是通过物理接地连接提供的。
现在开始看图4，图4示出了根据本发明实施例的封装的放大器电路的平面示意图，其中除去封装以示出电路和引线键合连接。场效应晶体管的DC接地连接是通过连接到电路的接地焊盘的多个引线键合连接150提供的。这种接地布置提供短的连接的电感到放大器电路。
图5A示出了对于使用低电阻率(10mΩ*cm)衬底(标记为“低R”)的各种传统的放大器电路，和对于使用根据本发明的实施例的高电阻率(1KΩ*cm)衬底(标记为“高R”)的两个放大器电路，电感Q随着工作频率的变化。从图5A可以看出，在所有的工作频率中，根据本发明的实施例的放大器电路比使用低电阻率衬底的传统的放大器电路具有更高的Q值。甚至，对于所给定的工作频率，根据本发明的实施例的放大器电路具有Q值近似于使用低电阻率衬底的传统的放大器电路的两倍。
图5B示出了对于使用低电阻率(10mΩ*cm)衬底(标记为“低R”)的各种传统的放大器电路，和对于使用根据本发明的实施例的高电阻率(1KΩ*cm)衬底(标记为“高R”)的两个放大器电路，串联电感随着工作频率的变化。从图5B可以看出，在所有的工作频率中，根据本发明的实施例的放大器电路比使用低电阻率衬底的传统的放大器电路具有更低的串联电感。
图5C示出了对于使用低电阻率(10mΩ*cm)衬底(标记"低R")的各种传统的放大器电路，和对于使用根据本发明的实施例的高电阻率(1KΩ*cm)衬底(标记为"高R")的两个放大器电路，串联电阻随着工作频率的变化。从图5C可以看出，在所有的工作频率中，根据本发明的实施例的放大器电路比使用低电阻率衬底的传统的放大器电路具有更低的串联电阻。
从图5A-5C可以看出，与使用低电阻率衬底的传统的放大器电路相比，使用高电阻率衬底的本发明的实施例的串联电阻和串联电感显著减少。因此，本发明的实施例使用独立的AC接地和DC接地的构思可以提供有源器件的最高频率和功率性能衰减方面的改善和大大改善无源器件(例如电感和传输线)。此外，这些实施例可以不需要用于接地的通过衬底的通孔，因此避免对昂贵的通孔制造工艺的需要。
所披露实施例的其他变化可以通过本领域技术人员在实施所提出的发明、研究附图、披露和附加的权利要求后理解和影响。在权利要求中，术语”包括”不排除其他的元件或者步骤，以及不定冠词“一种”不排除那些元件的复数。

Claims (13)

1.一种差分放大器电路，所述电路用于基于LDMOS的放大器，其特征在于，所述电路包括高电阻率衬底和独立的DC接地和AC接地。
2.根据权利要求1所述的电路，其特征在于，AC接地包括虚拟接地。
3.根据权利要求2所述的电路，其特征在于，所述电路包括第一晶体管和第二晶体管，第一晶体管的源极通过源极到源极的连接电连接到第二晶体管的源极，和其中虚拟接地是通过源极到源极的连接提供的。
4.根据权利要求3所述的电路，其特征在于，源极到源极的连接由中间层金属形成。
5.根据前述任一权利要求所述的电路，其特征在于，DC接地包括多个引线键合连接或者微带连接。
6.根据前述任一权利要求所述的电路，其特征在于，高电阻率衬底包括硅。
7.根据前述任一权利要求所述的电路，其特征在于，高电阻率衬底具有大于50Ω*cm的电阻率。
8.根据权利要求7所述的电路，其特征在于，高电阻率衬底具有大于100Ω*cm的电阻率。
9.根据权利要求7所述的电路，其特征在于，高电阻率衬底具有大于或等于1KΩ*cm的电阻率。
10.一种LDMOS放大器电路，其特征在于，包括根据前面任一权利要求所述的差分放大器电路。
11.一种封装的高功率射频(RF)放大器电路，其特征在于，包括：
根据前面任一权利要求所述的差分放大器电路。
12.一种集成电路，其特征在于，包括根据前面任一权利要求所述的差分放大器电路。
13.一种移动通信基站，其特征在于，包括根据权利要求1到11任一项所述的差分放大器电路。
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