CN104377233A - Semiconductor device terminal structure with polycrystalline stop field boards - Google Patents
Semiconductor device terminal structure with polycrystalline stop field boards Download PDFInfo
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- CN104377233A CN104377233A CN201410614865.7A CN201410614865A CN104377233A CN 104377233 A CN104377233 A CN 104377233A CN 201410614865 A CN201410614865 A CN 201410614865A CN 104377233 A CN104377233 A CN 104377233A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 93
- 239000000758 substrate Substances 0.000 claims abstract description 79
- 229910052751 metal Inorganic materials 0.000 claims description 96
- 239000002184 metal Substances 0.000 claims description 96
- 230000004888 barrier function Effects 0.000 claims description 94
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 22
- 235000012239 silicon dioxide Nutrition 0.000 claims description 11
- 239000000377 silicon dioxide Substances 0.000 claims description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 238000009792 diffusion process Methods 0.000 claims description 7
- 230000005684 electric field Effects 0.000 abstract description 41
- 230000000694 effects Effects 0.000 abstract description 13
- 238000005516 engineering process Methods 0.000 abstract description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 17
- 238000000034 method Methods 0.000 description 16
- 238000004519 manufacturing process Methods 0.000 description 15
- 229920005591 polysilicon Polymers 0.000 description 15
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 8
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 8
- 238000001312 dry etching Methods 0.000 description 6
- 238000001259 photo etching Methods 0.000 description 6
- 239000011521 glass Substances 0.000 description 4
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical compound ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910019213 POCl3 Inorganic materials 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 239000005380 borophosphosilicate glass Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
- H01L29/404—Multiple field plate structures
Abstract
The invention relates to the field of power and electron technologies, in particular to a semiconductor device terminal structure with polycrystalline stop field boards. The semiconductor device terminal structure comprises a plurality of semiconductor device terminal unit structures which are arranged side by side in the horizontal direction and provided with the polycrystalline stop field boards, each semiconductor device terminal unit structure with the polycrystalline stop field boards comprises a first electric conducting substrate, wherein a second electric conducting field limiting ring is arranged in the first main face of the first electric conducting substrate, a first insulating layer is arranged on the first main plane of the first electric conducting substrate, and the field boards are arranged on the first insulating layer and located on the two sides of the second electric conducting field limiting ring respectively. The field boards and the second electric conducting field limiting rings are connected, the polycrystalline stop field boards can compress electric fields, and polycrystalline extending field boards can extend the electric fields, so that the electric fields are distributed again, and the effect of reducing field limiting ring electric fields is achieved. Polycrystal is adopted by all unit structures of the semiconductor device terminal structure to be used as the field boards, and electric field stopping and extending effects are good.
Description
Technical field
The semiconductor device relating to electric and electronic technical field of the present invention, is specially a kind of semiconductor device terminal structure adopting polycrystalline to end field plate.
Background technology
In the manufacturing and designing of power electronic device, terminal is an indispensable part, and it can make device inside depletion region become level and smooth when device bears high-tension, thus allows device bear higher voltage.The terminal of traditional power electronic device is generally and sinks to the bottom by injecting and advancing at low-doped, prepares field limiting ring; Also have and add that field plate is to realize the level and smooth further of electric field laterally on field limiting ring.
Relative to independent field limiting ring structure; the structure of field limiting ring+field plate can better level and smooth depletion region; therefore on the Terminal Design of identical pressure-bearing; the number of the ring that the design of field limiting ring+field plate needs than the design of independent field limiting ring is few; simultaneously field plate can the terminal of protect IC not by outside contamination, therefore there is better breakdown characteristics and device stability.
In addition, in the manufacture process of power electronic device, active region determines the important electrical characteristic of device, the part although terminal is absolutely necessary, but only affect puncture voltage and the stability of device, do not contribute the conduction voltage drop of device and turn-off time, therefore terminal is on the basis meeting the pressure-bearing required by device, and the area of terminal is the smaller the better.
The more than total junction device problem of two kinds of Terminal Designs, can be summed up as:
The structure of field plate protection device terminal can exempt from pollution, therefore needs the area increasing field plate as far as possible; And the area of terminal needs little as much as possible, increases the area of active region.And the area increasing field plate refers under the terminal prerequisite of certain size, increase field plate and cover the ratio of terminal, because the ratio that field plate covers terminal is larger, the ratio that terminal comes out is less, do not expose like this be exactly be not easy contaminated.
Existing Patents has: the patent No. is CN201010246809.4, the applying date is 2010-08-06, name is called the patent of invention of " a kind of edge termination structure of high voltage power semiconductor device ", its technology contents is: the edge termination structure that the invention discloses a kind of high voltage power semiconductor device, comprise several by power semiconductor around, with substrate, there is the field limiting ring of films of opposite conductivity, at each field limiting ring, one-sided or both sides are provided with identical with field limiting ring conduction type, doping content is less than the doped region of field limiting ring, field limiting ring is covered with field plate, silicon dioxide layer interval is used between field limiting ring and field plate.The material of field plate can be selected from copper, aluminium, polysilicon or oxygen-doped polysilicon etc.
For another example the patent No. is CN201010246816.4, the applying date is 2010-08-06, name is called the patent of invention of " a kind of edge termination structure of high voltage power semiconductor device ", its technology contents is: the edge termination structure that the invention discloses a kind of high voltage power semiconductor device, comprise several by power semiconductor around, with substrate, there is the field limiting ring of films of opposite conductivity, be provided with identical with field limiting ring conduction type around field limiting ring, doping content is less than the doped region of field limiting ring, field limiting ring wraps up by this doped region, field limiting ring is covered with field plate, silicon dioxide layer interval is used between field limiting ring and field plate.The material of field plate can be selected from copper, aluminium, polysilicon or oxygen-doped polysilicon etc.
Wherein CN201010246809.4 with CN201010246816.4 is identical with the object that this patent is protected; it is all a kind of semiconductor device itself " terminal structure "; but at the design of terminal structure and terminal structure functionally; both are different; these two patents above-mentioned are all reduce the electric field at field limiting ring place by the design of different field limiting rings and puncture voltage can be increased; be disjunct between their field plate and field limiting ring, field plate does not play the effect reducing electric field.
Summary of the invention
In order to overcome the problems referred to above that existing semiconductor chip terminal unit architecture exists, a kind of semiconductor device terminal structure and manufacture method thereof adopting polycrystalline cut-off field plate of special proposition now, this design has larger field plate area coverage, can increase the stability of device; And the design that have employed by field plate, can reduce the area of terminal further.
Concrete scheme of the present invention is as follows:
A kind of semiconductor device terminal structure adopting polycrystalline to end field plate, it is characterized in that: the semiconductor device terminal unit architecture comprising the employing polycrystalline cut-off field plate that multiple transverse direction is arranged side by side, the semiconductor device terminal unit architecture of described employing polycrystalline cut-off field plate comprises the first conductivity type substrate, the second conduction type field limiting ring is provided with in first interarea of described first conductivity type substrate, on the primary principal plane of described first conductivity type substrate, be provided with the first insulating barrier; On described first insulating barrier and the both sides being positioned at the second conduction type field limiting ring are respectively provided with one block of field plate; Described two blocks of field plates are provided with the second insulating barrier, and described second insulating barrier is provided with Metal field plate; The bottom of described Metal field plate contacts with the second conduction type field limiting ring, and described Metal field plate covers region and the both sides thereof of the second conduction type field limiting ring;
Described two blocks of field plates to be positioned at above the first insulating barrier and to cover the both sides of the second conduction type field limiting ring, described field plate comprises polycrystalline cut-off field plate and polycrystalline extends field plate, one end and the polycrystalline of described Metal field plate end field plate contact and are connected, and its other end and polycrystalline extend field plate contact and be connected.
Further, the quantity of the semiconductor device terminal unit architecture of described employing polycrystalline cut-off field plate is 4-15.
Further, the semiconductor device terminal unit architecture of described multiple employing polycrystalline cut-off field plate is transversely arranged along its first interarea.
The two ends of described Metal field plate all bend downwards along lateral direction.
It is polysilicon that described polycrystalline cut-off field plate and polycrystalline extend field plate.
Further, described second insulating barrier is positioned at above field plate, covers whole field plate.
Further, described Metal field plate is positioned at above the second insulating barrier, and cover the region of whole second conduction type field circulation, described Metal field plate is connected with the second conduction type field limiting ring.
Further, described Metal field plate covers region that is whole or part field plate, is provided with electrode contact hole in the region covering field plate.One end of described Metal field plate is ended field plate contact by the electrode contact hole on the second insulating barrier and polycrystalline and is connected, and its other end extends field plate contact by the electrode contact hole on the second insulating barrier with polycrystalline and is connected.
Further, the second interarea place of described first conductivity type substrate, is disposed with the first conduction type field cutoff layer, the second conduction type collector electrode and back metal; Within described first conduction type field cutoff layer and the second conduction type collector electrode are positioned at the second interarea lower surface, and back metal is positioned at outside the second interarea lower surface.
Further, the first conduction type is N-type, and the second conduction type is P type, and described first conductivity type substrate is silicon substrate, and the first interarea of the first conductivity type substrate is its front, and the second interarea of the first conductivity type substrate is its back side.
Further, the diffusion depth of described second conduction type field limiting ring is 1um-10um; Described first insulating barrier is silicon dioxide layer, and thickness is 0.5um ~ 5um; Polycrystalline cut-off field plate width in described field plate is 0 um ~ 30um; It is 0 um ~ 50um that polycrystalline in field plate extends field plate width.
The invention has the advantages that:
1, the terminal unit architecture of the application is novel in design, similar structures was not there is in prior art, and its manufacturing process is simple, the application focuses on the architecture advances of field plate, the field plate of the application's design is connected with the second conduction type field limiting ring, and polycrystalline cut-off field plate can compress electric field, and polycrystalline extends field plate can extend electric field, thus make electric field from new distributing, achieve the effect reducing field limiting ring electric field equally.All unit of this terminal structure all adopt polycrystalline to serve as field plate, and the cut-off and extension of electric field all have good effect.
2, the polycrystalline that introduces of the application ends field plate, arrange simultaneously polycrystalline cut-off field plate and polycrystalline extend field plate for the design of traditional field limiting ring+field plate, under limited area, increase the area that device field plate covers, and can ensure that the width of terminal is in very among a small circle.
3, the field plate of the application is large due to the ratio covering terminal, can play the not contaminated effect of protection terminal.
4, compared to traditional field limiting ring+field plate termination structure, the application adds polycrystalline cut-off field plate, on the basis keeping total area constant, makes the area coverage of field plate larger, decreases the pollution of outer bound pair terminal, the stability of device is got a promotion.
5, the application is compared to traditional field limiting ring+field plate termination structure, present invention adds polycrystalline cut-off field plate, the area of whole terminal is reduced, so just relatively expands the active area of device, the electrology characteristic of device is improved further.
Accompanying drawing explanation
Fig. 1 is the application's overall structure schematic diagram.
Fig. 2 is the application's terminal unit architecture schematic diagram.
The corresponding technique A of Fig. 3.
Fig. 4 corresponding technique B, C.
Fig. 5 corresponding technique D, E.
The corresponding technique F of Fig. 6.
Fig. 7,8 corresponding technique G.
Fig. 9,10 corresponding technique I.
110: the first conductivity type substrate in accompanying drawing; 120: the second conduction type field limiting rings; 130: the first insulating barriers; 141: polycrystalline cut-off field plate; 142: polycrystalline extends field plate; 150: the second insulating barriers; 160: Metal field plate.
Embodiment
Embodiment 1
A kind of semiconductor device terminal structure adopting polycrystalline to end field plate comprises the semiconductor device terminal unit architecture of the employing polycrystalline cut-off field plate 141 that multiple transverse direction is arranged side by side, the semiconductor device terminal unit architecture of described employing polycrystalline cut-off field plate 141 comprises the first conductivity type substrate 110, the second conduction type field limiting ring 120 is provided with in first interarea of described first conductivity type substrate 110, on the primary principal plane of described first conductivity type substrate 110, be provided with the first insulating barrier 130; On described first insulating barrier 130 and the both sides being positioned at the second conduction type field limiting ring 120 are respectively provided with one block of field plate; Described two blocks of field plates are provided with the second insulating barrier 150, and described second insulating barrier 150 is provided with Metal field plate 160; The bottom of described Metal field plate 160 contacts with the second conduction type field limiting ring 120, and described Metal field plate 160 covers region and the both sides thereof of the second conduction type field limiting ring 120;
Described two blocks of field plates to be positioned at above the first insulating barrier 130 and to cover the both sides of the second conduction type field limiting ring 120, described field plate comprises polycrystalline cut-off field plate 141 and polycrystalline extends field plate 142, one end and the polycrystalline of described Metal field plate 160 end field plate 141 and contact connected, and its other end and polycrystalline extend field plate 142 and contact connected.
Described two blocks of field plates to be positioned at above the first insulating barrier 130 and to cover the both sides of the second conduction type field limiting ring 120, and the field plate wherein near side, active region is polycrystalline cut-off field plate 141, and the field plate near device edge side is that polycrystalline extends field plate 142.Here device refers to power semiconductor, and active region refers to the active region on semiconductor device, and semiconductor device outermost is edge, is terminal inward, then is active region inside.
The terminal unit architecture of the application is novel in design, similar structures was not there is in prior art, and its manufacturing process is simple, the application focuses on the architecture advances of field plate, the field plate of the application's design is connected with the second conduction type field limiting ring 120, and polycrystalline cut-off field plate 141 can compress electric field, and polycrystalline extends field plate 142 can extend electric field, thus make electric field from new distributing, achieve the effect reducing field limiting ring electric field equally.
Embodiment 2
A kind of semiconductor device terminal structure adopting polycrystalline to end field plate comprises the semiconductor device terminal unit architecture of the employing polycrystalline cut-off field plate 141 that multiple transverse direction is arranged side by side, the semiconductor device terminal unit architecture of described employing polycrystalline cut-off field plate 141 comprises the first conductivity type substrate 110, the second conduction type field limiting ring 120 is provided with in first interarea of described first conductivity type substrate 110, on the primary principal plane of described first conductivity type substrate 110, be provided with the first insulating barrier 130; On described first insulating barrier 130 and the both sides being positioned at the second conduction type field limiting ring 120 are respectively provided with one block of field plate; Described two blocks of field plates are provided with the second insulating barrier 150, and described second insulating barrier 150 is provided with Metal field plate 160; The bottom of described Metal field plate 160 contacts with the second conduction type field limiting ring 120, and described Metal field plate 160 covers region and the both sides thereof of the second conduction type field limiting ring 120;
Described two blocks of field plates to be positioned at above the first insulating barrier 130 and to cover the both sides of the second conduction type field limiting ring 120, described field plate comprises polycrystalline cut-off field plate 141 and polycrystalline extends field plate 142, one end and the polycrystalline of described Metal field plate 160 end field plate 141 and contact connected, and its other end and polycrystalline extend field plate 142 and contact connected.
The quantity of the semiconductor device terminal unit architecture of described employing polycrystalline cut-off field plate 141 is 4-15.
The semiconductor device terminal unit architecture of described multiple employing polycrystalline cut-off field plate 141 is transversely arranged along its first interarea.
The two ends of described Metal field plate 160 all bend downwards along lateral direction.It is polysilicon that polycrystalline cut-off field plate 141 and polycrystalline extend field plate 142.
Here device refers to power semiconductor, and active region refers to the active region on semiconductor device, and semiconductor device outermost is edge, is terminal inward, then is active region inside.
Second insulating barrier 150 is positioned at above field plate, covers whole field plate.
Metal field plate 160 is positioned at above the second insulating barrier 150, and cover the region of whole second conduction type field circulation, described Metal field plate 160 is connected with the second conduction type field limiting ring 120.
Metal field plate 160 covers region that is whole or part field plate, is provided with electrode contact hole in the region covering field plate.One end of described Metal field plate 160 is ended field plate 141 by the electrode contact hole on the second insulating barrier 150 and polycrystalline and is contacted connected, and its other end extends field plate 142 by the electrode contact hole on the second insulating barrier 150 and polycrystalline and contacts connected.
Second interarea place of described first conductivity type substrate 110, is disposed with the first conduction type field cutoff layer, the second conduction type collector electrode and back metal; Within described first conduction type field cutoff layer and the second conduction type collector electrode are positioned at the second interarea lower surface, and back metal is positioned at outside the second interarea lower surface.
First conduction type is N-type, and the second conduction type is P type, and described first conductivity type substrate 110 is silicon substrate, and the first interarea of the first conductivity type substrate 110 is its front, and the second interarea of the first conductivity type substrate 110 is its back side.
The terminal unit architecture of the application is novel in design, similar structures was not there is in prior art, and its manufacturing process is simple, the application focuses on the architecture advances of field plate, the field plate of the application's design is connected with the second conduction type field limiting ring 120, and polycrystalline cut-off field plate 141 can compress electric field, and polycrystalline extends field plate 142 can extend electric field, thus make electric field from new distributing, achieve the effect reducing field limiting ring electric field equally.
Embodiment 3
A kind of semiconductor device terminal structure adopting polycrystalline to end field plate comprises the semiconductor device terminal unit architecture of the employing polycrystalline cut-off field plate 141 that multiple transverse direction is arranged side by side, the semiconductor device terminal unit architecture of described employing polycrystalline cut-off field plate 141 comprises the first conductivity type substrate 110, the second conduction type field limiting ring 120 is provided with in first interarea of described first conductivity type substrate 110, on the primary principal plane of described first conductivity type substrate 110, be provided with the first insulating barrier 130; On described first insulating barrier 130 and the both sides being positioned at the second conduction type field limiting ring 120 are respectively provided with one block of field plate; Described two blocks of field plates are provided with the second insulating barrier 150, and described second insulating barrier 150 is provided with Metal field plate 160; The bottom of described Metal field plate 160 contacts with the second conduction type field limiting ring 120, and described Metal field plate 160 covers region and the both sides thereof of the second conduction type field limiting ring 120;
Described two blocks of field plates to be positioned at above the first insulating barrier 130 and to cover the both sides of the second conduction type field limiting ring 120, described field plate comprises polycrystalline cut-off field plate 141 and polycrystalline extends field plate 142, one end and the polycrystalline of described Metal field plate 160 end field plate 141 and contact connected, and its other end and polycrystalline extend field plate 142 and contact connected.The two ends of described Metal field plate 160 all bend downwards along lateral direction.It is polysilicon that polycrystalline cut-off field plate 141 and polycrystalline extend field plate 142.The quantity of the semiconductor device terminal unit architecture of described employing polycrystalline cut-off field plate 141 is 4.
The semiconductor device terminal unit architecture of described multiple employing polycrystalline cut-off field plate 141 is transversely arranged along its first interarea.
Here device refers to power semiconductor, and active region refers to the active region on semiconductor device, and semiconductor device outermost is edge, is terminal inward, then is active region inside.
Second insulating barrier 150 is positioned at above field plate, covers whole field plate.
Metal field plate 160 is positioned at above the second insulating barrier 150, and cover the region of whole second conduction type field circulation, described Metal field plate 160 is connected with the second conduction type field limiting ring 120.
Metal field plate 160 covers region that is whole or part field plate, is provided with electrode contact hole in the region covering field plate.One end of described Metal field plate 160 is ended field plate 141 by the electrode contact hole on the second insulating barrier 150 and polycrystalline and is contacted connected, and its other end extends field plate 142 by the electrode contact hole on the second insulating barrier 150 and polycrystalline and contacts connected.
Second interarea place of described first conductivity type substrate 110, is disposed with the first conduction type field cutoff layer, the second conduction type collector electrode and back metal; Within described first conduction type field cutoff layer and the second conduction type collector electrode are positioned at the second interarea lower surface, and back metal is positioned at outside the second interarea lower surface.
First conduction type is N-type, and the second conduction type is P type, and described first conductivity type substrate 110 is silicon substrate, and the first interarea of the first conductivity type substrate 110 is its front, and the second interarea of the first conductivity type substrate 110 is its back side.
The terminal unit architecture of the application is novel in design, similar structures was not there is in prior art, and its manufacturing process is simple, the application focuses on the architecture advances of field plate, the field plate of the application's design is connected with the second conduction type field limiting ring 120, and polycrystalline cut-off field plate 141 can compress electric field, and polycrystalline extends field plate 142 can extend electric field, thus make electric field from new distributing, achieve the effect reducing field limiting ring electric field equally.
The diffusion depth of the second conduction type field limiting ring 120 is 1um-10um; Described first insulating barrier 130 is silicon dioxide layer, and thickness is 0.5um ~ 5um; Polycrystalline cut-off field plate 141 width in described field plate is 0 um ~ 30um; It is 0 um ~ 50um that polycrystalline in field plate extends field plate 142 width.
Embodiment 4
A kind of semiconductor device terminal structure adopting polycrystalline to end field plate comprises the semiconductor device terminal unit architecture of the employing polycrystalline cut-off field plate 141 that multiple transverse direction is arranged side by side, the semiconductor device terminal unit architecture of described employing polycrystalline cut-off field plate 141 comprises the first conductivity type substrate 110, the second conduction type field limiting ring 120 is provided with in first interarea of described first conductivity type substrate 110, on the primary principal plane of described first conductivity type substrate 110, be provided with the first insulating barrier 130; On described first insulating barrier 130 and the both sides being positioned at the second conduction type field limiting ring 120 are respectively provided with one block of field plate; Described two blocks of field plates are provided with the second insulating barrier 150, and described second insulating barrier 150 is provided with Metal field plate 160; The bottom of described Metal field plate 160 contacts with the second conduction type field limiting ring 120, and described Metal field plate 160 covers region and the both sides thereof of the second conduction type field limiting ring 120;
Described two blocks of field plates to be positioned at above the first insulating barrier 130 and to cover the both sides of the second conduction type field limiting ring 120, described field plate comprises polycrystalline cut-off field plate 141 and polycrystalline extends field plate 142, one end and the polycrystalline of described Metal field plate 160 end field plate 141 and contact connected, and its other end and polycrystalline extend field plate 142 and contact connected.The two ends of described Metal field plate 160 all bend downwards along lateral direction.It is polysilicon that polycrystalline cut-off field plate 141 and polycrystalline extend field plate 142.The quantity of the semiconductor device terminal unit architecture of described employing polycrystalline cut-off field plate 141 is 15.
The semiconductor device terminal unit architecture of described multiple employing polycrystalline cut-off field plate 141 is transversely arranged along its first interarea.
Here device refers to power semiconductor, and active region refers to the active region on semiconductor device, and semiconductor device outermost is edge, is terminal inward, then is active region inside.
Second insulating barrier 150 is positioned at above field plate, covers whole field plate.
Metal field plate 160 is positioned at above the second insulating barrier 150, and cover the region of whole second conduction type field circulation, described Metal field plate 160 is connected with the second conduction type field limiting ring 120.
Metal field plate 160 covers region that is whole or part field plate, is provided with electrode contact hole in the region covering field plate.One end of described Metal field plate 160 is ended field plate 141 by the electrode contact hole on the second insulating barrier 150 and polycrystalline and is contacted connected, and its other end extends field plate 142 by the electrode contact hole on the second insulating barrier 150 and polycrystalline and contacts connected.
Second interarea place of described first conductivity type substrate 110, is disposed with the first conduction type field cutoff layer, the second conduction type collector electrode and back metal; Within described first conduction type field cutoff layer and the second conduction type collector electrode are positioned at the second interarea lower surface, and back metal is positioned at outside the second interarea lower surface.
First conduction type is N-type, and the second conduction type is P type, and described first conductivity type substrate 110 is silicon substrate, and the first interarea of the first conductivity type substrate 110 is its front, and the second interarea of the first conductivity type substrate 110 is its back side.
The terminal unit architecture of the application is novel in design, similar structures was not there is in prior art, and its manufacturing process is simple, the application focuses on the architecture advances of field plate, the field plate of the application's design is connected with the second conduction type field limiting ring 120, and polycrystalline cut-off field plate 141 can compress electric field, and polycrystalline extends field plate 142 can extend electric field, thus make electric field from new distributing, achieve the effect reducing field limiting ring electric field equally.
The diffusion depth of the second conduction type field limiting ring 120 is 10um; Described first insulating barrier 130 is silicon dioxide layer, and thickness is 0.5um; Polycrystalline cut-off field plate 141 width in described field plate is 30um; It is 50um that polycrystalline in field plate extends field plate 142 width.
Embodiment 5
A kind of semiconductor device terminal structure adopting polycrystalline to end field plate comprises the semiconductor device terminal unit architecture of the employing polycrystalline cut-off field plate 141 that multiple transverse direction is arranged side by side, the semiconductor device terminal unit architecture of described employing polycrystalline cut-off field plate 141 comprises the first conductivity type substrate 110, the second conduction type field limiting ring 120 is provided with in first interarea of described first conductivity type substrate 110, on the primary principal plane of described first conductivity type substrate 110, be provided with the first insulating barrier 130; On described first insulating barrier 130 and the both sides being positioned at the second conduction type field limiting ring 120 are respectively provided with one block of field plate; Described two blocks of field plates are provided with the second insulating barrier 150, and described second insulating barrier 150 is provided with Metal field plate 160; The bottom of described Metal field plate 160 contacts with the second conduction type field limiting ring 120, and described Metal field plate 160 covers region and the both sides thereof of the second conduction type field limiting ring 120;
Described two blocks of field plates to be positioned at above the first insulating barrier 130 and to cover the both sides of the second conduction type field limiting ring 120, described field plate comprises polycrystalline cut-off field plate 141 and polycrystalline extends field plate 142, one end and the polycrystalline of described Metal field plate 160 end field plate 141 and contact connected, and its other end and polycrystalline extend field plate 142 and contact connected.The two ends of described Metal field plate 160 all bend downwards along lateral direction.It is polysilicon that polycrystalline cut-off field plate 141 and polycrystalline extend field plate 142.The quantity of the semiconductor device terminal unit architecture of described employing polycrystalline cut-off field plate 141 is 8.
The semiconductor device terminal unit architecture of described multiple employing polycrystalline cut-off field plate 141 is transversely arranged along its first interarea.
Here device refers to power semiconductor, and active region refers to the active region on semiconductor device, and semiconductor device outermost is edge, is terminal inward, then is active region inside.
Second insulating barrier 150 is positioned at above field plate, covers whole field plate.
Metal field plate 160 is positioned at above the second insulating barrier 150, and cover the region of whole second conduction type field circulation, described Metal field plate 160 is connected with the second conduction type field limiting ring 120.
Metal field plate 160 covers region that is whole or part field plate, is provided with electrode contact hole in the region covering field plate.One end of described Metal field plate 160 is ended field plate 141 by the electrode contact hole on the second insulating barrier 150 and polycrystalline and is contacted connected, and its other end extends field plate 142 by the electrode contact hole on the second insulating barrier 150 and polycrystalline and contacts connected.
Second interarea place of described first conductivity type substrate 110, is disposed with the first conduction type field cutoff layer, the second conduction type collector electrode and back metal; Within described first conduction type field cutoff layer and the second conduction type collector electrode are positioned at the second interarea lower surface, and back metal is positioned at outside the second interarea lower surface.
First conduction type is N-type, and the second conduction type is P type, and described first conductivity type substrate 110 is silicon substrate, and the first interarea of the first conductivity type substrate 110 is its front, and the second interarea of the first conductivity type substrate 110 is its back side.
The terminal unit architecture of the application is novel in design, similar structures was not there is in prior art, and its manufacturing process is simple, the application focuses on the architecture advances of field plate, the field plate of the application's design is connected with the second conduction type field limiting ring 120, and polycrystalline cut-off field plate 141 can compress electric field, and polycrystalline extends field plate 142 can extend electric field, thus make electric field from new distributing, achieve the effect reducing field limiting ring electric field equally.
The diffusion depth of the second conduction type field limiting ring 120 is 1um; Described first insulating barrier 130 is silicon dioxide layer, and thickness is 5um; Polycrystalline cut-off field plate 141 width in described field plate is 10um; It is 20um that polycrystalline in field plate extends field plate 142 width.
Embodiment 6
A kind of semiconductor device terminal structure adopting polycrystalline to end field plate comprises the semiconductor device terminal unit architecture of the employing polycrystalline cut-off field plate 141 that multiple transverse direction is arranged side by side, the semiconductor device terminal unit architecture of described employing polycrystalline cut-off field plate 141 comprises the first conductivity type substrate 110, the second conduction type field limiting ring 120 is provided with in first interarea of described first conductivity type substrate 110, on the primary principal plane of described first conductivity type substrate 110, be provided with the first insulating barrier 130; On described first insulating barrier 130 and the both sides being positioned at the second conduction type field limiting ring 120 are respectively provided with one block of field plate; Described two blocks of field plates are provided with the second insulating barrier 150, and described second insulating barrier 150 is provided with Metal field plate 160; The bottom of described Metal field plate 160 contacts with the second conduction type field limiting ring 120, and described Metal field plate 160 covers region and the both sides thereof of the second conduction type field limiting ring 120;
Described two blocks of field plates to be positioned at above the first insulating barrier 130 and to cover the both sides of the second conduction type field limiting ring 120, described field plate comprises polycrystalline cut-off field plate 141 and polycrystalline extends field plate 142, one end and the polycrystalline of described Metal field plate 160 end field plate 141 and contact connected, and its other end and polycrystalline extend field plate 142 and contact connected.The two ends of described Metal field plate 160 all bend downwards along lateral direction.It is polysilicon that polycrystalline cut-off field plate 141 and polycrystalline extend field plate 142.The quantity of the semiconductor device terminal unit architecture of described employing polycrystalline cut-off field plate 141 is 4-15.
The semiconductor device terminal unit architecture of described multiple employing polycrystalline cut-off field plate 141 is transversely arranged along its first interarea.
Here device refers to power semiconductor, and active region refers to the active region on semiconductor device, and semiconductor device outermost is edge, is terminal inward, then is active region inside.
Second insulating barrier 150 is positioned at above field plate, covers whole field plate.
Metal field plate 160 is positioned at above the second insulating barrier 150, and cover the region of whole second conduction type field circulation, described Metal field plate 160 is connected with the second conduction type field limiting ring 120.
Metal field plate 160 covers region that is whole or part field plate, is provided with electrode contact hole in the region covering field plate.One end of described Metal field plate 160 is ended field plate 141 by the electrode contact hole on the second insulating barrier 150 and polycrystalline and is contacted connected, and its other end extends field plate 142 by the electrode contact hole on the second insulating barrier 150 and polycrystalline and contacts connected.
Second interarea place of described first conductivity type substrate 110, is disposed with the first conduction type field cutoff layer, the second conduction type collector electrode and back metal; Within described first conduction type field cutoff layer and the second conduction type collector electrode are positioned at the second interarea lower surface, and back metal is positioned at outside the second interarea lower surface.
First conduction type is N-type, and the second conduction type is P type, and described first conductivity type substrate 110 is silicon substrate, and the first interarea of the first conductivity type substrate 110 is its front, and the second interarea of the first conductivity type substrate 110 is its back side.
The terminal unit architecture of the application is novel in design, similar structures was not there is in prior art, and its manufacturing process is simple, the application focuses on the architecture advances of field plate, the field plate of the application's design is connected with the second conduction type field limiting ring 120, and polycrystalline cut-off field plate 141 can compress electric field, and polycrystalline extends field plate 142 can extend electric field, thus make electric field from new distributing, achieve the effect reducing field limiting ring electric field equally.
The diffusion depth of the second conduction type field limiting ring 120 is 4um; Described first insulating barrier 130 is silicon dioxide layer, and thickness is 3.1um; Polycrystalline cut-off field plate 141 width in described field plate is 20um; It is 35um that polycrystalline in field plate extends field plate 142 width.
Embodiment 7
Adopt polycrystalline to end a manufacture method for the semiconductor device terminal structure of field plate, concrete manufacturing process is:
A., on the first interarea of the first conductivity type substrate 110, the first insulating barrier 130 is grown by the method for thermal oxidation, LPCVD or PECVD;
B. by photoetching, dry etching, the first insulating barrier 130 is etched, formed and inject window region;
C. in window region, inject the second conductive type impurity, carry out annealing, pushing away trap process, form the second conduction type field limiting ring 120;
D. on gate insulator by the method for LPCVD or PECVD, deposition of polysilicon layer;
E. POCl3 is used to adulterate to polysilicon layer;
F. by photoetching, dry etching, polycrystalline silicon gate layer is etched, form window region and polycrystalline cut-off field plate 141 and polycrystalline and extend field plate 142;
G. deposit the second insulating barrier 150 by LPCVD or PECVD, by dry etching, form contact hole;
I. on first interarea and the second interarea of the first conductivity type substrate 110, make metal level by evaporating or sputtering, and form Metal field plate 160 by photoetching, wet etching.
Described second conduction type field limiting ring 120 doping content is higher than the doping content of the first conductivity type substrate 110; Described second insulating barrier 150 is by the TEOS silicon dioxide of LPCVD or PECVD deposit, phosphorosilicate glass PSG, boron-phosphorosilicate glass BPSG or silicon nitride SiNx, and their combination in any.
Embodiment 8
A kind of semiconductor device terminal structure adopting polycrystalline to end field plate comprises the semiconductor device terminal unit architecture of the employing polycrystalline cut-off field plate 141 that multiple transverse direction is arranged side by side, the semiconductor device terminal unit architecture of described employing polycrystalline cut-off field plate 141 comprises the first conductivity type substrate 110, the second conduction type field limiting ring 120 is provided with in first interarea of described first conductivity type substrate 110, on the primary principal plane of described first conductivity type substrate 110, be provided with the first insulating barrier 130; On described first insulating barrier 130 and the both sides being positioned at the second conduction type field limiting ring 120 are respectively provided with one block of field plate; Described two blocks of field plates are provided with the second insulating barrier 150, and described second insulating barrier 150 is provided with Metal field plate 160; The bottom of described Metal field plate 160 contacts with the second conduction type field limiting ring 120, and described Metal field plate 160 covers region and the both sides thereof of the second conduction type field limiting ring 120;
Described two blocks of field plates to be positioned at above the first insulating barrier 130 and to cover the both sides of the second conduction type field limiting ring 120, described field plate comprises polycrystalline cut-off field plate 141 and polycrystalline extends field plate 142, one end and the polycrystalline of described Metal field plate 160 end field plate 141 and contact connected, and its other end and polycrystalline extend field plate 142 and contact connected.The two ends of described Metal field plate 160 all bend downwards along lateral direction.It is polysilicon that polycrystalline cut-off field plate 141 and polycrystalline extend field plate 142.The quantity of the semiconductor device terminal unit architecture of described employing polycrystalline cut-off field plate 141 is 4-15.
The semiconductor device terminal unit architecture of described multiple employing polycrystalline cut-off field plate 141 is transversely arranged along its first interarea.
Here device refers to power semiconductor, and active region refers to the active region on semiconductor device, and semiconductor device outermost is edge, is terminal inward, then is active region inside.
Second insulating barrier 150 is positioned at above field plate, covers whole field plate.
Metal field plate 160 is positioned at above the second insulating barrier 150, and cover the region of whole second conduction type field circulation, described Metal field plate 160 is connected with the second conduction type field limiting ring 120.
Metal field plate 160 covers region that is whole or part field plate, is provided with electrode contact hole in the region covering field plate.One end of described Metal field plate 160 is ended field plate 141 by the electrode contact hole on the second insulating barrier 150 and polycrystalline and is contacted connected, and its other end extends field plate 142 by the electrode contact hole on the second insulating barrier 150 and polycrystalline and contacts connected.
Second interarea place of described first conductivity type substrate 110, is disposed with the first conduction type field cutoff layer, the second conduction type collector electrode and back metal; Within described first conduction type field cutoff layer and the second conduction type collector electrode are positioned at the second interarea lower surface, and back metal is positioned at outside the second interarea lower surface.
First conduction type is N-type, and the second conduction type is P type, and described first conductivity type substrate 110 is silicon substrate, and the first interarea of the first conductivity type substrate 110 is its front, and the second interarea of the first conductivity type substrate 110 is its back side.
The terminal unit architecture of the application is novel in design, similar structures was not there is in prior art, and its manufacturing process is simple, the application focuses on the architecture advances of field plate, the field plate of the application's design is connected with the second conduction type field limiting ring 120, and polycrystalline cut-off field plate 141 can compress electric field, and polycrystalline extends field plate 142 can extend electric field, thus make electric field from new distributing, achieve the effect reducing field limiting ring electric field equally.
The diffusion depth of the second conduction type field limiting ring 120 is 1um-10um; Described first insulating barrier 130 is silicon dioxide layer, and thickness is 0.5um ~ 5um; Polycrystalline cut-off field plate 141 width in described field plate is 0 um ~ 30um; It is 0 um ~ 50um that polycrystalline in field plate extends field plate 142 width.
Adopt polycrystalline to end a manufacture method for the semiconductor device terminal structure of field plate, concrete manufacturing process is:
A., on the first interarea of the first conductivity type substrate 110, the first insulating barrier 130 is grown by the method for thermal oxidation, LPCVD or PECVD;
B. by photoetching, dry etching, the first insulating barrier 130 is etched, formed and inject window region;
C. in window region, inject the second conductive type impurity, carry out annealing, pushing away trap process, form the second conduction type field limiting ring 120;
D. on gate insulator by the method for LPCVD or PECVD, deposition of polysilicon layer;
E. POCl3 is used to adulterate to polysilicon layer;
F. by photoetching, dry etching, polycrystalline silicon gate layer is etched, form window region and polycrystalline cut-off field plate 141 and polycrystalline and extend field plate 142;
G. deposit the second insulating barrier 150 by LPCVD or PECVD, by dry etching, form contact hole;
I. on first interarea and the second interarea of the first conductivity type substrate 110, make metal level by evaporating or sputtering, and form Metal field plate 160 by photoetching, wet etching.
Further, described second conduction type field limiting ring 120 doping content is higher than the doping content of the first conductivity type substrate 110; Described second insulating barrier 150 is by the TEOS silicon dioxide of LPCVD or PECVD deposit, phosphorosilicate glass PSG, boron-phosphorosilicate glass BPSG or silicon nitride SiNx, and their combination in any.
Claims (10)
1. the semiconductor device terminal structure adopting polycrystalline to end field plate, it is characterized in that: the semiconductor device terminal unit architecture comprising employing polycrystalline cut-off field plate (141) that multiple transverse direction is arranged side by side, the semiconductor device terminal unit architecture of described employing polycrystalline cut-off field plate (141) comprises the first conductivity type substrate (110), the second conduction type field limiting ring (120) is provided with in first interarea of described first conductivity type substrate (110), on the primary principal plane of described first conductivity type substrate (110), be provided with the first insulating barrier (130); Described first insulating barrier (130) is upper and the both sides being positioned at the second conduction type field limiting ring (120) are respectively provided with one block of field plate; Described two blocks of field plates are provided with the second insulating barrier (150), and described second insulating barrier (150) is provided with Metal field plate (160); The bottom of described Metal field plate (160) contacts with the second conduction type field limiting ring (120), and described Metal field plate (160) covers region and the both sides thereof of the second conduction type field limiting ring (120);
Described two blocks of field plates to be positioned at above the first insulating barrier (130) and to cover the both sides of the second conduction type field limiting ring (120), field plate wherein near side, active region is polycrystalline cut-off field plate (141), field plate near device edge side is that polycrystalline extends field plate (142), one end and the polycrystalline of described Metal field plate (160) end field plate (141) and contact connected, and its other end and polycrystalline extend field plate (142) and contact connected.
2. a kind of semiconductor device terminal structure adopting polycrystalline to end field plate according to claim 1, is characterized in that: the quantity of the semiconductor device terminal unit architecture of described employing polycrystalline cut-off field plate (141) is 4-15.
3. a kind of semiconductor device terminal structure adopting polycrystalline to end field plate according to claim 2, is characterized in that: the semiconductor device terminal unit architecture of described multiple employing polycrystalline cut-off field plate (141) is transversely arranged along its first interarea.
4. a kind of semiconductor device terminal structure adopting polycrystalline to end field plate according to claim 1-3 any one, is characterized in that: described second insulating barrier (150) is positioned at above field plate, covers whole field plate.
5. a kind of semiconductor device terminal structure adopting polycrystalline to end field plate according to claim 4, it is characterized in that: described Metal field plate (160) is positioned at above the second insulating barrier (150), cover the region of whole second conduction type field circulation, described Metal field plate (160) is connected with the second conduction type field limiting ring (120).
6. a kind of semiconductor device terminal structure adopting polycrystalline to end field plate according to claim 5, is characterized in that: described Metal field plate (160) covers region that is whole or part field plate, is provided with electrode contact hole in the region covering field plate.
7. a kind of semiconductor device terminal structure adopting polycrystalline to end field plate according to claim 6, is characterized in that: described Metal field plate (160) is connected by the electrode contact hole on the second insulating barrier (150) with field plate.
8. a kind of semiconductor device terminal structure adopting polycrystalline to end field plate according to claim 5-7 any one is characterized in that: the second interarea place of described first conductivity type substrate (110), is disposed with the first conduction type field cutoff layer, the second conduction type collector electrode and back metal; Within described first conduction type field cutoff layer and the second conduction type collector electrode are positioned at the second interarea lower surface, and back metal is positioned at outside the second interarea lower surface.
9. a kind of semiconductor device terminal structure adopting polycrystalline to end field plate according to claim 8, it is characterized in that: the first conduction type is N-type, second conduction type is P type, described first conductivity type substrate (110) is silicon substrate, first interarea of the first conductivity type substrate (110) is its front, and the second interarea of the first conductivity type substrate (110) is its back side.
10. a kind of semiconductor device terminal structure adopting polycrystalline to end field plate according to claim 9, is characterized in that: the diffusion depth of described second conduction type field limiting ring (120) is 1um-10um; Described first insulating barrier (130) is silicon dioxide layer, and thickness is 0.5um ~ 5um; Polycrystalline cut-off field plate (141) width in described field plate is 0 um ~ 30um; It is 0 um ~ 50um that polycrystalline in field plate extends field plate (142) width.
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| US20130214394A1 (en) * | 2012-02-22 | 2013-08-22 | Toyota Jidosha Kabushiki Kaisha | Semiconductor device |
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| JP2009117715A (en) * | 2007-11-08 | 2009-05-28 | Toshiba Corp | Semiconductor device and its manufacturing method |
| CN102263124A (en) * | 2010-05-27 | 2011-11-30 | 富士电机株式会社 | Semiconductor device |
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