CN104348429A - Direct current drift cancellation circuit - Google Patents
Direct current drift cancellation circuit Download PDFInfo
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- CN104348429A CN104348429A CN201310320895.2A CN201310320895A CN104348429A CN 104348429 A CN104348429 A CN 104348429A CN 201310320895 A CN201310320895 A CN 201310320895A CN 104348429 A CN104348429 A CN 104348429A
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- transconductance stage
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/34—Negative-feedback-circuit arrangements with or without positive feedback
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/129—Indexing scheme relating to amplifiers there being a feedback over the complete amplifier
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/372—Noise reduction and elimination in amplifier
Abstract
The invention provides a direct current drift cancellation circuit. The direct current drift cancellation circuit comprises a first operational amplifier and a feedback gain circuit. The first operational amplifier comprises a first input transconductance stage, a second input transconductance stage and an output stage. The input end of the first transconductance stage receives the input signal of the first operational amplifier through a first input end of the first operational amplifier and the output end of the output stage outputs the output signal of the first operational amplifier through the output end of the first operational amplifier. The input end of the feedback gain circuit is connected with the output end of the first operational amplifier in a coupled mode and the output end of the feedback gain circuit is connected with the input end of the second input transconductance stage in a coupled mode through a second input end of the first operational amplifier.
Description
Technical field
The invention relates to a kind of electronic circuit, and relate to a kind of DC shift elimination circuit especially.
Background technology
In the operation amplifier circuit of communication equipment, when producing DC shift (DC offset) error when prime input signal because temperature or element such as not to mate at the factor, this error amount also can amplify by the gain of operational amplifier, this phenomenon may allow operational amplifier enter saturation mode and cannot play best effect.The method of cancellation of DC offset common is at present the input signal of operational amplifier output terminal being fed back to operational amplifier by feedback circuit, reaches the effect eliminating DC shift.But in the method for above-mentioned elimination DC shift, because feedback signal is directly added back to the input signal of operation amplifier circuit, cause the noise in feedback circuit also together can be passed to the input of operational amplifier, the noise factor of opamp input terminal (Noise Figure) is significantly increased, and then increases the annoyance level to signal.To eliminate DC shift and the increase of simultaneously restraint speckle, then needing to utilize some other mode, for example, such as, reducing input resistance or increasing the input mutual conductance (transconductance) of operational amplifier.But with regard on the other hand, these modes reducing noise also further can increase design area or the power consumption of wafer.
Summary of the invention
The invention provides a kind of DC shift and eliminate circuit, can in elimination operation amplifier circuit while DC shift phenomenon, the effective noise suppressed in feedback gain circuit.
DC shift of the present invention is eliminated circuit and is comprised the first operational amplifier and feedback gain circuit.First operational amplifier comprises the first input transconductance stage, the second input transconductance stage and output stage.The input of the first input transconductance stage receives the input signal of the first operational amplifier by the first input end of the first operational amplifier, and the output of output stage exports the output signal of the first operational amplifier by the output of the first operational amplifier.The input of feedback gain circuit is coupled to the output of the first operational amplifier, and the output of feedback gain circuit is coupled to the input of the second input transconductance stage by the second input of the first operational amplifier.
Based on above-mentioned, the DC shift of the embodiment of the present invention eliminates circuit, wherein the direct current offset of the first operational amplifier output terminal is passed in the second input transconductance stage of the first operational amplifier by feedback gain circuit, and reduces the noise of feedback gain circuit by the second input transconductance stage.
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate accompanying drawing to be described in detail below.
Accompanying drawing explanation
Fig. 1 is the circuit box schematic diagram that a kind of DC shift eliminates circuit;
Fig. 2 is that the first embodiment of the present invention illustrates that a kind of DC shift eliminates the schematic diagram of circuit;
Fig. 3 is that the second embodiment of the present invention illustrates that a kind of DC shift eliminates the schematic diagram of circuit;
Fig. 4 is that the embodiment of the present invention illustrates that DC shift eliminates the circuit diagram of operational amplifier in circuit;
Fig. 5 is that another embodiment of the present invention illustrates that DC shift eliminates the circuit diagram of operational amplifier in circuit;
Fig. 6 is that yet another embodiment of the invention illustrates that DC shift eliminates the circuit diagram of operational amplifier in circuit;
Fig. 7 is that embodiments of the invention illustrate that a kind of DC shift eliminates the schematic diagram of operational amplifier frequency response simulation in circuit;
Fig. 8 is that embodiments of the invention illustrate that a kind of DC shift eliminates the schematic diagram of noise factor simulation in circuit.
Description of reference numerals:
100,200,300: DC shift eliminates circuit;
103,203,205,303,305,410,430,510,511,530,531: input transconductance stage;
105,207,307,490,550,551: output stage;
110,210,231,310,331,400,500,600: operational amplifier;
130,230,330: feedback gain circuit;
150,170,190,250,270,351,353,371,373: variable resistor;
233,333,335: electric capacity;
235,337,339: resistance;
350,370: variable resistor array;
415,435: current source;
450,470: impedance;
510A, 511A, H11 ~ HN1, J5 ~ J8, Q3, V5, V6, V9, VOUT, VOUTN, VOUTP: output;
510B, 511B, D1, D2, H12 ~ HN2, J1 ~ J4, J9 ~ J12, Q1, Q2, V1 ~ V4, V7 ~ V8, W1 ~ W4: input;
A1, A2, B1, B2, C1 ~ CN, E1 ~ EN: transistor;
A11, A21, B11, B21, C11 ~ CN1, E11 ~ EN1, K1: first end;
A12, A22, B12, B22, C12 ~ CN2, E12 ~ EN2, K12 ~ KN2: the second end;
A13, A23, B13, B23, C13 ~ CN3, E13 ~ EN3: control end;
F1 ~ FN, S1 ~ SN: switch;
FB1, FB2, FBN, FBP: feedback signal;
Gm1 ~ Gmn: gain;
H1 ~ HN: transconductance circuit;
810,820: curve;
IM, IN, IO, IP: input signal;
K: switching device shifter;
OUT, OUTN, OUTP: output signal.
Embodiment
Use in this case specification in full (comprising claim) " coupling " one word can refer to any connection means directly or indirectly.For example, if describe first device in literary composition to be coupled to the second device, then should be construed as this first device and can be directly connected in this second device, or this first device can be connected to this second device indirectly by other devices or certain connection means.In addition, all may part, in graphic and execution mode, use the element/component/step of identical label to represent identical or similar portions.Use identical label in different embodiment or use the element/component/step of identical term can cross-referenced related description.
Fig. 1 is the circuit box schematic diagram that a kind of DC shift eliminates circuit, and wherein DC shift elimination circuit 100 comprises operational amplifier 110, feedback gain circuit 130, first variable resistor 150, the second adjustable resistance 170 and the 3rd variable resistor 190.Please refer to Fig. 1, operational amplifier 110 comprises input transconductance stage 103 and output stage 105.The first input end of input transconductance stage 103 is coupled to the first input end Q1 of operational amplifier 110 and is coupled to the first variable resistor 150.Therefore, the first input end inputting transconductance stage 103 can receive the input signal IN of operational amplifier 110 by the first variable resistor 150 and first input end Q1.Second input of input transconductance stage 103 is coupled to the second input Q2 of operational amplifier 110 and is coupled to reference voltage (such as earthed voltage or other fixed voltages).The output Q3 of input transconductance stage 103 is coupled to the input of output stage 105.On the other hand, the output of output stage 105 is coupled to the output VOUT of operational amplifier 110, in order to the output signal OUT of output operational amplifier 110.The first end of the second adjustable resistance 170 and the second end are then coupled to the first input end Q1 of the operational amplifier 110 and output VOUT of operational amplifier 110 respectively.
In the embodiment in figure 1, the gain (Gain) of operational amplifier 110 can be decided with the second adjustable resistance 170 resistance value between the two by the first variable resistor 150.For example, when the first variable resistor 150 is respectively RA and RB with the resistance value of the second adjustable resistance 170, the gain of operational amplifier 110 can be expressed as RB/RA.When the input signal IN of operational amplifier 110 has DC shift (DCoffset) error, this error amount can amplify by the gain of operational amplifier 110, and this margin of error be exaggerated may make operational amplifier 110 enter saturation mode, the output signal OUT of operational amplifier 110 is namely made to occur saturated.In order to eliminate the DC shift of operational amplifier 110 output VOUT, between the output VOUT and the first input end Q1 of operational amplifier 110 of operational amplifier 110, add a feedback gain circuit 130 and the 3rd variable resistor 190.Wherein, the signal input part of feedback gain circuit 130 is coupled to the output VOUT of operational amplifier 110, and the signal output part of feedback gain circuit 130 is coupled to the first input end Q1 of operational amplifier 110 in order to export feedback signal FB1 to operational amplifier 110 by the 3rd variable resistor 190.But with regard on the other hand, feedback signal FB1 is directly transferred to the first input end Q1 of operational amplifier 110 by feedback gain circuit 130, the noise in feedback gain circuit 130 can be made also to feed back in the lump in the first input end Q1 of operational amplifier 110, the noise factor (Noise Figure, NF) of easy increase operational amplifier 110.
Eliminate in circuit 100 to solve above-mentioned DC shift, because the noise of feedback gain circuit 130 inside is on the impact of main circuit, multiple embodiment will illustrate that DC shift eliminates the noise that circuit reduces above-mentioned feedback gain circuit below.
Fig. 2 is that the first embodiment of the present invention illustrates that a kind of DC shift eliminates the schematic diagram of circuit 200, and wherein DC shift elimination circuit 200 comprises the first operational amplifier 210, feedback gain circuit 230, first variable resistor 250 and the second adjustable resistance 270.The first input end D1 of the first operational amplifier 210 is coupled to the first variable resistor 250, to receive input signal IM.The first end of the second adjustable resistance 270 and the second end are coupled to the first input end D1 of the first operational amplifier 210 and output VOUT of the first operational amplifier 210.Wherein the gain of the first operational amplifier 210 can be decided (with reference to the related description in figure 1, can not repeating at this) with the resistance value of the second adjustable resistance 270 by the first variable resistor 250.The input of feedback gain circuit 230 is coupled to the output VOUT of the first operational amplifier 210.The output of feedback gain circuit 230 is coupled to the second input D2 of the first operational amplifier 210.
First operational amplifier 210 comprises the first input transconductance stage 203, second and inputs transconductance stage 205 and output stage 207.First input transconductance stage 203 has the first gain, and the second input transconductance stage 205 has the second gain.According to the design requirement of actual product, described first gain and described second gain can be set to identical or different.In addition, the second gain of the second input transconductance stage 205 can be fixed.In certain embodiments, the second gain of the second input transconductance stage 205 can be variable gain, and namely the second input transconductance stage 205 can dynamically determine described second gain according to control signal.
First input transconductance stage 203 comprises first input end V1, the second input V2 and output V5.Second input transconductance stage 205 comprises first input end V3, the second input V4 and output V6.The second input V4 that the first first input end V1 and second inputting transconductance stage 203 inputs transconductance stage 205 is coupled to reference voltage (such as earthed voltage or other fixed voltages).Second input V2 of the first input transconductance stage 203 is coupled to the first input end D1 of the first operational amplifier 210, and is coupled to the first variable resistor 250 to receive the input signal IM of the first operational amplifier 210.The feedback signal FB2 that the second input D2 that the second first input end V3 inputting transconductance stage 205 is then coupled to the first operational amplifier 210 exports in order to receive feedback gain circuit 230.The output V6 that the output V5 and second of the first input transconductance stage 203 inputs transconductance stage 205 is coupled to the input of output stage 207 jointly.The output of output stage 207 is coupled to the output VOUT of the first operational amplifier 210 in order to export the output signal OUT of the first operational amplifier 210.
The input of feedback gain circuit 230 is coupled to the output VOUT of the first operational amplifier 210, in order to receive the output signal OUT of the first operational amplifier 210.On the other hand, the output of feedback gain circuit 230 is coupled to the first input end V3 of the second input transconductance stage 205 by the second input D2 of the first operational amplifier 210.After feedback gain circuit 230 receives the output signal OUT of the first operational amplifier 210, the DC shift information (i.e. feedback signal FB2) of output signal OUT is sent in the second input transconductance stage 205 of the first operational amplifier 210.Because feedback signal FB2 has the DC shift information about the first operational amplifier 210, therefore the second input transconductance stage 205 can produce corresponding current in response to DC shift to output stage 207.Second input transconductance stage 205 can pass through exported corresponding current to compensate/eliminates first to input transconductance stage 203 and export to DC shift composition in the bias current of output stage 207.Therefore, DC shift eliminates the DC shift that circuit 200 can eliminate input signal IM.By the design of this circuit, the present embodiment can effectively use the second input transconductance stage 205 to suppress the noise in feedback gain circuit 230, and therefore DC shift elimination circuit 200 also can reduce the noise that feedback gain circuit 230 is supervened while eliminating DC shift.In order to the high-pass equipment making DC shift eliminate circuit 200 can remain consistent under unlike signal gain, the transconductance value inputting transconductance stage 205 in the present embodiment can change along with signal gain.The implementation detail of the first operational amplifier 210 is detailed later.
In an embodiment of the present invention, the second operational amplifier 231 comprises first input end V7, the second input V8 and output V9.The first input end V7 of the second operational amplifier 231 is coupled to reference voltage (such as earthed voltage or other fixed voltages), the output V9 of the second operational amplifier 231 is coupled to the output of feedback gain circuit 230, and be coupled to the second input D2 of the first operational amplifier 210, in order to feedback signal FB2 to be exported to the input V3 of the second input transconductance stage 205.The first end of electric capacity 233 and the second end are coupled to the second input V8 and the output V9 of the second operational amplifier 231 respectively.The first end of resistance 235 and the second end are coupled to the second input V8 of the second operational amplifier 231 and output VOUT of the first operational amplifier 210 respectively.Therefore, feedback gain circuit 230 has integrator (integrator) function.Feedback gain circuit 230 can accumulate the DC shift information about the first operational amplifier 210, so that corresponding output feedback signal FB2 gives the second input transconductance stage 205 of the first operational amplifier 210.
Then the operational amplifier 110 of comparison diagram 1 can be learnt with the internal structure of both first operational amplifiers 210 of Fig. 2, and first operational amplifier 210 of Fig. 2 is than operational amplifier more than 110 one group of input transconductance stage of Fig. 1.Again comparison diagram 1 and both feedback gain circuit 130 in Fig. 2 and feedback gain circuit 230 output couple position, in Fig. 1, the feedback signal FB1 of feedback gain circuit 130 is directly sent to the first input end Q1 of operational amplifier 110.Review embodiment illustrated in fig. 2, the feedback signal FB2 of feedback gain circuit 230 is then sent to the first input end V3 of the second input transconductance stage 205 by the second input D2 in the first operational amplifier 210, instead of is sent to the second input V2 of the first input transconductance stage 203.The feedback signal FB1 being different from feedback gain circuit 130 in Fig. 1 is directly sent to the input transconductance stage 103 of operational amplifier 110, and embodiment illustrated in fig. 2 is be sent to by feedback signal FB2 in the second input transconductance stage 205 of operational amplifier.By this kind of circuit design, the noise in feedback gain circuit 230 effectively can be suppressed by the second input transconductance stage 205, and this noise can not be added the input signal IM of the first operational amplifier 210.Therefore, DC shift elimination circuit 200 also can reduce the noise that feedback gain circuit 230 is supervened while eliminating DC shift.
In fig. 2, it is realized by the operational amplifier of Single-end output that DC shift eliminates circuit 200, but the present invention is not limited thereto.In an alternative embodiment of the invention, DC shift elimination circuit also can utilize differential amplifier to realize.Such as, Fig. 3 is that the second embodiment of the present invention illustrates that a kind of DC shift eliminates the schematic diagram of circuit 300.Embodiment illustrated in fig. 3ly can to analogize with reference to the related description of Fig. 2.Please refer to Fig. 3, DC shift is eliminated circuit 300 and is comprised the first operational amplifier 310, feedback gain circuit 330, first variable resistor array 350 and the second adjustable resistance array 370.
First non-inverting input W1 of the first operational amplifier 310 is coupled to the variable resistor 351 in the first variable resistor array 350, to receive input signal IP.First inverting input W2 of the first operational amplifier 310 is coupled to the variable resistor 353 in the first variable resistor array 350, in order to receive input signal IO.Input signal IP and input signal IO is differential signal.In the second adjustable resistance array 370, the first end of variable resistor 371 and the second end are coupled to the first inverting input W2 of the first operational amplifier 310 and non-inverting output VOUTP of the first operational amplifier 310 respectively.In the second adjustable resistance array 370, the first end of variable resistor 373 and the second end are coupled to the first non-inverting input W1 of the first operational amplifier 310 and reversed-phase output VOUTN of the first operational amplifier 310 respectively.The reversed-phase output of feedback gain circuit 330 and non-inverting output are coupled to the second inverting input W3 and the second non-inverting input W4 of the first operational amplifier 310 respectively.
First operational amplifier 310 comprises the first input transconductance stage 303, second and inputs transconductance stage 305 and output stage 307.First input transconductance stage 303 comprises first input end J1, the second input J2, the first signal output part J5 and secondary signal output J6.Second input transconductance stage 305 comprises first input end J3, the second input J4, the first signal output part J7 and secondary signal output J8.The first input end J1 of the first input transconductance stage 303 is coupled to the first non-inverting input W1 of the first operational amplifier 310, and is coupled to the variable resistor 351 in the first variable resistor array 350, in order to receive the input signal IP of the first operational amplifier 310.Second input J2 of the first input transconductance stage 303 is coupled to the first inverting input W2 of the first operational amplifier 310, and is coupled to the variable resistor 353 in the first variable resistor array 350, in order to receive the input signal IO of the first operational amplifier 310.The first input end J3 of the second input transconductance stage 305 is coupled to the second inverting input W3 of the first operational amplifier 310, in order to receive the feedback signal FBN that feedback gain circuit 330 exports.The feedback signal FBP that the second non-inverting input W4 that second the second input J4 inputting transconductance stage 305 is coupled to the first operational amplifier 310 exports in order to receive feedback gain circuit 330.Feedback signal FBP and feedback signal FBN is differential signal.
The first signal output part J7 that first signal output part J5 and second of the first input transconductance stage 303 inputs transconductance stage 305 is coupled to the first input end J9 of output stage 307 jointly; The secondary signal output J8 that the secondary signal output J6 and second of the first input transconductance stage 303 inputs transconductance stage 305 is coupled to the second input J10 of output stage 307 jointly.First output of output stage 307 and the second output are coupled to non-inverting output VOUTP and the reversed-phase output VOUTN of the first operational amplifier 310 respectively, respectively in order to export output signal OUTP and the OUTN of the first operational amplifier 310.Output signal OUTP is differential signal with output signal OUTN.The reversed-phase output VOUTN of the first operational amplifier 310 and non-inverting output VOUTP represents the first output and second output of the first operational amplifier 310 respectively.
The first input end of feedback gain circuit 330 and the second input are coupled to reversed-phase output VOUTN and the non-inverting output VOUTP of the first operational amplifier 310 respectively, in order to receive output signal OUTN and the OUTP of the first operational amplifier 310.On the other hand, the first output of feedback gain circuit 330 and the second output are coupled to first input end J3 and the second input J4 of the second input transconductance stage 305 respectively respectively by the second inverting input W3 of the first operational amplifier 310 and the second non-inverting input W4.After the output signal OUTN that feedback gain circuit 330 receives the first operational amplifier 310 and output signal OUTP, output signal OUTN is sent to second of the first operational amplifier 310 with the DC shift information (i.e. feedback signal FBN and feedback signal FBP) of output signal OUTP and inputs in transconductance stage 305.Because feedback signal FBN and FBP has the DC shift information about the first operational amplifier 310, therefore the second input transconductance stage 305 can produce corresponding current in response to DC shift to output stage 307.Second input transconductance stage 305 can pass through exported corresponding current to compensate/eliminates first to input transconductance stage 303 and export to DC shift composition in the electric current of output stage 307.Therefore, DC shift eliminates the DC shift that circuit 300 can eliminate input signal IP and input signal IO.By this circuit design, the present embodiment can effectively use the second input transconductance stage 305 to suppress the noise in feedback gain circuit 330.Therefore, DC shift elimination circuit 300 while elimination DC shift, also can reduce the noise that feedback gain circuit 330 is supervened.In order to the high-pass equipment making DC shift eliminate circuit 300 can remain consistent under unlike signal gain, the transconductance value inputting transconductance stage 305 in the present embodiment can change along with signal gain.The implementation detail of the first operational amplifier 310 is detailed later.
In an embodiment of the present invention, feedback gain circuit 330 can be realized by the second operational amplifier 331, first electric capacity 333, second electric capacity 335, first resistance 337 and the second resistance 339.But the present invention is not limited thereto, any output signal OUTN that can receive the first operational amplifier 310 by signal input part and output signal OUTP, and second circuit inputted in transconductance stage 305 that can transmit feedback signal FBN and feedback signal FBP to the first operational amplifier 310 by signal output part all can be used to realize the feedback gain circuit 330 in the present invention.
Second operational amplifier 331 comprises first input end J11, the second input J12, the first output and the second output, and wherein the first output is reversed-phase output, and the second output is non-inverting output.The first end of the first electric capacity 333 and the second end are coupled to the first input end J11 of the second operational amplifier 331 and the first output of the second operational amplifier 331 respectively.The first end of the first resistance 337 and the second end are coupled to the first input end J11 of the second operational amplifier 331 and reversed-phase output VOUTN of the first operational amplifier 310 respectively.The first end of the second electric capacity 335 and the second end are coupled to the second input J12 of the second operational amplifier 331 and the second output of the second operational amplifier 331 respectively.The first end of the second resistance 339 and the second end are coupled to the second input J12 of the second operational amplifier 331 and non-inverting output VOUTP of the first operational amplifier 310 respectively.Therefore, feedback gain circuit 330 has differential integrator function.
In the embodiment of Fig. 3 of the present invention, when the input signal IP of the first operational amplifier 310 and input signal IO has DC shift error, this error can amplify by the gain of the first operational amplifier 310 and exported by output signal OUTN and OUTP.In order to eliminate DC shift, output signal OUTN and the OUTP comprising DC shift is carried out integration by feedback gain circuit 330, to obtain DC shift information wherein, and this DC shift information (i.e. feedback signal FBN and FBP) is fed back in the second output transconductance stage 305 of the first operational amplifier 310.Second input transconductance stage 305 can produce corresponding current to output stage 307 according to feedback signal FBN and FBP, compensate/eliminate first and input transconductance stage 303 and export to DC shift composition in the bias current of output stage 307.While elimination DC shift, the present embodiment suppresses the noise in feedback gain circuit 330 by the second output transconductance stage 305.
In the present invention, in order to make high-pass equipment can remain consistent under unlike signal gain, the mutual conductance of the second input transconductance stage 305 can change with gain.When not affecting bias current, operational amplifier 310 can adopt the mode intercoupled to reach the demand of different mutual conductance.Such as, Fig. 4 is that the second embodiment of the present invention illustrates that a kind of DC shift eliminates the circuit diagram of operational amplifier 400 in circuit, and wherein operational amplifier 400 comprises the first input transconductance stage 410, second input transconductance stage 430, impedance 450, impedance 470 and output stage 490.Impedance 450 and impedance 470 can be transistor, resistive element or other impedance components.In certain embodiments, impedance 450 and impedance 470 can be contained in the first input transconductance stage 410, second input transconductance stage 430 or output stage 490.
Shown in Fig. 2, the first implementation inputting the first input transconductance stage 303 shown in transconductance stage 203 and/or Fig. 3 can be analogized with reference to the related description of the first input transconductance stage 410 in Fig. 4.Shown in Fig. 2, the second implementation inputting the second input transconductance stage 305 shown in transconductance stage 205 and/or Fig. 3 can be analogized with reference to the related description of the second input transconductance stage 430 in Fig. 4.Shown in output stage 207 shown in Fig. 2 and/or Fig. 3, output stage 307 can be analogized with reference to the related description of output stage in Fig. 4 490.
Such as, the first input transconductance stage 410 in Fig. 4 can be considered as the circuit diagram of the first input transconductance stage 303 in Fig. 3, and the second input transconductance stage 430 in Fig. 4 can be considered as the circuit diagram of the second input transconductance stage 305 in Fig. 3.Please also refer to Fig. 3 and Fig. 4, first input transconductance stage 410 comprise difference transistor to and current source 415, wherein said difference transistor is to comprising the first transistor A1 and transistor seconds A2.The control end A13 of the first transistor A1 and the control end A23 of transistor seconds A2 inputs first input end J1 and the second input J2 of transconductance stage 303, to receive input signal IP and input signal IO respectively respectively as first.On the other hand, the first end A11 of the first transistor A1 and the first end A21 of transistor seconds A2 inputs the first signal output part J5 and the secondary signal output J6 of transconductance stage 303 respectively as first.The second end A12 of the first transistor A1 and the second end A22 of transistor seconds A2 is coupled to current source 415 jointly.
Second input transconductance stage 430 comprise the first transistor B1, transistor seconds B2, N number of 4th transistor (such as C1 shown in Fig. 4, C2 ..., CN), N number of third transistor (such as E1 shown in Fig. 4, E2 ..., EN), N number of second switch (such as S1 shown in Fig. 4, S2 ..., SN), N number of first switch (such as F1 shown in Fig. 4, F2 ..., FN) and current source 435, wherein N is positive integer.The first input end J3 and second that the control end B13 of the first transistor B1 and the control end B23 of transistor seconds B2 is coupled to the second input transconductance stage 305 respectively inputs the second input J4 of transconductance stage 305.The first end B11 of the first transistor B1 and the first end B21 of transistor seconds B2 is coupled to the first signal output part J7 and the secondary signal output J8 of the second input transconductance stage 305 respectively.The second end B12 of the first transistor B1 and the second end B22 of transistor seconds B2 is coupled to current source 435 jointly.On the other hand, the first end A11 of the first transistor A1 and the first end A21 of transistor seconds A2 in the first input transconductance stage 410, be coupled to the first end B11 of the first transistor B1 and the first end B21 of transistor seconds B2 in the second input transconductance stage 430, and be jointly coupled to the input of output stage 490.As in Fig. 3, the first input transconductance stage 303, second inputs and couples relation between transconductance stage 305 and output stage 307.
In the second input transconductance stage 430, the control end C13 of the 4th transistor C1 ~ CN, C23 ..., CN3 is coupled to the first input end J3 of the second input transconductance stage 305 jointly.The control end E13 of third transistor E1 ~ EN, E23 ..., EN3 is coupled to the second input J4 of the second input transconductance stage 305 jointly.The second end C12 of the 4th transistor C1 ~ CN, C22 ..., CN2 is coupled to the second end B22 of transistor seconds B2.The second end E12 of third transistor E1 ~ EN, E22 ..., EN2 is coupled to the second end B12 of the first transistor B1.In addition, second end of second switch S1 ~ SN be coupled to respectively the 4th transistor C1 ~ CN first end C11, C21 ..., CN1, second switch S1 ~ SN first end be coupled to the first end B21 of transistor seconds B2.Second end of first switch F1 ~ FN is coupled to the first end E11 ~ EN1 of third transistor E1 ~ EN respectively, and the first end of first switch F1 ~ FN is coupled to the first end B11 of the first transistor B1 jointly.
In an embodiment of the present invention, the second input transconductance stage 430 is arranged in pairs or groups mutually by the first transistor B1 and transistor seconds B2 and is produced mutual conductance.By controlling the conducting state of first switch F1 ~ FN, and by controlling the conducting state of second switch S1 ~ SN, third transistor E1 ~ EN can provide different mutual conductances from the 4th transistor C1 ~ CN.According to this execution mode, when not affecting the bias current being supplied to output stage 490, the second input transconductance stage 430 can adopt the structure that intercouples (as shown in Figure 4) to provide/adjust different mutual conductance.Therefore, the second input transconductance stage 430 can adjust corresponding mutual conductance according to different circuit conditions, meets the demand of different mutual conductance.
Shown in Fig. 2, the second implementation inputting the second input transconductance stage 305 shown in transconductance stage 205 and/or Fig. 3 should not be limited to embodiment illustrated in fig. 4.Such as, in other embodiments, shown in Fig. 2, the second implementation inputting the second input transconductance stage 305 shown in transconductance stage 205 and/or Fig. 3 can be analogized with reference to the related description of Fig. 5 or Fig. 6.
Fig. 5 is that another embodiment of the present invention illustrates that DC shift eliminates the circuit diagram of operational amplifier 500 in circuit.The first input transconductance stage 510, second in Fig. 5 inputs transconductance stage 530 and output stage 550 first input transconductance stage 203, second of operational amplifier 210 can input transconductance stage 205 and output stage 207 in representative graph 2 respectively.Or the first input transconductance stage 510, second in Fig. 5 inputs transconductance stage 530 and output stage 550 first input transconductance stage 303, second of operational amplifier 310 can input transconductance stage 305 and output stage 307 in representative graph 3 respectively.Second input transconductance stage 530 comprise multiple transconductance circuit H1, H2 ..., HN and switching device shifter K.Multiple signal output part H11 of transconductance circuit H1 ~ HN, H21 ..., HN1 is jointly coupled to the signal output part 510A of the first input transconductance stage 510, and is jointly coupled to the signal input part of output stage 550.Transconductance circuit H1 ~ HN have separately different yield value Gm1, Gm2 ..., Gmn.On the other hand, the signal input part 510B of the first input transconductance stage 510 can as the signal input part of the first input transconductance stage 303 in the signal input part of the first input transconductance stage 203 in Fig. 2 or Fig. 3.
The present embodiment does not limit the implementation of the first input transconductance stage 510 and transconductance circuit H1 ~ HN.Such as, in certain embodiments, the implementation of the first input transconductance stage 510 and transconductance circuit H1 ~ HN can with reference to first inputting the related description that transconductance stage 410 or second inputs transconductance stage 430 in Fig. 4.
In an embodiment of the present invention, switching device shifter K realizes by de-multiplexer.The first end K1 of switching device shifter K can as the input of the second input transconductance stage 305 in the signal input part of the second input transconductance stage 205 in Fig. 2 or Fig. 3.In addition, switching device shifter K multiple second end K12, K22 ..., KN2 with mode be one to one coupled to respectively multiple transconductance circuit H1 ~ HN multiple signal input part H12, H22 ..., HN2.Wherein, the first end K1 of switching device shifter K optionally can be coupled at least one in switching device shifter K many second end K12 ~ KN2 by switching device shifter K.It can thus be appreciated that, by the handover operation of switching device shifter K, one of them yield value can be selected in the different yield value Gm1 ~ Gmn of multiple transconductance circuit H1 ~ HN as the yield value of the second input transconductance circuit 530.
Fig. 6 is that one more embodiment of the present invention illustrates that DC shift eliminates the circuit diagram of operational amplifier 600 in circuit.The first input transconductance stage 511, second in Fig. 6 inputs transconductance stage 531 and output stage 551 first input transconductance stage 203, second of operational amplifier 210 can input transconductance stage 205 and output stage 207 in representative graph 2 respectively.Or the first input transconductance stage 511, second in Fig. 6 inputs transconductance stage 531 and output stage 551 first input transconductance stage 303, second of operational amplifier 310 can input transconductance stage 305 and output stage 307 in representative graph 3 respectively.
Please refer to Fig. 6, second input transconductance stage 531 comprise multiple transconductance circuit H1, H2 ..., HN and switching device shifter K.The present embodiment does not limit the implementation of the first input transconductance stage 511 and transconductance circuit H1 ~ HN.Such as, in certain embodiments, the implementation of the first input transconductance stage 511 and transconductance circuit H1 ~ HN can with reference to first inputting the related description that transconductance stage 410 or second inputs transconductance stage 430 in Fig. 4.Multiple signal input part H12 of multiple transconductance circuit H1 ~ HN, H22 ..., HN2 is coupled to the input of the second input transconductance stage 531 jointly, wherein multiple transconductance circuit H1 ~ HN have separately different yield value Gm1, Gm2 ..., Gmn.Switching device shifter K can be realized by multiplexer, and the signal output part 511A that the first end K1 and first of switching device shifter K inputs transconductance stage 511 is coupled to the signal input part of output stage 551 jointly.Multiple second end K12 of switching device shifter K, K22 ..., KN2 with mode be one to one coupled to respectively transconductance circuit H1 ~ HN multiple signal output part H11, H21 ..., HN1.The first end K1 of switching device shifter K optionally can be coupled to multiple second end K12 ~ KN2 at least one of switching device shifter K by switching device shifter K.In addition, the first input transconductance stage 511 can with reference to the related description in figure 5 with the mode of operation of output stage 551.
In addition, shown in Fig. 2, the second input transconductance stage 205 and the second implementation inputting transconductance stage 305 shown in Fig. 3 should not be limited to the related description of Fig. 5 and Fig. 6.Such as, in an alternative embodiment of the invention, under the H1 ~ HN of transconductance circuit shown in Fig. 5 has the condition of enable/disable controlling functions, the switching device shifter K in Fig. 5 can be omitted, and make multiple input H12 ~ HN2 of transconductance circuit H1 ~ HN jointly be coupled to the input of the second input transconductance stage 530.By that analogy, under the H1 ~ HN of transconductance circuit shown in Fig. 6 has the condition of enable/disable controlling functions, switching device shifter K in Fig. 6 can be omitted, and the signal output part 511A multiple signal output part H11 ~ HN1 and first of multiple transconductance circuit H1 ~ HN being inputted transconductance stage 511 is coupled to the signal input part of output stage 551 jointly.Transconductance circuit H1 ~ HN can optionally be enabled separately or be disabled, therefore can by the yield value selecting in multiple transconductance circuit H1 ~ HN to be applicable to.
Fig. 7 is that embodiments of the invention illustrate that a kind of DC shift eliminates the schematic diagram of operational amplifier frequency response simulation in circuit.The transverse axis of the simulation of frequency response shown in Fig. 7 represents the frequency of operational amplifier, and unit is hertz (Hz), and the longitudinal axis is representation signal intensity then, and unit is decibel (dB).Different curve shown in Fig. 7 represents DC shift shown in Fig. 3 under unlike signal gain respectively and eliminates the output frequency response characteristic of circuit 300.As seen from Figure 7, by the transconductance value of adjustment second input transconductance stage 305 corresponding to unlike signal gain, the passband making DC shift eliminate circuit 300 still can remain stable.
Fig. 8 is that embodiments of the invention illustrate that a kind of DC shift eliminates the schematic diagram of noise factor simulation in circuit.DC shift shown in the representative graph of transverse axis shown in Fig. 83 eliminates the output frequency of circuit 300, and unit is hertz (Hz), and the longitudinal axis then represents noise, and unit is decibel (dB).Please refer to curve 810 and curve 820 in Fig. 8, curve 810 is noise factor (Noise Figure) curve of the elimination of DC shift shown in Fig. 1 circuit 100, and curve 820 is the noise factor curve of the elimination of DC shift shown in Fig. 3 circuit 300.Comparison curves 810 and curve 820, under identical gain condition, the noise factor of curve 820 is significantly less than the noise factor of curve 810.Provable by the analog result of Fig. 8, DC shift shown in Fig. 3 eliminates circuit 300 can improve the problem that in the elimination of DC shift shown in Fig. 1 circuit 100, feedback path noise is exaggerated.
In sum, the DC shift provided by the present invention operational amplifier eliminated in circuit uses input transconductance circuit (shown in such as the first input transconductance stage 203 shown in Fig. 2 or Fig. 3 the first input transconductance stage 303) to receive input signal, and the feedback signal transmission exported by feedback gain circuit is in another input transconductance circuit (shown in such as the second input transconductance stage 205 shown in Fig. 2 or Fig. 3 the second input transconductance stage 305) of operational amplifier.Described DC shift eliminates circuit while utilizing the second input transconductance stage to eliminate the DC shift error of the first input transconductance stage, also utilizes the second input transconductance stage to suppress the noise in feedback gain circuit.Because this DC shift eliminates the input signal that the noise of feedback signal can not be added operational amplifier by circuit, the noise therefore in feedback gain circuit can be effectively suppressed.
Last it is noted that above each embodiment is only in order to illustrate technical scheme of the present invention, be not intended to limit; Although with reference to foregoing embodiments to invention has been detailed description, those of ordinary skill in the art is to be understood that: it still can be modified to the technical scheme described in foregoing embodiments, or carries out equivalent replacement to wherein some or all of technical characteristic; And these amendments or replacement, do not make the essence of appropriate technical solution depart from the scope of various embodiments of the present invention technical scheme.
Claims (14)
1. DC shift eliminates a circuit, it is characterized in that, comprising:
First operational amplifier, it comprises the first input transconductance stage, the second input transconductance stage and output stage, wherein the input of this first input transconductance stage receives the input signal of this first operational amplifier by the first input end of this first operational amplifier, and the output of this output stage exports the output signal of this first operational amplifier by the output of this first operational amplifier; And
Feedback gain circuit, wherein an input of this feedback gain circuit is coupled to this output of this first operational amplifier, and the output of this feedback gain circuit is coupled to the input of this second input transconductance stage by the second input of described first operational amplifier.
2. DC shift according to claim 1 eliminates circuit, it is characterized in that, this input of this first input transconductance stage comprises first input end and the second input, and this first input transconductance stage comprises:
The first transistor, a control end of this first transistor is coupled to this first input end of this first input transconductance stage, and the first end of this first transistor is coupled to the first signal output part of this first input transconductance stage;
Transistor seconds, the control end of this transistor seconds is coupled to this second input of this first input transconductance stage, and the first end of this transistor seconds is coupled to the secondary signal output of this first input transconductance stage; And
Current source, is coupled to the second end of this first transistor and the second end of this transistor seconds.
3. DC shift according to claim 1 eliminates circuit, it is characterized in that, this input of this second input transconductance stage comprises first input end and the second input, and this second input transconductance stage comprises:
Current source;
The first transistor, the control end of this first transistor is coupled to this first input end of this second input transconductance stage, the first end of this first transistor is coupled to the first signal output part of this second input transconductance stage, and the second end of this first transistor is coupled to this current source; And
Transistor seconds, the control end of this transistor seconds is coupled to this second input of this second input transconductance stage, the first end of this transistor seconds is coupled to the secondary signal output of this second input transconductance stage, and the second end of this transistor seconds is coupled to this current source.
4. DC shift according to claim 3 eliminates circuit, it is characterized in that, this second input transconductance stage also comprises:
At least one first switch, its first end is coupled to this first end of this first transistor;
At least one third transistor, the control end of this third transistor is coupled to this second input of this second input transconductance stage, the first end of this third transistor is coupled to the second end of this first switch, and the second end of this third transistor is coupled to this second end of this first transistor;
At least one second switch, its first end is coupled to this first end of this transistor seconds; And
At least one 4th transistor, the control end of the 4th transistor is coupled to this first input end of this second input transconductance stage, the first end of the 4th transistor is coupled to the second end of this second switch, and the second end of the 4th transistor is coupled to this second end of this transistor seconds.
5. DC shift according to claim 1 eliminates circuit, it is characterized in that, this second input transconductance stage comprises:
Multiple transconductance circuit, the signal output part that multiple signal output part of those transconductance circuits and described first inputs transconductance stage is coupled to the signal input part of this output stage jointly, and wherein those transconductance circuits have different yield values separately; And
Switching device shifter, its first end is coupled to this input of this second input transconductance stage, multiple second ends of this switching device shifter are coupled to multiple signal input parts of those transconductance circuits respectively in mode one to one, and wherein this first end of this switching device shifter is optionally coupled at least one in those second ends of this switching device shifter by this switching device shifter.
6. DC shift according to claim 5 eliminates circuit, and it is characterized in that, this switching device shifter comprises:
De-multiplexer, its input is coupled to this first end of this switching device shifter, and its multiple output is coupled to those second ends of this switching device shifter respectively in mode one to one.
7. DC shift according to claim 1 eliminates circuit, it is characterized in that, this second input transconductance stage comprises:
Multiple transconductance circuit, multiple signal input parts of those transconductance circuits are coupled to this input of this second input transconductance stage jointly, and wherein those transconductance circuits have different yield values separately; And
Switching device shifter, its first end is coupled to the signal input part of this output stage, multiple second ends of this switching device shifter are coupled to multiple signal output parts of those transconductance circuits respectively in mode one to one, and wherein this first end of this switching device shifter is optionally coupled at least one in those second ends of this switching device shifter by this switching device shifter.
8. DC shift according to claim 7 eliminates circuit, and it is characterized in that, this switching device shifter comprises:
Multiplexer, its output is coupled to this first end of this switching device shifter, and multiple inputs of this multiplexer are coupled to those second ends of this switching device shifter respectively in mode one to one.
9. DC shift according to claim 1 eliminates circuit, it is characterized in that, this second input transconductance stage comprises:
Multiple transconductance circuit, multiple inputs of those transconductance circuits are coupled to this input of this second input transconductance stage jointly, the signal output part that multiple signal output part of those transconductance circuits and described first inputs transconductance stage is coupled to the signal input part of this output stage jointly, wherein those transconductance circuits have different yield values separately, and those transconductance circuits are optionally enabled separately.
10. DC shift according to claim 1 eliminates circuit, it is characterized in that, the signal output part that the signal output part and described second of described first input transconductance stage inputs transconductance stage is coupled to the signal input part of this output stage jointly.
11. DC shifts according to claim 1 eliminate circuit, it is characterized in that, also comprise:
First resistance, is coupled to this first input end of this first operational amplifier to provide this input signal; And
Second resistance, its first end and the second end are coupled to this first input end of this first operational amplifier and this output of this first operational amplifier respectively.
12. DC shifts according to claim 1 eliminate circuit, and it is characterized in that, this feedback gain circuit comprises:
Second operational amplifier, its output is coupled to this input of this second input transconductance stage by this second input of described first operational amplifier, and the first input end of this second operational amplifier is coupled to reference voltage;
Electric capacity, its first end and the second end are coupled to the second input of this second operational amplifier and this output of this second operational amplifier respectively; And
Resistance, its first end and the second end are coupled to this second input of this second operational amplifier and this output of this first operational amplifier respectively.
13. DC shifts according to claim 1 eliminate circuit, it is characterized in that, this input of this second input transconductance stage comprises first input end and the second input, and this output of this first operational amplifier comprises the first output and the second output, and this feedback gain circuit comprises:
Second operational amplifier, its first output is coupled to this first input end of this second input transconductance stage, and the second output of this second operational amplifier is coupled to this second input of this second input transconductance stage;
First electric capacity, its first end and the second end are coupled to the first input end of this second operational amplifier and this first output of this second operational amplifier respectively;
First resistance, its first end and the second end are coupled to this first input end of this second operational amplifier and this first output of this first operational amplifier respectively;
Second electric capacity, its first end and the second end are coupled to the second input of this second operational amplifier and this second output of this second operational amplifier respectively; And
Second resistance, its first end and the second end are coupled to this second input of this second operational amplifier and this second output of this first operational amplifier respectively.
14. DC shifts according to claim 1 eliminate circuit, it is characterized in that, this first input transconductance stage has the first gain, and this second input transconductance stage has the second gain, and this second gain is variable gain.
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