US8410846B2 - Variable gain amplifier - Google Patents

Variable gain amplifier Download PDF

Info

Publication number
US8410846B2
US8410846B2 US13/126,222 US200913126222A US8410846B2 US 8410846 B2 US8410846 B2 US 8410846B2 US 200913126222 A US200913126222 A US 200913126222A US 8410846 B2 US8410846 B2 US 8410846B2
Authority
US
United States
Prior art keywords
input
chain
integrator
switches
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active, expires
Application number
US13/126,222
Other versions
US20110260901A1 (en
Inventor
Hashem Zare-Hoseini
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Technologies International Ltd
Original Assignee
Cambridge Silicon Radio Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cambridge Silicon Radio Ltd filed Critical Cambridge Silicon Radio Ltd
Assigned to CAMBRIDGE SILICON RADIO LIMITED reassignment CAMBRIDGE SILICON RADIO LIMITED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ZARE-HOSEINI, HASHEM
Publication of US20110260901A1 publication Critical patent/US20110260901A1/en
Application granted granted Critical
Publication of US8410846B2 publication Critical patent/US8410846B2/en
Assigned to QUALCOMM TECHNOLOGIES INTERNATIONAL, LTD. reassignment QUALCOMM TECHNOLOGIES INTERNATIONAL, LTD. CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: CAMBRIDGE SILICON RADIO LIMITED
Active legal-status Critical Current
Adjusted expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G1/00—Details of arrangements for controlling amplification
    • H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0088—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using discontinuously variable devices, e.g. switch-operated
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
    • G06G7/18—Arrangements for performing computing operations, e.g. operational amplifiers for integration or differentiation; for forming integrals
    • G06G7/184—Arrangements for performing computing operations, e.g. operational amplifiers for integration or differentiation; for forming integrals using capacitive elements
    • G06G7/186—Arrangements for performing computing operations, e.g. operational amplifiers for integration or differentiation; for forming integrals using capacitive elements using an operational amplifier comprising a capacitor or a resistor in the feedback loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3211—Modifications of amplifiers to reduce non-linear distortion in differential amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G1/00—Details of arrangements for controlling amplification
    • H03G1/04—Modifications of control circuit to reduce distortion caused by control
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G5/00—Tone control or bandwidth control in amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/18—Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging

Definitions

  • variable gain amplifier it is common practice in electronic circuits to amplify or attenuate a received input signal using a variable gain amplifier so as to, for example, ensure that further circuit elements receive the maximum value of input signal to maximise the signal to noise ratio of the received signal.
  • the provision of a variable gain amplifier to receive a variable amplitude input signal prior to further processing of the amplified input signal by other circuit elements is typical in audio and radio frequency receivers.
  • the gain of the variable in amplifier is set by using a number of switches to select one or more input resistors to set the required gain.
  • the switches are implemented as transistors.
  • the resistance of the transistors used to implement the switches can vary as a function of the input signal, this variation in resistance of the transistor having an effect on the overall gain of the amplifier.
  • the resistance of the transistors can vary as the input signal varies and therefore the performance of the variable gain amplifier can vary. This non-linear behaviour of the variable in amplifier in certain circumstances is particularly undesirable when very high quality performance is required, since the non-linear effects of the transistor switches can become dominant and lead to harmonic distortions on the output signal. It would therefore be advantageous to provide a variable gain amplifier stage in which the effect of the non-linearity of the transistor switches was at least reduced.
  • a variable gain amplifier comprising an integrator having a first input, an output and a feedback loop connected between the first input and the output, a plurality of input chains connected in parallel between the amplifier input and the first input of the integrator, each input chain including a resistor and a first switch, and a plurality of second switches, each second switch connected between an intermediate node between the resistor and first switch of a respective input chain and the feedback loop of the integrator, wherein the resistance of the resistors is scaled by a scaling factor with respect to one another and the on-resistance is of the first and second switches connected to each intermediate node are scaled by the respective scaling factor.
  • the first and second switches comprise transistors.
  • the on-resistances of the transistors may be scaled by scaling one or both of the width and length of the transistors, i.e. scaling the silicon area of the transistor.
  • the on-resistance of a first switch in an output chain may not be equal to the on-resistance of the corresponding second switch connected to the input chain. In other words, the absolute values of any pair of switches need not be equal.
  • the scaling factor applied to the resistor and first and second switches of a first input chain with respect to a further input chain is may not be equal to the scaling factor applied to the resistor and first and second switch of a second input chain with respect to the further input chain.
  • the scaling factor may vary for any pair of input chains as desired.
  • the integrator comprises an operational amplifier.
  • an analogue-to-digital converter including a variable gain amplifier according to the first aspect of the invention.
  • FIG. 1 shows a simplified schematic of a variable gain amplifier followed by an analogue to digital converter (ADC);
  • ADC analogue to digital converter
  • FIG. 2 shows a modification of the circuit shown in FIG. 1 in which the amplifier has been incorporated within the ADC;
  • FIG. 3 shows a variable gain amplifier, in combination with an integrator, according to an embodiment of the present invention.
  • FIG. 4 shows a further embodiment of the present invention with the variable gain amplifier configured as a differential amplifier.
  • FIG. 1 shows a simplified schematic of a variable gain amplifier according to the known prior art in combination with part of a radio receiver.
  • the variable gain amplifier 2 comprises an operational amplifier 4 with a first variable resistor 6 connected between the inverting input of the operational amplifier 4 and an audio input V in and a second variable resistor 8 connected between the output of the operational amplifier 4 and the inverting input.
  • the output of the variable gain amplifier 2 is connected to the input of a Delta-Sigma analogue to digital converter core 10 .
  • the detailed construction of the analogue to digital converter 10 is not of relevance to embodiments of the present invention, except suffice to say that the ADC 10 includes at least one integrator 12 , implemented as a further operational amplifier.
  • FIG. 2 Accepted good practice in the prior art for low power systems such as that shown in FIG. 1 is to move the variable gain stage into the analogue to digital converter section.
  • the resulting circuit is schematically shown in FIG. 2 , in which the operational amplifier 4 of the variable in stage shown in FIG. 1 and the integrator 12 have been replaced by a single operational amplifier integrator 16 .
  • the gain stage is now inside the feedback system of the analogue to digital converter, the performance requirement of the gain stage is relaxed and the power consumption is reduced in comparison to the circuit shown in FIG. 1 .
  • FIG. 2 Also illustrated in FIG. 2 is a typical implementation of the variable resistor 6 shown in FIG. 1 connected between the input voltage V in and the inverting input of the operational amplifier 4 , 16 .
  • a number of parallel “input chains” are provided connected between the input voltage V in and the inverting input of the op-amp integrator 16 .
  • Each input chain includes a resistor and a switch, the switch typically being implemented as a transistor.
  • the values of the resistors in the input chains are different to one another and therefore by connecting one or more of the input chains to the inverting input of the operational amplifier integrator by closing the corresponding switch or switches the input resistor between the input voltage node and the inverting input of the op-amp integrator can be varied.
  • the values of the resistors vary by integer scaling factors. For example, in the particular arrangement shown in FIG.
  • the resistor 18 in a first one of the input chains the resistor 18 has a resistance R, the second resistor 20 in the next input chain has a resistance of nR, where n is a first scaling factor and is most typically an integer value, whilst the third resistor 22 in the third input chain has a resistance of mR, where m is a second scaling factor that may or may not be equal to n.
  • any variations in the on-resistance of the switches 24 such as for example those arising from any non-linearity's in the transistor switches 24 , will have an effect on the performance of the gain stage. Since the gain stage is incorporated within the integrator in the circuit shown in FIG. 2 , any non-linearity's within the transistor switches 24 affect the performance of the integrator and so the ADC.
  • FIG. 3 An embodiment of the present invention that addresses the problems with the known prior art discussed above is schematically illustrated in FIG. 3 .
  • Only the combined operational amplifier integrator 116 is shown in FIG. 3 , together with the associated input chains and a feedback loop, but it will be readily appreciated that the gain stage shown in FIG. 3 can be simply substituted for the corresponding circuit elements shown in FIG. 2 , for example.
  • each input chain also includes a resistor 118 and a corresponding switch 124 , with each input chain selectively collected in parallel between the input V in and the inverting input of the operational amplifier integrator 116 .
  • the values of the resistors 118 in each input chain are scaled with respect to one another.
  • the value of the resistor 118 in the first input chain shown in FIG. 3 is R, that of the second chain nR and that of the third chain mR, with n and m being preferably integer values that may or may not be equal to one another.
  • the on-resistances of each switch 124 in the respective input chains is also scaled between chains by the same scaling factor as the resistances.
  • the on-resistance of the switch 124 in the second input chain is n times greater than that of the switch in the first input chain (n being the scaling factor of the resistances between the first and second input chain), whilst the switch 124 in the third input chain is no times greater than that of the first input chain (with m being the scaling factor of the resistances between the first and third input chains).
  • the on-resistance of the switches 124 may, for example, be controlled by varying the silicon area of the transistors used to implement the switches 124 .
  • Each second switch s′ is connected at an intermediate node of a respective input chain between the resistor 118 and first switch 124 and the feedback loop of the operational amplifier integrator 116 , such that a single one of the second switches 126 is connected to an intermediate node of a corresponding input chain, with the other terminal of the second switches being connected to a common point within the feedback loop.
  • the second switches may be implemented as transistors and their on-resistances are scaled with respect to one another, with the scaling factor being the same as that of the respective input chain.
  • the second switch 126 connected to the second input chain has an on-resistance n times that of the second switch connected to the first input chain and so on.
  • the absolute values of the on-resistances of the first and second switches may be different and it is only the scaling factors that are the same for any given input chain.
  • the on resistance values of a first switch ns and second switch ns′ may or may not be equal, but the on-resistances will be n times those of the respective switches from the first input chain having a resistor value of R.
  • the first and second switches associated with an input chain are always selected together, such that, for example, should the first input chain be selected then both the first and second switches will be in the on position.
  • one or more of the pairs are first and second switches will be selected so as to select the desired input resistance for the desired gain.
  • an (idealised) operational amplifier there will be no current flow through the selected first switches 124 and therefore the voltage at the intermediate node of the selected input chains will be equal to the voltage at the inverting input of the operational amplifier integrator 116 . Therefore, a current inversely proportional to the input resistance is passed to the feedback loop. Since no current is passed through the selected first switches any variation in their on-resistance caused by non-linearity's within the switches has no effect on the gain of the gain stage.
  • any variations in the on-resistances of the second switches 126 caused by non-linearity's in their behaviour will only result in some additive nonlinearity to the output of the operational amplifier integrator, as the second switches 126 are in the feedback loop, rather than the non-linearity's being integrated by the integrator as with the prior art.
  • FIG. 4 A further embodiment of the present invention is schematically illustrated in FIG. 4 , in which the variable gain amplifier is configured as a fully differential amplifier to provide an output as a function of the difference between two input values.
  • each input of the integrator 216 is connected to a variable resistance input, each variable resistance input comprising a plurality of parallel input chains 200 .
  • Each input chain is arranged in an analogous fashion to the configuration shown in FIG. 3 , namely a resistor 218 , 218 ′ connected in series to a first switch 224 , 224 ′, which in turn is connected to a respective one of the inputs to the integrator.
  • a respective second switch 226 , 226 ′ At an intermediate node on each input chain a respective second switch 226 , 226 ′, the other terminal of which is connected to a respective feedback loop.
  • each feedback loop includes a feedback capacitor 230 , 230 ′ having a first terminal connected to a respective one oldie integrator outputs and a second terminal connected to each of the second switches 226 , 226 ′ in the respective input chain.
  • the values of the resistors R and the on-resistances of the first and second switches are scaled with respect to one another as described above in relation to FIG. 3 .

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Control Of Amplification And Gain Control (AREA)
  • Amplifiers (AREA)

Abstract

A variable gain amplifier includes an integrator having an input, an output and a feedback loop connected between the input and output, a plurality of input chains connected in parallel between the amplifier input and the input of the integrator, each input chain including a resistor and a first switch and a plurality of second switches, each second switch connected between an intermediate node between the resistor and first switch of a respective input chain and the feedback loop of the integrator, wherein the resistance of the resistors in the input chains is scaled by a scaling factor with respect to one another and the on-resistances of the first and second switches connected to each intermediate node are scaled by the corresponding scaling factor.

Description

BACKGROUND
1. Technical Field
It is common practice in electronic circuits to amplify or attenuate a received input signal using a variable gain amplifier so as to, for example, ensure that further circuit elements receive the maximum value of input signal to maximise the signal to noise ratio of the received signal. The provision of a variable gain amplifier to receive a variable amplitude input signal prior to further processing of the amplified input signal by other circuit elements is typical in audio and radio frequency receivers.
2. Related Technology
In such electronic circuits the gain of the variable in amplifier is set by using a number of switches to select one or more input resistors to set the required gain. The switches are implemented as transistors. Depending on the input signal to the variable gain amplifier, the resistance of the transistors used to implement the switches can vary as a function of the input signal, this variation in resistance of the transistor having an effect on the overall gain of the amplifier. As the input signal is typically a non-constant amplitude signal, the resistance of the transistors can vary as the input signal varies and therefore the performance of the variable gain amplifier can vary. This non-linear behaviour of the variable in amplifier in certain circumstances is particularly undesirable when very high quality performance is required, since the non-linear effects of the transistor switches can become dominant and lead to harmonic distortions on the output signal. It would therefore be advantageous to provide a variable gain amplifier stage in which the effect of the non-linearity of the transistor switches was at least reduced.
SUMMARY
According to a first aspect of the present invention there is provided a variable gain amplifier comprising an integrator having a first input, an output and a feedback loop connected between the first input and the output, a plurality of input chains connected in parallel between the amplifier input and the first input of the integrator, each input chain including a resistor and a first switch, and a plurality of second switches, each second switch connected between an intermediate node between the resistor and first switch of a respective input chain and the feedback loop of the integrator, wherein the resistance of the resistors is scaled by a scaling factor with respect to one another and the on-resistance is of the first and second switches connected to each intermediate node are scaled by the respective scaling factor.
Preferably the first and second switches comprise transistors. The on-resistances of the transistors may be scaled by scaling one or both of the width and length of the transistors, i.e. scaling the silicon area of the transistor.
The on-resistance of a first switch in an output chain may not be equal to the on-resistance of the corresponding second switch connected to the input chain. In other words, the absolute values of any pair of switches need not be equal.
The scaling factor applied to the resistor and first and second switches of a first input chain with respect to a further input chain is may not be equal to the scaling factor applied to the resistor and first and second switch of a second input chain with respect to the further input chain. In other words the scaling factor may vary for any pair of input chains as desired.
In preferred embodiments the integrator comprises an operational amplifier.
According to a further aspect of the present invention there is provided an analogue-to-digital converter including a variable gain amplifier according to the first aspect of the invention.
BRIEF DESCRIPTION OF THE DRAWINGS
Embodiments of the present invention will now be described below, by way of non-limiting example only, and with reference to the accompanying figures, of which:
FIG. 1 shows a simplified schematic of a variable gain amplifier followed by an analogue to digital converter (ADC);
FIG. 2 shows a modification of the circuit shown in FIG. 1 in which the amplifier has been incorporated within the ADC;
FIG. 3 shows a variable gain amplifier, in combination with an integrator, according to an embodiment of the present invention; and
FIG. 4 shows a further embodiment of the present invention with the variable gain amplifier configured as a differential amplifier.
 DETAILED DESCRIPTION
FIG. 1 shows a simplified schematic of a variable gain amplifier according to the known prior art in combination with part of a radio receiver. The variable gain amplifier 2 comprises an operational amplifier 4 with a first variable resistor 6 connected between the inverting input of the operational amplifier 4 and an audio input Vin and a second variable resistor 8 connected between the output of the operational amplifier 4 and the inverting input. The output of the variable gain amplifier 2 is connected to the input of a Delta-Sigma analogue to digital converter core 10. The detailed construction of the analogue to digital converter 10 is not of relevance to embodiments of the present invention, except suffice to say that the ADC 10 includes at least one integrator 12, implemented as a further operational amplifier.
Accepted good practice in the prior art for low power systems such as that shown in FIG. 1 is to move the variable gain stage into the analogue to digital converter section. The resulting circuit is schematically shown in FIG. 2, in which the operational amplifier 4 of the variable in stage shown in FIG. 1 and the integrator 12 have been replaced by a single operational amplifier integrator 16. As the gain stage is now inside the feedback system of the analogue to digital converter, the performance requirement of the gain stage is relaxed and the power consumption is reduced in comparison to the circuit shown in FIG. 1. Also illustrated in FIG. 2 is a typical implementation of the variable resistor 6 shown in FIG. 1 connected between the input voltage Vin and the inverting input of the operational amplifier 4, 16. In this typical implementation a number of parallel “input chains” are provided connected between the input voltage Vin and the inverting input of the op-amp integrator 16. Each input chain includes a resistor and a switch, the switch typically being implemented as a transistor. The values of the resistors in the input chains are different to one another and therefore by connecting one or more of the input chains to the inverting input of the operational amplifier integrator by closing the corresponding switch or switches the input resistor between the input voltage node and the inverting input of the op-amp integrator can be varied. Typically, but not necessarily, the values of the resistors vary by integer scaling factors. For example, in the particular arrangement shown in FIG. 2, in a first one of the input chains the resistor 18 has a resistance R, the second resistor 20 in the next input chain has a resistance of nR, where n is a first scaling factor and is most typically an integer value, whilst the third resistor 22 in the third input chain has a resistance of mR, where m is a second scaling factor that may or may not be equal to n.
As previously discussed, any variations in the on-resistance of the switches 24, such as for example those arising from any non-linearity's in the transistor switches 24, will have an effect on the performance of the gain stage. Since the gain stage is incorporated within the integrator in the circuit shown in FIG. 2, any non-linearity's within the transistor switches 24 affect the performance of the integrator and so the ADC.
An embodiment of the present invention that addresses the problems with the known prior art discussed above is schematically illustrated in FIG. 3. Only the combined operational amplifier integrator 116 is shown in FIG. 3, together with the associated input chains and a feedback loop, but it will be readily appreciated that the gain stage shown in FIG. 3 can be simply substituted for the corresponding circuit elements shown in FIG. 2, for example. In FIG. 3 each input chain also includes a resistor 118 and a corresponding switch 124, with each input chain selectively collected in parallel between the input Vin and the inverting input of the operational amplifier integrator 116. As with the input chains of the circuit shown in FIG. 2, in embodiments of the present invention the values of the resistors 118 in each input chain are scaled with respect to one another. For example, the value of the resistor 118 in the first input chain shown in FIG. 3 is R, that of the second chain nR and that of the third chain mR, with n and m being preferably integer values that may or may not be equal to one another. However, in embodiments of the present invention the on-resistances of each switch 124 in the respective input chains is also scaled between chains by the same scaling factor as the resistances. For example, the on-resistance of the switch 124 in the second input chain is n times greater than that of the switch in the first input chain (n being the scaling factor of the resistances between the first and second input chain), whilst the switch 124 in the third input chain is no times greater than that of the first input chain (with m being the scaling factor of the resistances between the first and third input chains). The on-resistance of the switches 124 may, for example, be controlled by varying the silicon area of the transistors used to implement the switches 124. In addition to the set of first switches 124 in each input chain, in embodiments of the present invention there are also provided a set of second switches 126. Each second switch s′ is connected at an intermediate node of a respective input chain between the resistor 118 and first switch 124 and the feedback loop of the operational amplifier integrator 116, such that a single one of the second switches 126 is connected to an intermediate node of a corresponding input chain, with the other terminal of the second switches being connected to a common point within the feedback loop. Similarly to the first switches 124, the second switches may be implemented as transistors and their on-resistances are scaled with respect to one another, with the scaling factor being the same as that of the respective input chain. For example, the second switch 126 connected to the second input chain has an on-resistance n times that of the second switch connected to the first input chain and so on. It is to be noted that the absolute values of the on-resistances of the first and second switches may be different and it is only the scaling factors that are the same for any given input chain. For example, for the second input chain having resistance nR, the on resistance values of a first switch ns and second switch ns′ may or may not be equal, but the on-resistances will be n times those of the respective switches from the first input chain having a resistor value of R. The first and second switches associated with an input chain are always selected together, such that, for example, should the first input chain be selected then both the first and second switches will be in the on position.
In operation one or more of the pairs are first and second switches will be selected so as to select the desired input resistance for the desired gain. As it is not possible to sink current into the input of an (idealised) operational amplifier, there will be no current flow through the selected first switches 124 and therefore the voltage at the intermediate node of the selected input chains will be equal to the voltage at the inverting input of the operational amplifier integrator 116. Therefore, a current inversely proportional to the input resistance is passed to the feedback loop. Since no current is passed through the selected first switches any variation in their on-resistance caused by non-linearity's within the switches has no effect on the gain of the gain stage. Furthermore, any variations in the on-resistances of the second switches 126 caused by non-linearity's in their behaviour will only result in some additive nonlinearity to the output of the operational amplifier integrator, as the second switches 126 are in the feedback loop, rather than the non-linearity's being integrated by the integrator as with the prior art.
A further embodiment of the present invention is schematically illustrated in FIG. 4, in which the variable gain amplifier is configured as a fully differential amplifier to provide an output as a function of the difference between two input values. In this configuration each input of the integrator 216 is connected to a variable resistance input, each variable resistance input comprising a plurality of parallel input chains 200. Each input chain is arranged in an analogous fashion to the configuration shown in FIG. 3, namely a resistor 218, 218′ connected in series to a first switch 224, 224′, which in turn is connected to a respective one of the inputs to the integrator. At an intermediate node on each input chain a respective second switch 226, 226′, the other terminal of which is connected to a respective feedback loop. In the differential configuration shown in FIG. 4 the integrator has a +ve output and a −ve output with a feedback loop connected to a respective one of the outputs. In the configuration shown each feedback loop includes a feedback capacitor 230, 230′ having a first terminal connected to a respective one oldie integrator outputs and a second terminal connected to each of the second switches 226, 226′ in the respective input chain. For each set of input chains connected to respective inputs of the integrator the values of the resistors R and the on-resistances of the first and second switches are scaled with respect to one another as described above in relation to FIG. 3.

Claims (7)

The invention claimed is:
1. A variable gain amplifier comprising:
an input voltage node;
an integrator having an input, an output and a feedback loop; and
a plurality of input chains connected in parallel between the input voltage node and the input of the integrator, each input chain including a resistor and a first switch connected in series; characterised in that:
the resistor of each input chain is connected to the input voltage node; and
the integrator feedback loop includes a plurality of second switches connected in parallel, each second switch connected to an intermediate node between the resistor and first switch of a respective input chain and coupled to the output of the integrator, wherein the resistance of the resistors in the input chains is scaled by a scaling factor with respect to one another and the on-resistances of the first and second switches connected to each intermediate node are scaled by the corresponding scaling factor.
2. The variable gain amplifier of claim 1, wherein said switches comprise transistors.
3. The variable gain amplifier of claim 2, wherein the on-resistances of said transistors are scaled by scaling one or both of the width and length of the transistors.
4. The variable gain amplifier of claim 1, wherein the on-resistance of a first switch in an output chain is not equal to the on-resistance of the corresponding second switch connected to the input chain.
5. The variable gain amplifier of claim 1, wherein the scaling factor applied to the resistor and first and second switches of a first input chain with respect to a further input chain is not equal to the scaling factor applied to the resistor and first and second switch of a second input chain with respect to the further input chain.
6. The variable gain amplifier of claim 1, wherein the integrator comprises an operational amplifier.
7. An analogue-to-digital converter including a variable gain amplifier according to claim 1.
US13/126,222 2008-10-31 2009-09-11 Variable gain amplifier Active 2029-11-26 US8410846B2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB0820041.2 2008-10-31
GB0820041.2A GB2464770B (en) 2008-10-31 2008-10-31 Variable gain amplifier
PCT/GB2009/051177 WO2010049713A1 (en) 2008-10-31 2009-09-11 Variable gain amplifier

Publications (2)

Publication Number Publication Date
US20110260901A1 US20110260901A1 (en) 2011-10-27
US8410846B2 true US8410846B2 (en) 2013-04-02

Family

ID=40138181

Family Applications (1)

Application Number Title Priority Date Filing Date
US13/126,222 Active 2029-11-26 US8410846B2 (en) 2008-10-31 2009-09-11 Variable gain amplifier

Country Status (5)

Country Link
US (1) US8410846B2 (en)
EP (1) EP2351213B1 (en)
CN (1) CN102217192B (en)
GB (1) GB2464770B (en)
WO (1) WO2010049713A1 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120127151A1 (en) * 2010-11-19 2012-05-24 Rohm Co., Ltd. Power supply device, liquid crystal drive device, and liquid crystal display device
US20120249235A1 (en) * 2008-12-19 2012-10-04 Cambridge Silicon Radio Limited Low distortion amplifer
US8674743B1 (en) * 2010-06-14 2014-03-18 Marvell International Ltd. Asymmetric correction circuit with negative resistance
US20140266459A1 (en) * 2013-03-15 2014-09-18 Rf Micro Devices (Cayman Islands), Ltd. Rf power amplifier with pm feedback linearization
US9444417B2 (en) 2013-03-15 2016-09-13 Qorvo Us, Inc. Weakly coupled RF network based power amplifier architecture
US9558845B2 (en) * 2015-03-25 2017-01-31 Qualcomm Incorporated Sampling network and clocking scheme for a switched-capacitor integrator
US9923532B2 (en) 2016-04-06 2018-03-20 Nxp Usa, Inc. System and method to directly couple to analog to digital converter having lower voltage reference
US11177064B2 (en) 2013-03-15 2021-11-16 Qorvo Us, Inc. Advanced 3D inductor structures with confined magnetic field

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5834377B2 (en) * 2010-01-13 2015-12-24 富士通株式会社 Filter circuit
CN103424179A (en) * 2012-05-15 2013-12-04 鸿富锦精密工业(武汉)有限公司 Noise alarm system
US9716479B2 (en) 2013-02-08 2017-07-25 Analog Devices, Inc. Variable gain amplifier
CN105897207B (en) * 2016-03-28 2019-01-08 华为技术有限公司 A kind of continuous variable gain amplifier

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS623519A (en) 1985-06-28 1987-01-09 Jeol Ltd Sawtooth wave generating circuit
US5708376A (en) * 1995-07-12 1998-01-13 Fuji Xerox Co., Ltd. Variable-gain amplifying device
US20050264360A1 (en) 2004-05-27 2005-12-01 Ma Fan Y Resistor and switch-minimized variable analog gain circuit
US20060176112A1 (en) * 2001-10-05 2006-08-10 Toshifumi Nakatani Variable gain amplifying apparatus and wireless communication apparatus
US20120249235A1 (en) * 2008-12-19 2012-10-04 Cambridge Silicon Radio Limited Low distortion amplifer

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3895280A (en) * 1972-03-14 1975-07-15 Foxboro Co Electronic controller with remote tuning
JPS5628524A (en) * 1979-08-16 1981-03-20 Matsushita Electric Ind Co Ltd Switch unit for analogue signal
JPS60177730A (en) * 1984-02-23 1985-09-11 Yokogawa Hokushin Electric Corp D/a converter
MY108262A (en) * 1990-08-20 1996-09-30 Rca Licensing Corp Signal adaptive beam scan velocity modulation.
US6580327B1 (en) * 2002-02-28 2003-06-17 Adtran, Inc. Electronically controllable slope equalizer
GB2395849B (en) * 2002-11-26 2005-11-09 Wolfson Ltd Improved analogue selector

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS623519A (en) 1985-06-28 1987-01-09 Jeol Ltd Sawtooth wave generating circuit
US5708376A (en) * 1995-07-12 1998-01-13 Fuji Xerox Co., Ltd. Variable-gain amplifying device
US20060176112A1 (en) * 2001-10-05 2006-08-10 Toshifumi Nakatani Variable gain amplifying apparatus and wireless communication apparatus
US7342442B2 (en) * 2001-10-05 2008-03-11 Matsushita Electric Industrial Co., Ltd. Variable gain amplifying apparatus and wireless communication apparatus
US20050264360A1 (en) 2004-05-27 2005-12-01 Ma Fan Y Resistor and switch-minimized variable analog gain circuit
US20120249235A1 (en) * 2008-12-19 2012-10-04 Cambridge Silicon Radio Limited Low distortion amplifer

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
International Search Report in PCT/GB2009/051177 dated Apr. 12, 2009, 3 pages.

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9184713B2 (en) * 2008-12-19 2015-11-10 Qualcomm Technologies International, Ltd. Low distortion amplifier
US20120249235A1 (en) * 2008-12-19 2012-10-04 Cambridge Silicon Radio Limited Low distortion amplifer
US8674743B1 (en) * 2010-06-14 2014-03-18 Marvell International Ltd. Asymmetric correction circuit with negative resistance
US20120127151A1 (en) * 2010-11-19 2012-05-24 Rohm Co., Ltd. Power supply device, liquid crystal drive device, and liquid crystal display device
US9444417B2 (en) 2013-03-15 2016-09-13 Qorvo Us, Inc. Weakly coupled RF network based power amplifier architecture
US9294046B2 (en) * 2013-03-15 2016-03-22 Rf Micro Devices (Cayman Islands), Ltd. RF power amplifier with PM feedback linearization
US9391565B2 (en) 2013-03-15 2016-07-12 TriQuint International PTE, Ltd. Amplifier phase distortion correction based on amplitude distortion measurement
US9444411B2 (en) 2013-03-15 2016-09-13 Qorvo Us, Inc. RF power amplifier with total radiated power stabilization
US20140266459A1 (en) * 2013-03-15 2014-09-18 Rf Micro Devices (Cayman Islands), Ltd. Rf power amplifier with pm feedback linearization
US9742359B2 (en) 2013-03-15 2017-08-22 Qorvo International Pte. Ltd. Power amplifier with wide dynamic range am feedback linearization scheme
US9748905B2 (en) 2013-03-15 2017-08-29 Qorvo Us, Inc. RF replicator for accurate modulated amplitude and phase measurement
US9966905B2 (en) 2013-03-15 2018-05-08 Qorvo Us, Inc. Weakly coupled based harmonic rejection filter for feedback linearization power amplifier
US10320339B2 (en) 2013-03-15 2019-06-11 Qirvo US, Inc. Weakly coupled based harmonic rejection filter for feedback linearization power amplifier
US11177064B2 (en) 2013-03-15 2021-11-16 Qorvo Us, Inc. Advanced 3D inductor structures with confined magnetic field
US11190149B2 (en) 2013-03-15 2021-11-30 Qorvo Us, Inc. Weakly coupled based harmonic rejection filter for feedback linearization power amplifier
US9558845B2 (en) * 2015-03-25 2017-01-31 Qualcomm Incorporated Sampling network and clocking scheme for a switched-capacitor integrator
US9923532B2 (en) 2016-04-06 2018-03-20 Nxp Usa, Inc. System and method to directly couple to analog to digital converter having lower voltage reference

Also Published As

Publication number Publication date
CN102217192A (en) 2011-10-12
GB0820041D0 (en) 2008-12-10
US20110260901A1 (en) 2011-10-27
GB2464770A (en) 2010-05-05
GB2464770B (en) 2013-03-27
EP2351213B1 (en) 2014-05-07
CN102217192B (en) 2014-01-08
EP2351213A1 (en) 2011-08-03
WO2010049713A1 (en) 2010-05-06

Similar Documents

Publication Publication Date Title
US8410846B2 (en) Variable gain amplifier
US6882226B2 (en) Broadband variable gain amplifier with high linearity and variable gain characteristic
US7368987B2 (en) Circuit configuration having a feedback operational amplifier
JP4442746B2 (en) Exponential function generator and variable gain amplifier using the same
KR101127461B1 (en) Highly Linear Variable Gain Amplifier
US9231539B2 (en) Amplifier, a residue amplifier, and an ADC including a residue amplifier
US5872475A (en) Variable attenuator
KR20070038126A (en) Programmable low noise amplifier and method
US7755415B2 (en) Transistor cell and related circuits and methods
KR20100058412A (en) Method and system for variable-gain amplifier
US20080297258A1 (en) Variable impedance circuit; and variable impedance system, filter circuit, amplifier, and communication system using the same
EP2368321B1 (en) Low distortion amplifier
WO2014182876A1 (en) Differential sampling circuit with harmonic cancellation
US10581395B2 (en) Variable gain amplifier
JP2003168937A (en) Variable gain type differential amplifying circuit, and multiplying circuit
US7196573B1 (en) Systems and methods for creating complex poles
Xiang et al. Tunable linear MOS resistor for RF applications
US20200212857A1 (en) Methods and apparatus for an operational amplifier with a variable gain-bandwidth product
US7145395B2 (en) Linear transconductance cell with wide tuning range
JP5695015B2 (en) Buffer circuit
CN113595512B (en) High linearity low noise amplifier
US20210099144A1 (en) Variable gain amplifier
JP2008028766A (en) Electronic circuit, amplifier circuit and communication system mounted therewith
WO2017019541A1 (en) Boosting amplifier gain without clipping signal envelope
EP3329589A1 (en) Boosting amplifier gain without clipping signal envelope

Legal Events

Date Code Title Description
AS Assignment

Owner name: CAMBRIDGE SILICON RADIO LIMITED, UNITED KINGDOM

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:ZARE-HOSEINI, HASHEM;REEL/FRAME:026579/0777

Effective date: 20110624

STCF Information on status: patent grant

Free format text: PATENTED CASE

CC Certificate of correction
AS Assignment

Owner name: QUALCOMM TECHNOLOGIES INTERNATIONAL, LTD., UNITED

Free format text: CHANGE OF NAME;ASSIGNOR:CAMBRIDGE SILICON RADIO LIMITED;REEL/FRAME:036663/0211

Effective date: 20150813

FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

FPAY Fee payment

Year of fee payment: 4

MAFP Maintenance fee payment

Free format text: PAYMENT OF MAINTENANCE FEE, 8TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1552); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

Year of fee payment: 8

MAFP Maintenance fee payment

Free format text: PAYMENT OF MAINTENANCE FEE, 12TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1553); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

Year of fee payment: 12