CN104347762B - Preparation method of LED (Light-Emitting Diode) film chip with meltback layer and structure - Google Patents
Preparation method of LED (Light-Emitting Diode) film chip with meltback layer and structure Download PDFInfo
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- CN104347762B CN104347762B CN201410483425.2A CN201410483425A CN104347762B CN 104347762 B CN104347762 B CN 104347762B CN 201410483425 A CN201410483425 A CN 201410483425A CN 104347762 B CN104347762 B CN 104347762B
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- 238000002360 preparation method Methods 0.000 title claims abstract description 22
- 239000000758 substrate Substances 0.000 claims abstract description 56
- 239000012895 dilution Substances 0.000 claims abstract description 14
- 238000010790 dilution Methods 0.000 claims abstract description 14
- 238000000137 annealing Methods 0.000 claims abstract description 12
- 229910052751 metal Inorganic materials 0.000 claims abstract description 12
- 239000002184 metal Substances 0.000 claims abstract description 12
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 7
- 239000000956 alloy Substances 0.000 claims abstract description 7
- 238000002844 melting Methods 0.000 claims abstract description 6
- 230000008018 melting Effects 0.000 claims abstract description 6
- 239000010410 layer Substances 0.000 claims description 169
- 239000010409 thin film Substances 0.000 claims description 52
- 239000000463 material Substances 0.000 claims description 24
- 239000011241 protective layer Substances 0.000 claims description 21
- 238000000034 method Methods 0.000 claims description 17
- 239000000155 melt Substances 0.000 claims description 15
- 238000000151 deposition Methods 0.000 claims description 12
- 230000004888 barrier function Effects 0.000 claims description 11
- 229910052697 platinum Inorganic materials 0.000 claims description 10
- 229910052802 copper Inorganic materials 0.000 claims description 8
- 229910052737 gold Inorganic materials 0.000 claims description 8
- 229910052709 silver Inorganic materials 0.000 claims description 7
- 229910052719 titanium Inorganic materials 0.000 claims description 7
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- 238000010276 construction Methods 0.000 claims description 4
- 238000009792 diffusion process Methods 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 238000002161 passivation Methods 0.000 claims description 4
- 229910052721 tungsten Inorganic materials 0.000 claims description 4
- 229910052804 chromium Inorganic materials 0.000 claims description 3
- 239000010408 film Substances 0.000 claims description 3
- 229910052738 indium Inorganic materials 0.000 claims description 3
- 239000011229 interlayer Substances 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims description 3
- 238000009966 trimming Methods 0.000 claims description 3
- 229910001092 metal group alloy Inorganic materials 0.000 claims description 2
- 239000002356 single layer Substances 0.000 claims description 2
- 238000013517 stratification Methods 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 6
- 230000000903 blocking effect Effects 0.000 abstract 1
- 238000010309 melting process Methods 0.000 abstract 1
- 230000002035 prolonged effect Effects 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 230000008020 evaporation Effects 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 238000007731 hot pressing Methods 0.000 description 2
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000000018 DNA microarray Methods 0.000 description 1
- 229910019263 Sn—Cu—In Inorganic materials 0.000 description 1
- 230000008033 biological extinction Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000007499 fusion processing Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000007788 roughening Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention discloses a preparation method of an LED (Light-Emitting Diode) film chip with a meltback layer and a structure. The preparation method is characterized in that an LED film can be self-flattened in the melting process of the meltback layer by designing the meltback layer which is formed by low-melting-point metal below the LED film and melting the meltback layer through annealing processing after an original growing substrate is removed, so that the effect of sufficiently releasing the residual stress in the LED film is achieved, the reliability and the stability of an LED chip are improved, and the service life of the LED chip is prolonged. Meanwhile, the invention discloses a structure which is obtained from the preparation method, and the structure comprises a substrate, wherein the LED film which comprises a buffer layer, an n-type layer, a luminous layer and a P-type layer is arranged on the substrate, a reflecting contact layer, a blocking layer, a dilution protecting layer and an alloy layer are sequentially deposited on the LED film, and a base-plate front-surface protecting layer, a base plate, a base-plate back-surface protecting layer and a contact layer are arranged on the alloy layer.
Description
Technical field
The invention belongs to semiconductor photoelectric device manufacturing technology field, thin more particularly, to a kind of LED with melt back layer
The preparation method and its structure of membrane DNA chip.
Background technology
Semiconductor light-emitting-diode（LED）Be as solid-state cold light source of new generation, with efficiency high, life-span length, small volume,
The low advantage of voltage, is preferable energy saving environmental protection product.At present, LED is widely used in mobile phone backlight, state instruction, traffic letter
The fields such as signal lamp, large screen display, outdoor lighting, with the raising of its luminous efficiency and unfailing performance, GaN base LED is used in illumination
Huge numbers of families are gradually being entered into.
The epitaxial growth of GaN base LED thin film is generally all using metal-organic chemical vapor deposition equipment technology at present
（MOCVD）Carry out in foreign substrate.The usual extinction of above-mentioned growth substrates and heat conductivility is poor, therefore to the bright of LED chip
Degree and radiating have a significant impact.LED thin film is transferred to into the preferable substrate of heat conduction, electric conductivity according to film transferring technique
Former growth substrates are gone up and removed, then can effectively improve the heat dispersion of LED chip, can also be by preparing reflecting mirror, surface
The modes such as roughening greatly improve the light extraction efficiency of LED chip.
As current business-like GaN base LED thin film is generally grown in foreign substrate, and deposit between substrate and epitaxial layer
Compared with Macrolattice mismatch and thermal mismatching, so as to introduce larger stress in the epitaxial layer.For the preparation of LED thin film chips, by
In needing to remove former growth substrates so that in this preparation process, the change of the stress state of LED thin film is more complicated, be difficult to control
System.If the residual stress in LED thin film is excessive, the yield of follow-up chip manufacturing and reliability will be subject to large effect；If
The residual stress of obtained LED chip is excessive, can be affected by expanding with heat and contract with cold of causing of temperature during the use of chip,
Chip is also easy to failure.Therefore, when LED thin film chips are prepared, how the residual stress effectively discharged in LED thin film is
One technical barrier of urgent need to resolve.Method release stress of the CN201110026143 patents using repeatedly transfer, it is this multiple
The method of transfer can fully discharge stress really, but bring some new problems, such as：Chip moves a problem（Cause follow-up
Device photoetching etc. is difficult to fully aligned）With single chip bulge（Chip subsequent technique is caused to rupture）The problems such as, this all can shadow
Ring yield and the reliability of chip.
The content of the invention：
First purpose of the present invention is to provide a kind of preparation method of the LED thin film chips with melt back layer, to have
Residual stress in effect release LED thin film, improves stability, reliability, life-span and the yield of LED chip, reduces production cost.
Second object of the present invention is to provide a kind of structure of LED thin film chips, residual in LED thin film effectively to discharge
Residue stress, improves stability, reliability, life-span and the yield of LED chip, reduces production cost.
What first purpose of the present invention was realized in：
A kind of preparation method of the LED thin film chips with melt back layer, is characterized in that：Comprise the following steps：
A, offer substrate, grow including including cushion, n-layer, luminescent layer and P-type layer over the substrate successively
LED thin film；
B, reflecting contact layer, barrier layer, dilution protective layer, melt back layer and the first key is sequentially depositing on the LED thin film
Close layer；
C, offer substrate, are sequentially depositing substrate front side protective layer, the second bonded layer in the front of the substrate, in substrate
Reverse side is sequentially depositing substrate back side protective layer, contact layer；
D, on first bonded layer and/or the second bonded layer depositing inter-layer；
E, using wafer thermocompression bonding method by intermediate layer, the first bonded layer and the second bonded layer by LED thin film and base
Plate binds together, and the temperature of the wafer thermocompression bonding is less than the fusing point of melt back layer；
F, the removal substrate, complete thin film transfer, LED thin film is upside down on substrate；
The convered structure of G, the LED thin film that step F is obtained and substrate is made annealing treatment, and melts melt back layer, with
Release stress；
After H, annealing, then N-type layer surface coarsening, trimming, passivation, Ohmic electrode preparation is carried out, LED core films are obtained
Piece.
In step B and step D, the fusing point in the intermediate layer is less than the fusing point of melt back layer, while the melt back layer and centre
Layer is metal or alloy of the fusing point less than 400 DEG C of low melting point.
Preferably, when carrying out step E, temperature is risen to more than the fusing point in intermediate layer, below the fusing point of melt back layer so that in
Interbed is in molten state in binding, i.e. fusing binding.In binding procedure, intermediate layer and the first bonded layer, the second key is made
The abundant Reaction-diffusion terms of layer are closed, secondary alloy-layer is formed.
Preferably, carry out during step G being raised to temperature and be higher by more than the fusing point of melt back layer 0 to 150 DEG C, and keep 1 to arrive
100min。
Preferably, in the annealing process of step G, the melt back layer is mutually reciprocal with the secondary alloy-layer, dilution protective layer
Alloy-layer should have been diffuseed to form or, the physical and chemical performance of the alloy-layer keeps stable at 600 DEG C.
Preferably, the material on the barrier layer be Cr, Ti, Pt, Au, Ni, W single-layer metal and metal alloy TiW,
The laminated construction of any two or more materials in FeNiCr, FeCoCr, such as：Cr/Pt、Cr/Au、Pt/Au/TiW、Pt/Au.
Preferably, described dilution protective layer is the laminated construction of one or more metal in Ag, Ti, Pt, Ni, W, Cu.
Preferably, the melt back layer has good wellability and adhesiveness with first bonded layer.
Preferably, the material in the intermediate layer is In, and the material of the melt back layer is Sn, Au20Sn80In any one.
Preferably, the material in the intermediate layer is Sn, and the material of the melt back layer is Au20Sn80。
Preferably, the material of first bonded layer is any one in Cu, Au, Ag, Al.
Preferably, second bonded layer is any one in Ti, Cu, Pt, Au, Al, Ag.
The reflecting contact layer, barrier layer in step B, C, dilution protective layer, melt back layer, the first bonded layer, intermediate layer,
Second bonded layer, substrate front side protective layer, substrate back side protective layer and contact layer can be by evaporation, sputtering, electric plating methods
Obtain.
What second object of the present invention was realized in：
A kind of structure of the LED thin film chips with melt back layer, including substrate, is characterized in that：It is formed with over the substrate
Including the LED thin film including cushion, n-layer, luminescent layer and P-type layer, be sequentially formed with LED thin film reflecting contact layer,
Barrier layer, dilution protective layer, alloy-layer, are formed with substrate front side protective layer, substrate, substrate back side protection on the alloy-layer
Layer and contact layer.
Preferably, during the material of the alloy-layer is Ag-Sn-Au-In, Ag-Sn-Cu-In or Ag-Sn-Cu-In-Ti
Any one.
Preferably, the thickness on the barrier layer is 0.2 μm ~ 5 μm.
Preferably, the thickness of the dilution protective layer is 0.5 μm ~ 5 μm.
Preferably, the thickness of the mixed layer is 2 μm ~ 15 μm.
The present invention has the melt back layer formed by low-melting-point metal by the envisaged underneath in LED thin film, and primary removing
After long substrate by annealing make melt back layer melt so that LED thin film in melt back layer fusion process can self-planarization,
So as to reach the effect of residual stress in abundant release LED thin film.The present invention only increases the evaporation of melt back layer and moves back with together with
Firer's sequence, process is simple, low cost.
Why the present invention designs the metal or alloy that melt back layer is low melting point, is because the fusing point mistake if melt back layer
Height, then, when carrying out annealing to LED chip and melting melt back layer, can affect the light of LED chip because annealing temperature is too high
Electrical property.
Why the present invention selects intermediate layer to be fusing point less than the material and wafer hot pressing key of melt back layer fusing point and be less than
Carry out at a temperature of melt back layer fusing point, be in order to avoid melt back layer carry out wafer hot pressing key and when it is just mutual with adjacent metal
Reaction-diffusion terms/formation high-melting-point alloy.Otherwise, the effect of melt back layer release stress is just failed, and design melt back Rotating fields are also
Lose meaning.
Therefore, the present invention is with the light that can simply, substantially effectively discharge residual stress in LED thin film, improve LED chip
Electrical property, reliability, stability and life-span, the advantage for simplifying manufacture process, reducing production cost.
Description of the drawings：
Fig. 1 is the structural representation of embodiment 1；
Fig. 2 is the section of structure of step 1 in embodiment 1；
Fig. 3 is the section of structure of step 2 in embodiment 1；
Fig. 4 is the section of structure of step 3 in embodiment 1；
Fig. 5 is the section of structure of step 4 in embodiment 1；
Fig. 6 is the section of structure of step 5 in embodiment 1；
Fig. 7 is the section of structure of step 5 in embodiment 1；
Fig. 8 is the section of structure of step 6 in embodiment 1；
Fig. 9 is the section of structure of step 7 in embodiment 1.
Specific embodiment：
Below in conjunction with the drawings and specific embodiments, the present invention is described in detail.It should be noted that, the accompanying drawing of the present invention
Using the non-accurate ratio for simplifying very much, only to convenient, the apparent aid illustration present invention.
Embodiment 1：
（1）：As shown in Figure 2, there is provided substrate 10, LED thin film 11 is grown over the substrate, wherein LED thin film 11 includes
Cushion, n-layer, luminescent layer and P-type layer.Preferably, the substrate 10 is sapphire, and the LED thin film is that Al-Ca-In-N is thin
Film, using metallochemistry vapour deposition（MOCVD）Obtained by method.In other embodiments of the invention, the substrate 10 also may be used
For in Si, SiC, GaN, GaAs or AlN any one, the LED thin film 11 is not limited to Al-Ca-In-N thin film, it is also possible to
It is the AlGaInP thin film of other semiconductive thin film extensions such as in gallium arsenide substrate for needing to discharge stress.
（2）：As shown in figure 3, using the method for electron beam evaporation sequentially form on LED thin film 11 reflecting contact layer 12,
Barrier layer 13, dilution protective layer 14, melt back layer 15 and the first bonded layer 16.The reflecting contact layer 12, as the term suggests, i.e., with
GaN base LED thin film has good ohm contact performance, has high reflectance again, has had both the work of reflecting layer and contact layer
With in the present embodiment, its material is Ag, and thickness is 0.05 μm ~ 0.5 μm.The barrier layer 13 and the effect of dilution protective layer 14
It is to stop that the melt back layer metal and metallic intermediate layer of low melting point diffuse to the destruction contact performance of reflecting contact layer 12 and reflectance,
In the present embodiment, the material on barrier layer 13 is Cr/Pt or Pt/Au/Pt/TiW, and thickness is 0.2 μm ~ 2 μm, the dilution protection
The material of layer 14 is Ag or Cu, and thickness is 2 μm ~ 3 μm.The material of melt back layer described in the present embodiment 15 be Sn, described first
The material of bonded layer 16 is Au.
（3）：As shown in Figure 4, there is provided substrate 20, the front of the substrate 20 be sequentially depositing substrate front side protective layer 21,
Second bonded layer 22, is sequentially depositing substrate back side protective layer 23, contact layer 24 in the reverse side of the substrate.Second bonded layer
For in Ti, Cu, Pt, Au, Al, Ag any one, in the present embodiment the material of the second bonded layer 22 be Ag.
（4）：As shown in figure 5, on first bonded layer 16 and/or the second bonded layer 22 depositing inter-layer 25.Especially
, the fusing point in the intermediate layer 25 is less than the fusing point of melt back layer 15, and its material is the metal or alloy less than 400 degrees Celsius.
Only intermediate layer 25 is deposited on the surface of the second key and layer 22 in the present embodiment, the material in intermediate layer 25 is In.
（5）：Will be described by intermediate layer 25, the first bonded layer 16 and the second bonded layer 22 using wafer thermocompression bonding method
LED thin film 11 is bound together with substrate 20.As shown in fig. 6, carrying out described（5）When, need to paste LED thin film 11 with substrate 20
It is combined, then completes under certain temperature and pressure.Particularly, it is described（5）In the temperature less than 16 fusing point of melt back layer
Under carry out.In the present embodiment, wafer thermocompression bonding is carried out described in temperature more than the fusing point of intermediate layer, below melt back layer fusing point
（5）When, intermediate layer is in molten state.Complete described（5）Afterwards, intermediate layer 25 is filled with the first bonded layer 16, the second bonded layer 22
Divide Reaction-diffusion terms, form secondary alloy-layer 30, as shown in Figure 7；
（6）：As shown in figure 8, removing the substrate 10.（So far, thin film transfer is completed, LED thin film 11 is upside down in substrate
Upper 20）Due to losing tensile stress or compressive stress of the substrate 10 to LED thin film, before and after removing the substrate 10, LED thin film 11
Stress state there occurs great changes, it will usually bend.
（7）：As described in Figure 9, will be described（6）The LED thin film 11 for obtaining and the convered structure of substrate 20 are made annealing treatment, and are made
Melt back layer 16 melts.It is described（7）In annealing process, the melt back layer 16 is mutual with the secondary alloy-layer 30, dilution protective layer 14
Reaction has diffuseed to form alloy-layer 40.The physical and chemical performance of the alloy-layer 40 keeps stable at 600 DEG C.
Along with the fusing of melt back layer 16,11 self-planarization of LED thin film on melt back layer 16, stress is so as to obtaining
Abundant release.
（8）：Continue to complete and prepare the follow-up work step of light emitting diode (LED) chip with vertical structure, including N-type layer surface coarsening, trimming, passivation,
It is prepared by Ohmic electrode.The LED chip that is eventually fabricated is as shown in figure 1, wherein 50 being passivation layer, 60 being surface coarsening layer, 70 being that N is electric
Pole.
Claims (10)
1. a kind of preparation method of the LED thin film chips with melt back layer, it is characterised in that：Comprise the following steps：
A, offer substrate, grow thin including the LED including cushion, n-layer, luminescent layer and P-type layer over the substrate successively
Film；
B, reflecting contact layer, barrier layer, dilution protective layer, melt back layer and the first bonded layer is sequentially depositing on the LED thin film；
The melt back layer is metal or alloy of the fusing point less than 400 DEG C of low melting point；
C, offer substrate, are sequentially depositing substrate front side protective layer, the second bonded layer in the front of the substrate, in the reverse side of substrate
It is sequentially depositing substrate back side protective layer, contact layer；
D, on first bonded layer and/or the second bonded layer depositing inter-layer, the fusing point in the intermediate layer is less than melt back layer
Fusing point；
E, LED thin film and substrate is tied up by intermediate layer, the first bonded layer and the second bonded layer using wafer thermocompression bonding method
It is scheduled on together, the temperature of the wafer thermocompression bonding is less than the fusing point of melt back layer；
F, the removal substrate, complete thin film transfer, LED thin film is upside down on substrate；
The convered structure of G, the LED thin film that step F is obtained and substrate is made annealing treatment, and melts melt back layer, to discharge
Stress；
After H, annealing, then N-type layer surface coarsening, trimming, passivation, Ohmic electrode preparation is carried out, the LED of vertical stratification is obtained
Thin film chip.
2. preparation method according to claim 1, it is characterised in that：When carrying out step E, temperature is risen to into the molten of intermediate layer
More than point, below the fusing point of melt back layer so that intermediate layer is in molten state in binding, i.e. fusing binding；In binding procedure
In, intermediate layer and the first bonded layer, the abundant Reaction-diffusion terms of the second bonded layer are made, secondary alloy-layer is formed.
3. preparation method according to claim 1, it is characterised in that：In the annealing process of step G, the melt back layer with
The secondary alloy-layer, dilution protective layer react to each other or have diffuseed to form alloy-layer, and the physical and chemical performance of the alloy-layer is at 600 DEG C
It is lower to keep stable.
4. preparation method according to claim 1, it is characterised in that：Temperature is raised to when carrying out step G and is higher by melt back layer
Fusing point more than 0 to 150 DEG C, and keep 5 to 100 min.
5. preparation method according to claim 1, it is characterised in that：The material on the barrier layer be Cr, Ti, Pt, Au,
The laminated construction of any two or more materials in Ni, W single-layer metal and metal alloy TiW, FeNiCr, FeCoCr.
6. preparation method according to claim 1, it is characterised in that：Described dilution protective layer be Ag, Au, Ti, Pt,
The laminated construction of one or more metal in Ni, W, Cu.
7. preparation method according to claim 1, it is characterised in that：The material in the intermediate layer be In, the melt back layer
Material be Sn, Au20Sn80 in any one.
8. preparation method according to claim 1, it is characterised in that：The material in the intermediate layer be Sn, the melt back layer
Material be Au20Sn80.
9. preparation method according to claim 1, it is characterised in that：The material of first bonded layer be Cu, Au, Ag,
In Al any one.
10. preparation method according to claim 1, it is characterised in that：Second bonded layer be Ti, Cu, Pt, Au, Al,
In Ag any one.
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| CN201410483425.2A CN104347762B (en) | 2014-09-22 | 2014-09-22 | Preparation method of LED (Light-Emitting Diode) film chip with meltback layer and structure |
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| CN105489717A (en) * | 2016-01-11 | 2016-04-13 | 西安交通大学 | Fabrication process for vertically structured light emitting diode (LED) chip |
| CN108767083B (en) * | 2018-05-30 | 2021-01-26 | 河源市众拓光电科技有限公司 | Stress-adjustable vertical-structure LED chip and preparation method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102694089A (en) * | 2012-06-06 | 2012-09-26 | 杭州士兰明芯科技有限公司 | Bonding method for light-emitting diode (LED) chip and LED chip |
| CN103560193A (en) * | 2013-08-29 | 2014-02-05 | 南昌黄绿照明有限公司 | Vertical structure light emitting diode chip with low cost and preparation method thereof |
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| US20130334561A1 (en) * | 2012-06-19 | 2013-12-19 | Hsiu-Jen Lin | Method for bonding led wafer, method for manufacturing led chip and bonding structure |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102694089A (en) * | 2012-06-06 | 2012-09-26 | 杭州士兰明芯科技有限公司 | Bonding method for light-emitting diode (LED) chip and LED chip |
| CN103560193A (en) * | 2013-08-29 | 2014-02-05 | 南昌黄绿照明有限公司 | Vertical structure light emitting diode chip with low cost and preparation method thereof |
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