CN104347703B - Metal-oxide semiconductor (MOS) MOS device and its manufacture method - Google Patents
Metal-oxide semiconductor (MOS) MOS device and its manufacture method Download PDFInfo
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- CN104347703B CN104347703B CN201310311598.1A CN201310311598A CN104347703B CN 104347703 B CN104347703 B CN 104347703B CN 201310311598 A CN201310311598 A CN 201310311598A CN 104347703 B CN104347703 B CN 104347703B
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- 238000000034 method Methods 0.000 title claims abstract description 17
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 15
- 239000004065 semiconductor Substances 0.000 title abstract description 6
- 229910044991 metal oxide Inorganic materials 0.000 title abstract description 3
- 150000004706 metal oxides Chemical class 0.000 title abstract description 3
- 239000000758 substrate Substances 0.000 claims abstract description 48
- 239000012535 impurity Substances 0.000 claims description 13
- 238000005530 etching Methods 0.000 claims description 3
- 238000002955 isolation Methods 0.000 abstract description 8
- 230000000694 effects Effects 0.000 abstract description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 230000005669 field effect Effects 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0688—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions characterised by the particular shape of a junction between semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
Abstract
The present invention provides a kind of metal-oxide semiconductor (MOS) MOS device and its manufacture method, and device includes: substrate, and described substrate is provided with the source electrode in cylinder and drain electrode；On described substrate, the cylinder being provided with ring-shaped section and ring-shaped is enclosed in the outside of described source electrode and described drain electrode, and the cylinder of described ring-shaped section and ring-shaped does not contacts with described source electrode and described drain electrode；The conduction type of the cylinder of described ring-shaped section and ring-shaped is contrary with the electric conductivity of described source electrode and described drain electrode；Described substrate surface, the zone line of described source electrode and described drain electrode is provided with the first insulating medium layer；It is provided with grid conducting layer on described first insulating medium layer surface.The embodiment of the present invention efficiently solves the technical problem of the Guard band isolation effect difference of MOS device in prior art.
Description
Technical field
The present invention relates to field of semiconductor device preparation, particularly relate to a kind of Metal-oxide-semicondutor MOS device and
Its manufacture method.
Background technology
Metal-oxide layer-quasiconductor-field-effect transistor (Metal-Oxide-Semiconductor Field-Effect
Transistor, MOSFET) it is a kind of field-effect transistor (field-that can be widely used in analog circuit and digital circuit
Effect transistor).MOSFET is different according to the polarity of its " passage ", can be divided into the MOSFET of n-type Yu p-type,
It is called for short NMOS and PMOS.
In prior art, for ensureing that NMOS with PMOS each works alone, when prepared by device, generally use protection band
(Guard band) isolate, i.e. in the source of device, periphery, drain region formed a straight-flanked ring, size just by source, drain region surround.By
The impurity doping contrary with source, drain region conduction type is used, with source, drain region formation PN junction in structure, therefore in Guard band
Guard band isolation also referred to as PN junction isolation.
But, in low-voltage aluminum gate MOS technique preparation process, the concentration of P+ impurity and the concentration of N+ impurity are the highest, by
This Guard band formed is isolated into the Zener diode that structure is P+N+.This structure is high due to doping content, and PN junction is very
Narrow, little backward voltage, it is possible to produce strong electric field in space-charge region, produces substantial amounts of current-carrying in causing space-charge region
Son, and form electric current, make Guard band isolation effect be deteriorated.
Summary of the invention
The present invention provides a kind of Metal-oxide-semicondutor MOS device and its manufacture method, in order to solve prior art
When manufacturing MOS device, the technical problem of Guard band isolation effect difference.
On the one hand, the embodiment of the present invention provides a kind of Metal-oxide-semicondutor MOS device, including:
Substrate, described substrate is provided with the source electrode in cylinder and drain electrode；
On described substrate, the cylinder being provided with ring-shaped section and ring-shaped, and described cross section are enclosed in the outside of described source electrode and described drain electrode
Cylinder ringwise does not contacts with described source electrode and described drain electrode；
The conduction type of the cylinder of described ring-shaped section and ring-shaped is contrary with the electric conductivity of described source electrode and described drain electrode；
Described substrate surface, the zone line of described source electrode and described drain electrode is provided with the first insulating medium layer；
It is provided with grid conducting layer on described first insulating medium layer surface.
On the other hand, the embodiment of the present invention provides the manufacture method of a kind of Metal-oxide-semicondutor MOS device, bag
Include:
The first insulating medium layer is formed at substrate surface；
Described first insulating medium layer is formed grid conducting layer；
Described first insulating medium layer and described grid conducting layer are performed etching, with in described substrate surface fixed area
Described first insulating medium layer of interior reservation and described grid conducting layer；
At substrate surface, corresponding region, described grid conducting layer both sides carries out impurity and diffuses to form the source electrode in cylinder and leakage
Pole；
Enclose over the substrate set the outside of described source electrode and described drain electrode carry out impurity diffuse to form with described source electrode and
Described drain electrode does not contacts and the cylinder of ring-shaped section and ring-shaped, the conduction type of the cylinder of described ring-shaped section and ring-shaped and described source electrode and institute
The electric conductivity stating drain electrode is contrary.
The Metal-oxide-semicondutor MOS device that the present invention provides and its manufacture method, by enclosing the source of setting on substrate
Pole carry out with the outside of drain electrode impurity diffuse to form with source electrode and drain electrode do not contact and the cylinder of ring-shaped section and ring-shaped, this cross section is ring
The conduction type of the cylinder of shape is contrary with the electric conductivity of source electrode and drain electrode, the Guard band of this structure, can improve device
Isolation effect.
Accompanying drawing explanation
The structural representation of one embodiment of Metal-oxide-semicondutor MOS device that Fig. 1 provides for the present invention；
The stream of a kind of Metal-oxide-semicondutor one embodiment of MOS device manufacture method that Fig. 2 provides for the present invention
Cheng Tu.
Detailed description of the invention
The invention provides the structure of a kind of Metal-oxide-semicondutor MOS device, this MOS device structure is specifically wrapped
Include: substrate, source electrode, drain electrode, cylinder, the first insulating medium layer and grid conducting layer.
This MOS device structure is as follows.
Substrate is provided with the source electrode in cylinder and drain electrode；Should source electrode in cylinder and drain electrode cylinder one end near or
Being flush to substrate surface, the cylinder other end extends to substrate interior；The shapes such as the cross section of this cylinder can be rectangle, circular；
On substrate, enclose the cylinder being provided with a ring-shaped section and ring-shaped, this post in the outside of above-mentioned source electrode and drain electrode region
The ring section, one end of body is close or is flush to substrate surface, and cylinder other end ring section extends to substrate interior, and this section
Face cylinder ringwise and above-mentioned source electrode and drain electrode do not contact, i.e. the internal ring side of the cylinder of this ring-shaped section and ring-shaped with its in comprise
Source electrode and drain electrode in corresponding side there is certain distance；The ring section of this cylinder can be the shape such as rectangle, circle
Ring section；
The conduction type of the cylinder of this ring-shaped section and ring-shaped is contrary with the electric conductivity of source electrode and drain electrode；That is, when source electrode and leakage
The conduction type of pole is N-type (electronic conduction), then the conduction type of the cylinder of this ring-shaped section and ring-shaped is p-type (hole conduction)；Or
Person, when the conduction type of source electrode and drain electrode is p-type (hole conduction), then the conduction type of the cylinder of this ring-shaped section and ring-shaped is N-type
(electronic conduction)；
Zone line between substrate surface, above-mentioned source electrode and drain electrode is (such as source electrode and the adjacent marginal area of drain electrode
At the zone line that substrate surface surrounds) it is provided with the first insulating medium layer；This first insulating medium layer can be silicon dioxide,
Silicon nitride etc.；
Being provided with grid conducting layer on the first insulating medium layer surface, this grid conducting layer can be polysilicon, various
Metal；This grid conducting layer and above-mentioned first insulating medium layer cooperatively constitute the grid structure of this MOS device.
Optionally, on the basis of the MOS device base structure in combining invention as described above, Fig. 1 gives the most in detail
Go out the structural representation of a specific embodiment of Metal-oxide-semicondutor MOS device in the present invention.Such as Fig. 1 institute
Showing, this MOS device structure specifically includes: substrate 101, source electrode 102, drain electrode 103, cylinder the 104, first insulating medium layer 105 and
Grid conducting layer 106.
MOS device shown in Fig. 1 is on the basis of the MOS structure of above-mentioned basis, and concrete structure can be as follows.
It is provided with the source electrode 102 in cylinder and drain electrode 103 on the substrate 101；It is somebody's turn to do the source electrode 102 in cylinder and drain electrode 103
Cylinder one end near or be flush to substrate 101 surface, it is internal that the other end extends to substrate 101；This source electrode 102 and drain electrode 103
Its cylinder cross section of sectional cylinder specifically can be rectangle.
On substrate 101, enclose in the outside of above-mentioned source electrode 102 and drain electrode 103 regions and be provided with a ring-shaped section and ring-shaped
Cylinder 104, the ring section, one end of this cylinder 104 is close or is flush to substrate 101 surface, cylinder 104 other end ring section
Extend to substrate 101 internal, and the cylinder 104 of this ring-shaped section and ring-shaped does not contacts with above-mentioned source electrode 102 and drain electrode 103, i.e. this section
In the internal ring side of face cylinder 104 ringwise and the source electrode 102 comprised in it and drain electrode 103 there is a spacing in corresponding side
From；The ring section of this cylinder 104 is specially rectangular ring section；And the internal ring side of the cylinder 104 of this ring-shaped section and ring-shaped
Side corresponding in face and above-mentioned source electrode 102 and drain electrode 103 is parallel.
The conduction type of the cylinder 104 of this ring-shaped section and ring-shaped is contrary with the electric conductivity of source electrode 102 and drain electrode 103 (can join
See the above-mentioned description to basis MOS device structure)；
In embodiment illustrated in fig. 1, if this MOS device is PMOS device, then in the cylinder 104 of this ring-shaped section and ring-shaped, cross section
The spacing of internal ring and outer shroud can be 1.5 microns；
The cross section of source electrode 102 and drain electrode 103 can be all a length of 2.5 microns, the rectangle of a width of 2.0 microns, and source electrode 102 He
The corresponding side in the cross section of drain electrode 103 is parallel and at a distance of 3.0 microns；The internal ring side of the cylinder 104 of ring-shaped section and ring-shaped with
The distance between side corresponding in source electrode 102 and drain electrode 103 is 0.6 micron.
If this MOS device is nmos device, then in the cylinder 104 of this ring-shaped section and ring-shaped, between the internal ring in cross section and outer shroud
Away from being 1.3 microns；
The cross section of source electrode 102 and drain electrode 103 can be all a length of 2.3 microns, the rectangle of a width of 1.8 microns, and source electrode 102 He
The corresponding side in the cross section of drain electrode 103 is parallel and at a distance of 3.2 microns；The internal ring side of the cylinder 104 of ring-shaped section and ring-shaped with
The distance between side corresponding in source electrode 102 and drain electrode 103 is 0.6 micron.
On substrate 101 surface, the zone line of above-mentioned source electrode 102 and drain electrode 103 (adjacent such as source electrode 102 and drain electrode 103
The zone line that surrounds on substrate 101 surface of marginal area) be provided with the first insulating medium layer 105；This first dielectric
Layer 105 can be silicon dioxide, silicon nitride etc..
Being provided with grid conducting layer 106 on the first insulating medium layer 105 surface, this grid conducting layer 106 can be many
Crystal silicon, various metal；This grid conducting layer 106 and above-mentioned first insulating medium layer 105 cooperatively constitute this MOS device
Grid structure.
The Metal-oxide-semicondutor MOS device that the present invention provides, encloses in the outside of source electrode and drain electrode and is provided with and this source
Pole and the cylinder of the discontiguous ring-shaped section and ring-shaped that drains, and the conduction type of the cylinder of this ring-shaped section and ring-shaped and source electrode and drain electrode
Electric conductivity is contrary, and the Guard band of this structure can improve the isolation effect to device.
One embodiment of manufacture method of a kind of Metal-oxide-semicondutor MOS device that Fig. 2 provides for the present invention
Flow chart.The method can manufacture the above-mentioned MOS device comprising Fig. 1.As in figure 2 it is shown, the method specifically includes:
S201, forms the first insulating medium layer at substrate surface；
This substrate can be to have lightly doped semi-conducting material, such as silicon, gallium nitride, GaAs etc..Have gently mix at this
Miscellaneous semiconductor substrate surface generates the first insulating medium layer, and this first insulating medium layer can be silicon dioxide, silicon nitride etc..
S202, forms grid conducting layer on the first insulating medium layer；This grid conducting layer can be polysilicon, various gold
Belong to.
S203, performs etching above-mentioned first insulating medium layer and grid conducting layer, (to be somebody's turn to do in substrate surface fixed area
The shapes such as fixed area surface can be rectangle, circular) in retain the first insulating medium layer and grid conducting layer；Retained the
One insulating medium layer and grid conducting layer constitute the grid structure of this MOS device.
S204, at substrate surface, corresponding region, grid conducting layer both sides carry out impurity diffuse to form source electrode in cylinder and
Drain electrode；
At substrate surface, and the impurity identical with substrate conduction type is injected in the position corresponding near grid conducting layer both sides
(this doping is usually heavy doping, and impurity concentration is higher) with formed two source electrodes in cylinder and drain electrode (cylinder as source electrode,
One cylinder is drain electrode).The cross sectional shape of the two cylinder can be, but not limited to as rectangle.
S205, substrate encloses set source electrode carry out with the outside of drain electrode impurity diffuse to form with source electrode and drain electrode do not contact and
The cylinder of ring-shaped section and ring-shaped, the conduction type of the cylinder of this ring-shaped section and ring-shaped is contrary with the electric conductivity of source electrode and drain electrode；
On substrate, enclose set source electrode and drain electrode carry out in the perimeter of interior overall region impurity diffuse to form one with
Source electrode does not contacts and the cylinder of ring-shaped section and ring-shaped with drain electrode, the conduction type of the cylinder of this ring-shaped section and ring-shaped and source electrode and drain electrode
Electric conductivity is contrary, and dopant concentration level is quite (heavy doping).Optionally, the cross section of the cylinder of this ring-shaped section and ring-shaped can be but
Being not limited to rectangular ring section, in the internal ring side of the cylinder of this ring-shaped section and ring-shaped and source electrode and drain electrode, corresponding side can
To be but not limited to parallel relation.
Optionally, when concrete manufacture MOS device, it is also possible to according to MOS type, its corresponding physical dimension is set, and
Size, specifically can be found in as shown in Figure 1 in embodiment, describes the structure of PMOS device or nmos device, does not repeats at this.
The manufacture method of the Metal-oxide-semicondutor MOS device that the present invention provides, encloses in the outside of source electrode and drain electrode
It is provided with and this source electrode and the cylinder of the discontiguous ring-shaped section and ring-shaped that drains, and the conduction type of the cylinder of this ring-shaped section and ring-shaped and source
The electric conductivity of pole and drain electrode is contrary, and the Guard band of this structure can improve the isolation effect to device.
One of ordinary skill in the art will appreciate that: all or part of step realizing above-mentioned each method embodiment can be led to
The hardware crossing programmed instruction relevant completes.Aforesaid program can be stored in a computer read/write memory medium.This journey
Sequence upon execution, performs to include the step of above-mentioned each method embodiment；And aforesaid storage medium includes: ROM, RAM, magnetic disc or
The various media that can store program code such as person's CD.
Last it is noted that various embodiments above is only in order to illustrate technical scheme, it is not intended to limit；To the greatest extent
The present invention has been described in detail by pipe with reference to foregoing embodiments, it will be understood by those within the art that: it depends on
So the technical scheme described in foregoing embodiments can be modified, or the most some or all of technical characteristic is entered
Row equivalent；And these amendments or replacement, do not make the essence of appropriate technical solution depart from various embodiments of the present invention technology
The scope of scheme.
Claims (4)
1. a Metal-oxide-semicondutor MOS device, it is characterised in that including:
Substrate, described substrate is provided with the source electrode in cylinder and drain electrode；
On described substrate, the cylinder being provided with ring-shaped section and ring-shaped is enclosed in the outside of described source electrode and described drain electrode, and described cross section is ring
The cylinder of shape does not contacts with described source electrode and described drain electrode；
The conduction type of the cylinder of described ring-shaped section and ring-shaped is contrary with the electric conductivity of described source electrode and described drain electrode；
Described substrate surface, the zone line of described source electrode and described drain electrode is provided with the first insulating medium layer；
It is provided with grid conducting layer on described first insulating medium layer surface；
The cross section of described source electrode and drain electrode is rectangle, and the cross section of the cylinder of described ring-shaped section and ring-shaped is rectangle, described cross section
The side corresponding with described source electrode and described drain electrode, the internal ring side of cylinder ringwise is parallel；
If described MOS device is PMOS device, in the cylinder of the most described ring-shaped section and ring-shaped, the internal ring in cross section with the spacing of outer shroud is
1.5 micron；The cross section of described source electrode and described drain electrode is a length of 2.5 microns, the rectangle of a width of 2.0 microns, and described source electrode
Parallel with the corresponding side in the cross section of described drain electrode and at a distance of 3.0 microns, the internal ring side of the cylinder of described ring-shaped section and ring-shaped
Distance between the side that face is corresponding with described source electrode and described drain electrode is 0.6 micron.
MOS device the most according to claim 1, it is characterised in that if described MOS device is nmos device, then described section
In the cylinder ringwise of face, the internal ring in cross section and the spacing of outer shroud are 1.3 microns；
The cross section of described source electrode and described drain electrode is a length of 2.3 microns, the rectangle of a width of 1.8 microns, and described source electrode and institute
The corresponding side in the cross section stating drain electrode is parallel and at a distance of 3.2 microns, the internal ring side of the cylinder of described ring-shaped section and ring-shaped with
The distance between side corresponding in described source electrode and described drain electrode is 0.6 micron.
3. the manufacture method of a Metal-oxide-semicondutor MOS device, it is characterised in that including:
The first insulating medium layer is formed at substrate surface；
Described first insulating medium layer is formed grid conducting layer；
Described first insulating medium layer and described grid conducting layer are performed etching, to protect in described substrate surface fixed area
Stay described first insulating medium layer and described grid conducting layer；
At substrate surface, corresponding region, described grid conducting layer both sides carries out impurity and diffuses to form the source electrode in cylinder and drain electrode；
Enclose over the substrate and set the outside of described source electrode and described drain electrode and carry out impurity and diffuse to form and described source electrode and described
Drain electrode does not contacts and the cylinder of ring-shaped section and ring-shaped, the conduction type of the cylinder of described ring-shaped section and ring-shaped and described source electrode and described leakage
The electric conductivity of pole is contrary；
The cross section of described source electrode and drain electrode is rectangle, and the cross section of the cylinder of described ring-shaped section and ring-shaped is rectangle, described cross section
The side corresponding with described source electrode and described drain electrode, the internal ring side of cylinder ringwise is parallel；
If described MOS device is PMOS device, in the cylinder of the most described ring-shaped section and ring-shaped, the internal ring in cross section with the spacing of outer shroud is
1.5 micron；The cross section of described source electrode and described drain electrode is a length of 2.5 microns, the rectangle of a width of 2.0 microns, and described source electrode
Parallel with the corresponding side in the cross section of described drain electrode and at a distance of 3.0 microns, the internal ring side of the cylinder of described ring-shaped section and ring-shaped
Distance between the side that face is corresponding with described source electrode and described drain electrode is 0.6 micron.
Manufacture method the most according to claim 3, it is characterised in that if described MOS device is nmos device, then described section
In the cylinder ringwise of face, the internal ring in cross section and the spacing of outer shroud are 1.3 microns；
The cross section of described source electrode and described drain electrode is a length of 2.3 microns, the rectangle of a width of 1.8 microns, and described source electrode and institute
The corresponding side in the cross section stating drain electrode is parallel and at a distance of 3.2 microns, the internal ring side of the cylinder of described ring-shaped section and ring-shaped with
The distance between side corresponding in described source electrode and described drain electrode is 0.6 micron.
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| CN201310311598.1A CN104347703B (en) | 2013-07-23 | 2013-07-23 | Metal-oxide semiconductor (MOS) MOS device and its manufacture method |
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