CN104347594A - Silicon through hole test structure, silicon through hole test method and silicon through hole formation method - Google Patents
Silicon through hole test structure, silicon through hole test method and silicon through hole formation method Download PDFInfo
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- CN104347594A CN104347594A CN201310315324.XA CN201310315324A CN104347594A CN 104347594 A CN104347594 A CN 104347594A CN 201310315324 A CN201310315324 A CN 201310315324A CN 104347594 A CN104347594 A CN 104347594A
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Abstract
The invention relates to a silicon through hole test structure, a silicon through hole test method and a silicon through hole formation method. The silicon through hole test structure comprises a first metal layer, a second medium layer, a second metal layer and a third metal layer, wherein the first metal layer comprises a first portion arranged on at least a part of an upper surface of a conductive column and a second portion arranged on a part of an upper surface of a first medium layer, the upper surface of the first portion and the upper surface of the conductive column at the corresponding position are consistent in appearance, the second medium layer is arranged on the first medium layer and the first metal layer, a test plug is arranged on the first portion and penetrates through the second medium layer, a contrast plug is arranged on the second portion and penetrates through the second medium layer, the second metal layer is arranged on the upper surface of the test plug and on a part of the upper surface of the second medium layer, the third metal layer is arranged on the upper surface of the contrast plug and on a part of the upper surface of the second medium layer, and the third metal layer and the second metal layer realize insulation. The silicon through hole test structure can test whether the conductive column has surface defects.
Description
Technical field
The present invention relates to semiconductor applications, particularly a kind of silicon through hole test structure and method of testing thereof and formation method.
Background technology
Along with semiconductor technology development, the characteristic size of current semiconductor device has become very little, wish that the quantity increasing semiconductor device in the encapsulating structure of two dimension becomes more and more difficult, therefore three-dimension packaging becomes a kind of method that effectively can improve chip integration.Current three-dimension packaging comprises based on chip-stacked (the Die Stacking) of wire bonding, encapsulation stacking (Package Stacking) and three-dimensional stacked based on silicon through hole (Through Silicon Via, TSV).Three-dimensional stacked technology based on silicon through hole has following three advantages: (1) High Density Integration; (2) shorten the length of electrical interconnection significantly, thus the problems such as the signal delay appeared in two-dimentional system level chip (SOC) technology can be solved well; (3) utilize silicon through hole technology, the chip (as radio frequency, internal memory, logic, MEMS etc.) with difference in functionality can be integrated and realize the multi-functional of packaged chip.Therefore, the described three-dimensional stacked technology of silicon through hole interconnect structure that utilizes becomes a kind of comparatively popular chip encapsulation technology day by day.
The process forming silicon through hole generally includes and forms through hole in a silicon substrate; Insulating barrier is formed in described through-hole surfaces; With the full remaining described through hole of filled with conductive material to form conductive pole.Usual needs carry out wafer to the silicon through hole after formation and permit Acceptance Tests (Wafer Acceptance Test, WAT).
Existing WAT is generally used for test: whether the degree of depth of silicon through hole is qualified, and insulating barrier whether thickness is even, and whether the resistance sizes of conductive pole meets the demands, and whether there is drain conditions etc. between electric conducting material and silicon substrate.But existing WAT does not test the surface condition of conductive pole.But due to technological problems and the reason such as to expand with heat and contract with cold, conductive pole there will be blemish, and once described conductive pole exists blemish, just may cause conductive pole and corresponding conductive structure loose contact, thus causes chip reliability problem.Therefore, how carrying out test to the surface condition of conductive pole in silicon through hole is one of problems faced in the test of current silicon through hole.
Summary of the invention
The problem that the present invention solves is to provide a kind of silicon through hole test structure and method of testing thereof and formation method, realize testing the surface condition of conductive pole, so that can when there is blemish in conductive pole, in time technique is adjusted, avoid the generation again of conductive pole blemish, thus avoid described conductive pole and corresponding conductive structure loose contact, finally improve chip reliability.
For solving the problem, the invention provides a kind of silicon through hole test structure, for the surface condition of conductive pole in test silicon through hole, described conductive pole is arranged in silicon substrate, described silicon substrate upper surface has first medium layer, described first medium layer exposes described conductive pole upper surface, and described silicon through hole test structure comprises:
The first metal layer, comprise the Part I being positioned at least part of described conductive pole upper surface and the Part II being positioned at part described first medium layer upper surface, described Part I upper surface is consistent with the described conductive pole upper surface topography of correspondence position;
Second dielectric layer, is positioned on described first medium layer and described the first metal layer;
Test plug to be positioned on Part I and to run through described second dielectric layer;
Contrast connector to be positioned on Part II and to run through described second dielectric layer;
Second metal level, is positioned at described test plug upper surface and the described second dielectric layer upper surface of part;
3rd metal level, is positioned at described contrast connector upper surface and the described second dielectric layer upper surface of part, and insulate with described second metal level.
Optionally, described test plug is positioned on the center of described Part I, and the material of described contrast connector is identical with the material of described test plug, and the diameter of described contrast connector is identical with the diameter of described test plug.
Optionally, described test plug is multiple, and multiple described test plug is evenly distributed on described Part I periphery; The number of described contrast connector is identical with the number of described test plug, and the distribution shape of multiple described contrast connector is identical with the distribution shape of multiple described test plug.
Optionally, the number of described test plug is greater than or equal to 5.
Optionally, described test plug is multiple, and the number of described Part I and the number of described second metal level are equal to the number of described test plug, described Part I mutually insulated, described second metal level mutually insulated.
Optionally, the diameter range of described conductive pole is 5 μm ~ 50 μm; The diameter range of described test plug is 0.15 μm ~ 2 μm; The diameter range of described contrast connector is 0.15 μm ~ 2 μm.
Optionally, the material of described the first metal layer comprises one or more the combination in any in copper, tungsten, silver, gold, titanium, tantalum and aluminium; The material of described second metal level comprises one or more the combination in any in copper, tungsten, silver, gold, titanium, tantalum and aluminium; The material of described first medium layer comprises silicon dioxide; The material of described second dielectric layer comprises silicon dioxide.
Optionally, the thickness range of described the first metal layer is 1000 dust ~ 5000 dusts; The thickness range of described second metal level is 1000 dust ~ 5000 dusts; The thickness range of described first medium layer is 3000 dust ~ 50000 dusts; The thickness range of described second dielectric layer is 3000 dust ~ 50000 dusts.
For solving the problem, present invention also offers a kind of method of testing of silicon through hole test structure, described silicon through hole test structure is silicon through hole test structure as above, and described method of testing comprises:
By applying voltage or electric current between described Part I and described second metal level, and measure corresponding curtage, obtain the resistance of described test plug, and according to the cross-sectional area of described test plug and resistivity, obtain the length of described test plug;
By applying voltage or electric current between described Part II and described 3rd metal level, and measure corresponding curtage, obtain the resistance of described contrast connector, and according to the cross-sectional area of described contrast connector and resistivity, obtain the length of described contrast connector;
When the length of described test plug is equal with the length of described contrast connector, the upper surface of described silicon through hole and the upper surface flush of described first medium layer; Otherwise there is blemish in described conductive pole.
Optionally, when the length of described test plug is greater than the length of described contrast connector, there is surface indentation or surface gap in described conductive pole; When the length of described test plug is less than the length of described contrast connector, there is rat in described conductive pole.
For solving the problem, present invention also offers a kind of formation method of silicon through hole test structure, described silicon through hole test structure is positioned on silicon through hole, the conductive pole of described silicon through hole is arranged in silicon substrate, described silicon substrate upper surface has first medium layer, described first medium layer exposes described conductive pole upper surface, and described formation method comprises:
The first metal layer is formed at least part of described conductive pole upper surface and part described first medium layer upper surface, described the first metal layer comprises the Part I being positioned at described conductive pole upper surface and the Part II being positioned at described first medium layer upper surface, and described Part I upper surface is consistent with the described conductive pole upper surface topography of correspondence position;
In described first medium layer and described the first metal layer, form second dielectric layer, and formation runs through the test plug of described second dielectric layer and on described Part II, forms the contrast connector running through described second dielectric layer on described Part I;
The second metal level is formed at described test plug upper surface and the described second dielectric layer upper surface of part, and forming the 3rd metal level at described contrast connector upper surface and the described second dielectric layer upper surface of part, described 3rd metal level and described second metal level insulate.
Optionally, adopt same technique to form described test plug and described contrast connector, adopt same technique to form described second metal level and described 3rd metal level.
Compared with prior art, technical scheme of the present invention has the following advantages:
Silicon through hole test structure provided by the present invention comprises the first metal layer, second dielectric layer, test plug, contrast connector, the second metal level and the 3rd metal level; Described the first metal layer comprises the Part I being positioned at least part of described conductive pole upper surface and the Part II being positioned at part described first medium layer upper surface, and described Part I upper surface is consistent with the described conductive pole upper surface topography of correspondence position; Described second dielectric layer is positioned on described first medium layer and described the first metal layer; Described test plug to be positioned on Part I and to run through described second dielectric layer; Described contrast connector to be positioned on described Part II and to run through described second dielectric layer, and described contrast connector upper surface and described test plug upper surface flush; Described second metal level is positioned at described test plug upper surface and the described second dielectric layer upper surface of part; Described 3rd metal level is positioned at described contrast connector upper surface and the described second dielectric layer upper surface of part, and described 3rd metal level and described second metal level insulate.In silicon through hole test structure provided by the present invention, described contrast connector upper surface and described test plug upper surface flush, described test plug is positioned on described Part I, described contrast connector is positioned on described Part II, whether the length therefore only needing to measure the length of described test plug and described contrast connector is equal, just can learn whether described Part I upper surface and described Part II upper surface flush, and described Part I is positioned at least part of described conductive pole upper surface, and described Part I upper surface is consistent with the described conductive pole upper surface topography of correspondence position, described Part II upper surface is also consistent with described first medium layer upper surface topography, therefore, learn whether described Part I upper surface and described Part II upper surface flush, whether flush with described first medium layer upper surface with regard to known described conductive pole upper surface, that is whether known described conductive pole exists blemish, therefore silicon through hole test structure provided by the present invention can test out described conductive pole and whether there is blemish.Whether blemish is there is due to described conductive pole can be tested, thus just can adjust technique in time, thus avoid the generation of conductive pole blemish, and then avoid described conductive pole and corresponding conductive structure loose contact, finally improve chip reliability.
Further, multiple described test plug and described contrast connector are set, and make multiple described test be evenly distributed on Part I neighboring area, more fully whether can there is surface gap by testing conductive post upper surface.
In the method for testing of silicon through hole test structure provided by the present invention, described test plug is utilized to be positioned on described Part I, described second metal level connects described test plug upper surface, by galvanization or making alive between the first metal layer and the second metal level, test voltage or the electric current at described test plug two ends again, and the resistance of described test plug is obtained according to Ohm's law, again according to the diameter of resistivity law and described test plug, obtain the length of described test plug, same principle can obtain the length of described contrast connector, and obtain the length of described test plug and the length of described contrast connector, just can learn whether described conductive pole upper surface flushes with described first medium layer upper surface, that is learn whether described conductive pole exists blemish.
The formation method of silicon through hole test structure provided by the present invention forms the first metal layer at least part of described conductive pole upper surface and part described first medium layer upper surface, the described the first metal layer being positioned at described conductive pole upper surface is Part I, the described the first metal layer being positioned at described first medium layer upper surface is Part II, and described Part I upper surface is consistent with the described conductive pole upper surface topography of correspondence position; Described Part I forms test plug; Described Part II is formed contrast connector; Described first medium layer and described the first metal layer form second dielectric layer, and described second dielectric layer exposes described test plug upper surface and described contrast connector upper surface; Described second metal level is formed at described test plug upper surface and part described second dielectric layer upper surface; The 3rd metal level insulated with described second metal level is formed at described contrast connector upper surface and part described second dielectric layer upper surface, final formation silicon through hole provided by the present invention test structure, the silicon through hole test structure that described formation method is formed can apply to testing conductive post upper surface and whether there is blemish, there is technique simple, the advantage that cost of manufacture is low.
Accompanying drawing explanation
Fig. 1 to Fig. 3 is the dissimilar blemish schematic diagram of conductive pole;
Fig. 4 to Fig. 5 is the embodiment of the present invention one silicon through hole test structure schematic diagram;
Fig. 6 to Fig. 7 is the embodiment of the present invention two silicon through hole test structure schematic diagram;
Fig. 8 to Fig. 9 is the formation method schematic diagram of the embodiment of the present invention five silicon through hole test structure.
Embodiment
As described in background, silicon through hole because of technological problems and and the reason such as to expand with heat and contract with cold there will be blemish.Fig. 1 to Fig. 3 is the dissimilar blemish schematic diagram of conductive pole.As shown in Figure 1 to Figure 3, silicon through hole 110 comprises conductive pole 111 and insulating barrier 112, and silicon through hole 110 is arranged in silicon substrate 100, and silicon substrate 100 is covered by first medium layer 120, and first medium layer 120 upper surface normally flushes.Described blemish specifically can be divided into three types, the blemish of the first type as shown in Figure 1, rat (protrusion) 111a caused because conductive pole 111 expands, now conductive pole 111 upper surface exceeds first medium layer 120 upper surface certain altitude; The blemish of the second type as shown in Figure 2, surface indentation (dishing) 111b that described conductive pole 111 causes because of contraction, now conductive pole 111 upper surface is lower than first medium layer 120 upper surface certain altitude; As shown in Figure 3, surface gap (pit) 111c produced because the reasons such as technological problems cause conductive pole 111 upper surface periphery damaged, usual surface gap 111c is easily formed in conductive pole 111 peripheral position to the blemish of the third type.Further, the defect of the third type can also combine with the defect of the defect of the first type or the second type.If conductive pole 111 exists surface indentation 111b or surface gap 111c, then conductive pole 111 probably occurs and other conductive structure loose contact corresponding, thus causes chip reliability problem.
It should be noted that, the blemish of silicon through hole 110 only refers to the blemish of conductive pole 111 usually, this is because: insulating barrier 112 upper surface area between silicon substrate 100 and conductive pole 111 is minimum, usually there is not blemish, and the material of insulating barrier 112 is usually identical with the material of first medium layer 120, even if therefore insulating barrier 112 exists fine blemish, do not affect the character of silicon through hole 110 yet.
The invention provides a kind of silicon through hole test structure, the first metal layer in described silicon through hole test structure comprises the Part I being positioned at conductive pole upper surface and the Part II being positioned at first medium layer upper surface, described Part I has test plug, described Part II has contrast connector, be connected with test plug with the second metal level simultaneously, contrast connector is connected with the 3rd metal level, whether described silicon through hole test structure exists blemish by the length of test test plug and the length of contrast connector and known described conductive pole, therefore can adjust technique in time, avoid the generation of conductive pole blemish, thus avoid described conductive pole and other conductive structure loose contact corresponding, final raising chip reliability.
For enabling above-mentioned purpose of the present invention, feature and advantage more become apparent, and are described in detail specific embodiments of the invention below in conjunction with accompanying drawing.
The present embodiment one provides a kind of silicon through hole test structure, and described silicon through hole test structure can be used in conductive pole in test silicon through hole and whether there is blemish.
Please refer to Fig. 4, first the present embodiment provides three the silicon through holes being arranged in silicon substrate 200, and is produced on above silicon substrate 200 and described three silicon through holes by described silicon through hole test structure.
Described three silicon through holes, to there being three conductive poles, are respectively conductive pole 210A, conductive pole 210B and conductive pole 210C.In the present embodiment, the diameter range of conductive pole 210A, conductive pole 210B and conductive pole 210C is 5 μm ~ 50 μm.For ease of the comparison of test result, the present embodiment arranges the equal diameters of each conductive pole.
Silicon substrate 200 upper surface has first medium layer 220.First medium layer 220 exposes conductive pole 210A upper surface, conductive pole 210B upper surface and conductive pole 210C upper surface simultaneously.First medium layer 220 is for the protection of each semiconductor device be produced on silicon substrate 200.The material of first medium layer 220 can be silicon dioxide, and its thickness range can be 3000 dust ~ 50000 dusts.It should be noted that, for more clearly showing each conductive pole, Fig. 4 does not show the insulating barrier between each conductive pole and silicon substrate 200.
The present embodiment, in order to the different surfaces situation of conductive pole is described in the lump, arranges three silicon through holes and is arranged in silicon substrate 200 simultaneously, as shown in Figure 4.Such as, but in practice process, the number of silicon through hole, position and diameter can be arranged by actual demand, and one described silicon through hole test structure is arranged on separately above a silicon through hole.
Please continue to refer to Fig. 4, the silicon through hole test structure that the present embodiment provides comprises the first metal layer 230, second dielectric layer 240, test plug 250A, test plug 250B, test plug 250C, contrast connector 260, second metal level 270A, the second metal level 270B, the second metal level 270C and the 3rd metal level 280.
The first metal layer 230 comprises the Part I 231A be positioned on conductive pole 210A, be positioned at the Part I 231B on conductive pole 210B, be positioned at the Part I 231C on conductive pole 210C, and Part I 231A upper surface is consistent with conductive pole 210A upper surface topography, Part I 231B upper surface is consistent with conductive pole 210B upper surface topography, and Part I 231C upper surface is consistent with conductive pole 210C upper surface topography.The first metal layer 230 also comprises the Part II 232 being positioned at first medium layer 220 upper surface, and first medium layer 220 upper surface and Part II 232 upper surface also consistent appearance, and first medium layer 220 upper surface flush, Part II 232 upper surface also flushes.
The material of the first metal layer 230 can comprise one or more the combination in any in copper, tungsten, silver, gold, titanium, tantalum and aluminium, its thickness range is 1000 dust ~ 5000 dusts, by physical vapour deposition (PVD) (Physical Vapor Deposition, PVD) method, chemical vapour deposition (CVD) (Chemical Vapor Deposition, CVD) method or ald (Atomic Layer Deposition, ALD) method form the first metal layer 230.
It should be noted that, in the present embodiment, Part II 232 is positioned at whole first medium layer 220 upper surface, but, in other embodiments of the invention, Part II 232 also only can be positioned at part first medium layer 220 upper surface, such as, can remove shown in Fig. 4 at Part I 231A, Part II 232 between Part I 231B and Part I 231C, and only retain the Part II 232 be positioned at below test plug 260.
Second dielectric layer 240 covers the first metal layer 230, and the upper surface flush of second dielectric layer 240.Each test plug and the contrast connector 260 of the first metal layer 230 and follow-up formation can be protected in second dielectric layer 240 1 aspect, can make on the other hand to keep mutually insulated between each test plug of the first metal layer 230 and follow-up formation and contrast connector.
The material of second dielectric layer 240 can be silicon dioxide, and its thickness range can be 3000 dust ~ 50000 dusts.
Test plug 250A to be positioned on Part I 231A and to run through second dielectric layer 240, and test plug 250B to be positioned on Part I 231B and to run through second dielectric layer 240, and test plug 250C to be positioned on Part I 231C and to run through second dielectric layer 240.Contrast connector 260 to be positioned on Part II 232 and to run through second dielectric layer 240, that is second dielectric layer 240 exposes contrast connector 260 upper surface, and contrasts connector 260 upper surface and each test plug upper surface flush.
The diameter range of test plug 250A, test plug 250B and test plug 250C is 0.15 μm ~ 2 μm, and the diameter range of contrast connector 260 is 0.15 μm ~ 2 μm.In the present embodiment, the material of each test plug can be all one or more the combination in any in copper, tungsten, silver, gold, titanium, tantalum and aluminium.In the present embodiment, the material arranging each test plug is identical with diameter, and the material arranging contrast connector 260 is identical with diameter with the material of each test plug with diameter.Through the setting of above-mentioned material and diameter, contrast connector 260 has many something in common with each test plug, after facilitating described silicon through hole test structure to test, single visual data is used to contrast test result, and in manufacturing process, same technique can be used simultaneously to form contrast connector 260 and each test plug, thus save corresponding processing step, reduce process costs.
Second metal level 270A is positioned at test plug 250A and part second dielectric layer 240 upper surface, second metal level 270B is positioned at test plug 250B and part second dielectric layer 240 upper surface, second metal level 270B is positioned at test plug 250B and part second dielectric layer 240 upper surface, each second metal level mutually insulated.3rd metal level 280 is positioned at contrast connector 260 upper surface and part second dielectric layer 240 upper surface, and the 3rd metal level 280 insulate with each second metal level.
The material of the second metal level 270A, the second metal level 270B, the second metal level 270C can comprise one or more the combination in any in copper, tungsten, silver, gold, titanium, tantalum and aluminium.The material of the 3rd metal level can comprise one or more the combination in any in copper, tungsten, silver, gold, titanium, tantalum and aluminium.
Please refer to Fig. 5, the vertical view of the silicon through hole test structure that Fig. 5 provides for the present embodiment, structure shown in Fig. 4 cuts the cut-away view obtained open for structure shown in Fig. 5 along A-A chain-dotted line.For each conductive pole be positioned at below described silicon through hole test structure can be demonstrated, each conductive pole of Fig. 5 represented by dotted arrows, each test plug and contrast connector 260.Composition graphs 4 and Fig. 5 known, the present embodiment test plug 250A is positioned on Part I 231A center, and test plug 250B is positioned on Part I 231B center, and test plug 250C is positioned on Part I 231C center.Each test plug is arranged on Part I center corresponding separately, not only be conducive to testing conductive post more exactly and whether there is rat or surface indentation, but also can prevent from being offset to Part II 232 upper surface by some or all of for test plug in manufacturing process.
It should be noted that, composition graphs 4 and Fig. 5 known, Part I 231A is positioned at whole conductive pole 210A upper surface, and Part I 231B is positioned at whole conductive pole 210B upper surface, and Part I 231C is positioned at whole conductive pole 210C upper surface.But in other embodiments of the invention, each Part I also only can be positioned at each conductive pole upper surface of part.
In the silicon through hole test structure that the present embodiment provides, due to contrast connector 260 upper surface and each test plug upper surface flush, each test plug is positioned on corresponding each Part I, and contrast connector 260 is positioned on Part II 240, therefore only need the length measuring each test plug whether equal with the length of contrast connector 260, just can learn whether each Part I upper surface and Part II 232 upper surface flush; And each Part I is positioned at each conductive pole upper surface of correspondence position, and each Part I upper surface is consistent with each conductive pole upper surface topography of correspondence position, Part II 232 is positioned at part first medium layer 220 upper surface, therefore, whether flush just known each conductive pole upper surface by each Part I upper surface and Part II 232 upper surface whether to flush with first medium layer 220 upper surface, that is whether known each conductive pole exists blemish.In summary, as long as test the length of each test plug and the length of contrast connector 260, just can learn whether each conductive pole exists blemish.
One end due to each test plug is positioned on corresponding each Part I, and each second metal level connects the other end of each test plug respectively, therefore, by galvanization or making alive between the first metal layer 230 and each second metal level, and test voltage or the electric current at each test plug two ends, again according to Ohm's law, the resistance of each test plug just can be obtained.After the resistance obtaining each test plug, further according to resistivity and the diameter of resistivity law and each test plug, just can obtain the length of each test plug.The length contrasting connector 260 can be obtained equally according to the method for each test plug length of above-mentioned acquisition.In above-mentioned analytic process, when testing electric current or the voltage of each test plug and contrast connector 260, have ignored the resistance of the first metal layer in measurement circuit, the second metal level and the 3rd metal level, this is because, the effect of what now the first metal layer, the second metal level and the 3rd metal level played is wire, its resistance can not considered for the resistance of each test test plug and contrast connector 260.
After each test plug length of acquisition and contrast connector 260 length, when the length of test plug is equal with the length of contrast connector 260, there is not blemish in known corresponding conductive pole, when the length of test plug is unequal with the length of contrast connector 260, there is blemish in known corresponding conductive pole.Therefore the silicon through hole test structure that embodiment provides can test out each conductive pole and whether there is blemish.Whether there is blemish due to each conductive pole can be tested, thus can adjust technique in time, thus avoid the generation of each conductive pole blemish, and then avoid each conductive pole and corresponding conductive structure loose contact, finally improve chip reliability.
It should be noted that, in other embodiments of the invention, each test plug and the contrast material of connector 260, diameter and other character also can be different, now still whether can there is blemish by said method to conductive pole and test.
The embodiment of the present invention two provides another silicon through hole test structure.Described silicon through hole test structure can be used in conductive pole in test silicon through hole equally and whether there is blemish.
Please refer to Fig. 6, provide the silicon through hole being positioned at silicon substrate 300 in the present embodiment, described silicon through hole is to there being a conductive pole 310, and conductive pole 310 is arranged in silicon substrate 300.Silicon substrate 300 upper surface has first medium layer 320, and first medium layer 320 exposes conductive pole 310 upper surface.Same, do not show insulating barrier between silicon substrate 300 and conductive pole 310 for more clearly showing conductive pole 310, Fig. 6.Described silicon through hole, silicon substrate 300, conductive pole 310 and first medium layer 320 can reference example one corresponding contents.
Please continue to refer to Fig. 6, the silicon through hole test structure that the present embodiment provides is positioned on silicon substrate 300 and conductive pole 310, described silicon through hole test structure specifically comprises the first metal layer 330, second dielectric layer 340, test plug 350, contrast connector 360, second metal level 370 and the 3rd metal level 380, wherein the first metal layer 330 comprises the Part I 331 being positioned at conductive pole 310 upper surface and the Part II 332 being positioned at second dielectric layer 340 upper surface, test plug 350 to be positioned on Part I 331 and to run through second dielectric layer 340, contrast connector 360 to be positioned on Part II 332 and to run through second dielectric layer 340, second metal level 370 is positioned at test plug 350 upper surface and second dielectric layer 340 upper surface, 3rd metal level 380 is positioned at contrast connector 360 upper surface and second dielectric layer 340 upper surface, can reference example one corresponding contents.
Please refer to Fig. 7, the vertical view of the silicon through hole test structure that Fig. 7 provides for the present embodiment, structure shown in Fig. 6 cuts the cut-away view obtained open for structure shown in Fig. 7 along B-B chain-dotted line.The silicon through hole test structure difference that the silicon through hole test structure that the present embodiment provides and embodiment one provide is, in the present embodiment, described silicon through hole test structure comprises 10 test plugs 350 and 10 contrast connectors 360, 10 test plugs 350 are evenly distributed on Part I 331 periphery, the distribution shape of 10 contrast connectors 360 is identical with the distribution shape of 10 test plugs, the material of contrast connector 360 is identical with the material of test plug 350, the diameter of contrast connector 360 is also identical with the diameter of test plug 350, as shown in Figure 7, this mode contributes to convenient and contrasts test plug 350 and contrast connector 360 intuitively.But it should be noted that, in the present embodiment, the distribution shape of test plug 350 and contrast connector 360 also can be different.
Whether the silicon through hole test structure that the present embodiment provides, owing to having 10 test plugs 350 be arranged on Part I 331 periphery, therefore can exist surface gap to conductive pole 310 and comparatively comprehensively test.But, in other embodiments of the invention, the number of test plug 350 and contrast connector 360 also can be other numerical value of more than 5, the number arranging test plug 350 and contrast connector 360 can ensure that more than 5 conductive pole 310 circumferential distribution has enough test plugs, for embodiment one, whether the silicon through hole test structure that the present embodiment provides, except whether existing except rat or surface indentation test to conductive pole 310, can also exist to conductive pole 310 test that surface gap carries out.
It should be noted that, in other embodiments of the invention, corresponding to the scheme of multiple test plug, contrast connector may also be only one, the length of multiple test plug and the length of contrast connector can be carried out comparison one by one.
It should be noted that, in the present embodiment, the first metal layer 330 is one, and the first metal layer 330 is positioned at whole conductive pole 310 upper surface.But in other embodiments of the invention, the first metal layer 330 also can be multiple, mutually insulated between different the first metal layer 330.
It should be noted that, in other embodiments of the invention, the described Part I of a described conductive pole upper surface is multiple, the number of described test plug and the number of described second metal level are equal to the number of described Part I, described Part I mutually insulated, described second metal level mutually insulated.Known, in described silicon through hole test structure, show whether the length of each test plug exists blemish with regard to each Part I upper surface of known correspondence by test, that is the conductive pole upper surface each several part of known correspondence whether existing defects, therefore, it is possible to test one by one conductive pole upper surface each several part, both can test out described conductive pole and whether there is all types of blemish (comprising rat, surface indentation or surface gap), the particular location that all types of surface falls into can have been tested out again.
The embodiment of the present invention three provides a kind of method of testing of silicon through hole test structure, and described method of testing applies in the silicon through hole test structure that embodiment one provides, therefore incorporated by reference to reference to figure 4 and Fig. 5.
Described method of testing is included in the first metal layer 230 and the second metal level 270A galvanization I
a, obtain the voltage V at test plug 250A two ends
a, at the first metal layer 230 and the second metal level 270B galvanization I
b, obtain the voltage V at test plug 250B two ends
b, at the first metal layer 230 and the second metal level 270C galvanization I
c, obtain the voltage V at test plug 250C two ends
c, at the first metal layer 230 and the 3rd metal level 280 galvanization I, obtain the voltage V contrasting connector 260 two ends.
It should be noted that, on the first metal layer 230 and each second metal level during energy electric current, first make contact (not shown) can be chosen on the first metal layer 230, each second metal level is chosen the second contact point (not shown), galvanization between described first make contact and described second contact point; When testing the voltage on the first metal layer 230 and each second metal level, the 3rd contact point (not shown) can be chosen on the first metal layer 230, each second metal level is chosen the 4th contact point (not shown), and tests the voltage between described 3rd contact point and described 4th contact point.In test circuit, described 3rd contact point and described 4th contact point are between described first contact and described second contact point.For at the first metal layer 230 and the 3rd metal level 280 galvanization, during the voltage at test comparison connector 260 two ends, the above-mentioned method choosing contact point can be taked equally to carry out.
Due to test plug 250A, test plug 250B, test plug 250C and contrast connector 260 diameter be respectively D
a, D
b, D
cand D, test plug 250A, test plug 250B, test plug 250C and contrast connector 260 cross-sectional area be respectively S
a, S
b, S
cand S, test plug 250A, test plug 250B, test plug 250C and contrast connector 260 resistance be respectively R
a, R
b, R
cand R, test plug 250A, test plug 250B, test plug 250C and contrast connector 260 resistivity be respectively ρ
a, ρ
b, ρ
cand ρ, the length L of test plug 250A
a, the length L of test plug 250B
b, the length L of test plug 250C
cwith the length L of contrast connector 260, it should be noted that, Fig. 1 is only to the L in above-mentioned each data
a, L
b, L
cmark with L.
For test plug 250A, there is R according to Ohm's law
a=V
a/ I
a, have R according to resistivity law
a=ρ
al
a/ S
a, have S according to cross-sectional area formula
a=(π D
a 2)/4, comprehensive above three equatioies, can obtain L
a=(π D
a 2v
a)/(4 ρ
ai
a), in like manner L
b=(π D
b 2v
b)/(4 ρ
bi
b), L
c=(π D
c 2v
c)/(4 ρ
ci
c), L=(π D
2v)/(4 ρ I).Because test plug 250A, test plug 250B in embodiment one, test plug 250C are identical with diameter with the material of contrast connector 260, therefore there is ρ
a=ρ
b=ρ
c=ρ and D
a=D
b=D
c=D, and in the present embodiment, I is set
a=I
b=I
c=I, therefore L
a, L
b, L
cwith L respectively with V
a, V
b, V
cbe directly proportional with V, and proportionality coefficient is equal.
In the present embodiment, record V
a>V, V
b<V, V
c=V, known L
a>L, L
b<L, L
c=L, thus known conductive pole 210A upper surface is lower than first medium layer 220 upper surface, namely there is surface indentation in conductive pole 210A, conductive pole 210B upper surface is higher than first medium layer 220 upper surface, namely there is rat in conductive pole 210B, conductive pole 210C upper surface and first medium layer 220 upper surface flush, namely there is not blemish in conductive pole 210C.
In said process, due to L
a, L
b, L
cwith L respectively with V
a, V
b, V
cbe directly proportional with V, and proportionality coefficient is equal, therefore can has L
a/ V
a=L
b/ V
b=L/V, therefore, has L further
a=V
al/V, L
b=V
bl/V, therefore, when knowing the length L of test plug 260, can also calculate the length L of examination connector 250A and test plug 250B
aand L
b, therefore, can carry out accurate quantification test to the surface indentation of conductive pole 210A, namely the size of surface indentation is L
a-L=V
al/V-L, wherein V
abe the data directly recorded in test process with V.In like manner, also can carry out quantitatively to the rat of conductive pole 210B, the size of rat is L-L
b=L-V
bl/V, V
bbe the data directly recorded in test process with V.
It should be noted that, in other embodiments of the invention, also can at Part I and the second metal level making alive, the electric current at test test plug two ends, then the length of test plug is obtained according to Ohm's law and resistivity law.Same, can at Part II and the 3rd metal level making alive, the electric current at test comparison connector two ends, then obtain according to Ohm's law and resistivity law the length contrasting connector.
It should be noted that, in the method for testing that other embodiments of the invention provide, when each test plug is not identical with diameter with the material of contrast connector, still can obtain the length of each test plug and the length of contrast connector according to above-mentioned formula; When the curtage by each test plug and contrast connector two ends varies in size, the length of each test plug and the length of contrast connector can be obtained according to above-mentioned formula equally.Due to the length of each test plug can be obtained and contrast the length of connector, therefore whether method of testing provided by the present invention can exist blemish to conductive pole and test in above-mentioned various situation, from the above mentioned, this specification does not repeat at this its principle one by one.
The embodiment of the present invention four provides the method for testing of another kind of silicon through hole test structure, and described method of testing applies in the silicon through hole test structure that embodiment two provides, therefore incorporated by reference to reference to figure 6 and Fig. 7.
Described method of testing is included in the first metal layer 330 and the second metal level 370 galvanization I
d, test the voltage V at 10 test plugs 350 rear two ends in parallel
d, at the first metal layer 330 and the 3rd metal level 380 galvanization I, test the voltage V at 10 contrast connectors 360 rear two ends in parallel.The resistance of 10 test plugs 350 is respectively R
d1, R
d2..., R
d10, the resistance of 10 contrast connectors 360 is respectively R
1, R
2r
10, the length of test plug 350 and contrast connector 360 is respectively L
dand L, it should be noted that Fig. 6 only to the L in above-mentioned each data
dmark with L.For the all-in resistance R of 10 test plugs 350
d, have R according to Ohm's law
d=V
d/ I
dand 1/R
d=1/R
d1+ 1/R
d2+ ... + 1/R
d10, for 10 contrast connectors 360, have R=V/I equally, 1/R=1/R
1+ 1/R
2+ ... + 1/R
10, and to be positioned on Part II 332 and upper surface is exposed by second dielectric layer 340 due to contrast connector 360, therefore have R
1=R
2=...=R
10.Because test plug 350 in embodiment two is identical with diameter with the material of contrast connector 360, their cross-sectional area is identical with resistivity, and arranges I in the present embodiment
d=I, therefore, if when there is not surface gap in conductive pole 310, R
d1=R
d2=...=R
d10=R
1=R
2=...=R
10, therefore then have R
d=R and V
d=V.But, in the present embodiment, recorded V
d>V, i.e. R
d>R, known, R
d1to R
d10in, have at least a value to be greater than R
1, the known length having at least the length of a test plug 350 to be greater than contrast connector 360, i.e. L
d>L, now there is surface gap or surface indentation in conductive pole 310, as shown in Figure 3.In the present embodiment, test plug 350 is evenly distributed in Part I 331 peripheral position, and therefore whether described method of testing can exist surface gap to conductive pole 310 and comparatively comprehensively test.
It should be noted that, in other embodiments of the invention, also can at the first metal layer and the second metal level making alive, test the electric current at the test plug two ends of multiple parallel connection, the length of test plug is obtained again according to Ohm's law and resistivity law, same, can at the first metal layer and the 3rd metal level making alive, test the electric current at the contrast connector two ends of multiple parallel connection, obtain contrasting the length of connector according to Ohm's law and resistivity law again, and record conductive pole according to the length of test plug and the length of contrast connector and whether there is blemish.
It should be noted that, in order to distinguish surface gap and surface indentation further, the silicon through hole test structure mentioned in embodiment three can be adopted, namely the described Part I of a described conductive pole upper surface is multiple, the number of described test plug and the number of described second metal level are equal to the number of described Part I, described Part I mutually insulated, described second metal level mutually insulated.When testing, only testing wherein part or a described test plug, thus realizing the differentiation of effects on surface breach and surface indentation, and can position by effects on surface breach.
It should be noted that, in other embodiments of the invention, also the shunt voltage (or parallel-current) of whole test plug can once be tested, but by the test wherein shunt voltage (or parallel-current) of several test plugs and the shunt voltage (or parallel-current) of several contrast connectors corresponding, now as described in embodiment two, the first metal layer has multiple, and each the first metal layer has the Part I being positioned at conduction letter upper surface at least partly, and several test plug correspondences above-mentioned are positioned on Part I.
The embodiment of the present invention five provides a kind of formation method of silicon through hole test structure, incorporated by reference to reference to figure 8 and Fig. 9.Described silicon through hole test structure is positioned on described silicon through hole, the conductive pole 410 of described silicon through hole is arranged in silicon substrate 400, silicon substrate 400 upper surface has first medium layer 420, first medium layer 420 exposes conductive pole 410 upper surface, and the present embodiment does not show the insulating barrier between conductive pole 410 and silicon substrate 400.
First described formation method forms the first metal layer 430 at least part of conductive pole 410 upper surface and part first medium layer 420 upper surface, the first metal layer 430 comprises the Part I 431 being positioned at conductive pole 410 upper surface and the Part II 432 being positioned at first medium layer 420 upper surface, and Part I 431 upper surface is consistent with conductive pole 410 upper surface topography of correspondence position.The method forming the first metal layer 430 can be physical vaporous deposition, chemical vapour deposition technique or atomic layer deposition method.
Please continue to refer to Fig. 8, Part I 431 forms test plug 450, Part II 432 is formed contrast connector 460.In the present embodiment, use same technique to form test plug 450 and contrast connector 460, thus save processing step, meanwhile, easily control test plug 450 also identical with diameter with the material of contrast connector 460.
Please refer to Fig. 9, first medium layer 420 and the first metal layer 430 form second dielectric layer 440, second dielectric layer 440 exposes test plug 450 upper surface and contrast connector 460 upper surface.
Please continue to refer to Fig. 9, form the second metal level 470 at test plug 450 upper surface and part second dielectric layer 440 upper surface, form at contrast connector 460 upper surface and part second dielectric layer 440 upper surface the 3rd metal level 480 insulated with the second metal level 470.In the present embodiment, same technique is adopted to form the second metal level 470 and the 3rd metal level 480, to save processing step.
By above-mentioned formation method, the present embodiment defines silicon through hole test structure, described silicon through hole test structure can use method of testing provided by the present invention whether to there is blemish to conductive pole 410 and test, therefore can adjust technique in time after obtaining test structure, thus avoid the generation of subsequent conductive post blemish, and then avoid conductive pole and corresponding conductive structure loose contact, final raising chip reliability, and different structure can make by above-mentioned formation method simultaneously, there is technique simple, the feature that cost of manufacture is low.
Although the present invention discloses as above, the present invention is not defined in this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, and therefore protection scope of the present invention should be as the criterion with claim limited range.
Claims (12)
1. a silicon through hole test structure, for the surface condition of conductive pole in test silicon through hole, described conductive pole is arranged in silicon substrate, described silicon substrate upper surface has first medium layer, described first medium layer exposes described conductive pole upper surface, it is characterized in that, described silicon through hole test structure comprises:
The first metal layer, comprise the Part I being positioned at least part of described conductive pole upper surface and the Part II being positioned at part described first medium layer upper surface, described Part I upper surface is consistent with the described conductive pole upper surface topography of correspondence position;
Second dielectric layer, is positioned on described first medium layer and described the first metal layer;
Test plug to be positioned on Part I and to run through described second dielectric layer;
Contrast connector to be positioned on Part II and to run through described second dielectric layer;
Second metal level, is positioned at described test plug upper surface and the described second dielectric layer upper surface of part;
3rd metal level, is positioned at described contrast connector upper surface and the described second dielectric layer upper surface of part, and insulate with described second metal level.
2. silicon through hole test structure as claimed in claim 1, it is characterized in that, described test plug is positioned on the center of described Part I, and the material of described contrast connector is identical with the material of described test plug, and the diameter of described contrast connector is identical with the diameter of described test plug.
3. silicon through hole test structure as claimed in claim 1, it is characterized in that, described test plug is multiple, and multiple described test plug is evenly distributed on described Part I periphery; The number of described contrast connector is identical with the number of described test plug, and the distribution shape of multiple described contrast connector is identical with the distribution shape of multiple described test plug.
4. silicon through hole test structure as claimed in claim 3, it is characterized in that, the number of described test plug is greater than or equal to 5.
5. silicon through hole test structure as claimed in claim 1, it is characterized in that, the described Part I of each described conductive pole upper surface is multiple, the number of described test plug and the number of described second metal level are equal to the number of described Part I, described Part I mutually insulated, described second metal level mutually insulated.
6. silicon through hole test structure as claimed in claim 1, it is characterized in that, the diameter range of described conductive pole is 5 μm ~ 50 μm; The diameter range of described test plug is 0.15 μm ~ 2 μm; The diameter range of described contrast connector is 0.15 μm ~ 2 μm.
7. silicon through hole test structure as claimed in claim 1, it is characterized in that, the material of described the first metal layer comprises one or more the combination in any in copper, tungsten, silver, gold, titanium, tantalum and aluminium; The material of described second metal level comprises one or more the combination in any in copper, tungsten, silver, gold, titanium, tantalum and aluminium; The material of described first medium layer comprises silicon dioxide; The material of described second dielectric layer comprises silicon dioxide.
8. silicon through hole test structure as claimed in claim 7, it is characterized in that, the thickness range of described the first metal layer is 1000 dust ~ 5000 dusts; The thickness range of described second metal level is 1000 dust ~ 5000 dusts; The thickness range of described first medium layer is 3000 dust ~ 50000 dusts; The thickness range of described second dielectric layer is 3000 dust ~ 50000 dusts.
9. a method of testing for silicon through hole test structure, described silicon through hole test structure is the silicon through hole test structure as described in any one of claim 1 to 8, and it is characterized in that, described method of testing comprises:
By applying voltage or electric current between described Part I and described second metal level, and measure corresponding curtage, obtain the resistance of described test plug, and according to the cross-sectional area of described test plug and resistivity, obtain the length of described test plug;
By applying voltage or electric current between described Part II and described 3rd metal level, and measure corresponding curtage, obtain the resistance of described contrast connector, and according to the cross-sectional area of described contrast connector and resistivity, obtain the length of described contrast connector;
When the length of described test plug is equal with the length of described contrast connector, the upper surface of described silicon through hole and the upper surface flush of described first medium layer; Otherwise there is blemish in described conductive pole.
10. the method for testing of silicon through hole test structure as claimed in claim 9, it is characterized in that, when the length of described test plug is greater than the length of described contrast connector, there is surface indentation or surface gap in described conductive pole; When the length of described test plug is less than the length of described contrast connector, there is rat in described conductive pole.
The formation method of 11. 1 kinds of silicon through hole test structures, described silicon through hole test structure is positioned on silicon through hole, the conductive pole of described silicon through hole is arranged in silicon substrate, described silicon substrate upper surface has first medium layer, described first medium layer exposes described conductive pole upper surface, it is characterized in that, described formation method comprises:
The first metal layer is formed at least part of described conductive pole upper surface and part described first medium layer upper surface, described the first metal layer comprises the Part I being positioned at described conductive pole upper surface and the Part II being positioned at described first medium layer upper surface, and described Part I upper surface is consistent with the described conductive pole upper surface topography of correspondence position;
In described first medium layer and described the first metal layer, form second dielectric layer, and formation runs through the test plug of described second dielectric layer and on described Part II, forms the contrast connector running through described second dielectric layer on described Part I;
The second metal level is formed at described test plug upper surface and the described second dielectric layer upper surface of part, and forming the 3rd metal level at described contrast connector upper surface and the described second dielectric layer upper surface of part, described 3rd metal level and described second metal level insulate.
The formation method of 12. silicon through hole test structures as claimed in claim 11, is characterized in that, adopts same technique to form described test plug and described contrast connector, adopts same technique to form described second metal level and described 3rd metal level.
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| CN106571311A (en) * | 2015-10-10 | 2017-04-19 | 中芯国际集成电路制造(上海)有限公司 | Silicon through hole test device and test method thereof |
| CN114743893A (en) * | 2022-06-13 | 2022-07-12 | 绍兴中芯集成电路制造股份有限公司 | Monitoring method and detection structure for depth of conductive plug |
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| JP4300348B2 (en) * | 2003-05-27 | 2009-07-22 | 日産自動車株式会社 | Press-fit pin mounting board structure and press-fit pin connection inspection method |
| CN102200554A (en) * | 2011-03-30 | 2011-09-28 | 上海北京大学微电子研究院 | Resistor test structure and method |
| CN103137511B (en) * | 2011-11-25 | 2016-01-06 | 中芯国际集成电路制造(上海)有限公司 | The method of testing of silicon through hole test structure and correspondence |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106571311A (en) * | 2015-10-10 | 2017-04-19 | 中芯国际集成电路制造(上海)有限公司 | Silicon through hole test device and test method thereof |
| CN106571311B (en) * | 2015-10-10 | 2019-04-26 | 中芯国际集成电路制造(上海)有限公司 | The test device and its test method of through silicon via |
| CN114743893A (en) * | 2022-06-13 | 2022-07-12 | 绍兴中芯集成电路制造股份有限公司 | Monitoring method and detection structure for depth of conductive plug |
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