CN104333431B - FM (Frequency Modulation) broadcast based low power consumption high accuracy network time synchronous circuit - Google Patents
FM (Frequency Modulation) broadcast based low power consumption high accuracy network time synchronous circuit Download PDFInfo
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- CN104333431B CN104333431B CN201410622879.3A CN201410622879A CN104333431B CN 104333431 B CN104333431 B CN 104333431B CN 201410622879 A CN201410622879 A CN 201410622879A CN 104333431 B CN104333431 B CN 104333431B
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Abstract
The invention discloses an FM (Frequency Modulation) broadcast based low power consumption high accuracy network time synchronous circuit. The FM broadcast based low-power consumption high accuracy network time synchronous circuit comprises a basic time synchronous module, a low power consumption signal processing module and an accurate time synchronous module; the basic time synchronous module is provided with a real-time clock chip; the real-time clock chip sends an interrupt pulse signal before and after hours to wake up the low power consumption signal processing module; the low power consumption signal processing module receives the interrupt pulse signal and sends to and wakes up the accurate time synchronous module, receives a sound signal of the accurate time synchronous module, performs A/D (Analog/Digital) sampling and sends to an hour signal to the basic time synchronous module after sampling data is processed to achieve time synchronization; the accurate time synchronous module is wakened up after receiving the interrupt pulse signal, receives an FM broadcast signal, demodulates the FM broadcast signal to a sound signal and send to the low power consumption signal processing module. The FM broadcast based low-power consumption high accuracy network time synchronous circuit is used for time synchronization in the wireless senor network, is low in hardware cost, wide in utilization range, low in power consumption, high in accuracy and long in utilization time.
Description
Technical field
The present invention relates to a kind of radio sensing network time synchronized circuit, one kind of more particularly, to integrated circuit fields is based on
The low power consumption high-precision network time synchronization circuit of FM frequency modulation broadcasting.
Background technology
Wireless sensor network（Wireless Sensor Networks, WSN）Currently receive much concern, be related to learn more
The highly integrated forward position focus research field of section's height intersection, knowledge.Wireless sensor network can obtain objective physical information,
There is very wide application prospect.In application of higher wireless sensor network, time synchronized is important component part, sensor number
Require that according to fusion, sensor node self poisoning etc. the clock between node keeps synchronous.
The method being now widely used in radio sensing network time synchronized mainly has GPS（Global Positioning
System)）With NTP (Network Time protocol).GPS has at a relatively high synchronization accuracy, but it is relatively costly, energy
Consumption larger and also under rugged environment synchronization accuracy can be greatly affected.NTP is that the enterprising row clock of Internet is synchronous
Agreement, when it enables high-precision computer school on network, but it belongs to computation-intensive, has very big computing cost.
In WSN application, sensor node has strict requirements to power consumption, and requires to keep as far as possible less profile and cheap
Cost can be disposed in a large number, and its deployed environment is often the inaccessible adverse circumstances of ordinary person, after this makes deployment
Safeguard not typically possible it is clear that by GPS and NTP be used for WSN time synchronized difficult.
Content of the invention
In order to solve problem present in background technology, it is an object of the invention to proposing one kind to be based on FM frequency modulation broadcasting
Low power consumption high-precision network time synchronization circuit, when carrying out integral point school, the time signal using FM frequency modulation broadcasting realizes the time
Synchronous, low power consumption high-precision, can be used for the time synchronized of radio sensing network.
The technical solution used in the present invention includes synchronous when basic time synchronization module, power down signal processing module and school
Module：
Including basic time synchronization module：It is provided with real-time timepiece chip, real-time timepiece chip sends before and after time integral point
Interruption pulse signal wakes up power down signal processing module；
Including power down signal processing module：Synchronous mould when FM enables signal wake-up school is sent after receiving interruption pulse signal
Block；And receive during school the audio signal of synchronization module and carry out A/D sampling, to sending integral point correcting delay signal after sampled-data processing
To basic time synchronization module, realize time synchronized；
Including synchronization module during school：Receive after FM enables signal and be waken up, start to receive FM broadcast singal, FM is broadcasted letter
Number being demodulated into FM audio signal is sent to power down signal processing module.
Described basic time synchronization module adopts real-time timepiece chip, and real-time timepiece chip is connect by I2C communication interface
Close alignment signal, sends interruption pulse signal by INT pin.
Described power down signal processing module adopts low-power microprocessor and its crystal oscillator of model EFM32TG842
Circuit and mu balanced circuit, the low-power microprocessor of EFM32TG842 is provided with I2C communication interface and A/D translation interface,
The low-power microprocessor of EFM32TG842 is connected with basic time synchronization module by I2C communication interface, receives interruption pulse
Signal and transmission integral point signal；It is connected with synchronization module during school by A/D translation interface, receive audio signal.
The FM on-off circuit that during described school, synchronization module is included FM receiving circuit and is connected with FM receiving circuit, FM connects
Receive circuit and include chip TA7792 and FM frequency-discriminating circuit, FM local oscillation circuit, FM selective frequency amplifier circuit and FM intermediate frequency filtering circuit；
FM broadcast singal successively after FM selective frequency amplifier circuit, chip TA7792, FM local oscillation circuit and FM intermediate frequency filtering circuit, then through core
FM audio signal is exported, FM enables signal input to FM on-off circuit after piece TA7792 and FM frequency-discriminating circuit.
Compared with background technology, the invention has the advantages that：
1. the present invention carries out high-accuracy network time synchronized using based on FM frequency modulation broadcasting time signal, and hardware cost is low,
Range is wide.
2. the present invention adopts low-power consumption components and parts, and overall energy consumption is low, it is possible to use battery is powered, and use time is long.
3. the present invention adopts the sample frequency of 50kHz, and correcting delay precision is high, and the time, degree of accuracy was up to 20us.
4. the present invention can be used for the time synchronized in radio sensing network.
Brief description
Fig. 1 is the connection block diagram of module of the present invention.
Fig. 2 is the general principles block diagram of the present invention.
Fig. 3 is basic time synchronization module circuit diagram.
Fig. 4 is power down signal processing module circuit diagram.
Fig. 5 is synchronization module circuit diagram during school.
Fig. 6 is the circuit diagram of FM frequency-discriminating circuit.
Fig. 7 is the circuit diagram of FM local oscillation circuit.
Fig. 8 is the circuit diagram of FM selective frequency amplifier circuit.
Fig. 9 is the circuit diagram of FM intermediate frequency filtering circuit.
Figure 10 is the circuit diagram of FM on-off circuit.
Figure 11 is FM frequency modulation broadcasting ideal time signal format figure.
Specific embodiment
The present invention is further illustrated with reference to the accompanying drawings and examples.
As depicted in figs. 1 and 2, when the present invention includes basic time synchronization module I, power down signal processing module II and school
Synchronization module III, power down signal processing module II respectively with basic time synchronization module I, rectify when synchronization module III：
Including basic time synchronization module I：It is provided with real-time timepiece chip, real-time timepiece chip sends before and after time integral point
Interruption pulse signal wakes up power down signal processing module II；
Including power down signal processing module II：Synchronization when FM enables signal wake-up school is sent after receiving interruption pulse signal
Module ii I；And receive during school the audio signal of synchronization module III and carry out A/D sampling, to sending integral point after sampled-data processing
Correcting delay signal, to basic time synchronization module I, realizes time synchronized；
Including synchronization module III during school：Receive after FM enables signal and wake up, start to receive FM broadcast singal, FM is broadcasted
Signal is demodulated into FM audio signal and is sent to power down signal processing module II.
When basic time synchronization module I, power down signal processing module II and school, synchronization module III is connected with battery and carries out
Power supply.
Above-mentioned basic time synchronization module I adopts real-time timepiece chip, and real-time timepiece chip is received by I2C communication interface
Calibration signal, sends interruption pulse signal by INT pin.
Above-mentioned power down signal processing module II adopts low-power microprocessor and its crystal oscillator of model EFM32TG842
Circuit and mu balanced circuit, the low-power microprocessor of EFM32TG842 is provided with I2C communication interface and A/D translation interface,
The low-power microprocessor of EFM32TG842 is connected with basic time synchronization module I by I2C communication interface, receives interruption pulse
Signal and transmission integral point signal, for calibrating the time of basic time synchronization module；By A/D translation interface and mould synchronous during school
Block III is connected, and receives audio signal, completes the A/D sampling to FM broadcast singal and signal processing by synchronization module III during school.
This low-power microprocessor has low-power consumption energy saver mode, to reduce power consumption.
During above-mentioned school, synchronization module III includes FM receiving circuit and the FM on-off circuit being connected with FM receiving circuit, FM
Receiving circuit includes chip TA7792 and FM frequency-discriminating circuit, FM local oscillation circuit, FM selective frequency amplifier circuit and FM intermediate frequency filtering electricity
Road；FM on-off circuit is as shown in Figure 10, FM frequency-discriminating circuit, FM local oscillation circuit, FM selective frequency amplifier circuit and FM intermediate frequency filtering circuit
As shown in figs. 6-9, all it is connected with chip TA7792, FM local oscillation circuit and FM intermediate frequency filtering circuit.FM broadcast singal warp successively
After FM selective frequency amplifier circuit, chip TA7792, FM local oscillation circuit, FM intermediate frequency filtering circuit, chip TA7792 and FM frequency-discriminating circuit
Output FM audio signal, FM enables signal input to FM on-off circuit.Specifically, FM broadcast singal is through FM frequency selection circuit frequency-selecting
After amplification, input TA7792 chip, be demodulated into 10.7MHz intermediate-freuqncy signal through local oscillation circuit, via intermediate frequency filtering circuit filtering
Afterwards, input TA7792 chip, FM audio signal is output as by frequency-discriminating circuit demodulation, then FM audio signal is sent to low work(
Consumption signal processing module II.
According to the feature of FM frequency modulation broadcasting time signal, through signal detection and pattern match, power down signal processes mould
Time after correcting is sent to basic time synchronization module I by block II, and then realizes the time synchronized of basic time synchronization module；
Synchronization module III during basic time synchronization module I timing wake-up school, after time synchronized terminates, power down signal processing module II
Enter park mode, thus reducing system power dissipation.
The ringing at every hour signal of FM frequency modulation broadcasting, i.e. the FM broadcast singal of integral point time, for the audio frequency letter of " five short is long "
Number, by A/D sampling is carried out to audio signal, obtain sampled audio signal data；Sampled data is calculated and is judged,
The integral point moment differentiates audio signal and produces integral point correcting delay signal, and the time is synchronized.
The specific embodiment of the present invention is as follows：
As shown in figure 3, basic time synchronization module I：Using DS3231 clock chip, DS3231 chip and power down signal
Processing module II bus be connected, DS3231 chip adopt I2C universal serial bus, i.e. bidirectional data line SDA and clock line SCL,
The I2C serial bus port SDA pin of DS3231 chip and SCL pin need coupling to be connected to power down signal processing module II
I2C port, DS3231 chip and power down signal processing module II connection figure such as Fig. 3 in the present invention, Fig. 4 control chip institute
Show, the SDA pin in Fig. 3 is connected to the PA0 pin in Fig. 4, the PA0 pin in Fig. 4 is I2C0_SDA port, the SCL in Fig. 3
Pin is connected to the PA1 pin in Fig. 4, and the PA1 pin in Fig. 4 is I2C0_SCL port, and RST is that the reset of DS3231 chip is defeated
Exit port, INT is the interrupt signal output pin of DS3231 chip, can export interrupt signal in clocked flip.System start-up
When, DS3231 chip passes through the timing of INT pin and sends interrupt signal to the PA0 pin of power down signal processing module II, thus
Wake up school when synchronization module III, in addition, power down signal processing module II by PA0 pin send correcting delay signal to
Data pin SDA of DS3231 chip, passes through PA1 pin tranmitting data register signal to the clock pins SCL of DS3231 chip simultaneously,
Realize the time synchronized to DS3231 chip.
Power down signal processing module II：Using EFM32TG842 chip, it is internally integrated A/D modular converter, managing power consumption
Module and timing module, enable power down signal and process, EFM32TG842 chip is as system core chip and basic time
When synchronization module I and school, synchronization module III is respectively connected with, connection figure such as Fig. 3, shown in Fig. 4 and Fig. 5, EFM32TG842 chip PE4
Pin is connected with the FM on-off circuit of synchronization module III during school, and the PE4 pin output FM of EFM32TG842 chip enables signal and is
During high level, FM on-off circuit is in the conduction state, FM receiving circuit normal work；EFM32TG842 chip PD0 pin and school
When synchronization module III AF pin be connected, this pin is ADC0 port, and whole clock synchronization system gives the correct time according to FM frequency modulation broadcasting
Signal carries out time synchronized work, and during school, the time signal of the FM receiving frequency modulation broadcasting is converted into FM sound by synchronization module III
Frequency signal is simultaneously sent to EFM32TG842 chip, and FM audio frequency time signal feature is five short one long, audio frequency minor signal 800Hz,
Continue 0.25 second, audio frequency long signal 1600Hz, continue 0.5 second, preferable time signal format is as shown in figure 11, EFM32TG842
Chip internal A/D modular converter is carried out after A/D conversion to the FM audio signal receiving, and by detection and pattern match, obtains
High precision clock, the present invention reaches as high as 1MHz using the A/D sampling clock of 50kHz, and time precision is up to 20us.
Synchronization module III during school：As shown in Fig. 6～Figure 10, including FM receiving circuit and FM on-off circuit, as Figure 10 institute
Show, FM on-off circuit is made up of with audion Q1 and resistance R1, R2 field effect transistor M1, the base stage of Q1 processes mould with power down signal
Block II is connected, and is high electricity when the PE4 pin output FM of the EFM32TG842 chip of power down signal processing module II enables signal
At ordinary times, FM on-off circuit is opened, and FM receiving circuit starts to receive FM broadcast singal.As shown in Fig. 6～Figure 10, FM receiving circuit by
TA7792 chip and FM selective frequency amplifier circuit, FM local oscillation circuit, FM intermediate frequency filtering circuit and FM frequency-discriminating circuit composition.As Fig. 8 institute
Show, the LC oscillating circuit that FM selective frequency amplifier circuit is made up of inductance L1, electric capacity C1, electric capacity C2 and TA7792 chip internal circuits are altogether
With constituting, wherein C2 is variable capacitance, can change the frequency resonant point of frequency selection circuit by adjusting C2；As shown in fig. 7, FM is originally
The circuit that shakes is made up of the LC oscillating circuit that inductance L2, electric capacity C3, electric capacity C4 are constituted, and wherein C4 is variable capacitance, by changing C4
Value come to change receive FM broadcast singal frequency；As shown in figure 9, FM intermediate frequency filtering circuit is by two 10.7MHz intermediate frequency filterings
Device is composed in series；As shown in fig. 6, FM frequency-discriminating circuit includes the LC oscillating circuit of inductance L3 and electric capacity C5 composition.FM broadcast singal
Result FM frequency selection circuit and local oscillation circuit collective effect, are demodulated into FM intermediate-freuqncy signal, and frequency is 10.7MHz, FM intermediate-freuqncy signal warp
Again FM audio signal is demodulated into by FM frequency-discriminating circuit after crossing FM filter circuit.TA7792 chip and power down signal processing module II
It is connected, pin connection figure such as Fig. 4, shown in Fig. 5, TA7792 chip will receive after FM broadcast singal is demodulated into FM audio signal,
By AF pin, FM audio signal is sent to the PD0 pin of power down signal processing module II, carries out A/D conversion.
Above-mentioned specific embodiment is used for illustrating the present invention, rather than limits the invention, the present invention's
In spirit and scope of the claims, any modifications and changes that the present invention is made, both fall within the protection model of the present invention
Enclose.
Claims (4)
1. a kind of low power consumption high-precision network time synchronization circuit based on FM frequency modulation broadcasting it is characterised in that：
Including basic time synchronization module（I）：It is provided with real-time timepiece chip, during real-time timepiece chip sends before and after time integral point
Disconnected pulse signal wakes up power down signal processing module（II）；
Including power down signal processing module（II）：Synchronous mould when FM enables signal wake-up school is sent after receiving interruption pulse signal
Block（III）；And receive synchronization module during school（III）Audio signal and carry out A/D sampling, whole to sending after sampled-data processing
Point correcting delay signal is to basic time synchronization module（I）, realize time synchronized；
Including synchronization module during school（III）：Receive after FM enables signal and be waken up, start to receive FM broadcast singal, FM is broadcasted
Signal is demodulated into FM audio signal and is sent to power down signal processing module（II）.
2. a kind of low power consumption high-precision network time synchronization circuit based on FM frequency modulation broadcasting according to claim 1, its
It is characterised by：Described basic time synchronization module（I）Using real-time timepiece chip, real-time timepiece chip is connect by I2C communication
Mouth receives calibration signal, sends interruption pulse signal by INT pin.
3. a kind of low power consumption high-precision network time synchronization circuit based on FM frequency modulation broadcasting according to claim 1, its
It is characterised by：Described power down signal processing module（II）Using model EFM32TG842 low-power microprocessor and its
Crystal oscillating circuit and mu balanced circuit, the low-power microprocessor of EFM32TG842 is provided with I2C communication interface and A/D translation interface,
The low-power microprocessor of EFM32TG842 passes through I2C communication interface and basic time synchronization module（I）It is connected, receive and interrupt arteries and veins
Rush signal and send integral point signal；By A/D translation interface and synchronization module during school（III）It is connected, receive audio signal.
4. a kind of low power consumption high-precision network time synchronization circuit based on FM frequency modulation broadcasting according to claim 1, its
It is characterised by：Synchronization module during described school（III）The FM switch electricity be connected including FM receiving circuit and with FM receiving circuit
Road, FM receiving circuit includes chip TA7792 and FM frequency-discriminating circuit, FM local oscillation circuit, FM selective frequency amplifier circuit and the filter of FM intermediate frequency
Wave circuit；FM broadcast singal is successively through FM selective frequency amplifier circuit, chip TA7792, FM local oscillation circuit and FM intermediate frequency filtering circuit
Afterwards, then export FM audio signal after another chip TA7792 and FM frequency-discriminating circuit, FM enable signal input is to FM on-off circuit.
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| CN105759896B (en) * | 2016-01-27 | 2019-02-22 | 浙江大学 | A kind of low-power consumption calibration method |
| CN106936530B (en) * | 2017-03-28 | 2019-03-01 | 浙江大学 | A kind of wireless sensing wind load monitoring system for realizing multi-measuring point synchronous acquisition |
| CN109511159B (en) * | 2018-12-27 | 2022-02-15 | 深圳市力合微电子股份有限公司 | Method for generating wake-up signal of low-power micropower wireless communication system |
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| US8724759B2 (en) * | 2011-05-06 | 2014-05-13 | I Berium Communications, Inc. | Coherent synchronization and framing in a digital television receiver |
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| CN2473825Y (en) * | 2001-04-26 | 2002-01-23 | 郑向宏 | Digital audio frequency radio transmitting and receiving device |
| WO2007082372A1 (en) * | 2006-01-17 | 2007-07-26 | Edgewater Computer Systems, Inc. | Approximate linear fm synchronization symbols for a bandwidth configurable ofdm modem |
| CN102148652A (en) * | 2011-02-17 | 2011-08-10 | 上海奇微通讯技术有限公司 | System and method for measuring network clock synchronization |
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