CN104320111B - Clock source automatic management circuit - Google Patents
Clock source automatic management circuit Download PDFInfo
- Publication number
- CN104320111B CN104320111B CN201410496719.9A CN201410496719A CN104320111B CN 104320111 B CN104320111 B CN 104320111B CN 201410496719 A CN201410496719 A CN 201410496719A CN 104320111 B CN104320111 B CN 104320111B
- Authority
- CN
- China
- Prior art keywords
- oscillation
- signal
- crystal oscillator
- oscillator
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Oscillators With Electromechanical Resonators (AREA)
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
Abstract
The invention relates a clock source automatic management circuit. The clock source automatic management circuit comprises a crystal oscillator, a RC oscillator, a clock selection module for outputting a clock signal, a RC delayer provided with delay time and used for providing a delay signal, a delay monitoring module provided with oscillation stop delay time and used for providing an oscillator stop delay time signal, an oscillation judgment management module, an oscillation state register stored with oscillation state information and used for providing an oscillator state signal according to the oscillation state information, and a power-up control module for supplying power for the crystal oscillator or the RC oscillator according to the oscillation state signal. The clock source automatic management circuit automatically selects the crystal oscillator or the RC oscillator to output the oscillation signal; and the clock selection module outputs the oscillation signal as the clock signal. The problem of automatically performing clock source switching is solved by using the clock source automatic management circuit provided by the invention, the circuit is compact in structure, clear in function, convenient to transplant, and good in processing compatibility.
Description
Technical field
The present invention relates to a kind of circuit for providing clock source, especially a kind of clock suitable for fuze control special circuit
Source manages circuit automatically.
Background technology
With information-based desired continuous improvement, electronic technology is increasingly being used in fuse structure so that fuse
Gradually by developing into based on contactless electronic fuse based on Mechanized Type Fuse, to realize the control that fuze function is designed
Special circuit becomes the control core unit of fuse so that the function and application of fuse is more and more effectively, flexibly.
Fuze control special IC is because the features such as having small size, low-power consumption, high reliability, can be used as height
The timing self-destruction control device of time precision, high reliability, also can realize the target of fuse as the control core of electronic fuse
The functions such as detection, logical process, target attack, timing self-destruction and oneself disability.It is to realize that length is prolonged using control special IC
When time fuze function best method.Time delay is determined by clock signal frequency of oscillation and frequency dividing series.Equally, according to prolonging
Late time and stepping need, and can be devised by the timing circuit of different clock frequencies and frequency dividing multiple, each so as to meet fuse
Plant the needs of different timing time.
From the analysis of fuse use environment, fuze control integrated circuit has the requirement of following several respects, because timing can
Can be very long, several days or some months are likely to, and the limited electrical power of equipment, so require one to be that power consumption is low, two is timing
Precision is high, and otherwise through prolonged drift, cumulative error is increasing, causes functionally discrete property too big and cannot use.
In addition the environment that fuse is used varies, wherein very special is on one side to bear high overload.If ammunition is by thorax
The effect of inertia force, goes out thorax moment overload and reaches 8000-15000g.If for the fuse of penetration ammunition, in the course of the work
Needs bear higher overload, in some instances it may even be possible to reach 30000-50000g.Stand in the breach in such a case and impacted be exactly
Clock source, high accuracy, low-power consumption and resistance to high overload are the subject matter for facing.Therefore fuze control integrated circuit it is most crucial one
Individual technology is exactly the management of the design with clock source of clock source itself.
The realization of clock source in integrated circuit has various methods.RC oscillator structures are simple, and stability is high, use flexibly,
Especially bear the performance of overload very well, but its temperature characterisitic is not high, if to improve temperature characterisitic, it is necessary to enter trip temperature benefit
Repay, increase more structures, corresponding power consumption increase.Frequency division type time delay is realized according to crystal oscillation, error is minimum, simply may be used
It is accurate high by, timing, but crystal oscillator in impact and is necessarily transshipped and is shaken due to internal quartz limited reliability itself
Can cause to damage in the case of dynamic, function is affected when serious.
Such as the patent of Patent No. 200820157771.1《A kind of clock generation circuit》, its design include reference circuit,
Charging and discharging currents produce circuit, discharge and recharge clock generation circuit, reference voltage circuit.This patent can improve clock frequency with
The big problem of temperature change, but the structure of this patent is more complicated, inside many transistors and electronics, unavoidably
Can bring than larger power consumption, be mainly used in electric energy metrical field, be not suitable for low-power consumption fuze control circuit.
The patent of Patent No. 200320111039.8《Full-digital temperature-compensating chip oscillator monolithic integrated block》, its master
The design agitator being used in communication field, by temperature sensor, ad/da converter, memorizer, serioparallel exchange
And the composition such as controller, buffer, digital filter, frequency divider, manostat, varactor, crystal resonator, it uses digital circuit
Temperature change is converted into into change in voltage, then through temperature-compensating by change in voltage automatic stabilisation crystal frequency, reaches temperature benefit
The purpose repaid.Although this structure has characteristic using temperature-frequency good, small volume, the advantages of low in energy consumption, due to internal collection
Into more module, and also this unit of AD, DA, type of modules is more and complicated, is not suitable for fuse clock source highly reliable
The requirement of property.
Agitator is also a kind of structure for developing in recent years on piece, and processing compatibility is a subject matter, it will usually used
To high-precision resistance etc., also have compatible with lsi technology certainly, such as Publication No. CN202889288U
Patent《Based on the high accuracy on chip clock oscillator that CMOS technology is realized》, using frequency-voltage conversion circuit, integrating circuit, pressure
Controlled oscillator forms closed loop control oscillation circuit, so as to reduce the impact of process deviation.Trimmed automatically using electric current, temperature-compensating
Current source, it is ensured that preferable temperature characterisitic.But this structure is processed once technique, frequency is just determined, it is impossible to carried out more
Change, need other frequencies, then to redesign, high cost.
At present the clock inside many single-chip microcomputers has crystal oscillator and RC agitators, or the agitator on piece, has
It is a bit 2-3 shared pin, has plenty of and independently draw pin, but no matter which kind of situation, in a kind of applied environment
One of them can only be selected, having connect crystal can only use crystal oscillation source, having met RC can only use RC oscillation sources.If selected for using
Oscillation source on piece, then outside crystal and RC vibrations all can not be used again, can not be changed during use.
Above-mentioned various vibration schemes can only all meet certain requirement of fuse to oscillation source, it is impossible to meet fuse use environment
Whole requirements in integrated circuit oscillation source are controlled it.And the use environment of fuse determines that the management of different oscillation sources must be certainly
It is dynamic to carry out, never can manual operation.Accordingly, it would be desirable to design a kind of new clock source manages circuit automatically so as to can cut automatically
Change and provide clock source for fuse, and meet other demands of fuse.
The content of the invention
It is an object of the invention to provide one kind can be according to environment automatic handover oscillation source, and power consumption is relatively low, resistance to high overload
High accuracy real-time clock manage circuit automatically.
To reach above-mentioned purpose, the technical solution used in the present invention is:
A kind of clock source manages circuit, including crystal oscillator, RC agitators, the clock selecting of output clock signal automatically
Module, the RC chronotron for being provided with delay time and time delayed signal being provided, it is provided with failure of oscillation delay time and failure of oscillation time delay is provided
The delay monitoring module of time signal, oscillation judgment management module, the oscillatory regime that is stored with information simultaneously provide accordingly oscillatory regime
The oscillatory regime depositor of signal, according to described oscillatory regime signal to described crystal oscillator or described RC agitators
Power plus electric control module;
The outfan of described crystal oscillator, the outfan of described RC chronotron, described delay monitoring module
Outfan, the outfan of described oscillatory regime depositor are connected respectively with the input of described oscillation judgment management module
Connect, the agitator that described oscillation judgment management module also has input oscillator selection signal selects pin, described vibration
The outfan for judging management module is connected with described oscillatory regime depositor, the outfan of described oscillatory regime depositor
Input, the input of described clock selection module also with described RC chronotron, described plus electric control module it is defeated
Enter end to be connected, described plus electric control module outfan respectively with the input and described RC of described crystal oscillator
The input of agitator is connected, the outfan of described crystal oscillator and the outfan of described RC agitators respectively with institute
The input of the clock selection module stated is connected, and the outfan of described clock selection module is that described clock source is managed automatically
The outfan of reason circuit;
Described clock source manage control method that circuit adopts automatically for:
(1)Described crystal oscillator or described RC agitator outputting oscillation signals;
1. when described oscillator selection signal is effective, described clock source manages circuit and enters fixed selection shape automatically
State:The described RC agitators of described oscillation judgment management module control add electric oscillation and outputting oscillation signal, described crystal
Agitator is not added with electric oscillation;
2. when described oscillator selection signal is invalid, described clock source manages circuit entrance and automatically selects shape automatically
State:The described oscillatory regime depositor of described oscillation judgment management module control produces different oscillatory regime signals, described
Plus electric control module powered to described crystal oscillator or described RC agitators according to described oscillatory regime signal and
Make its outputting oscillation signal;
Ith, when described clock source manages electricity on circuit automatically, described in described oscillation judgment management module control change
Oscillatory regime information-reply initial value in oscillatory regime depositor, so as to control described plus electric control module only to described
Crystal oscillator is powered;Now, described RC chronotron starts timing, and shakes to described when described delay time is reached
Swing the time delayed signal for judging that management module output is described;In described delay time, if described crystal oscillator starting of oscillation is simultaneously
Outputting oscillation signal, then described oscillation judgment management module protect the oscillatory regime information in described oscillatory regime depositor
Hold constant, if failure of oscillation again after the non-starting of oscillation of described crystal oscillator or starting of oscillation, oscillation judgment management module makes described vibration
Oscillatory regime information in status register changes into first state value, so as to control described plus electric control module simultaneously to institute
The RC agitators and described crystal oscillator stated is powered, described RC agitator outputting oscillation signals;
IIth, after described RC agitators power-up, described delay monitoring module starts timing, and is reaching described failure of oscillation
To the failure of oscillation time delayed signal that described oscillation judgment management module output is described during delay time;In described failure of oscillation delay time
Interior, if described crystal oscillator starting of oscillation and outputting oscillation signal, described oscillation judgment management module makes described vibration
Oscillatory regime information-reply initial value in status register, so as to control described plus electric control module only to described crystal
Agitator is powered;In described failure of oscillation delay time, if the non-starting of oscillation of described crystal oscillator, described vibration judges pipe
Reason module makes the oscillatory regime information in described oscillatory regime depositor change into the second state value, so as to control described adding
Electric control module only keeps power supply, stops power supply to described crystal oscillator to described RC agitators, described RC vibrations
Device outputting oscillation signal;
(2)Described oscillator signal is exported and becomes clock signal by described clock selection module.
Described RC agitators include six grades of phase inverters being sequentially connected, described in the phase inverter and the second level described in the first order
Phase inverter between be connected with rest-set flip-flop.
Described crystal oscillator is connected by monostable circuit with described oscillation judgment management module.
Described monostable circuit includes that d type flip flop, two phase inverters, NAND gate, high level delay circuit, low levels prolong
When circuit;Mono- institute's speed phase inverter of outfan Jing of described crystal oscillator is connected with the cl ends of described d type flip flop,
Another phase inverter of reset signal Jing is connected to an input of described NAND gate, the outfan of described NAND gate with it is described
The R ends of d type flip flop be connected, the Q ends of described d type flip flop are divided into two branch roads, and the high level described in a branch road Jing prolongs
When circuit and be connected to another input of described NAND gate, the low level delay circuit described in another branch road Jing and shape
Into its outfan.
The delay time set in described RC chronotron is longer than the necessary Induction Peried of described crystal oscillator and steady
Fix time sum.
Because above-mentioned technical proposal is used, the present invention has compared with prior art following advantages:The present invention is solved
In the complex environment that fuse dedicated control circuit is used, the problem of clock source switching is carried out automatically, not only can be in high overload
Under the conditions of ensure circuit normal work, and guarantee device under conditions of extreme adopt high-precision clock source work
Make, it is ensured that the precision of timing.Present configuration is simple and direct, definite functions, and transplanting is convenient, and processing compatibility is good, is current
It is most appropriate to the clock source of fuse dedicated control circuit.
Description of the drawings
Accompanying drawing 1 manages the theory diagram of circuit for the clock source of the present invention automatically.
Accompanying drawing 2 manages the structural representation of the RC agitators of circuit for the clock source of the present invention automatically.
Accompanying drawing 3 manages the structural representation of the monostable circuit of circuit for the clock source of the present invention automatically.
Accompanying drawing 4 manages the waveform diagram of a point in the monostable circuit of circuit for the clock source of the present invention automatically.
Specific embodiment
Below in conjunction with the accompanying drawings the invention will be further described for shown embodiment.
Embodiment one:Referring to shown in accompanying drawing 1.A kind of clock source being applied in fuze control special circuit manages electricity automatically
Road, including crystal oscillator, RC agitators, clock selection module, RC chronotron, delay monitoring module, vibration judgement management mould
Block, oscillatory regime depositor, plus electric control module.Wherein, clock selection module is used to export clock signal;Set in RC chronotron
It is equipped with delay time and time delayed signal is provided;Failure of oscillation delay time is provided with delay monitoring module and failure of oscillation delay time is provided
Signal;The oscillatory regime that is stored with oscillatory regime depositor information simultaneously provides accordingly oscillatory regime signal;Plus electric control module root
Crystal oscillator or RC agitators are powered according to oscillatory regime signal.
Specifically, the outfan of crystal oscillator, the outfan of RC chronotron, the outfan of delay monitoring module, vibration
The outfan of status register is connected respectively with the input of oscillation judgment management module;Oscillation judgment management module also has
The agitator of input oscillator selection signal selects pin;The outfan of oscillation judgment management module and oscillatory regime depositor phase
Connection.Input of the outfan of oscillatory regime depositor also with RC chronotron, the input of clock selection module, plus electric control
The input of module is connected.Plus the outfan of electric control module is defeated with the input of crystal oscillator and RC agitators respectively
Enter end to be connected.The outfan of crystal oscillator and the outfan of RC agitators are connected respectively with the input of clock selection module
Connect, the outfan of clock selection module is the outfan that clock source manages circuit automatically.
Wherein, RC agitators include six grades of phase inverters being sequentially connected, between first order phase inverter and second level phase inverter
Rest-set flip-flop is connected with, as shown in Figure 2.Crystal oscillator is connected by monostable circuit with oscillation judgment management module.
As shown in accompanying drawing 3 and accompanying drawing 4, monostable circuit includes d type flip flop, two phase inverters, NAND gate, high level delay circuits
delay1(μ s of time delay 10 or so), low level delay circuit delay2(μ s of time delay 90 or so);The outfan Jing of crystal oscillator
One institute's speed phase inverter is connected with the cl ends of d type flip flop, and another phase inverter of reset signal Jing is connected to of NAND gate
Input, the outfan of NAND gate is connected with the R ends of d type flip flop, and the Q ends of d type flip flop are divided into two branch roads, a branch road
Jing high level delay circuit delay1 and be connected to another input of NAND gate, another branch road Jing low level delay circuit
Delay2 and form its outfan.
Clock source manages the control method of circuit employing and is summarised as automatically:First, crystal oscillator or RC agitators are exported
Oscillator signal;Then, oscillator signal is exported and becomes clock signal by clock selection module.
Wherein, " crystal oscillator or RC agitator outputting oscillation signals " includes two kinds of situations:Oscillator selection signal has
Effect and oscillator selection signal are invalid.
When oscillator selection signal it is effective(As high level)When, clock source manages circuit and enters fixed selection shape automatically
State.Under the fixation selection state, it is high level that oscillation judgment management module makes the STOP ends of crystal oscillator, so crystal shakes
Swing device and be not added with electric oscillation, and make the control end of RC agitators also be high level, so RC agitators add electric oscillation and export vibration
Signal.
And when oscillator selection signal is invalid, clock source manages circuit entrance and automatically selects state automatically.It is automatic at this
Under selection state, oscillation judgment management module control oscillatory regime depositor produces different oscillatory regime signals, plus electric control
Module is powered to crystal oscillator or RC agitators according to oscillatory regime signal and makes its outputting oscillation signal.
Specifically, when clock source manages electricity on circuit automatically, the electrification reset circuit in oscillation judgment management module is produced
Reset signal control change oscillatory regime depositor in oscillatory regime information-reply initial value 00, now, control plus it is automatically controlled
Molding block is only powered to crystal oscillator, prepares starting of oscillation, and RC agitators are not powered.While powering up to crystal oscillator,
RC chronotron starts timing.The necessary Induction Peried that is longer than crystal oscillator and stabilization time sum are provided with RC chronotron
Delay time(Such as 300ms), the delay time can adjust by outside RC network.When delay time is reached, RC chronotron to
Oscillation judgment management module exports the time delayed signal of a rising edge.In delay time, if crystal oscillator starting of oscillation and output shake
Signal is swung, then it produces a high level by monostable circuit first, if detecting monostable circuit generation during rising edge
DC level signal, shows crystal oscillator starting of oscillation, and crystal nonoscillatory is designated 0, and oscillation judgment management module makes vibration
Oscillatory regime information holding 00 in status register is constant, then adding electric control module still only to power to crystal oscillator makes its defeated
Go out oscillator signal, and RC agitators are not powered.Now, clock selection module selects the oscillator signal conduct of crystal oscillator output
Clock signal.
If again failure of oscillation after the non-starting of oscillation of crystal oscillator or starting of oscillation, oscillation judgment management module is made in oscillatory regime depositor
Oscillatory regime information change into first state value 01, so as to control plus electric control module is simultaneously to RC agitators and crystal oscillation
Device is powered, and now clock selection module selects the oscillator signal of RC agitators output as clock signal.
When RC agitators are powered up, delay monitoring module starts timing.Failure of oscillation delay time is set with delay monitoring module,
Such as 10s.When failure of oscillation delay time is reached, delay monitoring module to oscillation judgment management module exports failure of oscillation time delayed signal.
In failure of oscillation delay time, if crystal oscillator starting of oscillation, it is by monostable circuit one rising edge of output and defeated
Go out oscillator signal, then 10sec starting of oscillations are designated 1, and oscillation judgment management module believes the oscillatory regime in oscillatory regime depositor
Breath replys initial value 00 by first state value 01, so as to control to add electric control module only to power to crystal oscillator, closes RC and shakes
Swing device.In failure of oscillation delay time, if the non-starting of oscillation of crystal oscillator, oscillation judgment management module is made in oscillatory regime depositor
Oscillatory regime information the second state value 11 is changed into by first state value 01, and this state is unconditionally maintained, so as to control
Plus electric control module is only powered to RC agitator permanent retentions, and forever stop power supply to crystal oscillator.Clock selection module
The oscillator signal of RC agitators output is selected as clock signal.
The present invention adopts bimodulus oscillating structure, i.e., simultaneously using crystal oscillator and RC agitators, capacitance-resistance is external, the design
In frequency of oscillation by taking 32768Hz as an example, certainly other frequencies are similar to.The oscillating structure of crystal oscillator adopts common knot
Structure, i.e., be made up of the input of a crystal oscillation control end and two connection crystal.Crystal oscillation control end in low level,
Agitator adds electric oscillation;It is high level in control end, agitator is not powered, is output as low level.This structure is steady in use
It is fixed, and element is few.RC agitators are that the positive feedback that conventional two-stage phase inverter plus electric capacity are formed is changed into into six grades of phase inverters
Plus electric capacity forms positive feedback, so the amplification of feedback network is much greater;In addition, also having added rest-set flip-flop, upset is improved
Speed.RC pierce circuit advantages:Because number of stages of amplification is more, circuit starting of oscillation speed is fast, starting of oscillation reliability.Further, since band RS is touched
Sending out device causes circuit in middle magnifying state, and the process time that NMOS tube is simultaneously turned on PMOS is very short, so circuit starting of oscillation
When static current of lcd it is little.Certainly because the series of circuit is more, in feedback network, limit is more, and higher harmonic components are more, so this
Circuit is only suitable for making audio oscillator.If the circuit of the present invention is used as into generation high-frequency circuit, then corresponding RC agitators
Structure need change.
In monostable circuit, μ s of high level time delay 10 or so, the μ s of low level time delay 90 or so, equivalent to the 2 of cycle of oscillation
To between 3 times, if so 3 cycles of clock failure of oscillation when, monostable stationary state occurs in that low level.Because this circuit is employed perhaps
More asynchronous sequencing contro, to producing the crystal oscillation identification burst of clock signal it is noted that interference protection measure, i.e., to burr
The interference of generation is unaffected, and these id signals are latched using d type flip flop in circuit design, to ensure id signal
Totally.In order to ensure circuit reliably working under complicated clock environment, it is noted that the block of signal and relieving during circuit design.
When monostable circuit is designed, the burr on exporting is prevented, because the latch of depositor is acted on, high level delay circuit
The burr of delay1 is harmless;It is low by being eliminated using Schmidt's structure and the burr of low level delay circuit delay2 is dangerous
The burr that the low level delay circuit delay2 of level delay circuit delay2 is produced.
The clock source manages crystal and RC oscillator structure of the circuit using two automatic switchovers automatically, and it is convenient to build;It is single
Stable structure judges the state for vibrating automatically;Using the elimination for postponing to carry out burr, erroneous judgement can be avoided.
Above-described embodiment technology design only to illustrate the invention and feature, its object is to allow person skilled in the art
Scholar will appreciate that present disclosure and implement according to this, can not be limited the scope of the invention with this.It is all according to the present invention
Equivalence changes or modification that spirit is made, all should be included within the scope of the present invention.
Claims (5)
1. a kind of clock source manages circuit automatically, it is characterised in that:It includes crystal oscillator, RC agitators, output clock letter
Number clock selection module, be provided with delay time and time delayed signal be provided RC chronotron, be provided with failure of oscillation delay time simultaneously
The delay monitoring module of failure of oscillation delay time signal, oscillation judgment management module, the oscillatory regime that is stored with information and accordingly are provided
There is provided oscillatory regime signal oscillatory regime depositor, according to described oscillatory regime signal to described crystal oscillator or institute
The RC agitators stated are powered plus electric control module;
The outfan of described crystal oscillator, the outfan of described RC chronotron, the output of described delay monitoring module
End, the outfan of described oscillatory regime depositor are connected respectively with the input of described oscillation judgment management module, institute
Also there is the oscillation judgment management module stated the agitator of input oscillator selection signal to select pin, described vibration to judge pipe
The outfan of reason module is connected with described oscillatory regime depositor, the outfan of described oscillatory regime depositor also with institute
The input phase of the input, the input of described clock selection module and described plus electric control module of the RC chronotron stated
Connection, described plus electric control module outfan respectively with the input of described crystal oscillator and described RC agitators
Input be connected, the outfan of described crystal oscillator and the outfan of described RC agitators respectively with it is described when
The input of clock selecting module is connected, and the outfan of described clock selection module is that described clock source manages circuit automatically
Outfan;
Described clock source manage control method that circuit adopts automatically for:
(1)Described crystal oscillator or described RC agitator outputting oscillation signals;
1. when described oscillator selection signal is effective, described clock source manages circuit and enters fixed selection state automatically:
The described RC agitators of described oscillation judgment management module control add electric oscillation and outputting oscillation signal, described crystal oscillation
Device is not added with electric oscillation;
2. when described oscillator selection signal is invalid, described clock source manages circuit entrance and automatically selects state automatically:
The described oscillatory regime depositor of described oscillation judgment management module control produces different oscillatory regime signals, and described adds
Electric control module is powered to described crystal oscillator or described RC agitators according to described oscillatory regime signal and makes it
Outputting oscillation signal;
Ith, when described clock source manages electricity on circuit automatically, the described vibration of described oscillation judgment management module control change
Oscillatory regime information-reply initial value in status register, so as to control described plus electric control module only to described crystal
Agitator is powered;Now, described RC chronotron starts timing, and sentences to described vibration when described delay time is reached
The described time delayed signal of disconnected management module output;In described delay time, if described crystal oscillator starting of oscillation and exporting
Oscillator signal, then described oscillation judgment management module the oscillatory regime information in described oscillatory regime depositor is kept not
Become, if failure of oscillation again after the non-starting of oscillation of described crystal oscillator or starting of oscillation, oscillation judgment management module makes described oscillatory regime
Oscillatory regime information in depositor changes into first state value, so as to control described plus electric control module simultaneously to described
RC agitators and described crystal oscillator are powered, described RC agitator outputting oscillation signals;
IIth, after described RC agitators power-up, described delay monitoring module starts timing, and is reaching described failure of oscillation time delay
To the failure of oscillation time delayed signal that described oscillation judgment management module output is described during the time;In described failure of oscillation delay time,
If described crystal oscillator starting of oscillation and outputting oscillation signal, described oscillation judgment management module makes described oscillatory regime
Oscillatory regime information-reply initial value in depositor, so as to control described plus electric control module only to described crystal oscillation
Device is powered;In described failure of oscillation delay time, if the non-starting of oscillation of described crystal oscillator, described vibration judges management mould
Block makes the oscillatory regime information in described oscillatory regime depositor change into the second state value, described plus automatically controlled so as to control
Molding block only keeps power supply and stops power supply to described crystal oscillator to described RC agitators, and described RC agitators are defeated
Go out oscillator signal;
(2)Described oscillator signal is exported and becomes clock signal by described clock selection module.
2. clock source according to claim 1 manages circuit automatically, it is characterised in that:Described RC agitators are included successively
Six grades of phase inverters of connection, between the phase inverter described in phase inverter and the second level described in the first order rest-set flip-flop is connected with.
3. clock source according to claim 1 manages circuit automatically, it is characterised in that:Described crystal oscillator is by single
Steady-state circuit is connected with described oscillation judgment management module.
4. clock source according to claim 3 manages circuit automatically, it is characterised in that:Described monostable circuit includes D
Trigger, two phase inverters, NAND gate, high level delay circuit, low level delay circuits;The output of described crystal oscillator
Phase inverter described in the Jing mono- of end is connected with the cl ends of described d type flip flop, and another phase inverter of reset signal Jing is connected to institute
One input of the NAND gate stated, the described outfan of NAND gate is connected with the R ends of described d type flip flop, described D
The Q ends of trigger are divided into two branch roads, the high level delay circuit described in a branch road Jing and be connected to described NAND gate
Another input, the low level delay circuit described in another branch road Jing and form the outfan of described monostable circuit.
5. clock source according to claim 1 manages circuit automatically, it is characterised in that:Set in described RC chronotron
Delay time is longer than the necessary Induction Peried and stabilization time sum of described crystal oscillator.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410496719.9A CN104320111B (en) | 2014-09-25 | 2014-09-25 | Clock source automatic management circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410496719.9A CN104320111B (en) | 2014-09-25 | 2014-09-25 | Clock source automatic management circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
CN104320111A CN104320111A (en) | 2015-01-28 |
CN104320111B true CN104320111B (en) | 2017-05-17 |
Family
ID=52375308
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410496719.9A Active CN104320111B (en) | 2014-09-25 | 2014-09-25 | Clock source automatic management circuit |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN104320111B (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10050585B2 (en) * | 2015-06-18 | 2018-08-14 | Microchip Technology Incorporated | Ultra-low power crystal oscillator with adaptive self-start |
CN106067762B (en) * | 2016-06-15 | 2019-06-28 | 泰凌微电子(上海)有限公司 | The crystal-oscillator circuit of fast start-up |
CN106253882B (en) * | 2016-10-12 | 2023-06-27 | 江阴元灵芯旷微电子技术有限公司 | Wide range time delay circuit with mode switching function |
CN106603045A (en) * | 2016-12-16 | 2017-04-26 | 中国电子科技集团公司第五十四研究所 | Clock transmission switching and quick stop/restart circuit |
CN107066250A (en) * | 2017-01-05 | 2017-08-18 | 珠海格力电器股份有限公司 | Power consumption control circuit, electrical equipment and power consumption control method |
CN107947764B (en) * | 2017-12-13 | 2021-05-07 | 中国科学院微电子研究所 | COMS oscillator circuit |
CN112100120A (en) * | 2020-09-14 | 2020-12-18 | 上海艾为电子技术股份有限公司 | SOC chip and power-on control method thereof |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5369377A (en) * | 1993-10-13 | 1994-11-29 | Zilog, Inc. | Circuit for automatically detecting off-chip, crystal or on-chip, RC oscillator option |
US6157265A (en) * | 1998-10-30 | 2000-12-05 | Fairchild Semiconductor Corporation | Programmable multi-scheme clocking circuit |
CN2650392Y (en) * | 2003-10-16 | 2004-10-20 | 张连琴 | Full-digital temperature-compensating chip oscillator monolithic integrated block |
CN201340440Y (en) * | 2008-12-25 | 2009-11-04 | 上海贝岭股份有限公司 | Clock generating circuit |
CN202889288U (en) * | 2012-09-14 | 2013-04-17 | 苏州锐控微电子有限公司 | High-precision on-chip clock oscillator realized based on CMOS technology |
-
2014
- 2014-09-25 CN CN201410496719.9A patent/CN104320111B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5369377A (en) * | 1993-10-13 | 1994-11-29 | Zilog, Inc. | Circuit for automatically detecting off-chip, crystal or on-chip, RC oscillator option |
US6157265A (en) * | 1998-10-30 | 2000-12-05 | Fairchild Semiconductor Corporation | Programmable multi-scheme clocking circuit |
CN2650392Y (en) * | 2003-10-16 | 2004-10-20 | 张连琴 | Full-digital temperature-compensating chip oscillator monolithic integrated block |
CN201340440Y (en) * | 2008-12-25 | 2009-11-04 | 上海贝岭股份有限公司 | Clock generating circuit |
CN202889288U (en) * | 2012-09-14 | 2013-04-17 | 苏州锐控微电子有限公司 | High-precision on-chip clock oscillator realized based on CMOS technology |
Also Published As
Publication number | Publication date |
---|---|
CN104320111A (en) | 2015-01-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN104320111B (en) | Clock source automatic management circuit | |
US10110060B2 (en) | Semiconductor device | |
CN105680852B (en) | A kind of chip interior clock generates and otherness detection method and circuit | |
CN104834581B (en) | A kind of failure of oscillation observation circuit of crystal oscillator | |
CN105404374A (en) | In-chip reset system and reset method for system-on-chip chip | |
CN107787552A (en) | Periodicity starter for crystal oscillator | |
CN107678532A (en) | A kind of low-power dissipation SOC wake module and low-power dissipation SOC | |
CN102573156B (en) | System On Chip (SOC) chip special for electromagnetic induction heating controller | |
CN110011663A (en) | Stablize the starting behavior of ring oscillator | |
CN208999990U (en) | Real random number generator | |
CN208063178U (en) | A kind of NBTI delayed senescences monitoring system towards phaselocked loop | |
CN109669524A (en) | The electrification reset circuit of chip | |
CN201966880U (en) | Low power dissipation time-delay controllable power on reset circuit | |
CN105527560A (en) | Chip difference monitoring method and monitoring circuit | |
CN107645288A (en) | For producing electronic circuit, method and the electronic installation of pulse | |
CN205017272U (en) | Real -time clock error compensation device | |
CN104320136B (en) | Clock signal generator realized by utilizing all-digital standard unit | |
US7387433B2 (en) | Integrated circuit chip for analogue electronic watch applications | |
CN105915214B (en) | Phase-locked loop control circuit and method | |
CN204857176U (en) | Single line package electromagnetic buzzer drive circuit who integrates entirely | |
CN207081983U (en) | Intelligent pulse signal detector | |
JP2006215618A (en) | Clock generating circuit | |
CN205581708U (en) | Real -time clock control system suitable for SOC | |
JPH0464431B2 (en) | ||
CN104639114B (en) | QCLK generation units based on RSFF |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
TR01 | Transfer of patent right |
Effective date of registration: 20180813 Address after: 233030 2016 Tang He road, Bengbu, Anhui Patentee after: Huadong Photoelectric Integrated Device Research Institute Address before: 215163 No. 89 Longshan Road, hi tech Zone, Suzhou, Jiangsu Patentee before: China North Industries Group Corporation No.214 Research Institute Suzhou R&D Center |
|
TR01 | Transfer of patent right |