CN104318883B - Shift register and unit thereof, display and threshold voltage compensation circuit - Google Patents
Shift register and unit thereof, display and threshold voltage compensation circuit Download PDFInfo
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- CN104318883B CN104318883B CN201410531526.2A CN201410531526A CN104318883B CN 104318883 B CN104318883 B CN 104318883B CN 201410531526 A CN201410531526 A CN 201410531526A CN 104318883 B CN104318883 B CN 104318883B
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Abstract
The invention discloses a shift register. The shift register comprises at least one cascaded shift register unit, wherein the shift register unit comprises a driving module, an input module, a low-level maintenance module and a threshold voltage compensation module; the threshold voltage compensation module comprises a mirror image tube, a first switch tube and a second switch tube; the first switch tube responds to switch-on of a second signal to charge a low-level maintenance enabling end; the second switch tube responds to effective level switch-on of a third signal to extract threshold voltage of the low-level maintenance transistor in the low-level maintenance module through the mirror image tube, feed back to the low-level maintenance enabling end and adjust the power supply voltage output to the low-level maintenance enabling end according to the induced threshold voltage, so that the threshold voltage drift of the low-level maintenance transistor can be compensated and the life of the circuit is prolonged. The invention also discloses a display and a threshold voltage compensation circuit.
Description
Technical field
The application is related to electronic circuit field, more particularly, to a kind of shift register and its unit, display and threshold value
Voltage compensating circuit.
Background technology
Active flat pannel display (am-fpd) is the mainstream technology of modern display field.The drive circuit of flat panel displayses
Be usually by the form of peripheral ic using press seal in the way of be connected on display floater.In recent years, integrative display drive circuit
It is increasingly becoming the study hotspot of flat panel display.So-called integrative display drive circuit refers to drive gate driver circuit data
The peripheral circuits such as galvanic electricity road are made on display floater in the form of thin film transistor (TFT) (tft) together with pixel tft, thus reducing
The quantity of peripheral driver chip and its press seal program, reduces cost, moreover it is possible to make display periphery more slim, make to show
Show that device module is compacter, mechanically and electrically reliability is enhanced.
Shift register cell is very important unit module in gate driver circuit.Setting in shift register cell
In meter, the transistor keeping for output signal low level is typically due to threshold value electricity by the voltage stress of long period
Pressure drift, these transistors may lead to circuit to lose efficacy after working long hours.For the shifting based on non-crystalline silicon tft Technology design
For bit register unit, low level maintains the threshold voltage shift of transistor more seriously will often become the impact circuit longevity
The key of life.
In order to obtain highly reliable shift register cell, in some designs existing, generally using reduction voltage stress
Size, pulse voltage biasing, the mode such as dutycycle reducing voltage maintain the threshold voltage drift of transistor to reduce low level
Move, thus extending the life-span of circuit.These designs typically can meet the requirement of small size display application.But, in big or middle chi
In very little Display panel application, drive circuit needs to be in mode of operation under the longer time, objectively the life-span of circuit is proposed
Harsher requirement.Therefore, how effectively to tackle the threshold voltage shift that low level in circuit maintains transistor, extend
In the life-span of circuit, be the problem of a great researching value.
Content of the invention
The application provides a kind of shift register and its unit, display and threshold voltage compensation circuit, to realize being based on
The service voltage of the threshold voltage shift adjusting device circuit of circuitry.
According to the application's in a first aspect, the application provides a kind of threshold voltage compensation circuit, comprising: mirror image pipe, first
Switching tube and second switch pipe, wherein,
The control pole of first switch pipe is extremely short with first to be connect for inputting secondary signal；The control pole of second switch pipe is used for
Input the 3rd signal；First pole of the control pole of mirror image pipe, the second pole of first switch pipe and second switch pipe is used for coupling
Feeder ear to circuitry；Second pole of second switch pipe is coupled to the first pole of mirror image pipe；Second pole of mirror image pipe is used for
Coupled to low level end；
First switch pipe responds the significant level conducting of secondary signal, and mirror image pipe control pole is charged；
Second switch pipe responds the significant level conducting of the 3rd signal, and the control pole of mirror image pipe is discharged to extract mirror
The threshold voltage of image tube, and according to extract threshold voltage adjustment output to circuitry feeder ear voltage；
The arrival time of the significant level in the 3rd signal for the arrival time lead of the significant level of secondary signal.
According to the second aspect of the application, the application provides a kind of shift register, including at least one displacement of cascade
Register cell, shift register cell includes: drive module, input module, low level maintenance module and threshold voltage compensation
Module, wherein,
Drive module is used for switching by off state, the first signal is sent to the signal output of shift register cell
End, thus export scanning signal；
Input module is used for controlling drive module switching on off state；
Low level maintenance module is used for switching by off state, will after this shift register cell output scanning signal
The signal output part of drive module maintains low level；Low level maintenance module includes the first maintenance unit, the first maintenance unit
When its first low level maintains the acquisition significant level of Enable Pin, the signal output part of drive module is maintained low level；
Threshold voltage compensation module senses the threshold voltage of low level maintenance module, according to threshold voltage adjustment output to the
One low level maintains the supply voltage of Enable Pin；
Threshold voltage compensation module includes: mirror image pipe, first switch pipe and second switch pipe, wherein,
The control pole of first switch pipe is extremely short with first to be connect for inputting secondary signal；The control pole of second switch pipe is used for
Input the 3rd signal；First pole of the control pole of mirror image pipe, the second pole of first switch pipe and second switch pipe is coupled to the
One low level maintains Enable Pin；Second pole of second switch pipe is coupled to the first pole of mirror image pipe；Second pole of mirror image pipe is used for
Coupled to low level end；
First switch pipe and second switch pipe respond secondary signal and the significant level conducting of the 3rd signal respectively；
The arrival time of the significant level in the 3rd signal for the arrival time lead of the significant level of secondary signal.
According to the third aspect of the application, the application provides a kind of display, comprising:
The two-dimensional array being made up of multiple pixels, and the first direction being connected with each pixel in array is a plurality of
Data wire and a plurality of controlling grid scan line of second direction；
Data drive circuit, provides data signal for data wire；
Gate driver circuit, is constituted using above-mentioned shift register, provides gate drive signal for controlling grid scan line.
The beneficial effect of the application is: the threshold voltage compensation circuit being provided according to the application, the threshold voltage of mirror image pipe
Follow circuitry and treat that the change of induction transistor threshold voltage changes, the threshold voltage of the mirror image pipe by extracting, adjust
Send the supply voltage of circuitry to, so that the supply voltage of circuitry can be brilliant with treating sensing in circuitry
The change of the threshold voltage of body pipe and change.
The shift register being provided according to the application, senses the threshold of low level maintenance module by threshold voltage compensation module
Threshold voltage drift about, and according to sensing threshold voltage adjustment output to low level maintain Enable Pin supply voltage such that it is able to
Compensate the threshold voltage shift that low level in low level maintenance module maintains transistor, extend the life-span of circuit.
Brief description
Fig. 1 is a kind of threshold voltage compensation circuit structure chart disclosed in the embodiment of the present application；
Fig. 2 is a kind of shift register cell circuit structure diagram disclosed in the embodiment of the present application one；
Fig. 3 is a kind of working timing figure of the embodiment of the present application one shift register cell；
Fig. 4 is the potential change schematic diagram that the embodiment of the present application one first low level maintains Enable Pin p1；
Fig. 5 is a kind of effect diagram of the embodiment of the present application one threshold voltage compensation；
Fig. 6 is another kind of shift register cell circuit structure diagram disclosed in the embodiment of the present application one；
Fig. 7 is the embodiment of the present application one threshold voltage compensation another kind effect diagram；
Fig. 8 is a kind of shift register cell circuit structure diagram disclosed in the embodiment of the present application two；
Fig. 9 is a kind of working timing figure of the embodiment of the present application two shift register cell；
Figure 10 is a kind of effect diagram of the embodiment of the present application two threshold voltage compensation；
Figure 11 is a kind of shift register structure schematic diagram disclosed in the embodiment of the present application three；
Figure 12 is the embodiment of the present application three shift register working timing figure；
Figure 13 is a kind of display disclosed in the embodiment of the present application three.
Specific embodiment
Combine accompanying drawing below by specific embodiment the present invention is described in further detail.
First some terms are illustrated:
Switching tube in the application is transistor.
Transistor in the application can be bipolar transistor or field-effect transistor.When transistor is bipolar transistor
Guan Shi, its control pole refers to the base stage of bipolar transistor, and first can be extremely colelctor electrode or the emitter stage of bipolar transistor,
Corresponding second can be extremely emitter stage or the colelctor electrode of bipolar transistor；When transistor is for field-effect transistor, its control
Pole processed refers to the grid of field-effect transistor, and first can be extremely drain electrode or the source electrode of field-effect transistor, corresponding second pole
Can be source electrode or the drain electrode of field-effect transistor.Transistor in display is usually a kind of field-effect transistor: thin film is brilliant
Body pipe (tft).So that transistor is as field-effect transistor as a example the application is described in detail below, brilliant in other embodiments
Body pipe can also be bipolar transistor.
Overlapping refer to two paths of signals at least in a certain phase in the same time all in significant level state, therefore, do not overlap as two
Road signal is not co-located on the moment of significant level state.
In this enforcement significant level be high level, in other alternate embodiments it is also possible to according to choose crystal
Pipe determines that significant level is low level.
Refer to Fig. 1, be a kind of threshold voltage compensation circuit structure chart disclosed in the present embodiment, this circuit includes: mirror image
Pipe t9, first switch pipe t11 and second switch pipe t10, wherein,
The control pole (such as grid) of first switch pipe t11 is used for inputting secondary signal with the first pole (for example draining) short circuit
vb；The control pole (such as grid) of second switch pipe t10 is used for input the 3rd signal vc；Control pole (the such as grid of mirror image pipe t9
Pole), first pole (for example draining) of second pole (such as source electrode) of first switch pipe t11 and second switch pipe t10 be used for coupling
It is bonded to the feeder ear of circuitry；Second pole (such as source electrode) of second switch pipe t10 is coupled to the first pole (example of mirror image pipe t9
As drain electrode)；Second pole (such as source electrode) of mirror image pipe t9 is used for coupled to low level end；
First switch pipe t11 responds secondary signal vbSignificant level conducting, to mirror image pipe t9 control pole (such as grid)
It is charged；
Second switch pipe t10 responds the 3rd signal vcSignificant level conducting, the control pole of mirror image pipe t9 is discharged,
Extract the threshold voltage of mirror image pipe t9 and be stored between mirror image pipe t9 control pole (such as grid) and the second pole (such as source electrode),
According to extract threshold voltage adjustment output to circuitry feeder ear voltage；
Secondary signal vbSignificant level arrival time lead in the 3rd signal vcSignificant level the arrival time, excellent
Selection of land, secondary signal vbSignificant level and the 3rd signal vcSignificant level do not overlap.
In a preferred embodiment, this circuit also includes the tenth two-transistor t12, the control pole of the tenth two-transistor t12
(such as grid) is used for input the first pulse signal vi1, first pole (for example draining) of the tenth two-transistor t12 is coupled to mirror image
The control pole (such as grid) of pipe t9, second pole (such as source electrode) of the tenth two-transistor t12 is used for coupled to low level end.The
One pulse signal vi1Pulse arrival time lead in secondary signal vbWith the 3rd signal vcSignificant level the arrival time.
Treat that induction transistor mirror image is connected due to mirror image pipe t9 and circuitry, therefore, mirror image pipe t9 can sense
Treat induction transistor threshold voltage, the voltage between mirror image pipe t9 control pole (such as grid) and the second pole (such as source electrode) can be with
The change treating induction transistor threshold voltage and change, based on this principle such that it is able to according to treating induction transistor threshold value
Voltage Cortrol exports to the supply voltage of circuitry.
Threshold voltage compensation circuit disclosed in the present embodiment is applied to any is powered based on the threshold voltage adjustments of transistor
The circuitry of voltage, illustrates to the application of this threshold voltage compensation circuit with reference to specific embodiment.
Embodiment one:
Refer to Fig. 2, be a kind of shift register cell circuit structure diagram disclosed in the present embodiment, this shift register list
Unit includes: drive module 20, input module 10, low level maintenance module 30 and threshold voltage compensation module 40, wherein,
Drive module 20 is used for switching by off state, by the first signal vaIt is sent to the signal of shift register cell
Outfan, thus export scanning signal.After its drive control end q charges and obtains driving voltage, by the first signal vaIt is sent to
The signal output part of shift register cell.In a kind of specific embodiment, drive module 20 can be included for being coupled to shifting
The transistor seconds t2 of the signal output part of bit register unit and the first electric capacity c1 for storage driving control end q electric charge,
In other embodiments or other existing type of drive.
Input module 10 is used for controlling drive module 20 switching on off state.For example it is used for from the first pulse signal input terminal
Input the first pulse signal vi1, charging to the drive control end q of drive module 20 provides driving voltage；It is additionally operable to from the second pulse
Signal input part inputs the second pulse signal vi2, the signal output part of shift register cell and drive control end q are coupled to
Low level end.In a kind of specific embodiment, input module 10 can be included for inputting the first pulse signal vi1First brilliant
Body pipe t1 and for input the second pulse signal vi2Third transistor t3 and the 4th transistor t4, wherein, third transistor
T3 is coupling between the signal output part of shift register cell and low level end, and the 4th transistor t4 is coupling in drive control end
Between q and low level end, in other embodiments or other existing input mode.
Low level maintenance module 30 is used for switching by off state, after this shift register cell output scanning signal
The signal output part of drive module 20 is maintained low level.In one embodiment, low level maintenance module 30 includes
One maintenance unit, the first maintenance unit is when its first low level maintains the acquisition significant level of Enable Pin p1 by shift register
The signal output part of unit and/or drive control end q are coupled to low level end to be maintained at low level；In another concrete reality
Apply in example, low level maintenance module 30 also includes the second maintenance unit, the second maintenance unit maintains in its second low level and enables
The signal output part of shift register cell and/or drive control end q are coupled to low level during significant level by obtaining of end p2
End is to be maintained at low level.Specifically, the first maintenance unit includes the second electric capacity c2, the 5th transistor t5, the 7th crystal
Pipe t7 and the 8th transistor t8.Wherein, the control pole (such as grid) of the 5th transistor t5, the control pole of the 7th transistor t7
First pole (for example draining) of (such as grid) and the 8th transistor t8 is coupled to the first low level and is maintained Enable Pin p1；5th is brilliant
Second pole (such as source electrode) of body pipe t5, first pole (for example draining) of the 7th transistor t7 and the control pole of the 8th transistor t8
(such as grid) is coupled to the signal output part of shift register cell；First pole (for example draining) coupling of the 5th transistor t5
To drive control end q；Second pole (such as source electrode) of the 7th transistor t7 and second pole (such as source electrode) of the 8th transistor t8
For being coupled to low level end；One end of second electric capacity c2 is used for input the first signal va, the other end is coupled to the first low level
Maintain Enable Pin p1.Second maintenance unit includes the 6th transistor t6, the first pole (for example draining) coupling of the 6th transistor t6
To the signal output part of shift register cell, second pole (such as source electrode) of the 6th transistor t6 is used for coupled to low level
End, the control pole (such as grid) of the 6th transistor t6 is that the second low level maintains Enable Pin p2, in one embodiment, the
The significant level of two low levels maintenance Enable Pins p2 can be by the 3rd signal vcThere is provided.
It should be noted that above-mentioned modules simply schematically illustrate shift register cell in an illustrative manner,
Each module all can adopt existing technical scheme, and therefore, in above-mentioned each module, some details do not describe in detail, and this area is general
Logical technical staff is capable of the connection between each module of shift register cell according to existing technical scheme.
Threshold voltage compensation module 40 senses the threshold voltage of low level maintenance module 30, adjusts output according to threshold voltage
Maintain the supply voltage of Enable Pin p1 to the first low level.In the present embodiment, the threshold voltage sensing maintains for low level
In module 30, one or more low level in parallel maintains the threshold voltage of transistor.Threshold voltage compensation module 40 includes: mirror
Image tube t9, first switch pipe t11 and second switch pipe t10.Wherein, the control pole (such as grid) of first switch pipe t11 and the
One pole (for example draining) short circuit is used for inputting secondary signal vb；The control pole (such as grid) of second switch pipe t10 is used for inputting
3rd signal vc；The control pole (such as grid) of mirror image pipe t9, second pole (such as source electrode) and second of first switch pipe t11
First pole (for example draining) of switching tube t10 maintains Enable Pin p1 coupled to the first low level；Second pole of second switch pipe t10
(such as source electrode) is coupled to first pole (for example draining) of mirror image pipe t9；Second pole (such as source electrode) of mirror image pipe t9 is used for coupling
To low level end；First switch pipe t11 and second switch pipe t10 responds secondary signal v respectivelybWith the 3rd signal vcEffective electricity
Flat conducting.
Refer to Fig. 3, be the sequential relationship of each clock signal of the present embodiment, in the present embodiment, the sequential of each signal is excellent
The following condition of the foot that is full:
First signal va, secondary signal vbWith the 3rd signal vcFor cycle identical m clock signal, dutycycle is all 1/
M, a phase value is equal to 2 π/m, and wherein m is the integer more than or equal to 3.Wherein, secondary signal vbThan the first signal vaStagnant
A phase place afterwards, the 3rd signal vcThan the first signal vaLatter two phase place stagnant；First pulse signal vi1High level than first letter
Number vaSuper previous phase place, the second pulse signal vi2High level than described first signal vaA delayed phase place.The present embodiment
, the work process of shift register cell is illustrated taking m=4 as a example.
For convenience of follow-up description, in the present embodiment, subsequent embodiment and other embodiments it is assumed that each clock signal and
High level (high potential) value of pulse signal is vh, low level (electronegative potential) value is vl.
The work process of this shift register cell can be divided into two stages: (1) working stage, (2) maintenance stage.Under
Face will illustrate the work process in this two stages with reference to Fig. 2 and Fig. 3.
(1) working stage
This grade of shift register cell is in the gating stage, completes this grade of shift register cell signal output part output letter
Number voPull-up and downdraw process, this stage be shift register cell working stage.
In t0 moment, the first signal vaWith the second pulse signal vi2It is low level, the first pulse signal vi1With the second letter
Number vbHigh level is risen to by low level.Now, the first transistor t1 conducting, the first pulse signal vi1Brilliant by the first of conducting
Body pipe t1 charges to drive control end q, and stores a charge in the first electric capacity c1.When drive control end, q current potential rises to vh-
vth1When, the first transistor t1 turns off, wherein, vth1Threshold voltage for the first transistor t1.In this process, the second crystal
Pipe t2 turns on, and the signal output part of shift register cell discharges into low level by transistor seconds t2.
Drive control end q charges after terminating, and reaches the t1 moment, in t1 moment, the second pulse signal vi2Remain low level,
First pulse signal vi1Drop to low level, the first signal vaHigh level is risen to by low level.Now, the first transistor t1,
4th transistor t4 turns off and makes drive control end q floating, the first signal vaTransistor seconds t2 by conducting is defeated to signal
Go out end to charge, the current potential of drive control end q rises also with the rising of signal output terminal potential, this is referred to as booting.Drive
The rising of control end q current potential, accelerates the charging rate of signal output part so that the current potential of signal output part is able to rapid increase
To high level vh.
It is easily understood that the voltage v when signal output partoRise above the threshold voltage v of the 8th transistor t8th8
When, the 8th transistor t8 conducting；First low level maintains the current potential of Enable Pin p1 to be pulled down to low level vl.On the other hand, with
VoVoltage rising, the gate source voltage of the 5th transistor t5 is changed into negative value, and the 5th transistor t5 turns off, and reduces the 5th
The impact to drive control end q bootstrapping for the electric leakage of transistor t5 is it is ensured that the quick charge of signal output part.
In t2 moment, the first signal vaLow level is dropped to by high level, the second pulse signal vi2Risen to by low level
High level, makes third transistor t3 and the 4th transistor t4 conducting, will be drop-down for the current potential of signal output part and drive control end q
Coupled to low level end.In this process, the voltage in drive control end q drops to the threshold voltage of transistor seconds t2
vth2Before, transistor seconds t2 still turns on, can be used as the discharge path of signal output part a auxiliary, therefore signal
The current potential of outfan is by quick pull-down to low level.
So far, shift register cell is by the first signal vaA high level pulse be completely transmitted to signal output
End, the working stage of shift register cell terminates.
(2) maintenance stage
It is pulled down to low level v in signal output terminal potentiallAfterwards, this grade of shift register cell enters non-gated state.
Output signal v of signal output partoCurrent potential must be maintained at low level, to avoid the display picture being connected with signal output part
Switching transistor in element misleads, and leads to image information write error, and this process is the maintenance stage.
After working stage terminates, the first pulse signal vi1, the second pulse signal vi2And the current potential of drive control end q
For low level vl, the first transistor t1 and transistor seconds t2 shutoff, the current potential of signal output part also should remain low level vl.
But, due to having larger parasitic electricity between the control pole (such as grid) of transistor seconds t2 and the first pole (for example draining)
Hold cgd2, as the first signal vaBy low level vlJump to high level vhWhen, the current potential of drive control end q also can rise therewith, should
Phenomenon is referred to as clock feed-through effect.When rising the threshold voltage more than transistor seconds t2 when the current potential of drive control end q, can lead
Transistor seconds t2 is caused to open, the first signal vaBy transistor seconds t2, signal output part is undesirably charged, lead to
Signal output part produces larger noise voltage.Additionally, in actual display, existing parasitic between the holding wire on panel
Capacitance coupling effect, also can make the output signal of shift register cell produce noise voltage.Therefore, in shift register list
The non-gated state of unit is it is necessary to take certain measure to ensure output signal v of outfanoFor low level vl.
In the maintenance stage, the present embodiment to eliminate noise voltage using low level maintenance module 30.Low level maintenance module
30 are operated in terms of two: on the one hand suppress the generation of clock feed-through effect, be on the other hand to eliminate making an uproar of signal output part
Acoustic Charge.
When the first clock signal vaWhen rising to high level by low level, the first maintenance unit is started working.First signal va
High level is coupled to by the first low level by the second electric capacity c2 and maintains Enable Pin p1, the therefore the 7th transistor t7 turns on, and will
The noise charge of signal output part is discharged into low level end.Meanwhile, the 5th transistor t5 conducting, by drive control end q's
Noise charge is discharged into signal output part, and is discharged into low level end by the 7th transistor t7.Particularly, as the 5th transistor t5
During conducting, big load capacitance c of signal output partlIt is connected to drive control end q；Now, the first signal vaBrilliant by second
Parasitic capacitance v of body pipe t2gd2It is coupled to the voltage feed-through amount δ v of drive control end qqSize can be expressed as:
In formula, cgd2+cl+ c1 is the total load capacitance at the q of drive control end, wherein, cgd2Grid for transistor seconds t2-
Drain voltage value, clFor the load capacitance value of signal output part, c1 is the first capacitance.As can be seen here, the 5th transistor t5 and
One electric capacity c1 increases the total capacitance value of drive control end q, thus reducing voltage feed-through amount δ vqSize it is suppressed that clock
The generation of feedthrough effect.
In the first signal vaFor between low period, as the 3rd signal vcWhen rising to high level by low level, second remains single
Unit starts working.In the present embodiment, the second low level maintains the useful signal of Enable Pin by the 3rd signal vcThere is provided, the 3rd letter
Number vcThan the first signal vaLatter two phase place stagnant.As the 3rd signal vbDuring for high level, the 6th transistor t6 conducting, signal is defeated
The noise charge going out end is discharged into low level end, thus the current potential maintaining signal output part is low level vl.
But, as is well known, the drift of threshold voltage under long-time electric stress for the transistor is impact shift register
The key factor of cell life.In the present embodiment, the 5th transistor t5, the 6th transistor t6 and the 7th transistor t7 can be subject to
To the voltage stress of long period, the threshold voltage shift of these transistors can have a strong impact on the life-span of shift register cell.
In order to extend the life-span of circuit, in the maintenance stage of circuit work, the present embodiment adopts threshold voltage compensation module 40, to the 5th
The threshold voltage shift of transistor t5 and the 7th transistor t7 compensates.
It is illustrated in figure 4 the potential change schematic diagram of the first maintenance Enable Pin p1.Threshold voltage module 40 is to the 5th crystal
Pipe t5 and the 7th transistor t7 threshold voltage compensation process can be divided into: (a) charges, (b) V_th generation, and (c) keeps,
(d) threshold voltage compensation, this four subprocess.It is described in detail below:
A () is charged
As shown in figure 4, and referring to Fig. 2 and Fig. 3, in t2 moment, secondary signal vbRise to high level.Now
One switching tube t11 conducting, and maintain Enable Pin p1 to be charged the first low level.When the voltage of p1 reaches vh-vth11When, fill
Electricity completes.Now, the 5th transistor t5, the 7th transistor t7 and mirror image pipe t9 are in conducting state.To transistor t5 and crystalline substance
For body pipe t7, the current potential that can maintain drive control end q and signal output part is low level, transistor t9 as mirror image pipe,
Its threshold voltage shift amount is approximately considered identical with the threshold voltage shift amount of transistor t5 and transistor t7.
(b) V_th generation
In t3 moment, secondary signal vbLow level is dropped to by high level, and the 3rd signal vcHigh electricity is risen to by low level
Flat.Now, first switch pipe t11 turns off, and second switch pipe t10 conducting.First low level maintains Enable Pin p1 to pass through conducting
Second switch pipe t10 and mirror image pipe t9 discharged.When the first low level maintains the tension discharge of Enable Pin p1 to vth9When,
Mirror image pipe t9 turns off, and electric discharge stops.Now, complete the process of V_th generation.
C () keeps
In t4 moment, the 3rd signal vcLow level is dropped to by high level.Now, the first low level maintains at Enable Pin p1
In floating state.In theory, the magnitude of voltage at p1 end should remain vth9, vth9Threshold voltage for mirror image pipe t9.In fact, the
Three signal vcEnable Pin p1 can be maintained to produce coupling the first low level by the parasitic capacitance of second switch pipe t10, therefore the
One low level maintains the voltage of Enable Pin p1 than vth9Smaller.This voltage coupling amount δ vcSize can be expressed as:
Wherein, cgd10For the parasitic capacitance value of second switch pipe t10, cpMaintain the total of Enable Pin p1 for the first low level
Capacitance size, vhWith vlIt is respectively high level and the low level of clock signal, wherein vlIt is also the magnitude of voltage of low level end simultaneously.
(d) threshold voltage compensation
In the t5 moment, as the first signal vaWhen rising to high level again.First signal vaWill be high electric by the second electric capacity c2
Flat first low level that is coupled to maintains Enable Pin p1, voltage coupling amount δ vaSize can be expressed as:
Now the first low level maintains the voltage v of Enable Pin p1ph0Can be expressed as:
After shift register cell works for a long time, the 5th transistor t5, the threshold voltage of the 7th transistor t7
Can occur to drift about so that the current potential of the 5th transistor t5 and the 7th transistor t7 maintenance drive control end q and signal output part is
Low level reduced capability, may lead to the inefficacy of circuit.In the present embodiment, the 5th transistor t5 and the 7th transistor t7
Gate bias voltage is identical with mirror image pipe t9, it is therefore contemplated that in any one t, the threshold voltage of three transistors
Drift value is δ vth(t).So vphT () can be expressed as:
vph(t)=vl+vth9+δvth(t)-δvc+δva=vph0+δvth(t)
It is illustrated in figure 5 the schematic diagram of the threshold voltage compensation effect of threshold voltage compensation module 40.As shown in Figure 5, exist
The maintenance stage of shift register cell, vphT the size of () can be with δ vthThe increase of (t) and increase.This electric to threshold value
That presses compensates so that the bias voltage of the 5th transistor t5 and the 7th transistor t7 increases with the increase of threshold voltage,
After working long hours, the conductive capability of transistor will not be degenerated, thus extending the working life of shift register cell.It is worth note
Meaning, the shift register cell of the present embodiment can also be by reducing vph0, obtain less threshold voltage shift speed,
Further enhancing the reliability of shift register cell.
With reference to Fig. 3 during t0～t1 moment that this grade of shift register cell works, the first low level maintains Enable Pin
The size of the voltage of p1 is vth9-δvc.Although this voltage e insufficient to lead to the 5th transistor t5 conducting, still may be used
The 5th transistor t5 can be led to produce slight electric leakage, and then affect the charging process to drive control end q for the first transistor t1.
Therefore, refer to Fig. 6, in a preferred embodiment, shift register cell also includes the tenth two-transistor t12.12nd is brilliant
The control pole (such as grid) of body pipe t12 is used for input the first pulse signal vi1, first pole of the tenth two-transistor t12 is (for example
Drain electrode) coupled to mirror image pipe t9 control pole (such as grid), second pole (such as source electrode) of the tenth two-transistor t12 is used for coupling
It is bonded to low level end.
By increasing by the tenth two-transistor t12, as the first pulse signal vi1High level when arriving, the 12nd of conducting is brilliant
First low level is maintained Enable Pin end p1 to be coupled to low level end by body pipe t12, thus the 5th transistor t5 is complete switched off, suppression
Make electric leakage that may be present, also make the working stage of circuit relatively reliable.Fig. 7 show threshold voltage in the present embodiment and mends
Repay the schematic diagram of the threshold voltage compensation effect of module 40.As seen from Figure 7, in the maintenance stage of shift register cell,
vphSize with δ vthThe increase of (t) and increase；On the other hand, during t0～t1 moment of working stage, the electricity at p1 end
Pressure is all pulled down to low level vl(as shown in Fig. 7 dotted line circle), thus ensure that circuit reliably works.
Shift register cell disclosed in the present embodiment, due to increased threshold voltage compensation module, by this module mirror
As low level maintenance module first low level maintains the threshold voltage shift of Enable Pin p1, thus adjusting supply the first low level dimension
Hold the voltage of Enable Pin p1 it is achieved that shift register cell, in the threshold voltage compensation of low level maintenance stage, reduces length
The degeneration of transistor conductivity ability after time service, thus extend the working life of shift register cell.
Embodiment two:
In the above-described embodiments, as the first signal vaWhen at least one high level pulse occurs in before the instant t 0,
There is not the effect of threshold voltage compensation in (ti1～ti2) during its first high level pulse.With δ vthIncrease, vph's
Size will not increase therewith, can be seen that with reference in Fig. 5 and Fig. 7.The reason cause this phenomenon is: during ti1～ti2, threshold
Threshold voltage compensating module 40 does not have started work.This phenomenon is easily caused output signal voOccur larger during ti1～ti2
Noise voltage, as δ vthIt is also possible to lead to circuit output mistake when larger.
For this reason, the shift register cell in the present embodiment to overcome this shortcoming using initialization module.Refer to figure
8, it is shift register cell circuit structure diagram disclosed in the present embodiment, and above-described embodiment difference is, the present embodiment
Disclosed shift register cell also includes: initialization module 50.Initialization module 50 includes initialization transistor t13, initially
The second pole (such as source electrode) changing transistor t13 is coupled to the first low level and maintains Enable Pin p1, and the of initialization transistor t13
One pole (for example draining) is used for input initialization signal v coupled to control pole (such as grid)r, for maintaining to the first low level
The voltage of Enable Pin p1 is initialized.
Refer to Fig. 9, be the sequential chart of shift register cell in the present embodiment, initializing signal vrIt is a pulse letter
Number, and the advanced first signal v of its high level pulseaFirst at least one phase place of high level pulse.In the ti0 moment, when
Initializing signal vrWhen high level is risen to by low level, initializing signal vrBy initialization transistor t13 to the first low level
Enable Pin p1 is maintained to be charged (initialization), thus in the ti1 moment, as the first signal vaHigh level pulse when arriving, the
One low level maintains the voltage of Enable Pin p1 to be coupled to a higher voltage.
As Figure 10 is shown as the schematic diagram of the threshold voltage compensation effect of threshold voltage compensation module 40 in the present embodiment.By scheming
9 understand, during ti1～ti2, the first low level maintains Enable Pin p1 to be coupled to a higher voltage, and this high voltage makes
Obtain the 5th transistor t5, the 7th transistor t7 and there is conductive capability good enough, even if δ is vthWhen larger, remain able to drive
The voltage stabilization of control end q and signal output part is in low level.Therefore, the shift register cell in the present embodiment has more
Life-span for a long time.
Embodiment three:
Refer to Figure 11, be a kind of shift register disclosed in the present embodiment, comprising:
The shift register cell of multiple cascades.
Multiple clock lines (ck1, ck2, ck3 and ck4), for clock letter needed for shift register cells at different levels transmission
Number.
Enabling signal line vst, coupled to the first pulse signal input terminal of chopped-off head shift register cell, for chopped-off head
Shift register cell sends enabling signal and is started working with starting shift register.
Common ground vssCoupled to the low level end of every one-level shift register cell, for every one-level shift register cell
Low level signal is provided.
In a kind of specific embodiment, the second low level of shift register cells at different levels maintains effective electricity of Enable Pin p2
Flat the 3rd signal v by this grade of shift register cellcThere is provided.
In a preferred embodiment, when the series of shift register cell is more than 3 grades, this level (as n-th grade) displacement is posted
Second low level of storage unit maintains Enable Pin p2 can also be coupled to its front two-stage (as the n-th -2 grades) shift register cell
First low level maintain Enable Pin p1.According to the analysis of above-described embodiment, in the non-gated rank of shift register cell
Section, threshold voltage compensation module 40 can compensate to the threshold voltage shift of the 5th transistor t5, the 7th transistor t7.And
In the shift register of multi-stage cascade, the second low level of this level (n-th grade) shift register cell maintains signal control end
P2 be coupled to front two-stage (the n-th -2 grades) shift register cell first low level maintain signal control end p1, therefore the n-th -2 grades
The threshold voltage compensation module 40 of shift register cell can be to the 6th transistor t6's in n-th grade of shift register cell
Threshold voltage shift compensates.Therefore, the advantage of this enforcement is embodied in, and the threshold voltage shift of the 6th transistor t6 also obtains
Compensate, thus further increase the life-span of shift register cell.
It is the sequential chart of the shift register of the present embodiment as shown in figure 12.In hypothesis display, the line number of pel array is
N row, the sweep time of every one-row pixels is t, then enabling signal line vstHigh level time be t.First clock line ck1, second
Clock line ck4, the 3rd clock line ck3With the 4th clock line ck4Cycle be 4t.Shift register electricity disclosed in the present embodiment
Lu Zhong, the signal output part of the 1 to the n-th grade of shift register cell is coupled respectively to n article of controlling grid scan line on panel, when
One to the 4th clock line ck1～ck4On the high level of clock signal when sequentially arriving, gate drive signal vg1～vg(n)Sequentially
Output high level pulse.
This shift register can be integrated on display floater together with pixel tft.Wherein, four clock signal by when
Clock generator produces；Enabling signal line vstSignal and total common ground vssLow level signal vlProduced by signal generator
Raw, therefore this integrated shift register is minimum only needs 6 external pins, thus decreasing the number of the outside lead of display
With the quantity of peripheral chip, reduce the cost of display, improve mechanically and electrically reliability.
The present embodiment also discloses a kind of display.As shown in figure 13, comprising:
Display floater 100, display floater 100 includes the two-dimensional array being made up of multiple two-dimensional pixels, and with every
The a plurality of controlling grid scan line of first direction (for example horizontal) and many data of second direction (for example longitudinal) that individual pixel is connected
Line.Same one-row pixels in pel array are all connected to same controlling grid scan line, and the same row pixel in pel array is then
It is connected to same data line.Display floater 100 can be that display panels, organic electroluminescence display panel, Electronic Paper show
Panel etc., and corresponding display device can be liquid crystal display, OLED, electric paper display etc..
Gate driver circuit 200, the gated sweep signal output part of gate drive unit circuit in gate driver circuit 200
It is coupled to corresponding controlling grid scan line in display floater 100, for the progressive scan to pel array, gate driver circuit
200 can be connected with display floater 100 by welding or be integrated in display floater 100.This gate driver circuit 200 adopts
The shift register that above-described embodiment provides.In a kind of specific embodiment, gate driver circuit 200 can be arranged in display surface
The side of plate 100；In a preferred embodiment, using paired gate driver circuit 200, it is arranged in the two of display floater 100
Side.
Data drive circuit 400, for producing viewdata signal, and be output to right with it in display floater 100
On the data wire answered, gradation of image is realized in corresponding pixel cell by data line transfer.
Timing sequence generating circuit 300, for producing the various control signals needed for gate driver circuit 200.
Above content is to further describe it is impossible to assert this with reference to specific embodiment is made for the present invention
Bright it is embodied as being confined to these explanations.For general technical staff of the technical field of the invention, do not taking off
On the premise of present inventive concept, some simple deduction or replace can also be made.
Claims (10)
1. a kind of shift register, including at least one shift register cell of cascade, shift register cell includes:
Drive module (20), for being switched by off state, by the first signal (va) it is sent to the signal of shift register cell
Outfan, thus export scanning signal；
Input module (10), for controlling drive module (20) switching on off state；
Low level maintenance module (30), for being switched by off state, after this shift register cell output scanning signal
The signal output part of drive module (20) is maintained low level；Described low level maintenance module (30) includes first and remains single
Unit, described first maintenance unit is when its first low level maintains the acquisition significant level of Enable Pin (p1) by shift register list
The signal output part of unit maintains low level；
It is characterized in that, also include: threshold voltage compensation module (40), described threshold voltage compensation module (40) senses low level
The threshold voltage of maintenance module (30), maintains the power supply electricity of Enable Pin (p1) according to threshold voltage adjustment output to the first low level
Pressure；
Described threshold voltage compensation module (40) includes: mirror image pipe (t9), first switch pipe (t11) and second switch pipe (t10)；
The control pole of described first switch pipe (t11) is extremely short with first to be connect for inputting secondary signal (vb)；Described second switch pipe
(t10) control pole is used for input the 3rd signal (vc)；The control pole of described mirror image pipe (t9), the of first switch pipe (t11)
First pole of two poles and second switch pipe (t10) is coupled to described first low level and maintains Enable Pin (p1)；Described second opens
The second pole closing pipe (t10) is coupled to the first pole of mirror image pipe (t9)；Second pole of mirror image pipe (t9) is used for coupled to low level
End；
First switch pipe (t11) and second switch pipe (t10) respond secondary signal (v respectivelyb) and the 3rd signal (vc) effective electricity
Flat conducting；
Described secondary signal (vb) significant level arrival time lead in the 3rd signal (vc) the arrival of significant level when
Between.
2. shift register as claimed in claim 1 is it is characterised in that described shift register cell also includes initializing mould
Block (50)；
Described initialization module (50) includes: initialization transistor (t13)；Second pole coupling of described initialization transistor (t13)
It is bonded to described first low level and maintains Enable Pin (p1), the first pole of initialization transistor (t13) is coupled to control pole for defeated
Enter initializing signal (vr)；
Described initializing signal (vr) significant level arrival time lead in the first signal (va) first significant level arrive
Time.
3. shift register as claimed in claim 1 is it is characterised in that described input module (10) is in the first pulse signal
(vi1) level control under output voltage signal to drive module (20) to switch on off state；
Described shift register cell also includes the tenth two-transistor (t12)；The control pole of described tenth two-transistor (t12) is used
In inputting the first pulse signal (vi1), the first pole of the tenth two-transistor (t12) is coupled to the control pole of mirror image pipe (t9), and the tenth
Second pole of two-transistor (t12) is used for coupled to low level end.
4. the shift register as described in claim 1-3 any one is it is characterised in that described low level maintenance module (30)
Also include the second maintenance unit, described second maintenance unit is when its second low level maintains Enable Pin (p2) to obtain significant level
The signal output part of drive module (20) is maintained low level.
5. shift register as claimed in claim 4, it is characterised in that at least cascading 3 grades of shift register cells, works as prime
Second low level of shift register cell maintains Enable Pin (p2) to be coupled to the first low electricity of front two-stage shift register cell
Flat maintenance Enable Pin (p1).
6. the shift register as described in claim 1-3 any one is it is characterised in that described first signal (va) effective
The arrival time lead of level is in secondary signal (vb) significant level the arrival time；First signal (va), secondary signal (vb)
With the 3rd signal (vc) significant level do not overlap.
7. a kind of display, including the two-dimensional array being made up of multiple pixels, and be connected with each pixel in array
The a plurality of data lines of first direction and a plurality of controlling grid scan line of second direction；
Data drive circuit, provides data signal for data wire；
Gate driver circuit, provides gate drive signal for described controlling grid scan line；
It is characterized in that, described gate driver circuit is constituted using the shift register as described in claim 1-6 any one.
8. a kind of threshold voltage compensation circuit is it is characterised in that include: mirror image pipe (t9), first switch pipe (t11) and second are opened
Close pipe (t10)；
The control pole of described first switch pipe (t11) is extremely short with first to be connect for inputting secondary signal (vb)；Described second switch pipe
(t10) control pole is used for input the 3rd signal (vc)；The control pole of described mirror image pipe (t9), the of first switch pipe (t11)
First pole of two poles and second switch pipe (t10) is used for the feeder ear coupled to circuitry；Described second switch pipe (t10)
The second pole be coupled to mirror image pipe (t9) the first pole；Second pole of mirror image pipe (t9) is used for coupled to low level end；
First switch pipe (t11) responds secondary signal (vb) significant level conducting, mirror image pipe (t9) control pole is charged；
Second switch pipe (t10) responds the 3rd signal (vc) significant level conducting, the control pole of mirror image pipe (t9) is discharged
To extract the threshold voltage of mirror image pipe (t9), and exported to the electricity of circuitry feeder ear according to the threshold voltage adjustment extracted
Pressure；
Described secondary signal (vb) significant level arrival time lead in the 3rd signal (vc) the arrival of significant level when
Between.
9. threshold voltage compensation circuit as claimed in claim 8 is it is characterised in that described secondary signal (vb) significant level
With the 3rd signal (vc) significant level do not overlap.
10. threshold voltage compensation circuit as claimed in claim 8 is it is characterised in that also include: the tenth two-transistor (t12)；
The control pole of described tenth two-transistor (t12) is used for input the first pulse signal (vi1), the first of the tenth two-transistor (t12)
Pole is coupled to the control pole of mirror image pipe (t9), and the second pole of the tenth two-transistor (t12) is used for coupled to low level end；
Described first pulse signal (vi1) pulse arrival time lead in secondary signal (vb) and the 3rd signal (vc) effective electricity
The flat arrival time.
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| CN104795013B (en) * | 2015-04-14 | 2017-08-29 | 北京大学深圳研究生院 | Shift register and its unit and a kind of display device |
| CN104821146B (en) | 2015-04-24 | 2017-05-24 | 北京大学深圳研究生院 | Grid driving circuit, unit thereof and display device |
| CN106356015B (en) | 2016-10-31 | 2020-05-12 | 合肥鑫晟光电科技有限公司 | Shift register, driving method and display device |
| CN106847204B (en) | 2016-12-27 | 2020-03-10 | 武汉华星光电技术有限公司 | Gate drive circuit and display device |
| KR102347796B1 (en) * | 2017-05-31 | 2022-01-07 | 엘지디스플레이 주식회사 | Electroluminescence display |
| CN107331348B (en) * | 2017-08-31 | 2019-11-08 | 京东方科技集团股份有限公司 | Shift register cell and its driving method, array substrate and display device |
| CN107578026B (en) * | 2017-09-15 | 2020-11-27 | 京东方科技集团股份有限公司 | Fingerprint detection circuit, detection method of fingerprint detection circuit and fingerprint sensor |
| CN108230980B (en) * | 2018-01-08 | 2020-11-13 | 京东方科技集团股份有限公司 | Shift register and noise release control method thereof, gate drive circuit and display device |
| CN111833805B (en) * | 2019-04-17 | 2022-02-22 | 成都辰显光电有限公司 | Grid scanning driving circuit, driving method and display device |
| CN110933335B (en) * | 2020-01-21 | 2020-05-12 | 南京迪钛飞光电科技有限公司 | Drive circuit and time sequence drive method of flat panel detector |
| CN114120884A (en) * | 2020-09-01 | 2022-03-01 | 深圳市柔宇科技股份有限公司 | Display panel light-emitting drive circuit and display panel |
| CN112289270B (en) * | 2020-12-28 | 2021-03-23 | 上海视涯技术有限公司 | Source electrode driving circuit, display device and pixel driving method |
| CN114067728B (en) * | 2021-10-18 | 2023-04-07 | 浙江大学 | Static threshold voltage compensation circuit |
| CN115294915B (en) * | 2022-08-29 | 2023-07-18 | 惠科股份有限公司 | Gate driving circuit and display device |
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