CN104282660A - Testing structure, forming method of testing structure and testing method - Google Patents
Testing structure, forming method of testing structure and testing method Download PDFInfo
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- CN104282660A CN104282660A CN201310277149.XA CN201310277149A CN104282660A CN 104282660 A CN104282660 A CN 104282660A CN 201310277149 A CN201310277149 A CN 201310277149A CN 104282660 A CN104282660 A CN 104282660A
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Abstract
The invention discloses a testing structure, a forming method of the testing structure and a testing method. The testing structure comprises a semiconductor substrate, a first dielectric layer, a second dielectric layer and a third dielectric layer, wherein the first dielectric layer, the second dielectric layer and the third dielectric layer are placed on the semiconductor substrate. The first dielectric layer comprises first metal wires and second metal wires which are parallel to each other and are arrayed alternately, and both the number of the first metal wires and the number of the second metal wires are two or more. A plurality of metal plugs are placed in the second dielectric layer. The third dielectric layer comprises third metal wires and fourth metal wires which are parallel to each other and are arrayed alternately, and both the number of the third metal wires and the number of the fourth metal wires are two or more. The first metal wires and the third metal wires are perpendicular to each other on different surfaces, the second metal wires and the fourth metal wires are perpendicular to each other on different surfaces, one first metal wire is connected with one third metal wire through one metal plug, and one second metal wire is connected with one fourth metal wire through one metal plug. By means of the testing structure, resistance-capacitance delay of a plurality of metal plugs can be evaluated.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly relate to a kind of test structure and forming method thereof, method of testing.
Background technology
Semiconductor fabrication process is complicated, and manufacturing cost is high, and for ensureing workmanship, in manufacture semiconductor chip process, manufacturing test structure on wafer usually, to test after fabrication is complete.Comprise multiple metal plug in semiconductor chip, it has significant impact to the quality of semiconductor chip.Current industry generally makes metal plug test structure in semiconductor chip, after chip manufacturing completes, is carried out the making quality of metal plug in test chip by metal plug test structure.
In existing technique, usually the metal plug in same a line (or row) is coupled together by upper and lower double layer of metal line, to carry out performance test to the metal plug on this row (or row), as carried out time breakdown (TDDB, Time dependent dielectric breakdown) test.
But, along with the continuous reduction of feature sizes of semiconductor devices, when on metal plug, (or under) forms metal wire, distance between adjacent rows (or row) metal wire is too little, even if adopt immersion lithography technique also adjacent rows (or row) metal wire cannot be formed by a photoetching process.For this reason, photoetching-etching-photoetching-lithographic technique need be adopted to form upper strata metal wire and lower metal line.
Existing technique comprises the steps: to provide Semiconductor substrate when forming test structure, and forms first medium layer on a semiconductor substrate; Lower metal line is divided into two parts, first in first medium layer, form Part I lower metal line by photoetching and etching technics, Part II lower metal line is formed in first medium layer between adjacent two Part I lower metal lines again by photoetching and etching technics, the quantity of Part I lower metal line and Part II lower metal line is multiple, Part I lower metal line and Part II lower metal line parallel and be intervally arranged; Lower metal line and first medium layer form second dielectric layer and the 3rd dielectric layer from the bottom to top successively; In the 3rd dielectric layer, upper strata metal wire is formed with the method identical with forming lower metal line, Part I upper strata metal wire is identical with the light shield that Part I lower metal line uses, Part II upper strata metal wire is identical with the light shield that Part II lower metal line uses, the upper strata metal wire formed with the parallel of a lower metal line and position is corresponding.While the metal wire of formation upper strata, in second dielectric layer, form metal plug, a upper strata metal wire is connected with a lower metal line by a line metal plug (comprising one or more metal plug) be positioned at below it.
In order to avoid formed metal plug leaks electricity, need ensure that adjacent metal plug is not overlapping or distance is too near.And determined by the position of this upper strata metal wire due to the position of a line metal plug be connected with a upper strata metal wire, therefore when forming Part II upper strata metal wire, at least need to ensure the Part II upper strata metal wire that formed not with adjacent Part I lower metal line overlap.When forming metal plug, the position of Part II lower metal line can be adjusted along the direction vertical with lower metal line, the position relationship of adjustment adjacent rows metal plug.
The formation method of above-mentioned test structure only can adjust upward the relative position between adjacent rows metal plug from the side vertical with lower metal line, cannot adjust upward the position between metal plug from the side of lower metal line parallel.And the position being arranged in the metal plug of second dielectric layer can be determined by the direction vertical with lower metal line with the direction both direction of lower metal line parallel, when only adjusting upward the position of metal plug relative to other metal plugs around it from the side vertical with lower metal line, the adjusting range of metal plug position is limited, the poor accuracy of adjustment metal plug position.
And when the RC delays of metal plug is assessed in above-mentioned test structure, need to detect separately the resistance of each metal plug, the efficiency of detection is low, time cost is high.
Summary of the invention
The problem that the present invention solves is to provide a kind of test structure and forming method thereof, method of testing, the formation method of test structure can from orthogonal both direction adjustment form the position of metal plug, improve institute and form metal plug time breakdown characteristic, so raising form the reliability of metal plug; Described test structure and method of testing can detect the resistance of multiple metal plug by a metallic bond, to assess the RC delays of metal plug, and can assess the layout of formed metal wire and metal plug, metal plug time breakdown characteristic, the efficiency detected is high, and time cost is low.
For solving the problem, the invention provides a kind of formation method of test structure, comprising:
Semiconductor substrate is provided;
Form first medium layer on the semiconductor substrate;
The first metal pattern and the second metal pattern is formed in described first medium layer, described first metal pattern comprises the first metal wire that two or more is parallel to each other, described second metal pattern comprises the second metal wire that two or more is parallel to each other, and described second metal wire and described first metal lines run parallel and described second metal wire and described first metal wire are alternately arranged;
At described first medium layer, described first metal pattern and described second metal pattern form second dielectric layer and the 3rd dielectric layer from the bottom to top successively, and multiple metal plug is formed in described second dielectric layer, the 3rd metal pattern and the 4th metal pattern is formed in described 3rd dielectric layer, described 3rd metal pattern comprises the 3rd metal wire that two or more is parallel to each other, described 4th metal pattern comprises the 4th metal wire that two or more is parallel to each other, described 4th metal wire and described 3rd metal lines run parallel and described 4th metal wire and described 3rd metal wire are alternately arranged,
Wherein, described first metal wire is vertical with described 3rd metal wire antarafacial, described second metal wire is vertical with described 4th metal wire antarafacial, described first metal wire is connected with described 3rd metal wire by a described metal plug, and described second metal wire is connected with described 4th metal wire by a described metal plug.
Optionally, photoetching-etching-photoetching-lithographic technique is adopted to form described first metal pattern and the second metal pattern in described first medium layer; Photoetching-etching-photoetching-lithographic technique is adopted to form described 3rd metal pattern and the 4th metal pattern in described 3rd dielectric layer.
Optionally, the size of described first metal wire, the second metal wire, the 3rd metal wire and the 4th metal wire is equal.
Optionally, described first metal pattern, the second metal pattern, the 3rd metal pattern, the 4th metal pattern and metal plug are multiple; Described first metal pattern and described 3rd metal pattern are chained together successively by described metal plug and constitute the first metallic bond, and in each described first metal pattern, in the number of the first metal wire, each described 3rd metal pattern, the number of the 3rd metal wire is all equal with the number of described first metallic bond; Described second metal pattern and described 4th metal pattern are chained together successively by described metal plug and constitute the second metallic bond, and in each described second metal pattern, in the number of the second metal wire, each described 4th metal pattern, the number of the 4th metal wire is all equal with the number of described second metallic bond; Described first metallic bond and described second metallic bond are intervally arranged successively.
For solving the problem, present invention also offers a kind of test structure, comprising:
Semiconductor substrate;
Be positioned at the first medium layer in described Semiconductor substrate, the first metal pattern and the second metal pattern is formed in described first medium layer, described first metal pattern comprises the first metal wire that two or more is parallel to each other, described second metal pattern comprises the second metal wire that two or more is parallel to each other, and described second metal wire and described first metal lines run parallel and described second metal wire and described first metal wire are alternately arranged;
Be positioned at the second dielectric layer on described first medium layer, described first metal pattern and described second metal pattern, in described second dielectric layer, be formed with multiple metal plug;
Be positioned at the 3rd dielectric layer on described second dielectric layer and described metal plug, the 3rd metal pattern and the 4th metal pattern is formed in described 3rd dielectric layer, described 3rd metal pattern comprises the 3rd metal wire that two or more is parallel to each other, described 4th metal pattern comprises the 4th metal wire that two or more is parallel to each other, and described 4th metal wire and described 3rd metal lines run parallel and described 4th metal wire and described 3rd metal wire are alternately arranged;
Wherein, described first metal wire is vertical with described 3rd metal wire antarafacial, described second metal wire is vertical with described 4th metal wire antarafacial, described first metal wire is connected with described 3rd metal wire by a described metal plug, and described second metal wire is connected with described 4th metal wire by a described metal plug.
Optionally, the size of described first metal wire, the second metal wire, the 3rd metal wire and the 4th metal wire is equal.
Optionally, described first metal pattern, the second metal pattern, the 3rd metal pattern, the 4th metal pattern and metal plug are multiple; Described first metal pattern and described 3rd metal pattern are chained together successively by described metal plug and constitute the first metallic bond, and in each described first metal pattern, in the number of the first metal wire, each described 3rd metal pattern, the number of the 3rd metal wire is all equal with the number of described first metallic bond; Described second metal pattern and described 4th metal pattern are chained together successively by described metal plug and constitute the second metallic bond, and in each described second metal pattern, in the number of the second metal wire, each described 4th metal pattern, the number of the 4th metal wire is all equal with the number of described second metallic bond; Described first metallic bond and described second metallic bond are intervally arranged successively.
For solving the problem, the invention provides a kind of method of testing, comprising:
There is provided the first test structure, described first test structure is the above-mentioned test structure comprising the first metallic bond and the second metallic bond;
Apply bias voltage to adjacent described first metallic bond and described second metallic bond, and detect the leakage current between described first metallic bond and described second metallic bond;
When detecting the described leakage current obtained and being less than with reference to leakage current, the first metallic bond detected and the second metallic bond mutually insulated.
Optionally, when leakage current between one adjacent in described first test structure described first metallic bond and described second metallic bond is greater than with reference to leakage current, described method of testing also comprises: provide the second test structure, described second test structure is the above-mentioned test structure comprising the first metallic bond and the second metallic bond, in described second test structure, the position of the second metal wire is moved along the Width of the first metal wire in described first test structure relative to the position of the second metal wire in described first test structure, in described second test structure, the position of the 4th metal wire is moved along the length direction of the first metal wire in described first test structure relative to the position of the 4th metal wire in described first test structure, until make the leakage current between the first metallic bond adjacent in the second test structure and the second metallic bond all be less than with reference to leakage current.
For solving the problem, the present invention also provides a kind of method of testing, comprising:
The above-mentioned test structure comprising the first metallic bond and the second metallic bond is provided;
Detect the electric capacity between adjacent described first metallic bond and described second metallic bond;
When detecting the electric capacity obtained and being greater than 0, the first metallic bond detected and the second metallic bond mutually insulated.
For solving the problem, present invention also offers a kind of method of testing, comprising:
The above-mentioned test structure comprising the first metallic bond and the second metallic bond is provided;
Detect the resistance of described first metallic bond or described second metallic bond, determine the resistance of metal plug in the first metallic bond or described second metallic bond.
Compared with prior art, technical scheme of the present invention has the following advantages:
First form the first metal pattern and the second metal pattern being arranged in the first medium layer in Semiconductor substrate, to make in the first metal pattern each second metal lines run parallel in each first metal wire and the second metal pattern and be alternately distributed, again at first medium layer, first metal pattern and the second metal pattern form second dielectric layer and the 3rd dielectric layer from the bottom to top successively, and multiple metal plug is formed in described second dielectric layer, the 3rd metal pattern and the 4th metal pattern is formed in the 3rd dielectric layer, to make in the 3rd metal pattern each 4th metal lines run parallel in each 3rd metal wire and the 4th metal pattern and be alternately distributed, and make described first metal wire vertical with described 3rd metal wire antarafacial, described second metal wire is vertical with described 4th metal wire antarafacial, first metal wire is connected with the 3rd metal wire by a metal plug, second metal wire is connected with the 4th metal wire by a metal plug.Because two metal wires be connected with a metal plug are in different medium layer, and two metal wire antarafacials are vertical, when adopting photoetching-etching-photoetching-lithographic technique successively to form the first metal pattern and the second metal pattern in first medium layer, the position of the second metal wire can be adjusted along the first metal line-width direction; When adopting photoetching-etching-photoetching-lithographic technique successively to form the 3rd metal pattern and the 4th metal pattern in the 3rd dielectric layer, can along the position of the first wire lengths direction adjustment the 4th metal wire.Therefore, said method can adjust the direction of the position of the metal plug be connected with the second metal wire and the 4th metal wire from orthogonal two, this metal plug of accurate adjustment is relative to the position of other metal plugs around it, avoid that formed metal plug is overlapping or distance is too near, and then avoid formed test structure to leak electricity, improve institute and form the time breakdown characteristic of metal plug, raising form the reliability of metal plug.
Further, in described test structure, the first metal pattern, the second metal pattern, the 3rd metal pattern, the 4th metal pattern and metal plug are multiple, described first metal pattern and described 3rd metal pattern are chained together successively by described metal plug and constitute the first metallic bond, and described second metal pattern and described 4th metal pattern are chained together successively by described metal plug and constitute the second metallic bond.Now, described test structure comprises many first metallic bonds and many second metallic bonds.First metallic bond and the second metallic bond are intervally arranged.Because the resistance of metal wire is much smaller than the resistance of metal plug, by detecting the resistance of the first metallic bond or the second metallic bond, can assess the RC delays of the multiple metal plugs in the first metallic bond or the second metallic bond (RC Delay), determine whether the resistance of metal plug in test structure meets the requirements.And owing to can detect the resistance being arranged in a multiple metal plug of metallic bond simultaneously, the efficiency of detection is high, time cost is low.
Further, the size of described first metal wire, the second metal wire, the 3rd metal wire and the 4th metal wire is equal, be beneficial to the layout of each metal wire and metal plug in test structure, simplify the formation process of test structure, reduce the process costs of test structure, improve the integrated level of formed test structure.
Because first medium layer, second dielectric layer and the 3rd dielectric layer are insulating material, bias voltage is applied by two metallic bonds adjacent in above-mentioned test structure (i.e. first metallic bond and adjacent with it second metallic bond), and the leakage current detected between these adjacent two metallic bonds, and compare detecting the leakage current that obtains with reference to leakage current, adjacent two metallic bonds whether mutually insulated can be judged.When leakage current between adjacent two metallic bonds is less than with reference to leakage current, these two metallic bonds do not overlap, mutually insulated, form that the layout of metal wire and metal plug is good, integrality is good.
Further, when leakage current between described first metallic bond adjacent in above-mentioned test structure (as the first test structure) and described second metallic bond is greater than with reference to leakage current, the test structure (as the second test structure) that one comprises the first metallic bond and the second metallic bond can also be reoffered, in described second test structure, the position of the second metal wire is moved along the Width of the first metal wire in described first test structure relative to the position of the second metal wire in described first test structure, in described second test structure, the position of the 4th metal wire is moved along the length direction of the first metal wire in described first test structure relative to the position of the 4th metal wire in described first test structure, until make the leakage current between the first metallic bond adjacent in the second test structure and the second metallic bond all be less than with reference to leakage current.Thus on the basis of undesirable first test structure, each metal plug in the second test structure can be made all not overlap, improve the time breakdown characteristic of metal plug in the second test structure, improve the reliability of metal plug in the second test structure.
Detect the electric capacity between adjacent two metallic bonds in test structure.When electric capacity between adjacent two metallic bonds is greater than 0, two metallic bond mutually insulateds, form that the layout of metal wire and metal plug is good, integrality is good; When electric capacity between adjacent two metallic bonds equals 0, two metallic bonds overlap.
Accompanying drawing explanation
Fig. 1 ~ Fig. 4 is the schematic diagram of a formation method embodiment of test structure of the present invention;
Fig. 5 is the vertical view of an embodiment of test structure of the present invention;
Fig. 6 is the vertical view of another embodiment of test structure of the present invention.
Embodiment
In existing test structure, only can from the position of a direction adjustment metal plug relative to other metal plugs around it, the poor accuracy of adjustment metal plug position.And when assessing the RC delays of the metal plug in test structure, need to detect separately the resistance of each metal plug, the efficiency of detection is low, time cost is high.
Technical scheme in the present invention, by successively forming the first metal pattern and the second metal pattern in first medium layer, first metal pattern comprises the first metal wire that two or more is parallel to each other, second metal pattern comprises the second metal wire that two or more is parallel to each other, the first metal wire and the second metal lines run parallel and alternately arrangement; Then on first medium layer, the first metal pattern and the second metal pattern, second dielectric layer and the 3rd dielectric layer is formed successively; Subsequently, metal plug is formed in described second dielectric layer, and successively the 3rd metal pattern and the 4th metal pattern is formed in described 3rd dielectric layer, 3rd metal pattern comprises the 3rd metal wire that two or more is parallel to each other, 4th metal pattern comprises the 4th metal wire that two or more is parallel to each other, the 3rd metal wire and the 4th metal lines run parallel and alternately arrangement.And make the first metal wire vertical with the antarafacial of described 3rd metal wire, make the second metal wire vertical with described 4th metal wire antarafacial, and described first metal wire is connected with described 3rd metal wire by a described metal plug, described second metal wire is connected with described 4th metal wire by a described metal plug.
Due to when formation the second metal wire, can adjust along the position of the Width of the first metal wire to the second metal wire; When formation the 4th metal wire, can adjust along the position of the length direction of the first metal wire to the 4th metal wire, thus adjust from the direction of orthogonal two to the position of the metal plug of connection second metal wire and the 4th metal wire, reach the object of adjustment metal plug relative to other metal plugs around it, improve the time breakdown characteristic of formed metal plug, improve the reliability of formed metal plug.
For enabling above-mentioned purpose of the present invention, feature and advantage more become apparent, and are described in detail specific embodiments of the invention below in conjunction with accompanying drawing.
First embodiment
The formation method of the present embodiment to test structure in the present invention is described, and in first metal pattern, second metal pattern, three metal pattern and four metal pattern includes two metal line in the test structure formed in the present embodiment.
With reference to figure 1, provide Semiconductor substrate (not shown), and form first medium layer 1 on the semiconductor substrate.
In the present embodiment, the material of described Semiconductor substrate can well known to a person skilled in the art other semi-conducting materials for monocrystalline silicon, monocrystalline germanium or monocrystalline germanium silicon, silicon-on-insulator, iii-v element compound, monocrystalline silicon carbide etc.
In addition, also can be formed with device architecture (not shown) in described Semiconductor substrate, described device architecture can be the device architecture formed in semiconductor FEOL, such as MOS transistor etc.; The metal plug etc. be connected with device architecture also can be formed in described Semiconductor substrate.
In the present embodiment, the material of described first medium layer 1 can be low-k materials or ultralow-k material film, and the method forming described first medium layer 1 can be chemical vapor deposition method.
After described first medium layer 1 is formed, photoetching-etching-photo etching process is adopted to form the first metal pattern and the second metal pattern in described first medium layer 1.To form the quantity of the first metal wire in the first metal pattern identical with the quantity of the second metal wire in the second metal pattern.
Continue with reference to figure 1, in described first medium layer 1, form the first metal pattern.Described first metal pattern comprises two the first metal wires 101 be parallel to each other.
In the present embodiment, the material of described first metal wire 101 is copper, and in described first medium layer 1, form the first metal pattern can comprise the steps:
Described first medium layer 1 is formed the first photoresist layer (not shown);
Described first photoresist layer is exposed and developing process, in described first photoresist layer, form two the first opening (not shown) be parallel to each other, the position of described first opening and shape are corresponding with the position of follow-up formation first metal wire and shape respectively;
To comprise the first photoresist layer of the first opening for mask, etch described first medium layer 1, until form two the first groove (not shown) running through its thickness in described first medium layer 1;
Remove the first photoresist layer comprising the first opening;
The first metal wire 101 is formed in described first groove.
With reference to figure 2, the second metal pattern is formed in FIG in described first medium layer 1, described second metal pattern comprises two the second metal wires 201 be parallel to each other, and described second metal wire 201 and described second metal wire 201 parallel with described first metal wire 101 is alternately arranged with described first metal wire 101.
Concrete, the material of described second metal wire 201 is copper.The size of described second metal wire 201 (comprising length and width) can be equal with the size of the first metal wire 101, also can be unequal.Distance between two the second metal wires 201 can be equal with the distance between two the first metal wires 101, also can be unequal.
In the present embodiment, the size of described second metal wire 201 is equal with the size of described first metal wire 101.Distance between two the second metal wires 201 is equal with the distance between two the first metal wires 101.
Concrete, in described first medium layer 1, form the second metal pattern can comprise the steps:
Described first medium layer 1 and the first metal pattern form the second photoresist layer (not shown);
Described second photoresist layer is exposed and developing process, in described second photoresist layer, form two the second opening (not shown) be parallel to each other, the position of described second opening and shape are corresponding with the position of follow-up formation second metal wire and shape respectively;
To comprise the second photoresist layer of the second opening for mask, etch described first medium layer 1, until form two the second groove (not shown) running through its thickness in described first medium layer 1;
Remove the second photoresist layer comprising the second opening;
The second metal wire 201 is formed in described second groove.
Not overlapping with the metal plug be formed on the first metal wire line 101 in order to ensure the follow-up metal plug be formed on the second metal wire 201, the second metal wire 201 should be made equal with the distance of adjacent two the first metal wires 101 as far as possible.
With reference to figure 3, in fig. 2 described first medium layer 1, described first metal pattern and described second metal pattern form second dielectric layer 2 and the 3rd dielectric layer 3 from the bottom to top successively.
Concrete, the material of described second dielectric layer 2 and the 3rd dielectric layer 3 can be low-k materials or ultralow-k material film.The method forming described second dielectric layer 2 and the 3rd dielectric layer 3 can be chemical vapor deposition method.Described second dielectric layer 2 and the 3rd dielectric layer 3 can be integrally formed, and also can be formed respectively.
In the present embodiment, described second dielectric layer 2 and the 3rd dielectric layer 3 are formed respectively.And the thickness of described second dielectric layer 2 and the 3rd dielectric layer 3 is equal.But the present invention is not limited thereto.
After described 3rd dielectric layer 3 is formed, photoetching-etching-photo etching process is adopted to form the 3rd metal pattern and the 4th metal pattern in described 3rd dielectric layer 3.To form the quantity of the 3rd metal wire in the 3rd metal pattern identical with the quantity of the 4th metal wire in the 4th metal pattern.
Continue with reference to figure 3, formation the 3rd metal pattern in described 3rd dielectric layer 3, described 3rd metal pattern comprises two the 3rd metal wires 301 be parallel to each other, and forms metal plug 502 in second dielectric layer 2 below the 3rd metal wire 301.Described 3rd metal wire 301 is connected with described first metal wire 101 in first medium layer 1 by a metal plug 502.
Concrete, the metal plug 502 that dual-damascene technics forms described 3rd metal wire 301 and is positioned at below the 3rd metal wire 301 can be adopted.Described 3rd metal wire 301 is vertical with the antarafacial of described first metal wire 101.The material of described 3rd metal wire 301 and metal plug 502 is copper.The size of described 3rd metal wire 301 can be equal with the size of the first metal wire 101 and the second metal wire 201, also can be unequal.
In the present embodiment, described 3rd metal wire 301 is equal with the size of the first metal wire 101.
When forming the 3rd metal pattern and metal plug 502 in Fig. 3, can comprise the steps:
Described 3rd dielectric layer 3 forms hard mask layer (not shown), is formed with two the 3rd openings be parallel to each other in described hard mask layer, the position of described 3rd opening and shape are corresponding with the position of follow-up formation the 3rd metal wire 301 and shape respectively;
In described 3rd opening, form the 3rd photoresist layer (not shown), be formed with the 4th opening in described 3rd photoresist layer, the position of described 4th opening and shape are corresponding with the position of follow-up formation metal plug and shape respectively;
With described hard mask layer and the 3rd photoresist layer for mask, etch described 3rd dielectric layer 3, to exposing described second dielectric layer 2;
Remove described 3rd photoresist layer, and with described hard mask layer for mask, etch described 3rd dielectric layer 3 and second dielectric layer 2, until form the 3rd groove (not shown) and be positioned at the first through hole (not shown) exposing described first metal wire 101 upper surface of part below the 3rd groove;
Copper metal is filled, to form the 3rd metal wire 301 and form metal plug 502 in described 3rd groove in described first through hole in described 3rd groove and described first through hole.
With reference to figure 4, form the 4th metal pattern in described 3rd dielectric layer 3 in figure 3, described 4th metal pattern comprises two the 4th metal wires 401 be parallel to each other, and forms metal plug 504 in second dielectric layer 2 below the 4th metal wire 401.Described 4th metal wire 401 is parallel with described 3rd metal wire 301, and described 4th metal wire 401 is alternately arranged with described 3rd metal wire 301.Described 4th metal wire 401 is connected with described second metal wire 201 in first medium layer 1 by a metal plug 504.
Concrete, the metal plug 504 that dual-damascene technics forms described 4th metal wire 401 and is positioned at below the 4th metal wire 401 can be adopted.The material of described 4th metal wire 401 and metal plug 504 is copper.Described 4th metal wire 301 can be equal with the size of the first metal wire 101, second metal wire 201 and the 3rd metal wire 301, also can be unequal.
In the present embodiment, described 4th metal wire 301 is equal with the size of the first metal wire 101, second metal wire 201 and the 3rd metal wire 301.The method forming the 4th metal wire 401 and metal plug 504 is similar with the method forming the 3rd metal wire 301 and metal plug 502, does not repeat them here.And due to the 3rd metal wire 301 vertical with the first metal wire 101 antarafacial, the 3rd metal 301 being arranged in the 3rd dielectric layer 3 is parallel with the 4th metal wire 401,4th metal wire 401 is vertical with the first metal wire 101 antarafacial, and the 4th metal wire 401 is vertical with the second metal wire 201 antarafacial.
In the present embodiment, the test structure formed comprises two articles of first metallic bonds be chained together by metal plug 502 by the first metal wire 101 and the 3rd metal wire 301, and two articles of second metallic bonds be chained together by metal plug 504 by the second metal wire 201 and the 4th metal wire 401.
In the present embodiment, when formation the second metal wire 201, can adjust along the Width W of the first metal wire 101 position of the second metal wire 201, and then the position of 101 of relative first metal wire of adjustment the second metal wire 201.Accordingly, when formation the 4th metal wire 401, can adjust along the length direction L of the first metal wire 101 position of the 4th metal wire 401, and then the position of 301 of relative 3rd metal wire of adjustment the 4th metal wire 401.Because the length direction L of the first metal wire 101 is vertical with Width W, therefore said method can from the position of orthogonal both direction adjustment metal plug 504, the layout of metal wire and metal plug in adjustment test structure, avoid metal plug 502 and 504 to overlap or distance too near, prevent formed test structure from leaking electricity, improve form the time breakdown characteristic of metal plug 502 and 504, improve institute and forms the reliability of metal plug 502 and 504, finally raising comprises the performance of the semiconductor device of formed metal plug 502 and 504.
In addition, in the present embodiment, first metal wire 101 is vertical with described 3rd metal wire 301 antarafacial, and the second metal wire 201 is vertical with described 4th metal wire 401 antarafacial, and the size of described first metal wire 101, second metal wire 201, the 3rd metal wire 301 and the 4th metal wire 401 is equal.Be beneficial to the layout of each metal wire and metal plug in test structure, simplify the formation process of test structure, reduce the process costs of test structure, improve the integrated level of formed test structure.
Second embodiment
The present embodiment is described test structure in the present invention.
With reference to figure 5, for the vertical view of an embodiment of test structure of the present invention, it is compared with the test structure in the first embodiment, and in described test structure, the first metal pattern, the second metal pattern, the 3rd metal pattern, the 4th metal pattern and metal plug are multiple; Described first metal pattern and described 3rd metal pattern are chained together successively by described metal plug and constitute the first metallic bond, and described second metal pattern and described 4th metal pattern are chained together successively by described metal plug and constitute the second metallic bond.
Wherein, each described first metal pattern comprises two the first metal wires 101 be parallel to each other.Each described second metal pattern comprises two the second metal wires 201 be parallel to each other.Described first metal wire 101 and the second metal wire 201 are arranged in the first medium layer (not shown) in Semiconductor substrate (not shown), described first metal wire 101 is parallel with the second metal wire 201, and described second metal wire 201 is alternately arranged with described first metal wire 101, the two ends of the first metal wire 101 and the second metal wire 201 are also unjustified.
Described metal plug 502 and 504 is arranged in the second dielectric layer (not shown) on first medium layer, the first metal pattern and the second metal pattern.
Each described 3rd metal pattern comprises two the 3rd metal wires 301 be parallel to each other.Each described 4th metal pattern comprises two the 4th metal wires 401 be parallel to each other.Described 3rd metal wire 301 and the 4th metal wire 401 are arranged in the 3rd dielectric layer (not shown) on second dielectric layer, metal plug 502 and metal plug 504, described 3rd metal wire 301 is parallel with the 4th metal wire 401, and described 3rd metal wire 301 is alternately arranged with described 4th metal wire 401, the two ends of the 3rd metal wire 301 and the 4th metal wire 401 are also unjustified.
Described first metal wire 101 is vertical with described 3rd metal wire 301 antarafacial, and described second metal wire 201 is vertical with described 4th metal wire 401 antarafacial.Described first metal wire 101 is connected with described 3rd metal wire 301 by a described metal plug 502, and described second metal wire 201 is connected with described 4th metal wire 401 by a described metal plug 504.
Concrete, the size (comprising length and width) of described first metal wire 101, second metal wire 201, the 3rd metal wire 301 and the 4th metal wire 401 can be equal, also can be unequal.The material of described first metal wire 101, second metal wire 201, the 3rd metal wire 301 and the 4th metal wire 401 is copper.
In the present embodiment, the size (length and width) of described first metal wire 101, second metal wire 201, the 3rd metal wire 301 and the 4th metal wire 401 is equal.Form test structure and comprise two articles of first metallic bonds 20 and 40 be chained together successively by metal plug 502 by the first metal wire 101 and the 3rd metal wire 301, and two articles of second metallic bonds 10 and 30 be chained together successively by metal plug 504 by the second metal wire 201 and the 4th metal wire 401.First metallic bond 10, second metallic bond 20, first metallic bond 30 and the second metallic bond 40 are intervally arranged successively.
When forming test structure in the present embodiment, also can be adjusted by the position of the formation method of test structure in the first embodiment to the second metal wire 201, the 4th metal wire 401, metal plug 504, the layout of metal wire and metal plug in optimal inspection structure, avoid metal plug 502 and 504 to overlap or distance too near, and avoid two adjacent metallic bonds to overlap, improve institute and form the time breakdown characteristic of metal plug 502 and 504, raising form the reliability of metal plug 502 and 504.
In Fig. 5, the formation method of test structure with reference to the formation method of test structure in the first embodiment, can not repeat at this.
Accordingly, present invention also offers a kind of method of testing adopting test structure in Fig. 5.Described method of testing comprises:
Apply bias voltage to the first metallic bond 20 and the second adjacent with it metallic bond 10, and detect the leakage current I between described first metallic bond 20 and the second metallic bond 10
21;
Apply bias voltage to the first metallic bond 20 and the second adjacent with it metallic bond 30, and detect the leakage current I between described first metallic bond 20 and the second metallic bond 30
23;
By described leakage current I
21and I
23respectively with reference leakage current I
ccompare, to determine the first metallic bond 20 whether with the second metallic bond 10 mutually insulated respectively and to determine the first metallic bond 20 whether with the second metallic bond 30 mutually insulated.
Because first medium layer, second dielectric layer and the 3rd dielectric layer are insulating material, as the first metallic bond 20 and the second metallic bond 10(or 30) mutually insulated time, the first metallic bond 20 and the second metallic bond 10(or 30) between leakage current I
21(or I
23) very little, be usually less than 1E-9 peace.
In the present embodiment, using 1E-8 peace as reference leakage current I
c(i.e. I
c=1E-8 pacifies).As leakage current I
21be less than or equal to reference to leakage current I
ctime, namely show that the first metallic bond 20 and the second metallic bond 10 do not overlap; As leakage current I
23be less than or equal to reference to leakage current I
ctime, namely show that the first metallic bond 20 and the second metallic bond 30 do not overlap; As leakage current I
21with leakage current I
23all be less than or equal to reference to leakage current I
ctime, show that the first metallic bond 20 and the second metallic bond 10 and 30 all do not overlap, in first metallic bond 20, the insulating properties of metal wire and metal plug 502 is good, and in the first metallic bond 20, the time breakdown characteristic of metal plug 502 is good, and the performance comprising the semiconductor device of metal plug 502 is good.
In other embodiments, the leakage current between adjacent two strip metal chains equals with reference to leakage current I
ctime, also can think that this two strip metals chain overlaps, it determined by the embody rule of metal plug.
In like manner, by applying bias voltage to the first metallic bond 40 and the second adjacent with it metallic bond 10, and the leakage current I between described first metallic bond 40 and the second metallic bond 10 can be detected
41, and apply bias voltage to the first metallic bond 40 and the second adjacent with it metallic bond 30, and detect the leakage current I between described first metallic bond 40 and the second metallic bond 30
43.And by described leakage current I
41and I
43respectively with reference leakage current I
ccompare, determine the first metallic bond 40 whether with the second metallic bond 10 mutually insulated, and determine the first metallic bond 40 whether with the second metallic bond 30 mutually insulated, determine the insulating properties of the first metallic bond 40.
In addition, by detecting the electric capacity between adjacent two strip metal chains, can also determine whether two detected strip metal chains overlap.Concrete, when the electric capacity between adjacent two strip metal chains equals 0, the two strip metal chains detected overlap; When electric capacity between adjacent two strip metal chains is greater than 0, the two strip metal chains detected do not overlap.Such as, detect the electric capacity between the first metallic bond 20 and the second metallic bond 10, overlap if the electric capacity obtained is the 0, first metallic bond 20 and the second metallic bond 10; If the electric capacity obtained is greater than 0, the first metallic bond 20 and the second metallic bond 10 do not overlap.
In addition, can also detection first metallic bond 20(or 40 be passed through) in the resistance of multiple metal plug 502; Can by the second metallic bond 10(or 30) apply voltage, detect the second metallic bond 10(or 30) in the resistance of multiple metal plug 504.
It should be noted that, the resistance that above-mentioned method of testing obtains is actually the resistance sum of metal wire and metal plug on a metallic bond.The resistance of metal wire does not refer to the resistance of whole piece metal wire, and refers to the resistance of metal wire between two metal plugs on a metal wire.But because the resistance of metal wire is much smaller relative to the resistance of metal plug, compared with the resistance of metal plug, the change of metal wire resistance is very little to the Resistance Influence of a metallic bond, therefore by the object of the resistance that the resistance of a metallic bond detected to multiple metal plug on this metallic bond, and then the RC delays of metal plug in formed test structure is assessed, determine whether the resistance of metal plug in test structure meets the requirements.
Detect separately with the resistance needed in prior art each metal plug, compare with the RC delays assessing metal plug, the method assessed metal plug RC delays by test structure in the present embodiment is simpler, and efficiency is higher, and the time is shorter.
In addition, can also pass through to the first metallic bond 20(or 40) and the second metallic bond 10(or 30) apply voltage, detect the time breakdown time of metal plug in each metal wire.
Leakage current I in record Fig. 5 between test structure first metallic bond 20 and the second metallic bond 10
21and the first leakage current I between metallic bond 20 and the second metallic bond 30
23, and the leakage current I in record Fig. 5 between test structure first metallic bond 40 and the second metallic bond 10
41and the first leakage current I between metallic bond 40 and the second metallic bond 30
43.
As the leakage current I of test structure in Fig. 5
21, I
23, I
41and I
43in one be greater than with reference to leakage current I
ctime, in Fig. 5, test structure is as the first test structure, then provides the second test structure with the similar of the first test structure.
The difference of the second test structure and the first test structure is: in described second test structure the position of the second metal wire relative to the position of the second metal wire 201 in described first test structure along x-axis direction in Width W(Fig. 5 of the first metal wire 101 in described first test structure) mobile, in described second test structure the position of the 4th metal wire relative to the position of the 4th metal wire 401 in described first test structure along y-axis direction in length direction L(Fig. 5 of the first metal wire 101 in described first test structure) mobile, until make the leakage current between the first metallic bond adjacent in the second test structure and the second metallic bond all be less than with reference to leakage current I
c.
The position of each metal wire and metal plug is reference position in the first test structure, in second test structure, the second metal wire and the 4th metal wire are moved in x-axis direction and y-axis direction respectively, accordingly, position for connecting the metal plug of the second metal wire and the 4th metal wire there occurs change along x-axis and y-axis both direction, and this metal plug changes relative to the position of the metal plug for connecting the first metal wire and the 3rd metal wire.
Table one second and the relation of leakage current between the 4th metal wire change in location and adjacent two metallic bonds
As shown in Table 1, when the second metal wire in the second test structure move to x-axis positive direction relative to the second metal wire 201 in the first test structure, the 4th metal wire in the second test structure move to y-axis positive direction relative to the 4th metal wire 401 in the first test structure time, leakage current I in the second test structure
23, I
43, I
21and I
41relative to leakage current I in the first test structure
23, I
43, I
21and I
41variation tendency be respectively decline, rising, rise and decline; When the second metal wire in the second test structure move to x-axis positive direction relative to the second metal wire 201 in the first test structure, the 4th metal wire in the second test structure move to y-axis negative direction relative to the 4th metal wire 401 in the first test structure time, leakage current I in the second test structure
23, I
43, I
21and I
41relative to leakage current I in the first test structure
23, I
43, I
21and I
41variation tendency be respectively rising, rising, decline and rise; When the second metal wire in the second test structure move to x-axis negative direction relative to the second metal wire 201 in the first test structure, the 4th metal wire in the second test structure move to y-axis positive direction relative to the 4th metal wire 401 in the first test structure time, leakage current I in the second test structure
23, I
43, I
21and I
41relative to leakage current I in the first test structure
23, I
43, I
21and I
41variation tendency be respectively rising, decline, rise and rise; When the second metal wire in the second test structure move to x-axis negative direction relative to the second metal wire 201 in the first test structure, the 4th metal wire in the second test structure move to y-axis negative direction relative to the 4th metal wire 401 in the first test structure time, leakage current I in the second test structure
23, I
43, I
21and I
41relative to leakage current I in the first test structure
23, I
43, I
21and I
41variation tendency be respectively rising, decline, decline and rise.
Further, as shown in Table 1, by the second metal wire in the second test structure is moved along the x-axis direction relative to the second metal wire 101 in the first test structure, 4th metal wire in second test structure is moved along the y-axis direction relative to the 4th metal wire in the first test structure, leakage current I in the second test structure can be regulated
23, I
43, I
21and I
41size, make leakage current I
23, I
43, I
21and I
41all be greater than with reference to leakage current I
c, thus ensureing that in the second test structure, adjacent metallic bond does not overlap, in each metallic bond, the insulating properties of metal plug is good, and in metallic bond, the time breakdown characteristic of metal plug is good, and the performance comprising metal plug semiconductor device is good.
In other embodiments, when formation the second test structure, can also be that in the second test structure, the second metal wire is identical with the position of the 4th metal wire with the second metal wire in the first test structure with the position of the 4th metal wire, and the position of the first metal wire in the second test structure is moved along the x-axis direction relative to the position of the first metal wire in the first test structure, the position of the 3rd metal wire in the second test structure is moved along the y-axis direction relative to the position of the 3rd metal wire in the first test structure, thus make to change for the position of the metal plug being connected the first metal wire and the 3rd metal wire relative in the first test structure with the position of the metal plug of the 3rd metal wire for connecting the first metal wire in the second test structure, and make to change for the position of the metal plug being connected the second metal wire and the 4th metal wire relative in this test structure with the position of the metal plug of the 3rd metal wire for connecting the first metal wire in the second test structure, metal plug in second test structure is not overlapped, in each metallic bond, the insulating properties of metal plug is good, the time breakdown characteristic of each metal plug is good, the performance comprising the semiconductor device of metal plug is good.
3rd embodiment
With reference to figure 6, be the vertical view of another embodiment of test structure of the present invention, described test structure comprises the first metal pattern, the second metal pattern, the 3rd metal pattern and the 4th metal pattern.
Wherein, described first metal pattern comprises three the first metal wires 501 be parallel to each other.Described second metal pattern comprises three the second metal wires 601 be parallel to each other.Described first metal wire 501 and the second metal wire 601 are arranged in the first medium layer (not shown) in Semiconductor substrate (not shown), described first metal wire 501 is parallel with the second metal wire 601, and described second metal wire 601 is alternately arranged with described first metal wire 501.
Described metal plug 506 and 508 is arranged in the second dielectric layer (not shown) on first medium layer, the first metal pattern and the second metal pattern.
Described 3rd metal pattern comprises three the 3rd metal wires 701 be parallel to each other.Described 4th metal pattern comprises three the 4th metal wires 801 be parallel to each other.Described 3rd metal wire 701 and the 4th metal wire 801 are arranged in the 3rd dielectric layer (not shown) on second dielectric layer, metal plug 506 and metal plug 508, described 3rd metal wire 701 is parallel with the 4th metal wire 801, and described 3rd metal wire 701 is alternately arranged with described 4th metal wire 801.
Described first metal wire 501 is vertical with described 3rd metal wire 701 antarafacial.Described first metal wire 501 is connected with described 3rd metal wire 701 by a described metal plug 506, and described second metal wire 601 is connected with described 4th metal wire 801 by a described metal plug 508.
Concrete, the size (comprising length and width) of described first metal wire 501, second metal wire 601, the 3rd metal wire 701 and the 4th metal wire 801 can be equal, also can be unequal.The material of described first metal wire 501, second metal wire 601, the 3rd metal wire 701 and the 4th metal wire 801 is copper.
In the present embodiment, the size (comprising length and width) of described first metal wire 501, the 3rd metal wire 701 and the 4th metal wire 801 is equal; Described second metal wire 601 is equal with the width of the first metal wire 501, and the length of described second metal wire 601 is greater than the length of the first metal wire 501.
In Fig. 6, the formation method of test structure with reference to the formation method of test structure in the first embodiment, can not repeat at this.
In the present embodiment, can by the position of 501 of relative first metal wire of adjustment second metal wire 601, and the position of 701 of relative 3rd metal wire of adjustment the 4th metal wire 801, finally from the position of two orthogonal direction adjustment metal plugs 508, and first relative position of metallic bond and the second metallic bond, two metallic bonds are avoided to overlap, and avoid metal plug 506 and 508 to overlap, improve form the time breakdown characteristic of metal plug 506 and 508, improve form the reliability of metal plug 506 and 508, final raising comprises the performance of the semiconductor device of formed metal plug 506 and 508.
In other embodiments, described first metal pattern, the second metal pattern, the 3rd metal pattern and the 4th metal pattern also can comprise more than three metal wires respectively, its arrangement distribution mode and formation method are similar with formation method with the arrangement distribution mode of metal wire in test structure in the first embodiment respectively, do not repeat them here.
Although the present invention discloses as above, the present invention is not defined in this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, and therefore protection scope of the present invention should be as the criterion with claim limited range.
Claims (13)
1. a formation method for test structure, is characterized in that, comprising:
Semiconductor substrate is provided;
Form first medium layer on the semiconductor substrate;
The first metal pattern and the second metal pattern is formed in described first medium layer, described first metal pattern comprises the first metal wire that two or more is parallel to each other, described second metal pattern comprises the second metal wire that two or more is parallel to each other, and described second metal wire and described first metal lines run parallel and described second metal wire and described first metal wire are alternately arranged;
At described first medium layer, described first metal pattern and described second metal pattern form second dielectric layer and the 3rd dielectric layer from the bottom to top successively, and multiple metal plug is formed in described second dielectric layer, the 3rd metal pattern and the 4th metal pattern is formed in described 3rd dielectric layer, described 3rd metal pattern comprises the 3rd metal wire that two or more is parallel to each other, described 4th metal pattern comprises the 4th metal wire that two or more is parallel to each other, described 4th metal wire and described 3rd metal lines run parallel and described 4th metal wire and described 3rd metal wire are alternately arranged,
Wherein, described first metal wire is vertical with described 3rd metal wire antarafacial, described second metal wire is vertical with described 4th metal wire antarafacial, described first metal wire is connected with described 3rd metal wire by a described metal plug, and described second metal wire is connected with described 4th metal wire by a described metal plug.
2. the formation method of test structure as claimed in claim 1, is characterized in that, adopts photoetching-etching-photoetching-lithographic technique to form described first metal pattern and the second metal pattern in described first medium layer; Photoetching-etching-photoetching-lithographic technique is adopted to form described 3rd metal pattern and the 4th metal pattern in described 3rd dielectric layer.
3. the formation method of test structure as claimed in claim 1, is characterized in that, the material of described first metal pattern, the second metal pattern, the 3rd metal pattern, the 4th metal pattern and metal plug is copper.
4. the formation method of test structure as claimed in claim 1, is characterized in that, the size of described first metal wire, the second metal wire, the 3rd metal wire and the 4th metal wire is equal.
5. the formation method of test structure as claimed in claim 1, it is characterized in that, described first metal pattern, the second metal pattern, the 3rd metal pattern, the 4th metal pattern and metal plug are multiple; Described first metal pattern and described 3rd metal pattern are chained together successively by described metal plug and constitute the first metallic bond, and in each described first metal pattern, in the number of the first metal wire, each described 3rd metal pattern, the number of the 3rd metal wire is all equal with the number of described first metallic bond; Described second metal pattern and described 4th metal pattern are chained together successively by described metal plug and constitute the second metallic bond, and in each described second metal pattern, in the number of the second metal wire, each described 4th metal pattern, the number of the 4th metal wire is all equal with the number of described second metallic bond; Described first metallic bond and described second metallic bond are intervally arranged successively.
6. a test structure, is characterized in that, comprising:
Semiconductor substrate;
Be positioned at the first medium layer in described Semiconductor substrate, the first metal pattern and the second metal pattern is formed in described first medium layer, described first metal pattern comprises the first metal wire that two or more is parallel to each other, described second metal pattern comprises the second metal wire that two or more is parallel to each other, and described second metal wire and described first metal lines run parallel and described second metal wire and described first metal wire are alternately arranged;
Be positioned at the second dielectric layer on described first medium layer, described first metal pattern and described second metal pattern, in described second dielectric layer, be formed with multiple metal plug;
Be positioned at the 3rd dielectric layer on described second dielectric layer and described metal plug, the 3rd metal pattern and the 4th metal pattern is formed in described 3rd dielectric layer, described 3rd metal pattern comprises the 3rd metal wire that two or more is parallel to each other, described 4th metal pattern comprises the 4th metal wire that two or more is parallel to each other, and described 4th metal wire and described 3rd metal lines run parallel and described 4th metal wire and described 3rd metal wire are alternately arranged;
Wherein, described first metal wire is vertical with described 3rd metal wire antarafacial, described second metal wire is vertical with described 4th metal wire antarafacial, described first metal wire is connected with described 3rd metal wire by a described metal plug, and described second metal wire is connected with described 4th metal wire by a described metal plug.
7. test structure as claimed in claim 6, is characterized in that, the material of described first metal pattern, the second metal pattern, the 3rd metal pattern, the 4th metal pattern and metal plug is copper.
8. test structure as claimed in claim 6, is characterized in that, the size of described first metal wire, the second metal wire, the 3rd metal wire and the 4th metal wire is equal.
9. test structure as claimed in claim 6, it is characterized in that, described first metal pattern, the second metal pattern, the 3rd metal pattern, the 4th metal pattern and metal plug are multiple; Described first metal pattern and described 3rd metal pattern are chained together successively by described metal plug and constitute the first metallic bond, and in each described first metal pattern, in the number of the first metal wire, each described 3rd metal pattern, the number of the 3rd metal wire is all equal with the number of described first metallic bond; Described second metal pattern and described 4th metal pattern are chained together successively by described metal plug and constitute the second metallic bond, and in each described second metal pattern, in the number of the second metal wire, each described 4th metal pattern, the number of the 4th metal wire is all equal with the number of described second metallic bond; Described first metallic bond and described second metallic bond are intervally arranged successively.
10. a method of testing, is characterized in that, comprising:
There is provided the first test structure, described first test structure is test structure as claimed in claim 9;
Apply bias voltage to adjacent described first metallic bond and described second metallic bond, and detect the leakage current between described first metallic bond and described second metallic bond;
When detecting the described leakage current obtained and being less than with reference to leakage current, the first metallic bond detected and the second metallic bond mutually insulated.
11. method of testings as claimed in claim 10, is characterized in that, when the leakage current between one adjacent in described first test structure described first metallic bond and described second metallic bond is greater than with reference to leakage current, described method of testing also comprises:
Second test structure is provided, described second test structure is test structure as claimed in claim 9, in described second test structure, the position of the second metal wire is moved along the Width of the first metal wire in described first test structure relative to the position of the second metal wire in described first test structure, in described second test structure, the position of the 4th metal wire is moved along the length direction of the first metal wire in described first test structure relative to the position of the 4th metal wire in described first test structure, until make the leakage current between the first metallic bond adjacent in the second test structure and the second metallic bond all be less than with reference to leakage current.
12. 1 kinds of method of testings, is characterized in that, comprising:
Test structure as claimed in claim 9 is provided;
Detect the electric capacity between adjacent described first metallic bond and described second metallic bond;
When detecting the electric capacity obtained and being greater than 0, the first metallic bond detected and the second metallic bond mutually insulated.
13. 1 kinds of method of testings, is characterized in that, comprising:
Test structure as claimed in claim 9 is provided;
Detect the resistance of described first metallic bond or described second metallic bond, determine the resistance of metal plug in described first metallic bond or described second metallic bond.
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|---|---|---|---|---|
| CN107578986A (en) * | 2016-07-04 | 2018-01-12 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor structure and forming method thereof and the measuring method of photoetching skew |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080218749A1 (en) * | 2007-03-05 | 2008-09-11 | Systems On Silicon Manufacturing Co. Pte. Ltd. | Metal comb structures, methods for their fabrication and failure analysis |
| CN101268541A (en) * | 2005-06-16 | 2008-09-17 | Pdf全解公司 | Test unit for improving semiconductor yield |
| CN102386167A (en) * | 2010-09-03 | 2012-03-21 | 中芯国际集成电路制造(上海)有限公司 | Structure of semiconductor device |
-
2013
- 2013-07-03 CN CN201310277149.XA patent/CN104282660B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101268541A (en) * | 2005-06-16 | 2008-09-17 | Pdf全解公司 | Test unit for improving semiconductor yield |
| US20080218749A1 (en) * | 2007-03-05 | 2008-09-11 | Systems On Silicon Manufacturing Co. Pte. Ltd. | Metal comb structures, methods for their fabrication and failure analysis |
| CN102386167A (en) * | 2010-09-03 | 2012-03-21 | 中芯国际集成电路制造(上海)有限公司 | Structure of semiconductor device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107578986A (en) * | 2016-07-04 | 2018-01-12 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor structure and forming method thereof and the measuring method of photoetching skew |
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