CN104267244B - A kind of integration ratio circuit and the impedance measurement method based on integration ratio circuit - Google Patents

Abstract

A kind of integration ratio circuit and the impedance measurement method based on integration ratio circuit that the present invention is provided, it is capable of achieving the ratio of the DC component of two combined-voltage signals of measurement, impedance measurement is converted to into the ratio of measurement voltage DC component, the certainty of measurement of impedance is greatly improved.The integration ratio circuit of the present invention, including operational amplifier, integral amplifier, comparator；The positive input terminal of operational amplifier is respectively by four switch connection measured signals, the positive-negative output end of standard voltage source and ground potentials, the outfan of operational amplifier is connected with negative input end, and by the negative input end of current-limiting resistance connection integral amplifier, the outfan of integral amplifier connects the positive input terminal of comparator；Connect integrating capacitor between the negative input end and outfan of integral amplifier, the two ends of integrating capacitor have charge switch；The positive input terminal connection forward end reference voltage of integral amplifier, the negative input end connection negative end reference voltage of comparator.

Description

A kind of integration ratio circuit and the impedance measurement method based on integration ratio circuit

Technical field

The present invention relates to ac electric quantity measuring technical field, more particularly to a kind of integration ratio circuit and it is based on integration ratio The impedance measurement method of circuit.

Background technology

Impedance is the general designation of resistance, inductance, electric capacity to the inhibition of alternating current in circuit.The concept of resistance is added by impedance The relative amplitude of voltage and electric current to extend to alternating current circuit field, is not only described, its relative phase is also described.When by circuit Electric current when being unidirectional current, resistance is equal with impedance, and resistance can be considered as the impedance that phase place is zero.Impedance is generally with symbols Z mark Note, according to the active definition of impedance, impedance is plural number, is the ratio of complex number voltage and power plural current, i.e. Z=U/I, it is also possible to phase Amount Z_m＜ θ or Z_me^jθTo represent；Wherein, Z_mThe size of impedance is represented, is the absolute value ratio of voltage amplitude and current amplitude, θ tables Show the phase place of impedance, be the phase contrast of voltage and electric current, this tabular form method is referred to as " phasor representation method ".

At present, the method for measuring impedance mainly has bridge method, the resonance method and vector impedance method, bridge method basic functional principle It is that, based on four arm electrical bridge circuit, but bridge method needs balance adjustment is repeated, operational approach is loaded down with trivial details, time-consuming, and measurement range It is limited, it is difficult to realize fast automatic measurement；The resonance method based on the resonance characteristic in LC loops, by determining resonant frequency and The inductance or capacitance meter known calculates tested impedance, and test signal voltage is added to based on the definition of impedance by vector impedance method Measured piece, current test signal flow through measured piece, calculate test terminal impedance by the ratio of voltage and current；But these measuring methods are all It is required that pumping signal is the sine wave signal of low distortion, however, the sine wave signal of the higher low distortion of frequency is difficult to obtain , which limits the raising of impedance measurement precision and the expansion of measurement range.

In recent years, with the progress of science and technology, the method for impedance is measured to digitized, intellectuality, programme-controlled Levels, to improve the certainty of measurement and measurement range of impedance.Often it is used for impedance measurement, its base using double integration circuit at present Present principles be by the measures conversion of impedance parameter for voltage measurement.But the double integration circuit of the measurement impedance for being used at present Mostly using the double integration circuit of direct measurement DC voltage, four magnitudes of voltage are measured respectively, is then calculated, due to four Magnitude of voltage polarity is indefinite, and having, and is respectively its positive voltage source and negative voltage source is surveyed, positive voltage source, negative voltage source and product The initial voltage for dividing is vulnerable to the impact of its long term drift and humiture change, and then affects the accuracy of measured value.

The content of the invention

The present invention provides a kind of integration ratio circuit and the impedance measurement method based on integration ratio circuit, is capable of achieving measurement Impedance measurement is converted to the ratio of measurement voltage DC component, greatly improves the certainty of measurement of impedance by the ratio of DC component； Its integration ratio circuit can be widely used for including the needs such as impedance instrument, power analyzer, phase meter, phase angle table to two voltages The instrument tested with phase relation by amplitude.

The technical scheme is that：

1. a kind of to integrate ratio circuit, for measuring the ratio of two combined-voltage signal DC component, its feature exists In including operational amplifier, integral amplifier, comparator；The positive input terminal of the operational amplifier passes through first switch respectively SW1, second switch SW2, the 3rd switch SW3, the 4th switch SW4 connection measured signal, standard voltage source positive-negative output end with And ground potential, the outfan of operational amplifier is connected with negative input end, and connects the integration amplification by integrating resistor R The negative input end of device, the outfan of the integral amplifier connect the positive input terminal of the comparator；The integral amplifier Connect integrating capacitor between negative input end and outfan, the two ends of the integrating capacitor have charge switch SW0；The integration is put The positive input terminal connection forward end reference voltage U of big device_REF1, the negative input end connection negative end reference voltage of the comparator U_REF2。

2. a kind of impedance measurement method based on above-mentioned integration ratio circuit, it is characterised in that by measuring tested impedance In-phase component U of the ac voltage signal under with reference to orthogonal coordinate system_1aWith quadrature component U_1bAnd the alternating current of normal impedance Pressure in-phase component U of the signal under with reference to orthogonal coordinate system_2aWith quadrature component U_2bBetween DC component ratio, by impedance Measures conversion is the ratio for measuring voltage DC component, is comprised the following steps that：

Step 1), it is first determined the forward end reference voltage U being connected with the positive input terminal of integral amplifier_REF1, with compare The negative end reference voltage U of the negative input end connection of device_REF2Size；

Step 2), measurement draws the forward end reference voltage U being connected with the positive input terminal of integral amplifier_REF1, with compare The negative end reference voltage U of the negative input end connection of device_REF2, integration initial voltage U_sBetween proportionate relationship；

Step 3), measurement respectively draws in-phase component of the ac voltage signal of tested impedance under with reference to orthogonal coordinate system U_1a, quadrature component U_1b, normal impedance in-phase component U of the ac voltage signal under with reference to orthogonal coordinate system_2a, quadrature component U_2bWith the forward end reference voltage U_REF1, negative end reference voltage U_REF2, the integration initial voltage that is carried on integrating resistor R U_sBetween proportionate relationship；

Step 4), using step 2) with step 3) result that draws, by formula

Calculate tested impedance.

3. step 1 described in) in, determine forward end reference voltage U_REF1, and negative end reference voltage U_REF2Concrete steps such as Under：

When the 4th switch SW4 of connection ground potential is in closure, when other switch off, U is selected_REF1So that electric capacity C fills It is negative sense, i.e. U for positive or perseverance that electric direction is permanent_GND+V_OS1-U_ePermanent is just or perseverance is negative；During charging：

U_e=U_REF1+V_OS2+I_B2·R+I_SW0·R

V_OS1、V_OS2--- the bias voltage of-operational amplifier and integral amplifier；

I_B2--- the bias current of-operational amplifier；

I_SW0----be divided into switchs leakage currents of the SW0 in the case of closure situation and opening；

Equally, select U_REF2So that the positive and negative input voltage difference perseverances of comparator A3 are just or perseverance is under integrate-dump state It is negative；That is U_REF2-V_OS3-U_ePermanent is just or perseverance is negative, Vos₃For the bias voltage of comparator.

4. step 2 described in) in, it is U that measurement process selects integration direction_GND+V_OS1-U_e>0, U_REF2-V_OS3-U_e>0, including with Lower step：

A) reset the stage：SW0 and SW4 is closed, now integrating capacitor electric discharge；

B) first stage, SW3 closures, rest switch disconnect, and now electric capacity C is with (U_REF--U_s)/R<0 electric current charges, product Divide amplifier output voltage U₁Comparator reversion is risen to, this stage terminates, this stage act as integration starting being provided to integration Point；

C) second stage, SW4 closures, rest switch disconnect, and start timing after SW4 closures, and now electric capacity C is with (U_GND- U_s)/R>0 electric current charges, and according to selected clock and required resolution, the selection suitable time of integration, timing time is t₁, this stage U₁Voltage reduces；

D) phase III, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁Electricity Pressure rises to comparator reversion, and timing time is t₂, this stage terminates；

E) fourth stage, SW2 closures, rest switch disconnect, and start timing after SW2 closures, and now electric capacity is with (U_REF+-U_s)/ R>0 electric current charges, and according to selected clock and required resolution, selects the suitable time of integration, and timing time is t₃, this Stage U₁Voltage reduces；

F) the 5th stage, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁Electricity Pressure rises to comparator reversion, and timing time is t₄, this stage terminates；

Wherein：U_REF+、U_REF-The respectively positive and negative terminal output voltage of standard voltage source.

5. step 2 described in) in, by t1, t2, t3, t4 for measuring,

According to charge conservation, can be obtained by second stage and phase III：

Take U_GND=0, it can be deduced that：

According to charge conservation, can be obtained by fourth stage and the 5th stage：

I.e.

Order

U_REF+=aU_REF- (15)

In formula：

Order

U_s=bU_REF- (17)

In formula：

6. step 3 described in) in, work as U_in-U_s>When 0, entirely it is divided into four-stage：

A) reset the stage：SW0 and SW4 is closed, now integrating capacitor electric discharge；

B) first stage, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁Electricity Pressure rises to comparator reversion, and this stage terminates, and this stage act as providing integration starting point to integration；

C) second stage, SW1 closures, rest switch disconnect, and now electric capacity is with (U_in-U_s)/R>0 electric current charges, according to Selected clock and required resolution, select the suitable time of integration, and timing time is t₅, this stage U₁Voltage reduces；Due to U_inSignal is the signal of an alternating current-direct current superposition, in order to filter its AC compounent, t₅For the integral multiple in its AC compounent cycle, this When according to U_oThe polarity of voltage judges U_in-U_sPolarity；

D) phase III, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁Electricity Pressure rises to comparator reversion, and timing time is t₆, this stage terminates.

7. step 3 described in) in, according to t5, t6 for measuring,

According to principle of charge conservation, can be obtained by second stage and phase III

Convolution (15), (16), (17), (18)

Can obtain：

Order

U_in=cU_REF- (19)

In formula：

8. step 3 described in) in, work as U_in-U_s<When 0, entirely it is divided into five stages：

A) reset the stage：SW0 and SW4 is closed, now integrating capacitor electric discharge；

B) first stage, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁Electricity Pressure rises to comparator reversion, and this stage terminates, and this stage act as providing integration starting point to integration；

C) second stage, SW1 closures, rest switch disconnect, and now electric capacity is with (U_in-U_s)/R<0 electric current charges, according to Selected clock and required resolution, select the suitable time of integration, and timing time is t₅, this stage U₁Voltage rises；Due to U_inSignal is the signal of an alternating current-direct current superposition, in order to filter its AC compounent, t₅For the integral multiple in its AC compounent cycle, this When according to U_oThe polarity of voltage judges U_in-U_sPolarity；

D) phase III, SW2 closures, rest switch disconnect, and now electric capacity is with (U_REF+-U_s)/R>0 electric current charges, U₁Electricity Comparator reversion is down in pressure, is then further continued for a bit of time t that charges₀, the total time of integration is t₆, this stage terminates；

E) fourth stage, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁Electricity Pressure rises to comparator reversion, and timing time is t₇, this stage terminates.

9. step 3 described in) in, according to t5, t6, t7 for measuring,

According to principle of charge conservation, can be obtained by second stage, phase III and fourth stage

Convolution (15), (16), (17), (18)

I.e.：

Make U_in=cU_REF- (22)

In formula：

The technique effect of the present invention：

1. the present invention provides a kind of integration ratio circuit, for measuring the ratio of the DC component of two combined-voltage signals Example, based on charge balance concept, carries out discharge and recharge respectively in different integration phases, and the time of integration is carried out to integrating capacitor Control, filters AC compounent, realizes the ratio of measurement DC component.The imbalance electricity of operational amplifier is eliminated using repeatedly integration The measurement error that the leakage current of pressure, bias current, temperature drift and analog switch is brought to integrating circuit, improves measurement essence Degree.

2. the present invention provides a kind of impedance measurement method based on integration type circuit, and the method uses integration ratio circuit, Impedance measurement is converted to into the ratio of measurement voltage DC component, so as to realize high-precision impedance measurement.Due to the present invention's What method needed measurement is the proportionate relationship between four tested voltage, and insensitive to its absolute value, and the present invention is measured first Ratio between positive voltage source, negative voltage source and integration initial voltage, then measures four tested voltages and positive voltage source again, bears Ratio between voltage source and integration initial voltage, draws the ratio between four tested voltage, this process eliminates device long The impact that phase drifts about to measurement result, and due to time of measuring very short (in 1s or in the shorter time), it is believed that it is The external environments such as the humiture that system is located are substantially unchanged, so also eliminating impact of the external environment to measuring, improve survey The accuracy of amount result.

3. it is according to the present invention to integrate ratio circuit and can be widely used for based on the impedance measurement method of integration ratio circuit The test measurement of 100Hz～1MHz electric capacity, inductance, resistance and any resistance, its quadrature demodulation side based on integration ratio circuit Method and circuit can be widely used for including the needs such as impedance instrument, power analyzer, phase meter, phase angle table to two voltage magnitudes with The instrument tested by phase relation.Therefore, based on technical scheme provided by the present invention, above-mentioned various instruments can be researched and developed.

Description of the drawings

Fig. 1 is the circuit diagram of the integration ratio circuit of the present invention.

Fig. 2 is the measurement U of the inventive method_REF1、U_REF2、U_sBetween proportionate relationship integration sequence figure.

Fig. 3 is the measurement U of the inventive method_1a、U_1b、U_2a、U_2bWith U_REF1、U_REF2、U_sBetween proportionate relationship integration sequence One of figure (U_in-U_s>0)。

Fig. 4 is the measurement U of the inventive method_1a、U_1b、U_2a、U_2bWith U_REF1、U_REF2、U_sBetween proportionate relationship integration sequence Two (U of figure_in-U_s<0)。

Specific embodiment

Embodiments of the invention are described further below in conjunction with accompanying drawing.

As shown in figure 1, being the circuit diagram of the integration ratio circuit of the present invention, two combined-voltage signals of measurement are capable of achieving DC component ratio, namely two in-phase components of the ac voltage signal under reference frame with flip-flop and Ratio between the DC component of quadrature component.A kind of integration ratio circuit, including operational amplifier, integral amplifier, compare Device；The positive input terminal of operational amplifier is respectively by first switch SW1, second switch SW2, the 3rd switch SW3, the 4th switch SW4 connection measured signals, the positive-negative output end of standard voltage source and ground potential, the outfan and negative input end of operational amplifier It is connected, and connects the negative input end of the integral amplifier by integrating resistor R, the outfan connection institute of integral amplifier The positive input terminal of comparator is stated, between the negative input end and outfan of integral amplifier, connects integrating capacitor, the two of integrating capacitor End is with charge switch SW0；The positive input terminal connection forward end reference voltage U of integral amplifier_REF1, the negative input end of comparator Connection negative end reference voltage U_REF2。

Figure₁In, U_REF+、U_REF-Respectively positive and negative standard voltage source；U_inFor measured signal, i.e. U_inFor U_1a、U_1b、U_2a、U_2bFour One of person, U_1aFor in-phase component of first measured signal under with reference to orthogonal coordinate system, U_1bIt is that the first measured signal is being joined Examine quadrature component under orthogonal coordinate system, U_2aFor in-phase component of second measured signal under with reference to orthogonal coordinate system, U_2bFor Quadrature component of two measured signals under with reference to orthogonal coordinate system；GND is ground potential；Operational amplifier A 1 is amplified for speed buffering Device；A2 is integral amplifier；A3 is comparator；U_REF1For A2 forward end reference voltages；U_REF2For A3 negative end reference voltages.

A kind of impedance measurement method based on above-mentioned integration ratio circuit, is believed by measuring the alternating voltage of tested impedance The ac voltage signal of in-phase component and quadrature component and normal impedance number under with reference to orthogonal coordinate system is with reference to orthogonal Impedance measurement is converted to measurement voltage DC by the ratio of the DC component between in-phase component and quadrature component under coordinate system The ratio of component.

According to the measuring principle of phasor Orthogonal Decomposition rule of three, make tested impedance with normal impedance by identical electric current, Then take in tested impedance that voltage signal carries out Treatment Analysis on voltage signal and normal impedance, obtain tested impedance information.

If in voltage signal and normal impedance, voltage signal is respectively u in tested impedance₁And u₂, referring to orthogonal coordinate system Under voltage phasor can be expressed as：

Wherein,Respectively alternating voltage u₁And u₂Voltage phasor under with reference to orthogonal coordinate system, U_1a、U_1bPoint It is not alternating voltage u₁In-phase component and quadrature component under with reference to orthogonal coordinate system, U_2a、U_2bIt is alternating voltage and u respectively₂ In-phase component and quadrature component under with reference to orthogonal coordinate system.

A pair of orthogonal basic function that reference coordinate is fastened is multiplied with measured signal respectively, obtains measured signal homophase or just Hand over component.If measured signal u₁Time-domain expression：

u₁(t)=Asin (ω t+ θ) (3)

In formula, A is u₁Amplitude, ω is u₁Angular frequency, θ is u₁Initial phase.

The time-domain expression of a pair of orthogonal basic function of reference frame is：

u_a(t)=sin (ω t) (4)

Orthogonal basis function be unit amplitude, angular frequency must and u₁Angular frequency it is identical, by orthogonal basis function respectively with quilt Survey signal multiplication：

It is similar to obtainUsing low pass filter, the filter of the item with 2 ω t by upper two formula Go, obtain in-phase component or quadrature component that measured signal is fastened in reference coordinate：

U can be drawn in the same manner_2aAnd U_2b, tested impedance can be calculated：

From above-mentioned principle, it is to measure in-phase component and quadrature component U to measure impedance key_1a、U_1b、U_2a、U_2bBetween DC component ratio.

Comprise the following steps that：

Step 1), it is first determined the forward end reference voltage U being connected with the positive input terminal of integral amplifier_REF1, with compare The negative end reference voltage U of the negative input end connection of device_REF2Size；

Step 2), measurement draws the forward end reference voltage U being connected with the positive input terminal of integral amplifier_REF1, with compare The negative end reference voltage U of the negative input end connection of device_REF2, the integration initial voltage U that is carried on integrating resistor R_sBetween ratio Example relation；

Step 3), measurement respectively draws in-phase component of the ac voltage signal of tested impedance under with reference to orthogonal coordinate system U_1a, quadrature component U_1b, normal impedance in-phase component U of the ac voltage signal under with reference to orthogonal coordinate system_2a, quadrature component U_2bWith the forward end reference voltage U_REF1, negative end reference voltage U_REF2, the integration initial voltage that is carried on integrating resistor R U_sBetween proportionate relationship；

Step 4), using step 1) with step 2) result that draws, by formula

Calculate tested impedance.

Generally, in basic integrating circuit, U_REF1And U_REF2Earthing potential, the problem that this method is present are as follows：

1、U_REF1Earthing potential：So that when SW4 is closed, when other switch off, electric capacity charging direction is possible to as just, It is negative to be possible to, and needs the extra time of integration to go to determine its charging direction.

2、U_REF2Earthing potential：So that the output voltage of comparator A3 can just can be born after resetting, to the selection of integral voltage Make troubles.

Therefore, before integral measurement process starts, first have to carry out reference voltage U_REF1With U_REF2Size determine, give in advance Go out corresponding magnitude of voltage, select U_REF1So that SW4 determines electric capacity charging direction when closing, U is selected_REF2After value determines clearing, A3 is defeated Go out voltage.The concrete method for determining is as follows:

In the case of in view of system drifting, when SW4 is closed, when other switch off, U is selected_REF1So that electric capacity C fills It is negative sense, i.e. U for positive or perseverance that electric direction is permanent_GND+V_OS1-U_ePermanent is just or perseverance is negative.During charging：

U_e=U_REF1+V_OS2+I_B2·R+I_SW0·R (10)

V_OS1、V_OS2--- the bias voltage of-operational amplifier 1 and operational amplifier 2；

I_B2--- the bias current of-operational amplifier；

I_SW0----be divided into switchs leakage current in the case of closure situation and opening, due to this electric current it is less, and to being System index does not affect, and which is not distinguished in formula.

As this absolute value of voltage is bigger, measuring speed is slower, therefore it is more proper to hundreds of mV to be ordinarily selected to tens of mV When while its absolute value is less than U_REF+And U_REF-。

This voltage refers to U_GND+V_OS1-U_e, by formula it can be seen that its multifactorial impact of value audient, adjusts it in theory It is best, but the long term drift due to device and environmental change to zero, its value also has drift, and drift size receives selected device Part and environmental change affect, if set to zero when dispatching from the factory, then affected by long term drift its value to be likely larger than zero, be likely less than Zero.The size of its drift is determined by the size of the change of the environmental factorss such as the drift with selected device and system temperature It is fixed, it is however generally that, this drift is between number mV to tens of mV, but is also possible to as greater or lesser value, but its formula It is constant.Selecting U_REF1When, needs calculate U according to the environmental change of device handbook and its work_GND+V_OS1-U_eMaximum Drift, is ensureing U_GND+V_OS1-U_eIt is permanent for just or permanent to select U on the premise of negative_REF1, and make U_GND+V_OS1-U_eAbsolute value try one's best It is little, and corresponding allowance is reserved, because absolute value crosses conference reduces measuring speed.

Equally, select U_REF2So that the positive and negative input voltage difference perseverances of comparator A3 are just or perseverance is under integrate-dump state It is negative；That is U_REF2-V_OS3-U_ePermanent is just or perseverance is negative.This absolute value of voltage is bigger, and measuring speed is slower, therefore is ordinarily selected to number Ten mV are more appropriate to hundreds of mV, while its absolute value is less than U_REF+And U_REF-。

In the same manner, this voltage refers to U_REF2-V_OS3-U_e, by formula it can be seen that its multifactorial impact of value audient, in theory Its set to zero is best, but the long term drift due to device and environmental change, and its value also has drift, and drift size receives institute Device and environmental change is selected to affect, if set to zero when dispatching from the factory, then to be affected its value to be likely larger than zero by long term drift, may Less than zero.The size of its drift is the size of the change by environmental factorss such as the drift with selected device and system temperatures And determine, it is however generally that, this drift is between number mV to tens of mV, but is also possible to as greater or lesser value, but its Formula is constant.Selecting U_REF2When, needs calculate U according to the environmental change of device handbook and its work_REF2-V_OS3-U_e Maximum drift, ensure U_REF2-V_OS3-U_eIt is permanent for just or permanent to select U on the premise of negative_REF2, and make U_REF2-V_OS3-U_eIt is exhausted It is as far as possible little to being worth, and corresponding allowance is reserved, because absolute value crosses conference reduces measuring speed.

Whole measurement process is divided into two steps, and the first step is measurement U_REF+、U_REF-、U_sBetween proportionate relationship, second step for point U is not measured_1a、U_1b、U_2a、U_2bWith U_REF+、U_REF-、U_sBetween proportionate relationship, then calculating can draw U_1a、U_1b、U_2a、U_2bIt Between proportionate relationship.

According to U_REF1And U_REF2Can there are four kinds of situations in the difference of selection：

U_GND+V_OS1-U_e>0, U_REF2-V_OS3-U_e>0；

U_GND+V_OS1-U_e>0, U_REF2-V_OS3-U_e<0；

U_GND+V_OS1-U_e<0, U_REF2-V_OS3-U_e>0；

U_GND+V_OS1-U_e<0, U_REF2-V_OS3-U_e<0；

The integration direction that this four kinds of situations are selected unlike in measurement process is different, but its ultimate principle is consistent, existing With U_GND+V_OS1-U_e>0, U_REF2-V_OS3-U_e>Integral process is illustrated as a example by 0：

The first step：Measurement U_REF+、U_REF-、U_sBetween proportionate relationship

Note：U_s=U_e-V_OS1

A) reset the stage：SW0 and SW4 is closed, now integrating capacitor electric discharge；

B) first stage, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁Electricity Pressure rises to comparator reversion, and this stage terminates, and this stage act as providing integration starting point to integration；

C) second stage, SW4 closures, rest switch disconnect, and now electric capacity is with (U_GND-U_s)/R>0 electric current charges, according to Selected clock and required resolution, select the suitable time of integration, and timing time is t₁, this stage U₁Voltage reduces；

The method for selecting the time of integration is as follows：

Start timing after SW4 closures, the selection of timing time is relevant with selected clock and required resolution, while will Reduce the impact of AC compounent.The resolution of the count value decision systems of enumerator, if index is 10^-4, then count value will More than ten times of index resolution are reached for, such as 10⁵～10⁶, the time=clock cycle × count value, in order to prevent integrating capacitor The leakage of device itself, on the one hand using the polytetrafluoroethylene capacitor that Leakage Current is little, the another aspect time of integration is less than 0.1s.The time of integration should be the integral multiple (as system frequency can set, be known conditions) of measured signal cycle/2 simultaneously, to disappear Except impact of the measured signal AC compounent to measuring, the purpose for filtering AC compounent is reached.

D) phase III, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁Electricity Pressure rises to comparator reversion, and timing time is t₂, this stage terminates；

E) fourth stage, SW2 closures, rest switch disconnect, and now electric capacity is with (U_REF+-U_s)/R>0 electric current charges, according to Selected clock and required resolution, select the suitable time of integration, and timing time is t₃, this stage U₁Voltage reduces；

Start timing, the resolution of the count value decision systems of enumerator, if index is 10 after SW2 closures^-4, then meter Numerical value to be reached for more than ten times of index resolution, and such as 10⁵～10⁶, the time=clock cycle × count value, in order to prevent product Divide the leakage of capacitor itself, on the one hand using the polytetrafluoroethylene capacitor that Leakage Current is little, the another aspect time of integration is not More than 0.1s.The time of integration should be the integral multiple (as system frequency can set, be known conditions) of measured signal cycle/2 simultaneously；

F) the 5th stage, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁Electricity Pressure rises to comparator reversion, and timing time is t₄, this stage terminates.

Note：To the positive and negative charging direction for determining electric capacity of electric current that electric capacity charges, U during negative electricity current charge₁Increase, on the contrary subtract It is little.

According to charge conservation, can be obtained by second stage and phase III：

Take U_GND=0, it can be deduced that：

According to charge conservation, can be obtained by fourth stage and the 5th stage：

I.e.

Order

U_REF+=aU_REF- (15)

In formula：

Order

U_s=bU_REF- (17)

In formula：

Second step：Measurement U_1a、U_1b、U_2a、U_2bWith U_REF+、U_REF-、U_sBetween proportionate relationship：

For integrating circuit, this four magnitudes of voltage are measured for this integrating circuit is the same, need to measure successively, The tested voltage U of measurement is given now_inSequential chart：

By U_in-U_sPolarity integral process can be divided into two kinds of situations, the first situation U_in-U_s>0, as shown in figure 3, Second situation U_in-U_s<0, as shown in Figure 4：

The first situation U_in-U_s>0：Whole integration can be divided into four-stage, wherein the stage of clearing is not drawn in figure:

A) reset the stage：SW0 and SW4 is closed, now integrating capacitor electric discharge；

B) first stage, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁Electricity Pressure rises to comparator reversion, and this stage terminates, and this stage act as providing integration starting point to integration；

C) second stage, SW1 closures, rest switch disconnect, and now electric capacity is with (U_in-U_s)/R>0 electric current charges, according to Selected clock and required resolution, select the suitable time of integration, and timing time is t₅, this stage U₁Voltage rises；Due to U_inSignal is the signal of an alternating current-direct current superposition, in order to filter its AC compounent, t₅For the integral multiple in its AC compounent cycle.This When according to U_oThe polarity of voltage judges U_in-U_sPolarity；

D) phase III, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁Electricity Pressure rises to comparator reversion, and timing time is t₆, this stage terminates.

According to principle of charge conservation, can be obtained by second stage and phase III

Convolution (15), (16), (17), (18)

Can obtain：

Order

U_in=cU_REF- (19)

In formula：

Second situation U_in-U_s<0, whole integration can be divided into five stages, wherein the stage of clearing is not drawn in figure:

A) reset the stage：SW0 and SW4 is closed, now integrating capacitor electric discharge；

B) first stage, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁Electricity Pressure rises to comparator reversion, and this stage terminates, and this stage act as providing integration starting point to integration；

C) second stage, SW1 closures, rest switch disconnect, and now electric capacity is with (U_in-U_s)/R<0 electric current charges, according to Selected clock and required resolution, select the suitable time of integration, and timing time is t₅, this stage U₁Voltage rises；Due to U_inSignal is the signal of an alternating current-direct current superposition, in order to filter its AC compounent, t₅For the integral multiple in its AC compounent cycle.This When according to U_oThe polarity of voltage judges U_in-U_sPolarity；

D) phase III, SW2 closures, rest switch disconnect, and now electric capacity is with (U_REF+-U_s)/R>0 electric current charges, U₁Electricity Comparator reversion is down in pressure, is then further continued for a bit of time t that charges₀, the total time of integration is t₆, this stage terminates.

E) fourth stage, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁Electricity Pressure rises to comparator reversion, and timing time is t₇, this stage terminates.

Being in order to reduce comparator in different directions, no the reason for not terminating timing when phase III comparator is inverted With the inconsistent error brought of the transmission delay inverted under slew rate.Error is brought as comparator is inverted from different directions, meeting Decline index, and coordinate fourth stage after recharging a period of time, the starting point for making integration is comparator from equidirectional, phase Draw with reversion under slew rate, eliminated by the comparator inversion delay inconsistent error brought twice to the full extent.

According to principle of charge conservation, can be obtained by second stage, phase III and fourth stage

Convolution (15), (16), (17), (18)

I.e.：

Make U_in=cU_REF- (22)

In formula：

After the completion of second step, U can be drawn by formula (19), (20), (22), (23)_inWith U_REF-Relation, i.e. U_1a、U_1b、 U_2a、U_2bWith U_REF-Relation：(due to U_REF+、U_REF-、U_sBetween proportionate relationship, it is known that U can also be drawn_1a、U_1b、U_2a、U_2b With U_REF+Or U_sRelational expression)

U_1a=c_1a·U_REF- (24)

U_1b=c_1b·U_REF- (25)

U_2a=c_2a·U_REF- (26)

U_2b=c_2b·U_REF- (27)

Can be obtained by formula (24), (25), (26), (27)：

The above is the specific embodiment of the invention, does not constitute limiting the scope of the present invention.It is any this Modification, equivalent and improvement made within the spirit and principle of invention etc., the claim that should be included in the present invention are protected Within the scope of shield.

Claims (9)

1. it is a kind of to integrate ratio circuit, for measuring the ratio of two combined-voltage signal DC component, it is characterised in that bag Include operational amplifier, integral amplifier, comparator；The positive input terminal of the operational amplifier respectively by first switch SW1, the Two switch SW2, the 3rd switch SW3, the 4th switch SW4 connection measured signals, the positive-negative output end of standard voltage source and ground electricity Position, the outfan of operational amplifier are connected with negative input end, and connect the negative of the integral amplifier by integrating resistor R Input, the outfan of the integral amplifier connect the positive input terminal of the comparator；The negative input of the integral amplifier Connect integrating capacitor between end and outfan, the two ends of the integrating capacitor have charge switch SW0；The integral amplifier Positive input terminal connects forward end reference voltage U_REF1, the negative input end connection negative end reference voltage U of the comparator_REF2。

2. it is a kind of based on the impedance measurement method for integrating ratio circuit as claimed in claim 1, it is characterised in that by measurement In-phase component U of the ac voltage signal of tested impedance under with reference to orthogonal coordinate system_1aWith quadrature component U_1bAnd normal impedance In-phase component U of the ac voltage signal under with reference to orthogonal coordinate system_2aWith quadrature component U_2bBetween DC component ratio Impedance measurement is converted to the ratio of measurement voltage DC component, is comprised the following steps that by example：

Step 1), it is first determined the forward end reference voltage U being connected with the positive input terminal of integral amplifier_REF1, and comparator is negative The negative end reference voltage U of input connection_REF2Size；

Step 2), measurement draws the forward end reference voltage U being connected with the positive input terminal of integral amplifier_REF1, and comparator is negative The negative end reference voltage U of input connection_REF2, the integration initial voltage U that is carried on current-limiting resistance R_sBetween ratio close System；

Step 3), measurement respectively draws in-phase component U of the ac voltage signal of tested impedance under with reference to orthogonal coordinate system_1a、 Quadrature component U_1b, normal impedance in-phase component U of the ac voltage signal under with reference to orthogonal coordinate system_2a, quadrature component U_2bPoint Not with the forward end reference voltage U_REF1, negative end reference voltage U_REF2Or the voltage U being carried on resistance R_sBetween ratio Relation；

Step 4), using step 2) with step 3) result that draws, by formula

$Z_1=\frac{\sqrt{U_{1a}^2+U_{1b}^2}}{\sqrt{U_{2a}^2+U_{2b}^2}}\left|Z_2\right|$

Calculate tested impedance.

3. impedance measurement method according to claim 2, it is characterised in that the step 1) in, determine that forward end is referred to Voltage U_REF1, and negative end reference voltage U_REF2Comprise the following steps that：

When the 4th switch SW4 of connection ground potential is in closure, when other switch off, U is selected_REF1So that electric capacity C chargings direction Permanent is negative sense, i.e. U for positive or perseverance_GND+V_OS1-U_ePermanent is just or perseverance is negative；During charging：

U_e=U_REF1+V_OS2+I_B2·R+I_SW0·R

V_OS1、V_OS2--- the bias voltage of-operational amplifier and integral amplifier；

I_B2--- the bias current of-operational amplifier；

I_SW0----be divided into switchs leakage currents of the SW0 in the case of closure situation and opening；

Equally, select U_REF2So that the positive and negative input voltage difference perseverances of comparator A3 are just or perseverance is negative under integrate-dump state；I.e. U_REF2-V_OS3-U_ePermanent is just or perseverance is negative, Vos₃For the bias voltage of comparator.

4. impedance measurement method according to claim 3, it is characterised in that the step 2) in, measurement process selects product Direction is divided to be U_GND+V_OS1-U_e>0, U_REF2-V_OS3-U_e>0, comprise the following steps：

A) reset the stage：SW0 and SW4 is closed, now integrating capacitor electric discharge；

B) first stage, SW3 closures, rest switch disconnect, and now electric capacity C is with (U_REF--U_s)/R<0 electric current charges, and integration is put Big device output voltage U₁Comparator reversion is risen to, this stage terminates, this stage act as integration starting point being provided to integration；

C) second stage, SW4 closures, rest switch disconnect, and start timing after SW4 closures, and now electric capacity C is with (U_GND-U_s)/R>0 Electric current charge, according to selected clock and required resolution, select the suitable time of integration, timing time is t₁, this rank Section U₁Voltage reduces；

D) phase III, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁On voltage Comparator reversion is risen to, timing time is t₂, this stage terminates；

E) fourth stage, SW2 closures, rest switch disconnect, and start timing after SW2 closures, and now electric capacity is with (U_REF+-U_s)/R>0 Electric current charge, according to selected clock and required resolution, select the suitable time of integration, timing time is t₃, this rank Section U₁Voltage reduces；

F) the 5th stage, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁On voltage Comparator reversion is risen to, timing time is t₄, this stage terminates；

Wherein：U_REF+、U_REF-The respectively positive and negative terminal output voltage of standard voltage source.

5. impedance measurement method according to claim 4, it is characterised in that the step 2) in, by the t1, t2 for measuring, T3, t4,

According to charge conservation, can be obtained by second stage and phase III：

$\frac{U_{GND}-U_s}{R}\&CenterDot;t_1+\frac{U_{REF-}-U_s}{R}\&CenterDot;t_2=0---\left(11\right)$

Take U_GND=0, it can be deduced that：

$\frac{U_s}{U_{REF-}}=\frac{t_2}{t_1-t_2}---\left(13\right)$

According to charge conservation, can be obtained by fourth stage and the 5th stage：

$\frac{U_{REF+}-U_s}{R}\&CenterDot;t_3+\frac{U_{REF-}-U_s}{R}\&CenterDot;t_4=0---\left(13\right)$

I.e.

$\frac{U_{REF+}}{U_{REF-}}=\frac{t_2{t}_3+2t_2{t}_4-t_1{t}_4}{(t_1-t_2)\&CenterDot;t_3}---\left(14\right)$

Order

U_REF+=aU_REF- (15)

In formula：

$a=\frac{t_2{t}_3+2t_2{t}_4-t_1{t}_4}{(t_1-t_2)\&CenterDot;t_3}---2\left(16\right)$

Order

U_s=bU_REF- (17)

In formula：

$b=\frac{t_2}{t_1-t_2}.---\left(18\right)$

6. impedance measurement method according to claim 5, it is characterised in that the step 3) in, work as U_in-U_s>When 0, will Entirely it is divided into four-stage：

A) reset the stage：SW0 and SW4 is closed, now integrating capacitor electric discharge；

B) first stage, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁On voltage Comparator reversion is risen to, this stage terminates, this stage act as integration starting point being provided to integration；

C) second stage, SW1 closures, rest switch disconnect, and now electric capacity is with (U_in-U_s)/R>0 electric current charges, according to selected Clock and required resolution, select the suitable time of integration, and timing time is t₅, this stage U₁Voltage reduces；Due to U_in Signal is the signal of an alternating current-direct current superposition, in order to filter its AC compounent, t₅For the integral multiple in its AC compounent cycle, now According to U_oThe polarity of voltage judges U_in-U_sPolarity；

D) phase III, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁On voltage Comparator reversion is risen to, timing time is t₆, this stage terminates.

7. impedance measurement method according to claim 6, it is characterised in that the step 3) in, according to the t5 for measuring, T6,

According to principle of charge conservation, can be obtained by second stage and phase III

$\frac{U_{in}-U_s}{R}\&CenterDot;t_5+\frac{U_{REF-}-U_s}{R}\&CenterDot;t_6=0$

Convolution (15), (16), (17), (18)

Can obtain：

$\frac{U_{in}}{U_{REF-}}=\frac{b(t_5+t_6)-t_6}{t_5}---\left(18\right)$

Order

U_in=cU_REF- (19)

In formula：

$c=\frac{b(t_5+t_6)-t_6}{t_5}.---\left(20\right)$

8. impedance measurement method according to claim 5, it is characterised in that the step 3) in, work as U_in-U_s<When 0, will Entirely it is divided into five stages：

A) reset the stage：SW0 and SW4 is closed, now integrating capacitor electric discharge；

B) first stage, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁On voltage Comparator reversion is risen to, this stage terminates, this stage act as integration starting point being provided to integration；

C) second stage, SW1 closures, rest switch disconnect, and now electric capacity is with (U_in-U_s)/R<0 electric current charges, according to selected Clock and required resolution, select the suitable time of integration, and timing time is t₅, this stage U₁Voltage rises；Due to U_in Signal is the signal of an alternating current-direct current superposition, in order to filter its AC compounent, t₅For the integral multiple in its AC compounent cycle, now According to U_oThe polarity of voltage judges U_in-U_sPolarity；

D) phase III, SW2 closures, rest switch disconnect, and now electric capacity is with (U_REF+-U_s)/R>0 electric current charges, U₁Under voltage Comparator reversion is down to, a bit of time t that charges then is further continued for₀, the total time of integration is t₆, this stage terminates；

E) fourth stage, SW3 closures, rest switch disconnect, and now electric capacity is with (U_REF--U_s)/R<0 electric current charges, U₁On voltage Comparator reversion is risen to, timing time is t₇, this stage terminates.

9. impedance measurement method according to claim 8, it is characterised in that the step 3) in, according to the t5 for measuring, T6, t7,

According to principle of charge conservation, can be obtained by second stage, phase III and fourth stage

$\frac{U_{in}-U_s}{R}\&CenterDot;t_5+\frac{U_{REF+}-U_s}{R}\&CenterDot;t_6+\frac{U_{REF}--U_s}{R}\&CenterDot;t_7=0$

Convolution (15), (16), (17), (18)

I.e.：

$\frac{U_{in}}{U_{REF-}}=\frac{b(t_5+t_6)-{\mathrm{at}}_6+(b-1)t_7}{t_5}---\left(21\right)$

Make U_in=cU_REF- (22)

In formula：

$c=\frac{b(t_5+t_6)-{\mathrm{at}}_6+(b-1)t_7}{t_5}.---\left(23\right)$