CN104242958A - Communication system and sample rate converter thereof - Google Patents
Communication system and sample rate converter thereof Download PDFInfo
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- CN104242958A CN104242958A CN201310481350.XA CN201310481350A CN104242958A CN 104242958 A CN104242958 A CN 104242958A CN 201310481350 A CN201310481350 A CN 201310481350A CN 104242958 A CN104242958 A CN 104242958A
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Abstract
The present invention provides a communication system, which comprises a sample rate converter enabling to change the configuration, and a controller. The sample rate converter is used for converting a digital signal with a first sample rate to a converted signal with a second conversion rate. The sample rate converter is operated under a first configuration or a second configuration different from the first configuration. The controller enables dynamic control of the sample rate converter to be operated under either the first configuration or the second configuration according to at least a limited condition.
Description
Technical field
The present invention and sample rate converter (sample rate converter, SRC) are correlated with, and especially to adaptive can change that to operate the sample rate converter configured relevant.
Background technology
Along with the progress of electronic related technologies, various types of communication apparatus is more and more universal.Conveyer in existing communication equipment or receiver can comprise the analog circuit compared with front end and the digital circuit compared with rear end mostly; Digital-analog convertor or analogue-to-digital converters are provided with between the circuit that two kinds of signal kenels are different.
Fig. 1 presents the simple and easy functional block diagram of the transmission end circuit in third generation partner program (3rd Generation Partnership Project, 3GPP) communication device.In digital signal, the high order harmonic component of each pulse wave causes interference to analog circuit, and digital circuit 120 and analog circuit 160 usually need be separated by a segment protect distance on entity, in order to avoid coupled interference (coupling interference).In addition, in order to the negative effect that the high order harmonic component reduced further in digital pulse wave may cause analog circuit 160, treat that transmission signal 110 is before entering digital-analog convertor 140, can first by a sample rate converter 122.After the up-conversion that sample rate converter 122 exports, the sampling rate of signal 130 equals the operation sampling rate of analog circuit 160 divided by a specific integer.Easy speech it, the operation sampling rate of analog circuit 160 is the integral multiple of the sampling rate of signal 130 after up-conversion.Similarly, in the digital circuit of 3GPP receiver (not illustrating), also comprise a sample rate converter, in order to input signal frequency reducing to be changed.
As is known to the person skilled in the art, the correctness of the transformation result of sample rate converter is relevant to its exponent number (order).The sample rate conversion that exponent number is higher comprises the more circuit element/operation program, and power consumption is also higher, but usually can provide comparatively ideal transformation result.On the other hand, communication device faced by external environment usually constantly can change along with the time.In order to still keep normal operation under the communication environment of severe (such as there is much noise interference), the sample rate converter in communication device is designed to have higher exponent number mostly.For the mobile communication device because using battery and limited power, the high power consumption adopting high-order sample rate converter a to cause unfavorable factor beyond doubt, may cause its stand-by time to decline.
Summary of the invention
For solving the problem, the present invention proposes a kind of new sample rate conversion scheme.Be different from prior art the way of the sample rate converter adopting fixing exponent number, one or more restrictive conditions can be considered according to the communication system in embodiments of the invention and sample rate conversion method, the configuration of dynamic conditioning sample rate converter, and then the power consumption or other performance indicators that change sample rate converter.Do not needing to pursue in the communication environment of high-quality transformation result, sample rate converter can be set to operate on the lower configuration of power consumption, to save the electric power of communication system.
A specific embodiment according to the present invention is a kind of communication system, wherein comprises sample rate converter and a controller that one can change configuration.This sample rate converter is in order to be converted to a converted signals with one second sampling rate by a digital signal with one first sampling rate.This sample rate converter can operate on one first configuration or be different from one second configuration of this first configuration.This controller is in order to according at least one restrictive condition, and this sample rate converter of Dynamic controlling operates on the one in this first configuration and this second configuration.
Another specific embodiment according to the present invention is a kind of sample rate conversion method be applied in a communication system.One sample rate conversion program can operate on one first configuration or be different from one second configuration of this first configuration.This sample rate conversion method comprises the following step: (a), according at least one restrictive condition, determines a configuration switching law of this sample rate conversion program; And (b) according to this configuration switching law in this first configuration and this second configure between switch this sample rate conversion program.
Another specific embodiment according to the present invention is a kind of sample rate converter changing configuration, in order to a digital signal with one first sampling rate to be converted to a converted signals with one second sampling rate.This sample rate converter comprises a sample rate conversion circuit and a controller.This sample rate conversion circuit can operate at least two or more difference configuration.This controller is in order to according at least one restrictive condition, and this sample rate conversion circuit of Dynamic controlling operates on the wherein a kind of of this at least two or more difference configuration.
Can be further understood by following detailed Description Of The Invention and institute's accompanying drawings about the advantages and spirit of the present invention.
Accompanying drawing explanation
Fig. 1 presents the simple and easy functional block diagram of the transmission end circuit in 3GPP communication device.
Fig. 2 is the functional block diagram according to the communication system in one embodiment of the invention.
Fig. 3 presents the running exponent number of sample rate converter and the corresponding relation example of several restrictive conditions.
Fig. 4 A and Fig. 4 B presents the configuring switching mode example that controller according to the present invention adopts.
Fig. 5 A and Fig. 5 B illustrates a kind of internal circuit example arrangement according to sample rate converter of the present invention.
Fig. 6 A illustrates the another kind of internal circuit example arrangement according to sample rate converter of the present invention; Fig. 6 B is that the one of this sample rate converter implements example in detail; Fig. 6 C is a kind of signal sequence example of this sample rate converter; Fig. 6 D indicates the scope of the local circuit producing low order transformation result; Fig. 6 E presents a kind of enforcement example of closing multiplier when low order configures.
Fig. 7 presents the detailed enforcement example according to another sample rate conversion circuit of the present invention.
Fig. 8 is the flow chart according to the sample rate conversion method in one embodiment of the invention.
[label declaration]
110: treat transmission signal 120: digital circuit
122: sample rate converter 130: signal after up-conversion
140: digital-analog convertor 160: analog circuit
200: communication system 210: the sample rate converter that can change configuration
215: controller 220: digital circuit
240: digital-analog convertor 260: analog circuit
210A: low order sample rate conversion circuit 210B: high-order sample rate conversion circuit
210C: multiplexer 210D: delay element
212: high-order sample rate conversion circuit 212A: local circuit
212B: multiplexer 212C: multiplier
S82 ~ S84: process step
Embodiment
A specific embodiment according to the present invention is a kind of communication system, and its functional block diagram is illustrated in Fig. 2.Should be noted that, the inventive concept that these embodiments present censured in the diction of so-called the present invention one herein, but it is contained category and is not limited to these embodiments itself.In addition, the Mathematical representation in present disclosure is in order to the principle relevant to embodiments of the invention and logic to be described, unless there are situation about specializing, otherwise not to be construed as limiting category of the present invention.
Sample rate converter 210 and a controller 215 that one can change configuration is comprised in communication system 200.In this embodiment, sample rate converter 210 is contained in digital circuit 220, in order to will have input sampling rate F
iNa digital signal be converted to have another export sampling rate F
oUTconverted signals.This converted signals can be sequentially provided to digital-analog convertor 240 and analog circuit 260 subsequently, to make the operation sampling rate of analog circuit 260 be the integral multiple of the sampling rate of this converted signals, contribute to reducing the interference that digital pulse wave causes analog circuit 260.
Sample rate converter 210 can operate at least two kinds of different configurations.For example, sample rate converter 210 can be designed to have different running exponent numbers in two kinds of different configurations.Or sample rate converter 210 can be designed to have identical running exponent number in two kinds of different configurations, but has different computational complexities.Generally speaking, the sample rate conversion all comparatively power consumption that exponent number is higher or complexity is higher is operated.The configuration change mode of sample rate converter 210 is detailed later.Below illustrate and mainly configure the situation different with the running exponent number of the second configuration for sample rate converter 210 in first, but category of the present invention is not as limit.In addition, by following explanation, those skilled in the art can understand, and the configuration quantity that category of the present invention is not limited to sample rate converter 210 is the situation of two.
In practical application, it is inner that controller 215 can be arranged at digital circuit 220, also can as shown in Figure 2 independent of outside digital circuit 220.Controller 215 is in order to according at least one restrictive condition, and Dynamic controlling sample rate converter 210 operates on the first configuration or the second configuration.The restrictive condition being provided to controller 215 can measure conveyer quality, transmission channel quality including but not limited to communication system 200, or the correlated judgment produced after receiver quality, such as error vector magnitude (error vector magnitude, EVM), adjacent channel leakage power ratio (adjacent channel leakage power ratio, ACLR), transmission end mixes attached emission measure (TX spurious emission at RX band), or transmission end output power signal.The form that Fig. 3 presents is the running exponent number of sample rate converter 210 and the corresponding relation example of several restrictive conditions.As shown in this form, when required error vector magnitude is poor, transmission end mix attached emission measure lower or output power signal is lower time, controller 215 all can make sample rate converter 210 operate on the lower configuration of exponent number.In general, when communication environment better quality, sample rate converter 210 does not just need to operate in the higher high order configurations of power consumption.Relatively, when communication environment is second-rate, sample rate converter 210 just can be switched to the high order configurations that can provide better performance.By this, when not damaging communication system 200 overall operation performance, the average power consumption of sample rate converter 210 can be lowered.
In addition, the restrictive condition being provided to controller 215 also can comprise from the restriction of communication system 200 own, the such as power state of communication system 200.For example, when controller 215 finds the electricity of communication system 200 lower than a threshold value, originally the sample rate converter 210 operating on the higher configuration of power consumption can be switched to and operate on the lower configuration of power consumption, to extend the up time of communication system 200.The producing method of aforementioned various restrictive condition is all known to those skilled in the art, therefore repeats no more.
In practice, controller 215 can utilize a look-up table or a logical operation circuit to determine the configuration switching law of sample rate converter 210.For the form shown in Fig. 3, controller 215 can a restrictive condition as index value, find out corresponding running exponent number, and according to its lookup result determine how to switch sample rate converter 210.Should be noted that, the various numerical values recited in these corresponding relations can be determined according to practical experience by the circuit designers of communication system 200, are not limited with Fig. 3 person of enumerating.Those skilled in the art can understand, these corresponding relations and controller 215 select exponent number patrol extremely rule the circuit comprising the element such as comparator, gate also can be utilized to realize, or be written as non-momentary computer fetch medium, be stored in the memory coordinating controller 215.
When must consider multiple restrictive condition simultaneously, controller 215 can find out a corresponding running exponent number according to each restrictive condition respectively, then in the multiple running exponent numbers searching gained, select a maximum as final selected running exponent number.Easy speech it, controller 215 can be that sample rate converter 210 determines one first exponent number, is that sample rate converter 210 determines one second exponent number according to the second restrictive condition according to the first restrictive condition, and determines the configuration switching law of sample rate converter 210 according to the greater in the first exponent number and the second exponent number.
In according in embodiments of the invention, controller is that the running exponent number that sample rate converter is selected can be an integer, also can be a non-integer.Suppose that the running exponent number corresponding to sample rate converter 210 be in the first configuration is positive integer N, the running exponent number corresponding to sample rate converter 210 be in the second configuration is another positive integer M.In an embodiment, when controller 215 is that the running exponent number that sample rate converter 210 is selected operates between exponent number M between the first running exponent number N and second.Equal 1 for N, situation that M equals 2, if controller 215 is the running exponent number that sample rate converter 210 is selected is 1.5, controller 215 can make sample rate converter 210 timing between the first configuration and the second configuration alternately switch, and occupies the operating time of 50% separately.As shown in Figure 4 A, controller 215 can make sample rate converter 210 in a specific time period T front 50% time operate on the first configuration, the time of rear 50% operates on the second configuration.Controller 215 also can as shown in Figure 4 B, and time sample rate converter 210 being operated on the first configuration and the second configuration is split as two sections of T*25% separately.Similarly, if N equals 1, M equals 3, make sample rate converter 210 timing between the first configuration and the second configuration alternately switch, and occupy the operating time of 50% separately, the running exponent number of sample rate converter 210 can be made to be equivalent to 2.
In an embodiment, when controller 215 is selected alternately to switch sample rate converter 210 to realize a certain specific running exponent number between two kinds of configurations, controller 215 utilizes one triangle-quadrature modulates (Delta-Sigma Modulation) program or pulse width modulation (Pulse Width Modulation) to plan the time devided modulation mode switching sample rate converter 210 between the first configuration and the second configuration.As shown in the above description, as long as can use the converter configurations of multiple different rank, to realize the modulation system of a certain specific running exponent number, category of the present invention is not limited to specific modulation system.By this, the noise produced because of handover configurations can be passed to compared with can not the frequency range of interference simulation circuit 260.
As shown in Figure 5A, in an embodiment, sample rate converter 210 comprises an a low order sample rate conversion circuit 210A and high-order sample rate conversion circuit 210B.When sample rate converter 210 operates on low order configuration, low order sample rate conversion circuit 210A is activated.When sample rate converter 210 operates on high order configurations, high-order sample rate conversion circuit 210B is activated.When low order sample rate conversion circuit 210A is activated, high-order sample rate conversion circuit 210B can be closed, to save electric power.Relatively, when high-order sample rate conversion circuit 210B is activated, low order sample rate conversion circuit 210A can be closed.
The one that Fig. 5 B presents the sample rate converter 210 shown in Fig. 5 A further implements example in detail.In this example, the switching signal tp that controller 215 produces controls multiplexer 210C, is the output signal of low order sample rate conversion circuit 210A or high-order sample rate conversion circuit 210B with what select the output OUT by being provided to sample rate converter 210.As is known to the person skilled in the art, compared to low order sample rate conversion circuit, high-order sample rate conversion circuit need obtain more pen input data to be begun to carry out computing, produces its output signal.In order to reach the effect that seamless (seamless) switches, between low order sample rate conversion circuit 210A and input IN, be provided with a delay element 210D.Equal one with the running exponent number of low order sample rate conversion circuit 210A, the running exponent number of high-order sample rate conversion circuit 210B equals two, and input sampling rate F
iNbe the situation of 10 megahertzes be example, the time of delay that delay element 210D provides is substantially equal to 0.1 microsecond, namely the input point numerical digit of circuit 210A, 210B is moved and is multiplied by input sampling rate F
iNinverse.In this instance, second order turns frequently device and single order and turns frequency device to input displacement difference be 1.Thus, the output signal of low order sample rate conversion circuit 210A and high-order sample rate conversion circuit 210B same time just can be retained as corresponding to same input signal.In addition, in order to guarantee that output OUT can not occur short-time pulse (glitch) because the state of switching signal tp changes further, controller 215 can be designed to arrange the state conversion time point of switching signal tp to be synchronized with input sampling rate F
iNor export sampling rate F
oUTthe state conversion time point of clock signal.
As shown in Figure 6A, in another embodiment, sample rate converter 210 comprises a high-order sample rate conversion circuit 212.When sample rate converter 210 operates on low order configuration, the local circuit 212A in high-order sample rate conversion circuit 212 is used to produce low order transformation result.In theory, element (such as multiplier, delay element, adder, the subtracter of high-order sample rate conversion circuit ...) quantity can higher than the number of elements required for composition one low order sample rate conversion circuit.Therefore, use multiplexer by suitably selecting circuit element, high-order sample rate conversion circuit also can provide low order transformation result, is namely equivalent to and embeds a low order sample rate conversion circuit in high-order sample rate conversion circuit.When sample rate converter 210 operates on high order configurations, the multiplexer in high-order sample rate conversion circuit 212 is then be controlled as exporting high-order transformation result.
The one that Fig. 6 B presents high-order sample rate conversion circuit 212 implements example in detail, and Fig. 6 C is then a kind of signal sequence example of this sample rate conversion circuit.When switching signal tp is 1, output OUT provides single order transformation result; When switching signal tp is 0, output OUT provides second order transformation result.In figure 6d, the circuit element that local circuit 212A comprises is solid line or has solid line housing, and the circuit element outside local circuit 212A is denoted as dotted line or has dashed-line outer box.In an embodiment, when sample rate converter 210 operate on low order configuration time, the circuit element outside local circuit 212A, that is produce low order transformation result time unwanted circuit element, can by local or Close All, to reduce power consumption.
In practical application, the suitable power consumption of multiplier realized with combinational logic element (combinational logic element).Fig. 6 E presents and a kind ofly when single order configures, closes a multiplier 212C to reduce the enforcement example of power consumption by multiplexer 212B.
It should be noted that in Fig. 6 B and be input as signal A, export as the delay element of signal B can be regarded as the delay element 210D that is equivalent in Fig. 5 B.Therefore, the sample rate conversion circuit that Fig. 6 B presents can reach the effect of aforementioned seamless switching equally.In addition, the state conversion time of switching signal tp point is arranged to is synchronized with input sampling rate F
iNor export sampling rate F
oUTthe state conversion time point of clock signal, can guarantee that the output OUT in Fig. 6 B can not occur short-time pulse because the state of switching signal tp changes further.
Fig. 7 presents the detailed enforcement example according to another sample rate conversion circuit of the present invention.Be provided to sample rate conversion circuit 700 in order to control the switching signal tp of each multiplexer be by controller (not illustrating) according at least one restrictive condition dynamic conditioning.When switching signal tp is 2, output OUT provides single order transformation result; When switching signal tp is 1, output OUT provides second order transformation result; When switching signal tp is 0, output OUT provides three rank transformation results.Similarly, when sample rate conversion circuit 700 operates on low order configuration, configure with low order and operate irrelevant element (such as with the multiplier that combinational logic element realizes) and selectively close, to save the whole power consumption of sample rate conversion circuit 700.In this instance, three rank turn frequently device and single order, and to turn that device input displacement difference be frequently 2, and second order turns frequency device and single order and turns frequency device to input displacement difference be 1.Thus, the output signal of low order sample rate conversion circuit and high-order sample rate conversion circuit same time just can be retained as corresponding to same input signal.Embodiment can be found out thus, the sample rate conversion circuit that can adopt according to embodiments of the invention not in mode quantity equal two and be limited.
Another specific embodiment according to the present invention is a kind of sample rate conversion method be applied in a communication system, and its flow chart is illustrated in Fig. 8.One sample rate conversion program can operate at least two or more difference configuration.First, step S82 is according at least one restrictive condition, determines a configuration switching law of this sample rate conversion program.Then, step S84 for switching this sample rate conversion program according to this configuration switching law between this at least two or more difference configuration.The various operation changes (kind of such as restrictive condition and the producing method of configuration switching law) previously described when introducing the communication system that Fig. 2 presents also can apply so far sample rate conversion method, and its details also repeats no more.
Should be noted that, category of the present invention is not limited to the transmission end in communication system, is also not limited to third generation partner program (3GPP) communication device.For example, the sample rate converter 210 that can change configuration and controller 215 also can be arranged at the receiving terminal of communication system, in order to the Circnit Layout according to restrictive condition dynamic conditioning frequency reducing conversions such as conveyer quality, transmission channel quality, receiver quality.In addition, concept of the present invention also can be applicable to other various electronic installation needing sample rate conversion, such as need interpolation to produce more pixels to expand the image processing system of picture dimension, or needing to impose many pixel datas fall sampling (decimation) program to reduce the image processing system of picture dimension.The sample rate conversion configuration that running exponent number is higher can provide the processing result image of better quality, and the sample rate conversion configuration operating exponent number lower can provide higher image processing speed and lower power consumption.
As mentioned above, the present invention proposes a kind of new sample rate conversion scheme.Be different from prior art the way of the sample rate converter adopting fixing exponent number, one or more restrictive conditions can be considered according to the communication system in embodiments of the invention and sample rate conversion method, the configuration of dynamic conditioning sample rate converter, and then the power consumption or other performance indicators that change sample rate converter.Do not needing to pursue in the communication environment of high-quality transformation result, sample rate converter can be set to operate on the lower configuration of power consumption, to save the electric power of communication system.
By the above detailed description of preferred embodiments, be wish clearly to describe feature of the present invention and spirit, and not with above-mentioned disclosed preferred embodiment, category of the present invention limited.On the contrary, its objective is wish to contain various change and tool equality be arranged in the present invention institute in the category of right applied for.
Claims (20)
1. a communication system, comprises:
One sample rate converter that can change configuration, in order to a digital signal with one first sampling rate to be converted to a converted signals with one second sampling rate, this sample rate converter can operate on one first configuration or be different from one second configuration of this first configuration; And
One controller, in order to according at least one restrictive condition, this sample rate converter of Dynamic controlling operates on the one in this first configuration and this second configuration.
2. communication system according to claim 1, wherein this at least one restrictive condition comprises one or more following parameters: an error vector magnitude, an adjacent channel leakage power ratio, a transmission end mix attached emission measure, a transmission end output power signal, a power state.
3. communication system according to claim 1, wherein this controller is using this at least one restrictive condition as input data, utilizes a look-up table or a logical operation circuit to determine a configuration switching law of this sample rate converter.
4. communication system according to claim 1, wherein this at least one restrictive condition comprises one first restrictive condition and one second restrictive condition, this controller according to this first restrictive condition for this sample rate converter determine one first exponent number, according to this second restrictive condition for this sample rate converter determines one second exponent number, and determine that one of this sample rate converter configures switching law according to the greater in this first exponent number and this second exponent number.
5. communication system according to claim 1, wherein this first configuration corresponds to one first running exponent number N, and this second configuration corresponds to one second running exponent number M, N with M is different, and is a positive integer separately; This controller operates exponent number according to this at least one conditional decision one, this exponent number between this first running exponent number N and this second running exponent number M, and operates on the one in this first configuration and the second configuration according to this this sample rate converter of running exponent number Dynamic controlling.
6. communication system according to claim 5, wherein this controller utilizes one triangle-quadrature modulates program or pulse width modulation program to determine a configuration switching law of this sample rate converter.
7. communication system according to claim 1, wherein this sample rate converter comprises a low order sample rate conversion circuit and a high-order sample rate conversion circuit; When this sample rate converter operates on this first configuration, low order sample rate conversion circuit is activated; When this sample rate converter operates on this second configuration, this high-order sample rate conversion circuit is activated.
8. communication system according to claim 7, wherein this sample rate converter comprises a delay element further, this delay element is arranged between an input of this sample rate converter and low order sample rate conversion circuit, this delay element provide one time of delay length relevant to this first sampling rate, be also relevant to one between low order sample rate conversion circuit and this high-order sample rate conversion circuit and sample computing and to count displacement difference.
9. communication system according to claim 8, wherein this controller switches this sample rate converter of signal controlling by one, one clock signal provides the one in this first sampling rate and this second sampling rate, and a state conversion time point of this switching signal is synchronized with a state conversion time point of this clock signal.
10. communication system according to claim 1, wherein this sample rate converter comprises a high-order sample rate conversion circuit; When this sample rate converter operates on this first configuration, the local circuit in this high-order sample rate conversion circuit is utilized to produce a low order transformation result; When this sample rate converter operates on this second configuration, this high-order sample rate conversion circuit is utilized to produce a high-order transformation result.
11. communication systems according to claim 10, wherein this high-order sample rate conversion circuit comprises a delay element, this delay element be arranged at this high-order sample rate conversion circuit between an input and this local circuit, this delay element provide one time of delay length relevant to this first sampling rate, be also relevant to this first configuration and this second configure between one sample computing and to count displacement difference.
12. communication systems according to claim 10, wherein when this sample rate converter operates on this first configuration, the multiplier in this high-order sample rate conversion circuit, outside this local circuit is closed.
13. 1 kinds are applied to the sample rate conversion method in a communication system, comprise:
A (), according at least one restrictive condition, determines a configuration switching law of a sample rate conversion program, wherein this sample rate conversion program can operate on one first configuration or be different from one second configuration of this first configuration; And
(b) according to this configuration switching law in this first configuration and this second configure between switch this sample rate conversion program.
14. sample rate conversion methods according to claim 13, wherein this at least one restrictive condition comprises one or more following parameters: an error vector magnitude, an adjacent channel leakage power ratio, a transmission end mix attached emission measure, a transmission end output power signal, a power state.
15. sample rate conversion methods according to claim 13, wherein step (a) comprises using this at least one restrictive condition as input data, utilizes a look-up table or a logical operation to determine this configuration switching law.
16. sample rate conversion methods according to claim 13, wherein this at least one restrictive condition comprises one first restrictive condition and one second restrictive condition, and step (a) comprises:
One first exponent number is determined for this sample rate conversion program according to this first restrictive condition;
One second exponent number is determined for this sample rate conversion program according to this second restrictive condition; And
This configuration switching law is determined according to the greater in this first exponent number and this second exponent number.
17. sample rate conversion methods according to claim 13, wherein this first configuration corresponds to one first running exponent number N, and this second configuration corresponds to one second running exponent number M, N with M is different, and is a positive integer separately; The running exponent number that this configuration switching law is corresponding second to operate between exponent number M between this first running exponent number N and this, and step (b) comprises:
Operate exponent number according to this at least one conditional decision one, this exponent number is between this first running exponent number N and this second running exponent number M; And
According to the one of this this sample rate conversion procedure operation of running exponent number Dynamic controlling in this first configuration and the second configuration.
18. sample rate conversion methods according to claim 17, wherein step (b) comprises and utilizes one triangle-quadrature modulates program or pulse width modulation program to determine this configuration switching law.
19. 1 kinds of sample rate converters that can change configuration, in order to a digital signal with one first sampling rate to be converted to a converted signals with one second sampling rate, comprise:
One sample rate conversion circuit, can operate at least two or more difference configuration; And
One controller, in order to according at least one restrictive condition, this sample rate conversion circuit of Dynamic controlling operates on the wherein a kind of of this at least two or more difference configuration.
20. sample rate converters according to claim 19, wherein this controller is using this at least one restrictive condition as input data, utilizes a look-up table or a logical operation circuit to determine a configuration switching law of this sample rate conversion circuit.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
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| US201361831150P | 2013-06-05 | 2013-06-05 | |
| US61/831,150 | 2013-06-05 |
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| CN104242958A true CN104242958A (en) | 2014-12-24 |
| CN104242958B CN104242958B (en) | 2017-08-25 |
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| CN201310481350.XA Active CN104242958B (en) | 2013-06-05 | 2013-10-15 | Communication system and its sample rate converter |
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| TW (1) | TWI517592B (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1270482A (en) * | 1999-03-26 | 2000-10-18 | 日本电气株式会社 | Radio communication apparatus and method for reducing power consumption by controlling A/D converters |
| US20070046508A1 (en) * | 2005-08-31 | 2007-03-01 | Naohiro Nishikawa | Sampling rate converter and a semiconductor integrated circuit |
| CN1934646A (en) * | 2004-04-14 | 2007-03-21 | 辉达公司 | Method and system for synchronizing audio processing modules |
| TW200818132A (en) * | 2006-06-30 | 2008-04-16 | Toshiba Kk | Apparatus for reproducing data on recording medium and method for reproducing data on the medium |
| CN101379701A (en) * | 2006-02-15 | 2009-03-04 | 高通股份有限公司 | Digital domain sampling rate converter |
-
2013
- 2013-08-26 TW TW102130468A patent/TWI517592B/en not_active IP Right Cessation
- 2013-10-15 CN CN201310481350.XA patent/CN104242958B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1270482A (en) * | 1999-03-26 | 2000-10-18 | 日本电气株式会社 | Radio communication apparatus and method for reducing power consumption by controlling A/D converters |
| CN1934646A (en) * | 2004-04-14 | 2007-03-21 | 辉达公司 | Method and system for synchronizing audio processing modules |
| US20070046508A1 (en) * | 2005-08-31 | 2007-03-01 | Naohiro Nishikawa | Sampling rate converter and a semiconductor integrated circuit |
| CN101379701A (en) * | 2006-02-15 | 2009-03-04 | 高通股份有限公司 | Digital domain sampling rate converter |
| TW200818132A (en) * | 2006-06-30 | 2008-04-16 | Toshiba Kk | Apparatus for reproducing data on recording medium and method for reproducing data on the medium |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201448483A (en) | 2014-12-16 |
| CN104242958B (en) | 2017-08-25 |
| TWI517592B (en) | 2016-01-11 |
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