CN104216181A

CN104216181A - Display panel and curved surface display

Info

Publication number: CN104216181A
Application number: CN201410482699.XA
Authority: CN
Inventors: 林刚毅; 徐雅玲; 吴育庆; 廖烝贤; 徐文浩; 廖培钧; 丁天伦; 苏振嘉
Original assignee: AU Optronics Corp
Current assignee: AU Optronics Corp
Priority date: 2014-07-22
Filing date: 2014-09-19
Publication date: 2014-12-17

Abstract

A display panel comprises a first substrate, a first gate line, a first data line, a second data line, a third data line, a fourth data line, a first sub-pixel, a second sub-pixel and a first shielding electrode, wherein the first substrate is provided with a first sub-pixel area and a second sub-pixel area, the first gate line extends along a first direction, the first data line, the second data line, the third data line and the fourth data line extend along a second direction and are sequentially arranged along the first direction, the first sub-pixel is electrically connected with at least one of the first data line and the second data line, the second sub-pixel is electrically connected with at least one of the third data line and the fourth data line, the first shielding electrode extends along the second direction, and the first shielding electrode is arranged on the common boundary of the first sub-pixel area and the second sub-pixel area.

Description

Display panel and flexible displays

Technical field

The present invention about a kind of display panel and flexible displays, espespecially a kind of display panel of low light leak and flexible displays.

Background technology

Flexible displays (curved display) is a kind of display with bending display surface.When watching flexible displays, that the chances are is equal for the distance of the eyes of audience and each position of flexible displays, no matter and be central area or the picture shown by left and right edges district, audience can watch close to the visual angle at right angle, therefore compared to flat-panel screens, flexible displays can not produce the problem such as luminance deviation and misalignment when watching with great visual angle.In addition, flexible displays has the visual effect of similar solid.Therefore, flexible displays has become and is subject to highly advising object to show product.But, due to flexible displays two-d display panel is bending with external force after formed, therefore meeting and produce relative position deviation and cause leakage problem between two plate bases, and affect the display quality of flexible displays.

Summary of the invention

One of object of the present invention is the flexible displays providing a kind of display panel of low light leak and a kind of low light leak.

For achieving the above object, the invention provides a kind of display panel, comprising: a first substrate, there is pixel region and multiple second time pixel region of multiple first times, wherein this first time pixel region and this second time pixel region be sequentially alternately arranged on a first direction, many first grid polar curves, to be arranged on this first substrate and to extend along this first direction, many the first data lines, many the second data lines, many articles of the 3rd data lines and many articles of the 4th data lines, with this first data line, this second data line, the order of the 3rd data line and the 4th data line to be sequentially arranged on this first substrate along this first direction and to extend along a second direction, wherein respectively this first data line and each this second data line bit in each this pixel region first time, respectively the 3rd data line and each the 4th data line bit are in each this second time pixel region, and respectively this second data line and respectively the 3rd data line be arranged at respectively this first data line and respectively between the 4th data line, multiple first color filter patterns, to be arranged on this first substrate and to lay respectively in this pixel region first time, multiple second color filter patterns, to be arranged on this first substrate and to lay respectively in this second time pixel region, multiple first time pixel, be arranged in this pixel region respectively first time, wherein respectively this first time pixel and the wherein at least one of this first data line and this second data line be electrically connected, and respectively this first time pixel comprise one first pixel electrode, be arranged in this first color filter patterns, multiple second time pixel, be arranged in this second time pixel region respectively, wherein respectively the wherein at least one of this second time pixel and the 3rd data line and the 4th data line is electrically connected, and respectively this second time pixel comprises one second pixel electrode, is arranged in this second color filter patterns, and multiple first shielding electrode, to be arranged on this first substrate and to extend along this second direction, wherein respectively this first shielding electrode is arranged at this pixel region and one of this second time pixel region common boundary first time, and respectively this first shielding electrode has a fixed voltage, one second substrate, is oppositely arranged with this first substrate, one common electrode, is arranged on this second substrate, and a display dielectric layer, be arranged between this first substrate and this second substrate.

Above-mentioned display panel, wherein this first pixel electrode overlapping at least partly on a vertical projection direction with this first data line and this second data line in this pixel region first time, and this second pixel electrode in this second time pixel region with the 3rd data line and the 4th data line at least part of overlapping on this vertical projection direction.

Above-mentioned display panel, wherein this first pixel electrode further extends to this first shielding electrode and protrudes from this second data line, and this second pixel electrode further extends to this first shielding electrode and protrudes from the 3rd data line.

Above-mentioned display panel, wherein this first shielding electrode has one first edge this first pixel electrode contiguous, and one second edge this second pixel electrode contiguous, this first edge of this first pixel electrode and this first shielding electrode trims in fact, and this second edge of this second pixel electrode and this first shielding electrode trims in fact.

Above-mentioned display panel, wherein this first pixel electrode is overlapping in this vertical projection direction upper part with this first shielding electrode, and this second pixel electrode is overlapping in this vertical projection direction upper part with this first shielding electrode.

Above-mentioned display panel, separately comprises multiple light-shielding pattern, is arranged on this second substrate, and wherein this light-shielding pattern is overlapping on a vertical projection direction with this first grid polar curve respectively.

Above-mentioned display panel, wherein respectively this first time pixel comprise one first on-off element, this first on-off element has a first grid, one first source electrode and one first drains, wherein this first grid and this first grid polar curve are electrically connected, the wherein one of this first source electrode and this first data line and this second data line is electrically connected, and this first drain electrode is electrically connected with this first pixel electrode; And respectively this second time pixel comprises a second switch element, this second switch element has a second grid, one second source electrode and one second drains, wherein this second grid and this first grid polar curve are electrically connected, the wherein one of this second source electrode and the 3rd data line and the 4th data line is electrically connected, and this second drain electrode is electrically connected with this second pixel electrode; Wherein respectively this first grid polar curve is arranged at this pixel region and the side of this second time pixel region first time.

Above-mentioned display panel, wherein this first substrate separately has pixel region and multiple 4th pixel region of multiple third times, this third time pixel region and the 4th pixel region be sequentially alternately arranged in the first direction, this third time pixel region in this second direction respectively with this first time pixel region adjacent, and the 4th pixel region is adjacent with this second time pixel region respectively in this second direction, this display panel separately comprises: many second gate lines, to be arranged on this first substrate and to extend along this first direction, wherein respectively this second gate line be arranged at this first time pixel region and this pixel region third time between and between this second time pixel region and the 4th pixel region, multiple second shielding electrode, to be arranged on this first substrate and to extend along this second direction, and wherein respectively this second shielding electrode is arranged at this pixel region and one of the 4th pixel region common boundary third time, and respectively this second shielding electrode has this fixed voltage, multiple 3rd color filter patterns, to be arranged on this first substrate and to lay respectively in this pixel region third time, multiple 4th color filter patterns, to be arranged on this first substrate and to lay respectively in the 4th pixel region, multiple third time pixel, be arranged in this pixel region respectively third time, wherein respectively this third time pixel comprise: one the 3rd on-off element, there is one the 3rd grid, one the 3rd source electrode and one the 3rd drain electrode, wherein the 3rd grid and this second gate line are electrically connected, and the wherein another one of the 3rd source electrode and this first data line and this second data line is electrically connected, and one the 3rd pixel electrode, to be arranged in the 3rd color filter patterns and to drain be electrically connected with the 3rd, wherein this first data line and this second data line and this first pixel electrode and the 3rd pixel electrode overlapping at least partly, and multiple 4th pixel, be arranged in the 4th pixel region respectively, wherein respectively the 4th pixel comprises: one the 4th on-off element, there is one the 4th grid, one the 4th source electrode and one the 4th drain electrode, wherein the 4th grid and this second gate line are electrically connected, and the wherein another one of the 4th source electrode and the 3rd data line and the 4th data line is electrically connected, and one the 4th pixel electrode, to be arranged in the 4th color filter patterns and to drain be electrically connected with the 4th, wherein the 3rd data line and the 4th data line and this second pixel electrode and the 4th pixel electrode overlapping at least partly.

Above-mentioned display panel, wherein this first source electrode of this first on-off element and this first data line are electrically connected, this second source electrode and the 4th data line of this second switch element are electrically connected, 3rd source electrode and this second data line of the 3rd on-off element are electrically connected, and the 4th source electrode of the 4th on-off element and the 3rd data line are electrically connected.

Above-mentioned display panel, wherein this first source electrode of this first on-off element and this first data line are electrically connected, this second source electrode and the 3rd data line of this second switch element are electrically connected, 3rd source electrode and this second data line of the 3rd on-off element are electrically connected, and the 4th source electrode of the 4th on-off element and the 4th data line are electrically connected.

Above-mentioned display panel, wherein respectively this first time pixel region comprise one first primary area and one first secondary area; Respectively this second time pixel region comprises one second primary area and one second secondary area; Respectively pixel comprises: two the first on-off elements this first time, respectively this first on-off element has a first grid, one first source electrode and one first drains, wherein this first grid and this first grid polar curve are electrically connected, and this first source electrode is electrically connected with this first data line and this second data line respectively; And two the first pixel electrodes, being arranged in this first color filter patterns and laying respectively in this first primary area and this first secondary area, wherein this first pixel electrode first drains with this and is electrically connected respectively; And respectively this second time pixel comprises: two second switch elements, respectively this second switch element has a second grid, one second source electrode and one second drains, wherein this second grid and this first grid polar curve are electrically connected, and this second source electrode is electrically connected with the 3rd data line and the 4th data line respectively; And two the second pixel electrodes, to be arranged in this second color filter patterns and to lay respectively in this second primary area and this second secondary area, wherein this second pixel electrode second drains with this and is electrically connected respectively, and wherein respectively this first grid polar curve is extended between this first primary area and this first secondary area and between this second primary area and this second secondary area along this first direction.

Above-mentioned display panel, wherein this first substrate separately has pixel region and multiple 4th pixel region of multiple third times, this third time pixel region and the 4th pixel region be sequentially alternately arranged in the first direction, this third time pixel region in this second direction respectively with this first time pixel region adjacent, and the 4th pixel region is adjacent with this second time pixel region respectively in this second direction, respectively pixel region comprises one the 3rd primary area and one the 3rd secondary area this third time, respectively the 4th pixel region comprises one the 4th primary area and one the 4th secondary area, this display panel separately comprises: many second gate lines, to be arranged on this first substrate and to extend along this first direction, wherein respectively this second gate line is arranged between the 3rd primary area and the 3rd secondary area and between the 4th primary area and the 4th secondary area, multiple second shielding electrode, to be arranged on this first substrate and to extend along this second direction, and wherein respectively this second shielding electrode is arranged at this pixel region and one of the 4th pixel region common boundary third time, and respectively this second shielding electrode has this fixed voltage, multiple 3rd color filter patterns, to be arranged on this first substrate and to lay respectively in this pixel region third time, multiple 4th color filter patterns, to be arranged on this first substrate and to lay respectively in the 4th pixel region, multiple third time pixel, be arranged in this pixel region respectively third time, wherein respectively this third time pixel comprise: two the 3rd on-off elements, respectively the 3rd on-off element has one the 3rd grid, one the 3rd source electrode and one the 3rd drain electrode, wherein the 3rd grid and this second gate line are electrically connected, and the 3rd source electrode is electrically connected with this first data line and this second data line respectively, and two the 3rd pixel electrodes, to be arranged in the 3rd color filter patterns and to lay respectively in the 3rd primary area and the 3rd secondary area, wherein the 3rd pixel electrode drains with the 3rd respectively and is electrically connected, and this first data line and this second data line and this first pixel electrode and the 3rd pixel electrode overlapping at least partly, and multiple 4th pixel, be arranged in the 4th pixel region respectively, wherein respectively the 4th pixel comprises: two the 4th on-off elements, respectively the 4th on-off element has one the 4th grid, one the 4th source electrode and one the 4th drain electrode, wherein the 4th grid and this second gate line are electrically connected, and the 4th source electrode is electrically connected with the 3rd data line and the 4th data line respectively, and two the 4th pixel electrodes, to be arranged in the 4th color filter patterns and to lay respectively in the 4th primary area and the 4th secondary area, wherein the 4th pixel electrode drains with the 4th respectively and is electrically connected, wherein the 3rd data line and the 4th data line and this second pixel electrode and the 4th pixel electrode overlapping at least partly.

Above-mentioned display panel, wherein respectively this first time pixel region comprise one first primary area and one first secondary area; Respectively this second time pixel region comprises one second primary area and one second secondary area; Respectively pixel comprises: two the first on-off elements this first time, respectively this first on-off element has a first grid, one first source electrode and one first drains, wherein this first grid and this first grid polar curve are electrically connected, and the wherein one of this first source electrode and this first data line and this second data line is electrically connected; And two the first pixel electrodes, being arranged in this first color filter patterns and laying respectively in this first primary area and this first secondary area, wherein this first pixel electrode first drains with this and is electrically connected respectively; And respectively this second time pixel comprises: two second switch elements, respectively this second switch element has a second grid, one second source electrode and one second drains, wherein this second grid and this first grid polar curve are electrically connected, and the wherein one of this second source electrode and the 3rd data line and the 4th data line is electrically connected; And two the second pixel electrodes, to be arranged in this second color filter patterns and to lay respectively in this second primary area and this second secondary area, wherein this second pixel electrode second drains with this and is electrically connected respectively, and wherein respectively this first grid polar curve is extended between this first primary area and this first secondary area and between this second primary area and this second secondary area along this first direction.

Above-mentioned display panel, wherein this first substrate separately has pixel region and multiple 4th pixel region of multiple third times, this third time pixel region and the 4th pixel region be sequentially alternately arranged in the first direction, this third time pixel region in this second direction respectively with this first time pixel region adjacent, and the 4th pixel region is adjacent with this second time pixel region respectively in this second direction, respectively pixel region comprises one the 3rd primary area and one the 3rd secondary area this third time, respectively the 4th pixel region comprises one the 4th primary area and one the 4th secondary area, this display panel separately comprises: many second gate lines, to be arranged on this first substrate and to extend along this first direction, wherein respectively this second gate line is arranged between the 3rd primary area and the 3rd secondary area and between the 4th primary area and the 4th secondary area, multiple second shielding electrode, to be arranged on this first substrate and to extend along this second direction, and wherein respectively this second shielding electrode is arranged at this pixel region and one of the 4th pixel region common boundary third time, and respectively this second shielding electrode has this fixed voltage, multiple 3rd color filter patterns, to be arranged on this first substrate and to lay respectively in this pixel region third time, multiple 4th color filter patterns, to be arranged on this first substrate and to lay respectively in the 4th pixel region, multiple third time pixel, be arranged in this pixel region respectively third time, wherein respectively this third time pixel comprise: two the 3rd on-off elements, respectively the 3rd on-off element has one the 3rd grid, one the 3rd source electrode and one the 3rd drain electrode, wherein the 3rd grid and this second gate line are electrically connected, and the wherein another one of the 3rd source electrode and this first data line and this second data line is electrically connected, and two the 3rd pixel electrodes, to be arranged in the 3rd color filter patterns and to lay respectively in the 3rd primary area and the 3rd secondary area, wherein the 3rd pixel electrode drains with the 3rd respectively and is electrically connected, and this first data line and this second data line and this first pixel electrode and the 3rd pixel electrode overlapping at least partly, and multiple 4th pixel, be arranged in the 4th pixel region respectively, wherein respectively the 4th pixel comprises: two the 4th on-off elements, respectively the 4th on-off element has one the 4th grid, one the 4th source electrode and one the 4th drain electrode, wherein the 4th grid and this second gate line are electrically connected, and the wherein another one of the 4th source electrode and the 3rd data line and the 4th data line is electrically connected, and two the 4th pixel electrodes, to be arranged in the 4th color filter patterns and to lay respectively in the 4th primary area and the 4th secondary area, wherein the 4th pixel electrode drains with the 4th respectively and is electrically connected, wherein the 3rd data line and the 4th data line and this second pixel electrode and the 4th pixel electrode overlapping at least partly.

Above-mentioned display panel, separately comprises: many first signal wires, extend along this first direction, and wherein respectively this first signal wire is arranged between this first primary area and this first secondary area and between this second primary area and this second secondary area; And many secondary signal lines, extend along this first direction, wherein respectively this secondary signal line is arranged between the 3rd primary area and the 3rd secondary area and between the 4th primary area and the 4th secondary area; Wherein respectively this first time pixel separately comprise one the 5th on-off element, there is one the 5th grid, one the 5th source electrode and one the 5th drain electrode, wherein the 5th grid and this first signal wire are electrically connected, and the 5th source electrode is floating, and the 5th drain electrode is electrically connected with the wherein one of this first drain electrode; Respectively this second time pixel separately comprises one the 6th on-off element, there is one the 6th grid, one the 6th source electrode and one the 6th drain electrode, wherein the 6th grid and this first signal wire are electrically connected, and the 6th source electrode is floating, and the 6th drain electrode is electrically connected with the wherein one of this second drain electrode; Respectively pixel separately comprises one the 7th on-off element this third time, there is one the 7th grid, one the 7th source electrode and one the 7th drain electrode, wherein the 7th grid and this secondary signal line are electrically connected, and the 7th source electrode is floating, and the 7th drain electrode is electrically connected with the wherein one of the 3rd drain electrode; And respectively the 4th pixel separately comprises one the 8th on-off element, there is one the 8th grid, one the 8th source electrode and one the 8th drain electrode, wherein the 8th grid and this secondary signal line are electrically connected, and the 8th source electrode is floating, and the 8th drain electrode is electrically connected with the wherein one of the 4th drain electrode.

Above-mentioned display panel, separately comprise many articles of the 3rd shielding electrodes, to be arranged on this first substrate and to extend along this second direction, wherein the 3rd shielding electrode and this first cover electrode in the first direction for being alternately arranged, and respectively the 3rd shielding electrode is arranged between this pixel this second time pixel adjacent with another first time.

Above-mentioned display panel, separately comprises at least one common line, is arranged on this first substrate along this first direction, and wherein this at least one common line is connected with the 3rd shielding electrode with this first shielding electrode, and this fixed voltage is a common electric voltage.

Above-mentioned display panel, wherein this first color filter patterns and this second color filter patterns in this first time pixel region and this common boundary of this second time pixel region overlie one another, and this first color filter patterns is overlapping in a vertical projection direction upper part with this first shielding electrode with this second color filter patterns.

For achieving the above object, the present invention also provides a kind of flexible displays, comprising: this above-mentioned display panel; And a framework, wherein this display panel is combined with this framework, and this display panel is formed and has the bending display surface of one of curvature whereby.

Accompanying drawing explanation

Fig. 1 depicts the schematic diagram of the display panel of first embodiment of the present invention;

The cut-open view of display panel of Fig. 2 for illustrating along the hatching line A-A ' of Fig. 1;

The cut-open view of display panel of Fig. 3 for illustrating along the hatching line B-B ' of Fig. 1;

The cut-open view of display panel of Fig. 4 for illustrating along the hatching line C-C ' of Fig. 1;

Fig. 5 depicts the penetrance simulation schematic diagram of display panel when on state of shows of the present embodiment;

Fig. 6 depicts the penetrance simulation schematic diagram of display panel when dark-state shows of the present embodiment;

Fig. 7 A depicts the schematic diagram of display panel under non-bending status of the comparative examples of the present invention;

Fig. 7 B depicts the display panel schematic diagram in a curved condition of the comparative examples of the present invention;

Fig. 8 depicts the schematic diagram of the display panel of the first alternate embodiment of first embodiment of the present invention;

Fig. 9 depicts the schematic diagram of the display panel of the second alternate embodiment of first embodiment of the present invention;

Figure 10 depicts the schematic diagram of the display panel of the 3rd alternate embodiment of first embodiment of the present invention;

Figure 11 depicts the schematic diagram of the display panel of second embodiment of the present invention;

Figure 12 depicts the equivalent circuit diagram of the display panel of the 3rd embodiment of the present invention;

Figure 13 depicts the schematic diagram of the display panel of the 3rd embodiment of the present invention;

Figure 14 depicts the equivalent circuit diagram of the display panel of the 3rd embodiment of the present invention;

Figure 15 depicts the configuration schematic diagram of the color filter patterns of the display panel of one of the present invention embodiment;

Figure 16 depicts the schematic diagram of the flexible displays of one of the present invention embodiment.

Wherein, Reference numeral:

1 display panel 10 first substrate

40 second substrate 42 common electrodes

30 display dielectric layer L light leaks

11 first time pixel region 12 second time pixel regions

GL1 first grid polar curve DL1 first data line

DL2 second data line DL3 the 3rd data line

DL4 the 4th data line CF1 first color filter patterns

CF2 second color filter patterns 21 first time pixel

22 second time pixel 31 first shielding electrodes

Dy second direction SW1 first on-off element

PE1 first pixel electrode G1 first grid

S1 first source electrode D1 first drains

SW2 second switch element PE2 second pixel electrode

G2 second grid S2 second source electrode

D2 second drain 13 third time pixel region

14 the 4th pixel region GL2 second gate lines

CF3 the 3rd color filter patterns CF4 the 4th color filter patterns

16 insulation course SW3 the 3rd on-off elements

PE3 the 3rd pixel electrode G3 the 3rd grid

S3 the 3rd source electrode D3 the 3rd drains

SW4 the 4th on-off element PE4 the 4th pixel electrode

G4 the 4th grid S4 the 4th source electrode

D4 the 4th drain electrode ME main electrode

BE branch electrodes S slit

CB common boundary X teat

32 second shielding electrode 31A first edges

31B second edge 33 the 3rd shielding electrode

34 the 4th shielding electrode CL common line

41 light-shielding pattern 100 display panels

1 ' display panel 1 " display panel

1 " ' display panel 51 first patterned conductive layer

52 second patterned conductive layer 11M first primary areas

11S first secondary area 12M second primary area

12S second secondary area 13M the 3rd primary area

13S the 3rd secondary area 14M the 4th primary area

14S the 4th secondary area 2 display panel

The secondary liquid crystal capacitance of Clc_main host liquid crystal electric capacity Clc_sub

3 display panel SL1 first signal wires

SW5 the 5th on-off element SW6 the 6th on-off element

SL2 secondary signal line SW7 the 7th on-off element

SW8 the 8th on-off element G5 the 5th grid

S5 the 5th source electrode D5 the 5th drains

G6 the 6th grid S6 the 6th source electrode

D6 the 6th drain electrode G7 the 7th grid

S7 the 7th source electrode D7 the 7th drains

G8 the 8th grid S8 the 8th source electrode

D8 the 8th drain electrode Ccs storage capacitors

50 flexible displays 60 display panels

62 bending display surface 70 frameworks

A distance b distance

Z vertical projection direction Dx first direction

80 audience 4 display panels

The red G of R is green

The blue P display pixel cells of B

Embodiment

For making those skilled in the art further can understand the present invention, hereafter spy enumerates the preferred embodiment of the present invention, and coordinates appended accompanying drawing, describes constitution content of the present invention and institute effect for reaching in detail.

Please refer to Fig. 1 to Fig. 4.Fig. 1 depicts the schematic diagram of the display panel of first embodiment of the present invention, the cut-open view of display panel of Fig. 2 for illustrating along the hatching line A-A ' of Fig. 1, the cut-open view of display panel of Fig. 3 for illustrating along the hatching line B-B ' of Fig. 1, the cut-open view of display panel of Fig. 4 for illustrating along the hatching line C-C ' of Fig. 1, wherein in order to highlight the characteristic of the display panel of the present embodiment, in Fig. 1, do not show the elements such as color filter patterns, second substrate, common electrode and display dielectric layer.As shown in Figures 1 to 4, the display panel 1 of the present embodiment comprise a first substrate 10, many articles of first grid polar curve GL1, many articles of the first data line DL1, many articles of the second data line DL2, many articles of the 3rd data line DL3, many articles of the 4th data line DL4, multiple first color filter patterns CF1, multiple second color filter patterns CF2, multiple first time pixel 21, multiple second time pixel 22, multiple first shielding electrode 31, second substrate 40, common electrode 42 and display dielectric layer 30.First substrate 10 have multiple first times pixel region 11 with multiple second time pixel region 12, wherein pixel region 11 is sequentially alternately arranged on a first direction Dx with second time pixel region 12 first time.In the present embodiment, first direction Dx is the X direction of Fig. 1, but not as limit.Second substrate 40 and first substrate 10 are oppositely arranged.First substrate 10 and second substrate 40 can comprise a transparency carrier such as glass substrate or plastic substrate respectively, but not as limit.In addition, if as the application of flexible displays, first substrate 10 and second substrate 40 better selection flexible substrate or plastic form substrate.Common electrode 42 be arranged at second substrate 40 is such as positioned at second substrate 40 in the face of first substrate 10 on the surface, and common electrode 42 has a common electric voltage.Common electrode 42 can comprise a transparency electrode, and its material can comprise tin indium oxide (ITO), indium zinc oxide (IZO) or other applicable conductive material.The display panel 1 of the present embodiment selects a display panels to be example, and therefore display dielectric layer 30 is a liquid crystal layer, and it is arranged between first substrate 10 and second substrate 40.First grid polar curve GL1 to be arranged on first substrate 10 and to extend along first direction Dx.In the present embodiment, first grid polar curve GL1 be positioned at first time pixel region 11 with the side of second time pixel region 12, such as Fig. 1 first time pixel region 11 with the upside of pixel region 12 for the second time, but not as limit.For example, first grid polar curve GL1 also can be positioned at the downside of pixel region 11 and second time pixel region 12 for the first time.Data line to be sequentially arranged on first substrate 10 along first direction Dx with the order of the first data line DL1, the second data line DL2, the 3rd data line DL3 and the 4th data line DL4 and to extend along a second direction Dy, such as, by a left side, the right side is sequentially arranged along first direction Dx for the first data line DL1, the second data line DL2, the 3rd data line DL3 and the 4th data line DL4.In the present embodiment, second direction Dy is the y direction of Fig. 1, but not as limit.First data line DL1 and the second data line DL2 is positioned at first time pixel region 11,3rd data line DL3 and the 4th data line DL4 is positioned at second time pixel region 12, and the second data line DL2 and the 3rd data line DL3 is arranged between the first data line DL1 and the 4th data line DL4.

First color filter patterns CF1 to be arranged on first substrate 10 and to be positioned at first time pixel region 11, and the second color filter patterns CF2 is arranged on first substrate 10 and be positioned at second time pixel region 12.First time, pixel 21 was arranged in first time pixel region 11, and wherein the wherein at least one of pixel 21 and the first data line DL1 and the second data line DL2 is electrically connected for the first time.Pixel 21 comprises one first on-off element SW1 and one first pixel electrode PE1 for the first time.First on-off element SW1 has a first grid G1, one first source S 1 and one first drain D 1, wherein first grid G1 and first grid polar curve GL1 is electrically connected, the wherein one of the first source S 1 and the first data line DL1 and the second data line DL2 is electrically connected, and the first drain D 1 and the first pixel electrode PE1 are electrically connected.First pixel electrode PE1 is arranged on the first color filter patterns CF1.Second time pixel 22 is arranged in second time pixel region 12, and wherein the wherein at least one of second time pixel 22 and the 3rd data line DL3 and the 4th data line DL4 is electrically connected.Second time pixel 22 comprises a second switch element SW2 and one second pixel electrode PE2.Second switch element SW2 has a second grid G2, one second source S 2 and one second drain D 2, wherein second grid G2 and first grid polar curve GL1 is electrically connected, the wherein one of the second source S 2 and the 3rd data line DL3 and the 4th data line DL4 is electrically connected, and the second drain D 2 and the second pixel electrode PE2 are electrically connected.Second pixel electrode PE2 is arranged on the second color filter patterns CF2.

In the present embodiment, first substrate 10 can separately have multiple third times pixel region 13 with multiple 4th pixel region 14, wherein pixel region 13 and the 4th pixel region 14 are sequentially alternately arranged on first direction Dx for the third time, pixel region 13 is adjacent with first time pixel region 11 respectively on second direction Dy for the third time, and the 4th pixel region 14 is adjacent with second time pixel region 12 respectively on second direction Dy.That is, first time 11, one, a pixel region second time third time pixel region 13,12, one, pixel region and the 4th pixel region 14 are arranged in a 2*2 array.Further illustrate, pixel region 11 replaces repeated arrangement along first direction Dx with second time pixel region 12 on odd column for the first time, and pixel region 13 and the 4th pixel region 14 replace repeated arrangement along first direction Dx on even column for the third time.In addition, the display panel 1 of the present embodiment separately comprise many articles of second gate line GL2, multiple 3rd color filter patterns CF3, multiple 4th color filter patterns CF4, multiple third time pixel 23, multiple 4th pixel 24 and multiple second shielding electrode 32.Second gate line GL2 to be arranged on first substrate 10 and to extend along first direction Dx, wherein second gate line GL2 be arranged at first time pixel region 11 and third time pixel region 13 between and between second time pixel region 12 and the 4th pixel region 14.In addition, first grid polar curve GL1 and second gate line GL2 can be made up of a patterned conductive layer such as the first metal layer, and the first data line DL1, the second data line DL2, the 3rd data line DL3 and the 4th data line DL4 can be made up of another patterned conductive layer such as the second metal level, but not as limit.At least one insulation course 16 can be set between the first metal layer and the second metal level.3rd color filter patterns CF3 to be arranged on first substrate 10 and to be positioned at third time pixel region 13, and the 4th color filter patterns CF4 is arranged on first substrate 10 and be positioned at the 4th pixel region 14.Pixel 23 is arranged in third time pixel region 13 for the third time, and pixel 23 comprises one the 3rd on-off element SW3 and the 3rd pixel electrode PE3 for the third time.3rd on-off element SW3 has one the 3rd grid G 3, the 3rd source S 3 and one the 3rd drain D 3, wherein the 3rd grid G 3 is electrically connected with second gate line GL2, the wherein another one of the 3rd source S 3 and the first data line DL1 and the second data line DL2 is electrically connected, and the 3rd drain D 3 and the 3rd pixel electrode PE3 are electrically connected.3rd pixel electrode PE3 is arranged on the 3rd color filter patterns CF3.4th time pixel 24 is arranged in the 4th pixel region 14, and the 4th pixel 24 comprises one the 4th on-off element SW4 and the 4th pixel electrode PE4.4th on-off element SW4 has one the 4th grid G 4, the 4th source S 4 and one the 4th drain D 4, wherein the 4th grid G 4 is electrically connected with second gate line GL2, the wherein another one of the 4th source S 4 and the 3rd data line DL3 and the 4th data line DL4 is electrically connected, and the 4th drain D 4 and the 4th pixel electrode PE4 are electrically connected.4th pixel electrode PE4 is arranged on the 4th color filter patterns CF4.

In the present embodiment, first source S 1 of the first on-off element SW1 and the first data line DL1 are electrically connected, second source S 2 and the 4th data line DL4 of second switch element SW2 are electrically connected, 3rd source S 3 of the 3rd on-off element SW3 and the second data line DL2 are electrically connected, and the 4th source S 4 of the 4th on-off element SW4 and the 3rd data line DL3 are electrically connected, the display panel 1 of the present embodiment can drive, to reduce film flicker (flicker) phenomenon by Zhi Shoudian reversion (dot inversion) whereby.

In the present embodiment, each pixel electrode (comprising the first pixel electrode PE1, the second pixel electrode PE2, the 3rd pixel electrode PE3 and the 4th pixel electrode PE4) comprises a main electrode ME and many articles of branch electrodes BE, there is between wherein adjacent branch electrodes BE a slit S, branch electrodes BE and main electrode ME is electrically connected, and branch electrodes BE extends towards different directions and forms multiple orientation district.For example, the main electrode ME of the present embodiment is in fact cruciform electrode, and one end of branch electrodes BE is connected with main electrode ME and defines the orientation district that four have different alignment direction.The material of the first pixel electrode PE1, the second pixel electrode PE2, the 3rd pixel electrode PE3 and the 4th pixel electrode PE4 can be transparent conductive material such as tin indium oxide (ITO), indium zinc oxide (IZO) or other applicable conductive material.

Due to first time pixel region 11 easily produce light leak with the common boundary CB of second time pixel region 12, particularly at the first color filter patterns CF1 and the second color filter patterns CF2 when first time, pixel region 11 to produce teat X with the common boundary CB of second time pixel region 12 because of overlieing one another, teat X can cause the liquid crystal alignment of display dielectric layer 30 abnormal, therefore has obvious light leak.In order to solve leakage problem, first shielding electrode 31 to be arranged on first substrate 10 and to extend along second direction Dy, wherein the first shielding electrode 31 is arranged at the common boundary CB of pixel region 11 and second time pixel region 12 for the first time, and the first color filter patterns CF1 is overlapping in vertical projection direction Z upper part with the first shielding electrode 31 with the second color filter patterns CF2, the light leak around teat X can be covered whereby.In addition, the first shielding electrode 31 has a fixed voltage, and for example, this fixed voltage can be common electric voltage, that is this fixed voltage can be identical common electric voltage with common electrode 42, but not as limit.Because the first shielding electrode 31 has fixed voltage, the impact that the horizontal component of electric field between maskable second data line DL2 and the 3rd data line DL3 produces LCD alignment, whereby under dark-state display, can make liquid crystal molecule keep standing and lowering light leak; As under on state of display, the first shielding electrode 31 because having fixed voltage such as common electric voltage, therefore can be used as the use of common line or common electrode.

In the present embodiment, first pixel electrode PE1 is overlapping at least partly on the Z of vertical projection direction with the first data line DL1 and the second data line DL2 in first time pixel region 11, and the second pixel electrode PE2 is overlapping at least partly on the Z of vertical projection direction with the 3rd data line DL3 and the 4th data line DL4 in second time pixel region 12, first pixel electrode PE1 can shield the electric field between the first data line DL1/ second data line DL2 and common electrode 42 whereby, and second pixel electrode PE2 can shield electric field between the 3rd data line DL3/ the 4th data line DL4 and common electrode 42.In addition, the first pixel electrode PE1 can further extend to the first shielding electrode 31 and protrude from the second data line DL2, and the second pixel electrode PE2 can further extend to the first shielding electrode 31 and protrude from the 3rd data line DL3.For example, in the present embodiment, first shielding electrode 31 has the contiguous first pixel electrode PE1 of one first edge 31A, and the contiguous second pixel electrode PE2 of one second edge 31B, wherein the first edge 31A of the first pixel electrode PE1 and the first shielding electrode 31 trims in fact, and the second edge 31B of the second pixel electrode PE2 and the first shielding electrode 31 trims in fact.Protrude from the second data line DL2 due to the first pixel electrode PE1 and at least trim in fact with the first edge 31A of the first shielding electrode 31, and the second pixel electrode PE2 protrudes from the 3rd data line DL3 and at least trims in fact with the second edge 31B of the first shielding electrode 31, therefore the region between the edge of the second data line DL2 and the first edge 31A of the first shielding electrode 31 and the region between the edge of the second data line DL2 and the second edge 31B of the first shielding electrode 31 are effective display area, that is, first pixel electrode PE1 can liquid crystal molecule in the region of driven between the edge of the second data line DL2 and the first edge 31A of the first shielding electrode 31 and provide display frame, and the second pixel electrode PE2 can liquid crystal molecule in the region of driven between the edge of the 3rd data line DL3 and the second edge 31B of the first shielding electrode 31 and provide display frame, therefore the area of effective display area can be improved.In addition, the second shielding electrode 32 to be arranged on first substrate 10 and to extend along second direction Dy, and wherein the second shielding electrode 32 is arranged at third time the pixel region 13 and common boundary CB of the 4th pixel region 14, in order to cover the light leak in this region.The effect of the second shielding electrode 32 is identical with the first shielding electrode 31 with feature, does not repeat them here.What deserves to be explained is in the present embodiment, although the edge of pixel electrode and shielding electrode is for trim in fact, consider the bit errors between pixel electrode and shielding electrode, both relative positions may produce deviation.For example, in the scope of bit errors such as in the error range of ± 2 microns, the edge of pixel electrode and shielding electrode all can be considered and trims in fact.

As shown in Figure 1, the display panel 1 of the present embodiment separately can comprise many articles of the 3rd shielding electrodes 33, to be arranged on first substrate 10 with many articles of the 4th shielding electrodes 34 and to extend along second direction Dy, wherein the 3rd shielding electrode 33 and first covers electrode 31 for being alternately arranged on first direction Dx, and each 3rd shielding electrode 33 is arranged between a second time pixel 22 that pixel 21 is adjacent with another for the first time; 4th shielding electrode 34 and second covers electrode 32 for being alternately arranged on first direction Dx, and each 4th shielding electrode 34 is arranged between the 4th pixel 24 that pixel 23 is adjacent with another for the third time.That is, the side of pixel region 11 and the common boundary CB of a second time pixel region 12 are provided with the first shielding electrode 31 for the first time, and the side of pixel region 13 and the common boundary CB of the 4th pixel region 14 are provided with the second shielding electrode 32 for the third time; The opposite side of pixel region 11 and the common boundary CB of another second time pixel region 12 are provided with the 3rd shielding electrode 33 for the first time; And the opposite side of pixel region 13 and the common boundary CB of another the 4th pixel region 14 are provided with the 4th shielding electrode 34 for the third time.The effect of the 3rd shielding electrode 33 and the 4th shielding electrode 34 and feature and the first shielding electrode 31 and the second shielding electrode 32 identical, do not repeat them here.In addition, the display panel 1 of the present embodiment can separately comprise many common line CL, be arranged on first substrate 10 along first direction Dx, wherein one article of common line CL is connected with the 3rd shielding electrode 33 with the first shielding electrode 31, and another article of common line CL is connected with the 4th shielding electrode 34 with the second shielding electrode 32.In addition, the fixed voltage of the first shielding electrode 31, second shielding electrode 32, the 3rd shielding electrode 33 and the 4th shielding electrode 34 can be the common electric voltage that common line CL provides, but not as limit.

The display panel 1 of the present embodiment separately can comprise multiple light-shielding pattern 41, be arranged on second substrate 40, one of them light-shielding pattern 41 is overlapping on the Z of vertical projection direction with first grid polar curve GL1, in order to cover the surrounding light leak of first grid polar curve GL1, and another light-shielding pattern 41 is overlapping on the Z of vertical projection direction with second gate line GL2, in order to cover the surrounding light leak of second gate line GL2.If during the application of the display panel of the present embodiment 1 as flexible displays, due to its bend mode with second direction Dy for axle center, even if therefore first substrate 10 can produce relative displacement because degree of crook is different from second substrate 40, light-shielding pattern 41 on second substrate 40 also only can produce skew along first direction Dx, therefore can not have influence on the surrounding of first grid polar curve GL1 and the screening effect of the surrounding of second gate line GL2.

Please refer to Fig. 5, Fig. 6, Fig. 7 A and Fig. 7 B.Fig. 5 depicts the penetrance simulation schematic diagram of display panel when on state of shows of the present embodiment, Fig. 6 depicts the penetrance simulation schematic diagram of display panel when dark-state shows of the present embodiment, Fig. 7 A depicts the schematic diagram of display panel under non-bending status of the comparative examples of the present invention, and Fig. 7 B depicts the display panel schematic diagram in a curved condition of the comparative examples of the present invention.As shown in Figure 5, the display panel 1 of the present embodiment is verified under on state of display, region between the edge of the second data line DL2 and the first edge 31A of the first shielding electrode 31 effectively can provide display frame, and the region between the edge of the 3rd data line DL3 and the second edge 31B of the first shielding electrode 31 effectively can provide display frame, can improve the area of display panel 1 effective display area.As shown in Figure 6, the display panel 1 of the present embodiment is verified under dark-state display, and light leak effectively can be avoided with the common boundary CB of second time pixel region 12 really when arranging first shielding electrode 31 in pixel region 11 for the first time.From the above, in the present embodiment, corresponding to the region between two pixel regions adjacent on first direction Dx, shielding electrode (comprising the first shielding electrode 31, second shielding electrode 32, the 3rd shielding electrode 33 and the 4th shielding electrode 34) only need be set on first substrate 10, and light-shielding pattern (such as black matrix") need be set on second substrate 40, effectively can cover light leak.In addition, as shown in Figure 7 A, in the display panel 100 of comparative examples, a light-shielding pattern 41 (such as black matrix") is provided with between second substrate 40 and common electrode 42, correspond to pixel region 11 and the common boundary CB of second time pixel region 12 for the first time, first substrate 10 is not then provided with shielding electrode.That is, the display panel 100 of comparative examples utilizes the light-shielding pattern 41 be arranged on second substrate 40 to cover the light leak of the common boundary CB of pixel region 11 and second time pixel region 12 for the first time.When the display panel 100 of comparative examples be used as flat-panel screens application and under non-case of bending time, because light-shielding pattern 41 can affect the flatness of common electrode 42, therefore light leak L can be produced because orientation is not good at the liquid crystal molecule of the fringe region corresponding to light-shielding pattern 41.As shown in Figure 7 B, when the display panel 100 of comparative examples be used as flexible displays application and in a curved condition time, because first substrate 10 can produce relative displacement because degree of crook is different from second substrate 40, light-shielding pattern 41 in this situation on second substrate 40 can offset and no longer correspond to the common boundary CB of pixel region 11 and second time pixel region 12 for the first time, such as deflection first time pixel region 11, therefore time dark-state display under, not only can produce light leak at common boundary CB because there is no covering of light-shielding pattern 41, and first time pixel region 11 in liquid crystal molecule also can have bad orientation because of the edge of light-shielding pattern 41, and make also to produce light leak L in first time pixel region 11.In addition, the offset problem of above-mentioned light-shielding pattern 41 also likely occurs when first substrate 10 produces bit errors with second substrate 40.Shown in Fig. 7 A and Fig. 7 B, no matter be applied in flat-panel screens or flexible displays, the light-shielding pattern 41 be arranged on second substrate 40 all cannot effectively cover light leak L.

The display panel of the present invention is not limited with above-described embodiment.Hereafter sequentially will introduce the display panel of other preferred embodiment of the present invention, and for the ease of the deviation of more each embodiment and simplified illustration, in hereafter each embodiment, use identical symbol to mark identical element, and be described mainly for the deviation of each embodiment, and no longer repeating part is repeated.

Please refer to Fig. 8.Fig. 8 depicts the schematic diagram of the display panel of the first alternate embodiment of first embodiment of the present invention.As shown in Figure 8, in the display panel 1 ' of the first alternate embodiment, difference is to some extent closed in each on-off element of time pixel and the connection of data line.Speak by the book, in the first alternate embodiment, first source S 1 of the first on-off element SW1 and the first data line DL1 are electrically connected, second source S 2 and the 3rd data line DL3 of second switch element SW2 are electrically connected, 3rd source S 3 of the 3rd on-off element SW3 and the second data line DL2 are electrically connected, and the 4th source S 4 of the 4th on-off element SW4 and the 4th data line DL4 are electrically connected.

Please refer to Fig. 9.Fig. 9 depicts the schematic diagram of the display panel of the second alternate embodiment of first embodiment of the present invention.As shown in Figure 9, the display panel 1 in the second alternate embodiment " in, the first pixel electrode PE1 is overlapping in vertical projection direction Z upper part with the first shielding electrode 31, and the second pixel electrode PE2 is overlapping in vertical projection direction Z upper part with the first shielding electrode 31.The Overlap design of the first pixel electrode PE1 and the first shielding electrode 31 and the Overlap design of the second pixel electrode PE2 and the first shielding electrode 31 can guarantee that the region between the edge of region between the edge of the second data line DL2 and the first edge 31A of the first shielding electrode 31 and the second data line DL2 and the second edge 31B of the first shielding electrode 31 is effective display area.The overlapping widths of the first pixel electrode PE1 and the first shielding electrode 31 and the visual bit errors of overlapping widths of the second pixel electrode PE2 and the first shielding electrode 31 or other factors are adjusted.For example, the overlapping widths of the first pixel electrode PE1 and the first shielding electrode 31 and the overlapping widths of the second pixel electrode PE2 and the first shielding electrode 31 in fact can respectively between 1 micron and 4 microns, such as 2 microns, but not as limit.

Please refer to Figure 10.Figure 10 depicts the schematic diagram of the display panel of the 3rd alternate embodiment of first embodiment of the present invention.As shown in Figure 10, the display panel 1 in this 3rd alternate embodiment " ' in, data line forms by multi-layered patterned conductive layer institute is stacking.For example, the first data line DL1 stackingly can be formed by one first patterned conductive layer 51 and one second patterned conductive layer 52 institute.Further illustrate, insulation course 16 is provided with between first patterned conductive layer 51 and the second patterned conductive layer 52, and insulation course 16 has multiple contact holes (not shown), and the first patterned conductive layer 51 and the second patterned conductive layer 52 can be electrically connected via the contact hole of insulation course 16.First patterned conductive layer 51 can be used to the first metal layer forming first grid polar curve GL1, second gate line GL2 and common line CL, does not need whereby to increase additional technique, can reduce the resistance of the first data line DL.In like manner, the second data line DL2, the 3rd data line DL3 and the 4th data line DL4 also stackingly can be formed by the first patterned conductive layer 51 and the second patterned conductive layer 52 institute.What deserves to be explained is in the region need crossing over first grid polar curve GL1, second gate line GL2 and common line CL, the first data line DL1, the second data line DL2, the 3rd data line DL3 and the 4th data line DL4 are only made up of the second patterned conductive layer 52.

Please refer to Figure 11 and Figure 12.Figure 11 depicts the schematic diagram of the display panel of second embodiment of the present invention, and Figure 12 depicts the equivalent circuit diagram of the display panel of second embodiment of the present invention.As shown in Figure 11 and Figure 12, in the display panel 2 of the present embodiment, each time pixel region comprises a primary area and a secondary area.Further illustrate, pixel region 11 comprises one first primary area 11M and one first secondary area 11S for the first time; Second time pixel region 12 comprises one second primary area 12M and one second secondary area 12S; Third time, pixel region 13 comprised one the 3rd primary area 13M and the 3rd secondary area 13S, and the 4th time pixel region 14 comprises one the 4th primary area 14M and the 4th secondary area 14S.In the present embodiment, first grid polar curve GL1 is extended between the first primary area 11M and the first secondary area 11S and between the second primary area 12M and the second secondary area 12S along first direction Dx; Second gate line GL2 is extended between the 3rd primary area 13M and the 3rd secondary area 13S and between the 4th primary area 14M and the 4th secondary area 14S along first direction Dx.In addition, pixel 21 comprises two the first on-off element SW1 and two the first pixel electrode PE1 for the first time.Two first grid G1 are all electrically connected with first grid polar curve GL1, and two the first source S 1 are electrically connected with the first data line DL1 and the second data line DL2 respectively, and two the first drain D 1 are electrically connected with two the first pixel electrode PE1 respectively.Two the first pixel electrode PE1 lay respectively in the first primary area 11M and the first secondary area 11S.Second time pixel 22 comprises two second switch element SW2 and two the second pixel electrode PE2.Two second grid G2 are all electrically connected with first grid polar curve GL1, and two the second source S 2 are electrically connected with the 3rd data line DL3 and the 4th data line DL4 respectively, and two the second drain D 2 are electrically connected with two the second pixel electrode PE2 respectively.Two the second pixel electrode PE2 lay respectively in the second primary area 12M and the second secondary area 12S.Pixel 23 comprises two the 3rd on-off element SW3 and two the 3rd pixel electrode PE3 for the third time.Two the 3rd grid G 3 are all electrically connected with second gate line GL2, and two the 3rd source S 3 are electrically connected with the first data line DL1 and the second data line DL2 respectively, and two the 3rd drain D 3 are electrically connected with two the 3rd pixel electrode PE3 respectively.Two the 3rd pixel electrode PE3 lay respectively in the 3rd primary area 13M and the 3rd secondary area 13S.4th time pixel 24 comprises two the 4th on-off element SW4 and two the 4th pixel electrode PE4.Two the 4th grid G 4 are electrically connected with second gate line GL2, and two the 4th source S 4 are electrically connected with the 3rd data line DL3 and the 4th data line DL4 respectively, and two the 4th drain D 4 are electrically connected with two the 4th pixel electrode PE4 respectively.Two the 4th pixel electrode PE4 lay respectively in the 4th primary area 14M and the 4th secondary area 14S.

In the present embodiment, the first on-off element SW1 and the second data line DL2 of the first primary area 11M are electrically connected, and the first on-off element SW1 of the first secondary area 11S and the first data line DL1 is electrically connected; Second switch element SW2 and the 3rd data line DL3 of the second primary area 12M are electrically connected, and the second switch element SW2 of the second secondary area 12S and the 4th data line DL4 is electrically connected; 3rd on-off element SW3 and the first data line DL1 of the 3rd primary area 13M are electrically connected, and the 3rd on-off element SW3 of the 3rd secondary area 13S and the second data line DL2 is electrically connected; 4th on-off element SW4 and the 4th data line DL4 of the 4th primary area 14M are electrically connected, and the 4th on-off element SW4 of the 4th secondary area 14S and the 3rd data line DL3 is electrically connected, the display panel 2 of the present embodiment can drive, to reduce film flicker phenomenon in Zhi Shoudian reversion whereby.

Pixel electrode in each primary area and common electrode can form a host liquid crystal electric capacity Clc_main, pixel electrode in each secondary area and common electrode 42 can form a secondary liquid crystal capacitance Clc_sub, wherein host liquid crystal electric capacity Clc_main can be not equal to secondary liquid crystal capacitance Clc_sub, and such as host liquid crystal electric capacity Clc_1main is greater than secondary liquid crystal capacitance Clc_1sub.Primary area and the secondary area of a same pixel region are controlled by same gate line, but receive the signal of different pieces of information line respectively, the primary area of each whereby time pixel region can provide the picture with different brightness from secondary area, effectively can solve the problem of colour cast (color washout).For example, the brightness in primary area can be greater than the brightness of secondary area, and the area ratio visual display effect of primary area and secondary area is adjusted, and the area in such as primary area is less than the area of secondary area, but not as limit.The on-off element of display panel 2 and the connected mode of data line of the present embodiment are not limited in the above described manner, and can as the alternate embodiment of Fig. 8 the mode that discloses or alternate manner changed; The relative position of pixel electrode and shielding electrode is not limited in the above described manner, and can as the alternate embodiment of Fig. 9 the mode that discloses or alternate manner changed; Data line is not defined as and is made up of single layer patterning conductive layer, and can as the alternate embodiment of Figure 10 disclose by double-deck patterned conductive layer form.

Please refer to Figure 13 and Figure 14.Figure 13 depicts the schematic diagram of the display panel of the 3rd embodiment of the present invention, and Figure 14 depicts the equivalent circuit diagram of the display panel of the 3rd embodiment of the present invention.As shown in figures 13 and 14, the display panel 3 of the present embodiment and the display panel 2 of the second embodiment have similar framework, are only illustrated with regard to difference below.In the present embodiment, two source electrodes of two on-off elements in each pixel region are electrically connected to same data line.Speak by the book, two first source S 1 of two the first on-off element SW1 of pixel 21 are connected with each other and are all electrically connected with same data line such as the first data line DL1 for the first time; Two second source S 2 of two second switch element SW2 of second time pixel 22 are connected with each other and are all electrically connected with same data line such as the 4th data line DL4; Two the 3rd source S 3 of two the 3rd on-off element SW3 of pixel 23 are connected with each other and are all electrically connected with same data line such as the second data line DL2 for the third time; And two the 4th source S 4 of two of the 4th pixel 24 the 4th on-off element SW4 are connected with each other and are all electrically connected with same data line such as the 3rd data line DL3.

In addition, the display panel 3 of the present embodiment separately comprises many first signal wire SL1 and many secondary signal line SL2.Each first signal wire SL1 extends along first direction Dx and is arranged between the first primary area 11M and the first secondary area 11S and between the second primary area 12M and the second secondary area 12S, and each secondary signal line SL2 extends along first direction Dx and is arranged between the 3rd primary area 13M and the 3rd secondary area 13S and between the 4th primary area 14M and the 4th secondary area 14S.Each first time pixel 21 separately comprise one the 5th on-off element SW5, each second time pixel 22 separately comprises one the 6th on-off element SW6, each third time pixel 23 separately comprise one the 7th on-off element SW7, and each 4th pixel 24 separately comprises one the 8th on-off element SW8.5th on-off element SW5 has one the 5th grid G 5, the 5th source S 5 and one the 5th drain D 5, wherein the 5th grid S5 and the first signal wire SL1 is electrically connected, 5th source S 5 is floating (floating), and the wherein one of the 5th drain D 5 and the first drain D 1 is electrically connected.6th on-off element SW6 has one the 6th grid G 6, the 6th source S 6 and one the 6th drain D 6, wherein the 6th grid G 6 and the first signal wire SL1 are electrically connected, 6th source S 6 is floating, and the 6th drain D 6 is electrically connected with the wherein one of this second drain D 2.7th on-off element SW7 has one the 7th grid G 7, the 7th source S 7 and one the 7th drain D 7, and wherein the 7th grid G 7 is electrically connected with secondary signal line SL2, and the 7th source S 7 is floating, and the wherein one of the 7th drain D 7 and the 3rd drain D 3 is electrically connected.8th on-off element SW8 has one the 8th grid G 8, the 8th source S 8 and one the 8th drain D 8, and wherein the 8th grid G 8 is electrically connected with secondary signal line SL2, and the 8th source S 8 is floating, and the wherein one of the 8th drain D 8 and the 4th drain D 4 is electrically connected.In the present embodiment, first signal wire SL1 can provide a signal to open the 5th on-off element SW5 and the 6th on-off element SW6, and the sequential of the signal of the first signal wire SL1 is later than the sequential of the signal of first grid polar curve GL1, and secondary signal line SL2 can provide another signal to open the 7th on-off element SW7 and the 8th on-off element SW8, and the sequential of the signal of secondary signal line SL2 is later than the sequential of the signal of second gate line GL2.For example, first signal wire SL1 can be electrically connected with another first grid polar curve GL1 (such as in order to drive down the first grid polar curve GL1 of time pixel of two row), and secondary signal line SL2 can be electrically connected with another second gate line GL2 (such as in order to drive down the second gate line GL2 of time pixel of two row).5th source S 5 of the 5th on-off element SW5 can form a storage capacitors Ccs with common line CL; 6th source S 6 of the 6th on-off element SW6 can form a storage capacitors Ccs with common line CL; 7th source S 7 of the 7th on-off element SW7 can form a storage capacitors Ccs with common line CL; And the 8th the 8th source S 8 of on-off element SW8 can form a storage capacitors Ccs with common line CL.By above-mentioned configuration, when the 5th on-off element SW5, the 6th on-off element SW6, the 7th on-off element SW7 and the 8th on-off element SW8 open, each storage capacitors Ccs can respectively with first time pixel 21, second time pixel 22, third time pixel 23 and the secondary liquid crystal capacitance Clc_sub of the 4th pixel 24 carry out charge share, make the host liquid crystal electric capacity Clc_main of each pixel can be not equal to secondary liquid crystal capacitance Clc_sub, such as host liquid crystal electric capacity Clc_1main is greater than secondary liquid crystal capacitance Clc_1sub.Whereby, the primary area of each pixel region can provide the picture with different brightness from secondary area, to solve the problem of colour cast.The on-off element of display panel 3 and the connected mode of data line of the present embodiment are not limited in the above described manner, and can as the alternate embodiment of Fig. 8 the mode that discloses or alternate manner changed; The relative position of pixel electrode and shielding electrode is not limited in the above described manner, and can as the alternate embodiment of Fig. 9 the mode that discloses or alternate manner changed; Data line is not defined as and is made up of single layer patterning conductive layer, and can as the alternate embodiment of Figure 10 disclose by double-deck patterned conductive layer form.

Please refer to Figure 15.Figure 15 depicts the configuration schematic diagram of the color filter patterns of the display panel of one of the present invention embodiment.In display panel in the present invention, the arrangement of secondary pixel does not limit according to identical rule with the color alignment of color filter patterns.As shown in figure 15, in the display panel 4 of the present embodiment, first time pixel 21, second time pixel 22, third time pixel 23 can the mode that discloses of previous embodiment arrange with the 4th pixel 24, such as on odd column first time pixel 21 with second time pixel 22 for replacing repeated arrangement; On even column, pixel 23 is alternately repeated arrangement with the 4th pixel 24 third time, in odd-numbered line first time pixel 21 with third time pixel 23 for replacing repeated arrangement; And pixel 22 and the 4th pixel 24 are replace repeated arrangement for the second time in even number line.In addition, color filter patterns then can be such as vertical bar shape (stripe) arrangement.For example, be positioned at 3n-2 capable on all pixels color filter patterns (though be first time pixel 21 the first color filter patterns CF1 with third time pixel 23 the 3rd color filter patterns CF3) be all same color such as red R; Be positioned at 3n-1 capable on the color filter patterns (the 4th color filter patterns CF4 of the second color filter patterns CF2 and the 4th time pixel 24 of second time pixel 22) of all pixels be all same color such as green G; And be positioned at 3n capable on all pixels color filter patterns (though be first time pixel 21 the first color filter patterns CF1 with third time pixel 23 the 3rd color filter patterns CF3) be all same color such as blue B, the wherein positive integer of n for being more than or equal to 1.In addition, three adjacent on same row pixels, such as two first time pixel 21 with second time pixel 22, a two second time pixel 22 and a first time pixel 21, two for the third time pixel 23 and the 4th pixel 24, or two the 4th pixels 14 and one for the third time pixel 13 form the display pixel cells P that can demonstrate full-color image respectively.In other alternate embodiment, red R, green G and blue B also can arrange for Else Rule arranges such as triangle (delta).Or display pixel cells P can by more color configuration examples as red, green, blue and yellow, or red, green, blue and white.

Please refer to Figure 16.Figure 16 depicts the schematic diagram of the flexible displays of one of the present invention embodiment.As shown in figure 16, the flexible displays (curved display) 50 of the present embodiment comprises display panel 60 and a framework 70.Display panel 60 is combined with framework 70, and display panel 60 is formed and has the bending display surface 62 of one of curvature whereby.That is, the inside of framework 70 has a flexure plane, and display panel 60 is inserted the inside of framework 70 and be attached on the flexure plane of framework 70, and display panel 60 can be made to form the bending display surface 62 with curvature.The display panel that the aforementioned any embodiment that can be selected from the display panel 60 of the present embodiment discloses, and the Structure and characteristics of display panel is as mentioned before, does not repeat them here.As shown in figure 16, when audience 80 is at preposition viewing flexible displays 50, the eyes of audience 80 in fact can be equal with the distance b of marginarium with the distance a of the central area of flexible displays 50, and the picture therefore shown by flexible displays 50 not easily produces the problem such as luminance deviation and misalignment.In addition, because display panel 60 is provided with the design of aforementioned shielding electrode, therefore also leakage problem can not be produced.

In sum, the display panel of the present invention arranges shielding electrode on first substrate, corresponding to the common boundary being two pixel regions adjacent on first direction, and need not arrange light-shielding pattern on second substrate, effectively can cover light leak.In addition, the display panel of the present invention can be applicable to flexible displays, but also not can be applicable to flat-panel screens or flexible display as limit.

The foregoing is only the preferred embodiment of the present invention, all equalizations done according to the present patent application the scope of the claims change and modify, and all should belong to the covering scope of the present invention.

Claims

1. a display panel, is characterized in that, comprising:

One first substrate, has pixel region and multiple second time pixel region of multiple first times, wherein this first time pixel region and this second time pixel region be sequentially alternately arranged on a first direction;

Many first grid polar curves, to be arranged on this first substrate and to extend along this first direction;

Many the first data lines, many the second data lines, many articles of the 3rd data lines and many articles of the 4th data lines, with this first data line, this second data line, the order of the 3rd data line and the 4th data line to be sequentially arranged on this first substrate along this first direction and to extend along a second direction, wherein respectively this first data line and each this second data line bit in each this pixel region first time, respectively the 3rd data line and each the 4th data line bit are in each this second time pixel region, and respectively this second data line and respectively the 3rd data line be arranged at respectively this first data line and respectively between the 4th data line,

Multiple first color filter patterns, to be arranged on this first substrate and to lay respectively in this pixel region first time;

Multiple second color filter patterns, to be arranged on this first substrate and to lay respectively in this second time pixel region;

Multiple first time pixel, be arranged in this pixel region respectively first time, wherein respectively this first time pixel and the wherein at least one of this first data line and this second data line be electrically connected, and respectively this first time pixel comprise one first pixel electrode, be arranged in this first color filter patterns;

Multiple second time pixel, be arranged in this second time pixel region respectively, wherein respectively the wherein at least one of this second time pixel and the 3rd data line and the 4th data line is electrically connected, and respectively this second time pixel comprises one second pixel electrode, is arranged in this second color filter patterns; And

Multiple first shielding electrode, to be arranged on this first substrate and to extend along this second direction, and wherein respectively this first shielding electrode is arranged at this pixel region and one of this second time pixel region common boundary first time, and respectively this first shielding electrode has a fixed voltage;

One second substrate, is oppositely arranged with this first substrate;

One common electrode, is arranged on this second substrate; And

One display dielectric layer, is arranged between this first substrate and this second substrate.

2. display panel as claimed in claim 1, it is characterized in that, wherein this first pixel electrode overlapping at least partly on a vertical projection direction with this first data line and this second data line in this pixel region first time, and this second pixel electrode in this second time pixel region with the 3rd data line and the 4th data line at least part of overlapping on this vertical projection direction.

3. display panel as claimed in claim 2, it is characterized in that, wherein this first pixel electrode further extends to this first shielding electrode and protrudes from this second data line, and this second pixel electrode further extends to this first shielding electrode and protrudes from the 3rd data line.

4. display panel as claimed in claim 3, it is characterized in that, wherein this first shielding electrode has one first edge this first pixel electrode contiguous, and one second edge this second pixel electrode contiguous, this first edge of this first pixel electrode and this first shielding electrode trims in fact, and this second edge of this second pixel electrode and this first shielding electrode trims in fact.

5. display panel as claimed in claim 3, it is characterized in that, wherein this first pixel electrode is overlapping in this vertical projection direction upper part with this first shielding electrode, and this second pixel electrode is overlapping in this vertical projection direction upper part with this first shielding electrode.

6. display panel as claimed in claim 1, it is characterized in that, separately comprise multiple light-shielding pattern, be arranged on this second substrate, wherein this light-shielding pattern is overlapping on a vertical projection direction with this first grid polar curve respectively.

7. display panel as claimed in claim 1, is characterized in that, wherein

Respectively pixel comprises one first on-off element this first time, this first on-off element has a first grid, one first source electrode and one first drains, wherein this first grid and this first grid polar curve are electrically connected, the wherein one of this first source electrode and this first data line and this second data line is electrically connected, and this first drain electrode is electrically connected with this first pixel electrode; And

Respectively this second time pixel comprises a second switch element, this second switch element has a second grid, one second source electrode and one second drains, wherein this second grid and this first grid polar curve are electrically connected, the wherein one of this second source electrode and the 3rd data line and the 4th data line is electrically connected, and this second drain electrode is electrically connected with this second pixel electrode;

Wherein respectively this first grid polar curve is arranged at this pixel region and the side of this second time pixel region first time.

8. display panel as claimed in claim 7, it is characterized in that, wherein this first substrate separately has pixel region and multiple 4th pixel region of multiple third times, this third time pixel region and the 4th pixel region be sequentially alternately arranged in the first direction, this third time pixel region in this second direction respectively with this first time pixel region adjacent, and the 4th pixel region is adjacent with this second time pixel region respectively in this second direction, this display panel separately comprises:

Many second gate lines, to be arranged on this first substrate and to extend along this first direction, wherein respectively this second gate line be arranged at this first time pixel region and this pixel region third time between and between this second time pixel region and the 4th pixel region;

Multiple second shielding electrode, to be arranged on this first substrate and to extend along this second direction, and wherein respectively this second shielding electrode is arranged at this pixel region and one of the 4th pixel region common boundary third time, and respectively this second shielding electrode has this fixed voltage;

Multiple 3rd color filter patterns, to be arranged on this first substrate and to lay respectively in this pixel region third time;

Multiple 4th color filter patterns, to be arranged on this first substrate and to lay respectively in the 4th pixel region;

Multiple third time pixel, be arranged in this pixel region respectively third time, wherein respectively this third time pixel comprise:

One the 3rd on-off element, have one the 3rd grid, one the 3rd source electrode and one the 3rd drain electrode, wherein the 3rd grid and this second gate line are electrically connected, and the wherein another one of the 3rd source electrode and this first data line and this second data line is electrically connected; And

One the 3rd pixel electrode, to be arranged in the 3rd color filter patterns and to drain be electrically connected with the 3rd, wherein this first data line and this second data line and this first pixel electrode and the 3rd pixel electrode overlapping at least partly; And

Multiple 4th pixel, be arranged in the 4th pixel region respectively, wherein respectively the 4th pixel comprises:

One the 4th on-off element, have one the 4th grid, one the 4th source electrode and one the 4th drain electrode, wherein the 4th grid and this second gate line are electrically connected, and the wherein another one of the 4th source electrode and the 3rd data line and the 4th data line is electrically connected; And

One the 4th pixel electrode, to be arranged in the 4th color filter patterns and to drain be electrically connected with the 4th, wherein the 3rd data line and the 4th data line and this second pixel electrode and the 4th pixel electrode overlapping at least partly.

9. display panel as claimed in claim 8, it is characterized in that, wherein this first source electrode of this first on-off element and this first data line are electrically connected, this second source electrode and the 4th data line of this second switch element are electrically connected, 3rd source electrode and this second data line of the 3rd on-off element are electrically connected, and the 4th source electrode of the 4th on-off element and the 3rd data line are electrically connected.

10. display panel as claimed in claim 8, it is characterized in that, wherein this first source electrode of this first on-off element and this first data line are electrically connected, this second source electrode and the 3rd data line of this second switch element are electrically connected, 3rd source electrode and this second data line of the 3rd on-off element are electrically connected, and the 4th source electrode of the 4th on-off element and the 4th data line are electrically connected.

11. display panels as claimed in claim 1, is characterized in that, wherein

Respectively pixel region comprises one first primary area and one first secondary area this first time;

Respectively this second time pixel region comprises one second primary area and one second secondary area;

Respectively pixel comprises this first time:

Two the first on-off elements, respectively this first on-off element has a first grid, one first source electrode and one first drains, wherein this first grid and this first grid polar curve are electrically connected, and this first source electrode is electrically connected with this first data line and this second data line respectively; And

Two the first pixel electrodes, to be arranged in this first color filter patterns and to lay respectively in this first primary area and this first secondary area, and wherein this first pixel electrode first drains with this and is electrically connected respectively; And

Respectively this second time pixel comprises:

Two second switch elements, respectively this second switch element has a second grid, one second source electrode and one second drains, wherein this second grid and this first grid polar curve are electrically connected, and this second source electrode is electrically connected with the 3rd data line and the 4th data line respectively; And

Two the second pixel electrodes, to be arranged in this second color filter patterns and to lay respectively in this second primary area and this second secondary area, and wherein this second pixel electrode second drains with this and is electrically connected respectively,

Wherein respectively this first grid polar curve is extended between this first primary area and this first secondary area and between this second primary area and this second secondary area along this first direction.

12. display panels as claimed in claim 11, it is characterized in that, wherein this first substrate separately has pixel region and multiple 4th pixel region of multiple third times, this third time pixel region and the 4th pixel region be sequentially alternately arranged in the first direction, this third time pixel region in this second direction respectively with this first time pixel region adjacent, and the 4th pixel region is adjacent with this second time pixel region respectively in this second direction, respectively pixel region comprises one the 3rd primary area and one the 3rd secondary area this third time, respectively the 4th pixel region comprises one the 4th primary area and one the 4th secondary area, this display panel separately comprises:

Many second gate lines, being arranged on this first substrate and extending along this first direction, wherein respectively this second gate line is arranged between the 3rd primary area and the 3rd secondary area and between the 4th primary area and the 4th secondary area;

Two the 3rd on-off elements, respectively the 3rd on-off element has one the 3rd grid, one the 3rd source electrode and one the 3rd drain electrode, wherein the 3rd grid and this second gate line are electrically connected, and the 3rd source electrode is electrically connected with this first data line and this second data line respectively; And

Two the 3rd pixel electrodes, to be arranged in the 3rd color filter patterns and to lay respectively in the 3rd primary area and the 3rd secondary area, wherein the 3rd pixel electrode drains with the 3rd respectively and is electrically connected, and this first data line and this second data line and this first pixel electrode and the 3rd pixel electrode overlapping at least partly; And

Two the 4th on-off elements, respectively the 4th on-off element has one the 4th grid, one the 4th source electrode and one the 4th drain electrode, wherein the 4th grid and this second gate line are electrically connected, and the 4th source electrode is electrically connected with the 3rd data line and the 4th data line respectively; And

Two the 4th pixel electrodes, to be arranged in the 4th color filter patterns and to lay respectively in the 4th primary area and the 4th secondary area, wherein the 4th pixel electrode drains with the 4th respectively and is electrically connected, wherein the 3rd data line and the 4th data line and this second pixel electrode and the 4th pixel electrode overlapping at least partly.

13. display panels as claimed in claim 1, is characterized in that, wherein

Respectively pixel comprises this first time:

Two the first on-off elements, respectively this first on-off element has a first grid, one first source electrode and one first drains, wherein this first grid and this first grid polar curve are electrically connected, and the wherein one of this first source electrode and this first data line and this second data line is electrically connected; And

Respectively this second time pixel comprises:

Two second switch elements, respectively this second switch element has a second grid, one second source electrode and one second drains, wherein this second grid and this first grid polar curve are electrically connected, and the wherein one of this second source electrode and the 3rd data line and the 4th data line is electrically connected; And

14. display panels as claimed in claim 13, it is characterized in that, wherein this first substrate separately has pixel region and multiple 4th pixel region of multiple third times, this third time pixel region and the 4th pixel region be sequentially alternately arranged in the first direction, this third time pixel region in this second direction respectively with this first time pixel region adjacent, and the 4th pixel region is adjacent with this second time pixel region respectively in this second direction, respectively pixel region comprises one the 3rd primary area and one the 3rd secondary area this third time, respectively the 4th pixel region comprises one the 4th primary area and one the 4th secondary area, this display panel separately comprises:

Two the 3rd on-off elements, respectively the 3rd on-off element has one the 3rd grid, one the 3rd source electrode and one the 3rd drain electrode, wherein the 3rd grid and this second gate line are electrically connected, and the wherein another one of the 3rd source electrode and this first data line and this second data line is electrically connected; And

Two the 4th on-off elements, respectively the 4th on-off element has one the 4th grid, one the 4th source electrode and one the 4th drain electrode, wherein the 4th grid and this second gate line are electrically connected, and the wherein another one of the 4th source electrode and the 3rd data line and the 4th data line is electrically connected; And

15. display panels as claimed in claim 14, is characterized in that, separately comprise:

Many the first signal wires, extend along this first direction, and wherein respectively this first signal wire is arranged between this first primary area and this first secondary area and between this second primary area and this second secondary area; And

Many secondary signal lines, extend along this first direction, and wherein respectively this secondary signal line is arranged between the 3rd primary area and the 3rd secondary area and between the 4th primary area and the 4th secondary area;

Wherein respectively this first time pixel separately comprise one the 5th on-off element, there is one the 5th grid, one the 5th source electrode and one the 5th drain electrode, wherein the 5th grid and this first signal wire are electrically connected, and the 5th source electrode is floating, and the 5th drain electrode is electrically connected with the wherein one of this first drain electrode;

Respectively this second time pixel separately comprises one the 6th on-off element, there is one the 6th grid, one the 6th source electrode and one the 6th drain electrode, wherein the 6th grid and this first signal wire are electrically connected, and the 6th source electrode is floating, and the 6th drain electrode is electrically connected with the wherein one of this second drain electrode;

Respectively pixel separately comprises one the 7th on-off element this third time, there is one the 7th grid, one the 7th source electrode and one the 7th drain electrode, wherein the 7th grid and this secondary signal line are electrically connected, and the 7th source electrode is floating, and the 7th drain electrode is electrically connected with the wherein one of the 3rd drain electrode; And

Respectively the 4th pixel separately comprises one the 8th on-off element, there is one the 8th grid, one the 8th source electrode and one the 8th drain electrode, wherein the 8th grid and this secondary signal line are electrically connected, and the 8th source electrode is floating, and the 8th drain electrode is electrically connected with the wherein one of the 4th drain electrode.

16. display panels as claimed in claim 1, it is characterized in that, separately comprise many articles of the 3rd shielding electrodes, to be arranged on this first substrate and to extend along this second direction, wherein the 3rd shielding electrode and this first cover electrode in the first direction for being alternately arranged, and respectively the 3rd shielding electrode is arranged between this pixel this second time pixel adjacent with another first time.

17. display panels as claimed in claim 16, it is characterized in that, separately comprise at least one common line, be arranged on this first substrate along this first direction, wherein this at least one common line is connected with the 3rd shielding electrode with this first shielding electrode, and this fixed voltage is a common electric voltage.

18. display panels as claimed in claim 1, it is characterized in that, wherein this first color filter patterns and this second color filter patterns in this first time pixel region and this common boundary of this second time pixel region overlie one another, and this first color filter patterns is overlapping in a vertical projection direction upper part with this first shielding electrode with this second color filter patterns.

19. 1 kinds of flexible displays, is characterized in that, comprising:

This display panel as claimed in claim 1; And

One framework, wherein this display panel is combined with this framework, and this display panel is formed and has the bending display surface of one of curvature whereby.