CN108051967B - Display panel - Google Patents
Display panel Download PDFInfo
- Publication number
- CN108051967B CN108051967B CN201711486833.3A CN201711486833A CN108051967B CN 108051967 B CN108051967 B CN 108051967B CN 201711486833 A CN201711486833 A CN 201711486833A CN 108051967 B CN108051967 B CN 108051967B
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- Prior art keywords
- transparent conductive
- conductive layer
- display panel
- display area
- display
- Prior art date
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- 239000004973 liquid crystal related substance Substances 0.000 claims description 10
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical group [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 3
- 229910044991 metal oxide Inorganic materials 0.000 claims description 3
- 150000004706 metal oxides Chemical class 0.000 claims description 3
- 238000000206 photolithography Methods 0.000 claims description 3
- 230000007547 defect Effects 0.000 description 7
- 239000000758 substrate Substances 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000012447 hatching Effects 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/13629—Multilayer wirings
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
There is provided a display panel including a display region and a non-display region, and including: a data line extending from the display area to the non-display area; an array signal line disposed in the non-display area; and a transparent conductive layer including a first portion disposed in the display area and a second portion disposed in the non-display area, wherein the second portion of the transparent conductive layer does not overlap the data line in the non-display area.
Description
Technical Field
The present invention relates to a display panel, and more particularly, to a display panel having a transparent conductive layer that improves line defects.
Background
In recent years, in order to improve the product performance, a black matrix (BM-less) eliminating technology and a Color Filter on Array (COA) technology are adopted to manufacture a liquid crystal display panel, so that BM areas in RGB pixels are eliminated, module bright blocks are reduced, the module penetration rate is higher, the picture brightness is effectively improved, the image quality layering and fine sense are enhanced, and a displayed picture is fuller and more beautiful and is lifelike.
The BM-less technique covers a transparent conductive layer (e.g., an ITO layer) over a data line, shields the data line with the transparent conductive layer, and connects the transparent conductive layer with an array signal line to supply a common voltage of an array substrate to the transparent conductive layer, so that a potential of the transparent conductive layer is always equal to the common voltage of the array substrate and equal to a common voltage of a Color Filter (CF) substrate, thereby causing liquid crystal molecules corresponding to a position of the transparent conductive layer to remain undeflected, and thus, a vertical BM in the related art can be replaced to achieve the purpose of light shielding.
By adopting the design, when electrostatic discharge (ESD) occurs between the data line and the transparent conductive layer, the data line is easily short-circuited with the transparent conductive layer, so that the signal intensity of the data line is reduced, line defects are generated, and serious damage is caused to a product. Since line defects have been a major cause of yield loss of liquid crystal display panels, improvement of line defects has become one of the important issues of current research.
Disclosure of Invention
An exemplary embodiment of the present invention provides a display panel, which includes a data line and a transparent conductive layer, where a routing line of the transparent conductive layer at a terminal of the data line is not overlapped with the data line, so as to avoid generating a double-layer metal layer (a data line layer and a transparent conductive layer), and reduce a possibility of ESD occurring between the data line and the transparent conductive layer, thereby reducing a possibility of a short circuit, and greatly reducing generation of bad lines.
According to an exemplary embodiment of the present invention, a display panel may include a display area and a non-display area, and include: a data line extending from the display area to the non-display area; an array signal line disposed in the non-display area; and a transparent conductive layer including a first portion disposed in the display area and a second portion disposed in the non-display area, wherein the second portion of the transparent conductive layer does not overlap the data line in the non-display area.
According to an exemplary embodiment of the present invention, the transparent conductive layer may be a transparent conductive metal oxide layer.
According to an exemplary embodiment of the present invention, the transparent conductive layer may be an indium tin oxide layer.
According to an exemplary embodiment of the present invention, the second portion of the transparent conductive layer may have a spaced structure.
According to an exemplary embodiment of the present invention, the second portion of the transparent conductive layer may have a spaced structure disposed between the plurality of data lines.
According to an exemplary embodiment of the present invention, the first portion of the transparent conductive layer may overlap the data line in the display area.
According to an exemplary embodiment of the present invention, the second portion of the transparent conductive layer may be connected to the array signal line through a signal transfer hole.
According to an exemplary embodiment of the present invention, the transparent conductive layer may be formed by photolithography.
According to an exemplary embodiment of the present invention, the display panel may be used for a liquid crystal display device.
Drawings
Fig. 1 is a partial top plan view of a display panel according to the prior art.
Fig. 2 is a sectional view of the display panel taken along line I-I of fig. 1.
Fig. 3 is a partial top plan view of a display panel according to an exemplary embodiment of the present invention.
Fig. 4 is a diagram comparing planar structures of a display panel according to the related art and a display panel according to an exemplary embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments and methods of the present invention, which constitute the best modes of practicing the invention presently known to the inventors. The drawings are not necessarily drawn to scale. However, it is to be understood that the disclosed embodiments are merely exemplary of the invention that may be embodied in various and alternative forms. Therefore, specific details disclosed herein are not to be interpreted as limiting, but merely as a representative basis for any aspect of the invention and/or as a representative basis for teaching one skilled in the art to variously employ the present invention.
Fig. 1 is a partial top plan view of a display panel according to the prior art. Fig. 2 is a sectional view of the display panel taken along line I-I of fig. 1.
Referring to fig. 1, the display panel according to the related art includes a display area DA and a non-display area NDA, and the non-display area NDA may include a dummy pixel area (not shown), an anti-static protection area (not shown), and the like. The display panel may include a plurality of subpixels (e.g., red, green, and blue subpixels R, G, and B, etc.), a gate line GL, a data line DL, a dummy gate line DGL, an array signal line AC, a transparent conductive layer TC, and the like. Here, for convenience of explanation, only some components of the display panel are shown, and other components of the display panel are omitted.
As shown in fig. 1, the data lines DL extend substantially in a longitudinal direction from the display area DA to the non-display area NDA. In fig. 1, in the region indicated by hatching, a transparent conductive layer TC is provided.
Referring to fig. 1, the transparent conductive layer TC is disposed in the display area DA and the non-display area NDA and includes a first portion disposed in the display area DA and a second portion disposed in the non-display area NDA. Referring to fig. 1 and 2, in the display area DA, a first portion of the transparent conductive layer TC overlaps the data line DL and is disposed between the sub-pixels in a longitudinal direction (a direction in which the data line DL extends). The first portion of the transparent conductive layer TC and the data line DL have a thick color resistance layer CR and an insulation layer PV therebetween, so that it is possible to prevent electrostatic discharge from occurring between the first portion of the transparent conductive layer TC and the data line DL. Therefore, for example, electrostatic discharge may not occur at the S position in fig. 2.
As shown in fig. 1 and 2, in the non-display area NDA, the second portion of the transparent conductive layer TC overlaps the data line DL. However, only the insulating layer PV and no color resistance layer CR are provided between the second portion of the transparent conductive layer TC and the data line DL. Accordingly, electrostatic discharge (ESD) is liable to occur, for example, at the position of S1 in fig. 1 and 2, so that the data line DL is highly susceptible to short-circuiting with the transparent conductive layer TC. Since the transparent conductive layer TC is also connected to the array signal line AC, the signal intensity of the data line DL is pulled low by the array signal line AC, thereby causing line defects and affecting the display quality of the display panel.
As shown in fig. 1, the array signal lines AC are disposed in the non-display area NDA of the display panel substantially in the lateral direction. In the non-display area NDA, the transparent conductive layer TC overlaps the array signal line AC and is electrically connected to the array signal line AC through the plurality of signal transfer holes H such that the transparent conductive layer TC has the same voltage as the array signal line AC. Therefore, when the display panel is a liquid crystal display panel, the voltage of the transparent conductive layer TC may be equal to the common voltage of the color filter substrate. Accordingly, in the display area DA, the liquid crystal molecules corresponding to the position of the transparent conductive layer TC remain undeflected, and thus, the conventional vertical Black Matrix (BM) can be replaced for the purpose of light shielding.
Although the BM-less technology can be implemented by the transparent conductive layer TC, the transparent conductive layer TC and the data line DL are stacked in the non-display area NDA and only the insulating layer PV is disposed therebetween, so that the data line DL is easily shorted with the transparent conductive layer TC, the signal strength of the data line DL is lowered, line defects are generated, and serious damage is caused to a product.
The display panel according to the exemplary embodiment of the present invention solves the problem of the prior art that the display quality of the display panel is affected due to line-like defects by changing the arrangement of the transparent conductive layer TC in the non-display area NDA such that the transparent conductive layer TC does not overlap the data lines DL in the non-display area NDA, thereby reducing the capacitance between the transparent conductive layer TC and the data lines DL and reducing the possibility of generation of electrostatic discharge and short circuits caused by the electrostatic discharge. A display panel according to an exemplary embodiment of the present invention will be described in detail with reference to fig. 3.
Fig. 3 is a partial top plan view of a display panel according to an exemplary embodiment of the present invention. The display panel according to the exemplary embodiment of the present invention shown in fig. 3 is the same as the display panel according to the related art shown in fig. 1 except for the transparent conductive layer TC. Similarly, only some components of the display panel relevant to the present invention are shown in the drawings, and other components of the display panel are omitted.
Referring to fig. 3, the display panel according to an exemplary embodiment of the present invention includes a display area DA and a non-display area NDA, and the non-display area NDA may include a dummy pixel area (not shown) and an anti-static protection area (not shown). According to an exemplary embodiment of the present invention, the display panel may include a plurality of subpixels (e.g., red, green, and blue subpixels R, G, and B, etc.), a gate line GL, a data line DL, a dummy gate line DGL, an array signal line AC, a transparent conductive layer TC, and the like.
As shown in fig. 3, the data lines DL extend substantially in the longitudinal direction from the display area DA to the non-display area NDA. In fig. 3, a transparent conductive layer TC is provided in a region indicated by hatching, and the transparent conductive layer TC is provided in the display area DA and the non-display area NDA.
According to an exemplary embodiment of the present invention, the transparent conductive layer TC includes a first portion disposed in the display area DA and a second portion disposed in the non-display area NDA. As shown in fig. 3, in the display area DA, the first portion of the transparent conductive layer TC overlaps the data lines DL and is disposed between the sub-pixels in the longitudinal direction (the direction in which the data lines DL extend). The first portion of the transparent conductive layer TC has a color resist layer CR and an insulating layer PV between the data line DL and the first portion of the transparent conductive layer TC. As shown in fig. 3, in the non-display area NDA, the second portion of the transparent conductive layer TC does not overlap the data lines DL, and is disposed in a spacing area between the plurality of data lines DL. That is, the second portion of the transparent conductive layer TC according to an exemplary embodiment of the present invention has a spaced structure disposed between the plurality of data lines DL.
According to an exemplary embodiment of the present invention, the transparent conductive layer TC overlaps the array signal line AC and is electrically connected to the array signal line AC through the signal transfer hole H such that the voltage of the transparent conductive layer TC is the same as the voltage of the array signal line AC. Therefore, when the display panel is a liquid crystal display panel, the potential of the transparent conductive layer TC may be equal to the common voltage of the color filter substrate. Therefore, in the display area DA, the liquid crystal molecules corresponding to the position of the transparent conductive layer TC remain undeflected, and the purpose of blocking light is achieved.
Therefore, the display panel according to the exemplary embodiment of the present invention can well ensure the line connection of the BM-less design while avoiding the generation of the double metal layer (data line and transparent conductive layer) region at the end of the data line.
Fig. 4 is a diagram comparing planar structures of a display panel according to the related art and a display panel according to an exemplary embodiment of the present invention. The display panel according to the exemplary embodiment of the present invention and the display panel according to the related art each include an array signal line AC, a dummy gate line DGL, a data line DL, sub-pixels (e.g., red sub-pixel R, green sub-pixel G, and blue sub-pixel B, etc.), an electrostatic protection device E, a transparent conductive layer TC, and the like.
Referring to fig. 4, the transparent conductive layer TC (left side view) of the display panel according to the related art overlaps the data line DL and the array signal line AC in the non-display area NDA with only the insulating layer PV (refer to fig. 2) interposed therebetween, and thus at M1 in fig. 4, the transparent conductive layer TC overlaps the data line DL, so that electrostatic discharge (ESD) is easily generated therein, short circuits are easily generated, and vertical color changes are easily generated macroscopically. However, the transparent conductive layer TC (right side view) according to an exemplary embodiment of the present invention does not overlap the data line DL in the non-display area. That is, the transparent conductive layer TC is not present at M2 corresponding to M1, and thus the bimetal layer region is not present, so that an electrostatic short circuit is not generated. In the drawings, the widths of the data lines DL and the transparent conductive layers TC do not represent actual widths thereof, but are for convenience of illustration and explanation.
Therefore, as can be clearly understood from a comparison of fig. 4, the display panel according to the exemplary embodiment of the present invention may prevent a short circuit from occurring by changing the arrangement of the transparent conductive layer TC in the non-display area NDA such that a two-layer metal overlap area formed by the data line DL and the transparent conductive layer TC does not exist in the non-display area NDA.
According to an exemplary embodiment of the present invention, the transparent conductive layer TC may be prepared using a photolithography method, and the transparent conductive layer TC may employ a transparent conductive metal oxide, for example, Indium Tin Oxide (ITO), but the present invention is not limited thereto.
According to an exemplary embodiment of the present invention, the display panel may be a display panel for a liquid crystal display, but the present invention is not limited thereto.
While the present disclosure includes particular examples, it will be apparent after understanding the disclosure of the present application that various changes in form and detail may be made therein without departing from the spirit and scope of the claims and their equivalents. The examples described herein are to be considered in a descriptive sense only and not for purposes of limitation. Therefore, the scope of the present disclosure is defined not by the detailed description but by the claims and their equivalents, and all changes within the scope of the claims and their equivalents are to be construed as being included in the present disclosure.
Claims (8)
1. A display panel characterized by comprising a display region and a non-display region, and comprising:
a data line extending from the display area to the non-display area;
an array signal line disposed in the non-display area; and
a transparent conductive layer including a first portion disposed in the display region and a second portion disposed in the non-display region,
wherein the first portion of the transparent conductive layer overlaps the data line in the display region, and the second portion of the transparent conductive layer does not overlap the data line in the non-display region.
2. The display panel of claim 1, wherein the transparent conductive layer is a transparent conductive metal oxide layer.
3. The display panel of claim 2, wherein the transparent conductive layer is an indium tin oxide layer.
4. The display panel of claim 1, wherein the second portion of the transparent conductive layer has a spaced structure.
5. The display panel of claim 4, wherein the second portion of the transparent conductive layer has a spaced structure disposed between a plurality of data lines.
6. The display panel of claim 1, wherein the second portion of the transparent conductive layer is connected to an array signal line through a signal transit hole.
7. The display panel according to claim 1, wherein the transparent conductive layer is formed by photolithography.
8. The display panel according to claim 1, wherein the display panel is used for a liquid crystal display device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711486833.3A CN108051967B (en) | 2017-12-29 | 2017-12-29 | Display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711486833.3A CN108051967B (en) | 2017-12-29 | 2017-12-29 | Display panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108051967A CN108051967A (en) | 2018-05-18 |
| CN108051967B true CN108051967B (en) | 2020-11-13 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711486833.3A Active CN108051967B (en) | 2017-12-29 | 2017-12-29 | Display panel |
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| CN (1) | CN108051967B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108319062B (en) * | 2018-02-01 | 2020-10-30 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101201499A (en) * | 2006-12-12 | 2008-06-18 | 三星电子株式会社 | Liquid crystal display device |
| CN105866989A (en) * | 2016-06-16 | 2016-08-17 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
| CN108319062A (en) * | 2018-02-01 | 2018-07-24 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002162644A (en) * | 2000-11-27 | 2002-06-07 | Hitachi Ltd | Liquid crystal display device |
| KR101014172B1 (en) * | 2004-09-13 | 2011-02-14 | 삼성전자주식회사 | Driving unit and display apparatus having the same |
| CN101093333A (en) * | 2006-06-21 | 2007-12-26 | 三菱电机株式会社 | Display device |
| CN101598866B (en) * | 2009-07-06 | 2012-10-03 | 友达光电股份有限公司 | Display panel |
| KR101656766B1 (en) * | 2010-06-14 | 2016-09-13 | 삼성디스플레이 주식회사 | Display substrate |
| TWI521272B (en) * | 2014-08-29 | 2016-02-11 | 友達光電股份有限公司 | Display panel |
-
2017
- 2017-12-29 CN CN201711486833.3A patent/CN108051967B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101201499A (en) * | 2006-12-12 | 2008-06-18 | 三星电子株式会社 | Liquid crystal display device |
| CN105866989A (en) * | 2016-06-16 | 2016-08-17 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
| CN108319062A (en) * | 2018-02-01 | 2018-07-24 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
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| CN108051967A (en) | 2018-05-18 |
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Address after: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Patentee after: TCL China Star Optoelectronics Technology Co.,Ltd. Address before: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Patentee before: Shenzhen China Star Optoelectronics Technology Co.,Ltd. |
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