CN104202014A - Digital tuning circuit for RC (resistor-capacitor) filter - Google Patents
Digital tuning circuit for RC (resistor-capacitor) filter Download PDFInfo
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- CN104202014A CN104202014A CN201410489061.9A CN201410489061A CN104202014A CN 104202014 A CN104202014 A CN 104202014A CN 201410489061 A CN201410489061 A CN 201410489061A CN 104202014 A CN104202014 A CN 104202014A
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- drain electrode
- nmos
- manages
- source class
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Abstract
The invention discloses a digital tuning circuit for an RC (resistor-capacitor) filter and relates to the technical field of impedance networks. The digital tuning circuit comprises an integrator circuit and a window comparator circuit; the integrator circuit for producing a periodic digital waveform comprises PMOS (P-channel metal oxide semiconductor) transistors M1-M4, an NMOS (N-channel metal oxide semiconductor) transistor M5, NMOS transistors M7 and M8, a capacitor C, a programmable switch resistor array Rref and an error amplifier U1. The window comparator circuit comprises comparators U2 and U3. Compared with the prior art, the digital tuning circuit is simple in structure, easy to implement, low in power consumption and high in tuning precision; especially for low-frequency and multimode filters, chip area is greatly reduced, and cost is greatly reduced accordingly; the digital tuning circuit is widely applicable to on-chip active filters in the fields such as electronics and communication.
Description
Technical field
The present invention relates to impedance network technical field, relate in particular to a kind of RC filter digital tuning circuitry.
Background technology
Select and neighboring trace inhibitory action for meeting channel, filter must have accurately cut-off frequency, and in circuit fabrication process due to the impact of process deviation and ambient temperature etc., in circuit, resistance capacitance and design load deviation are larger, can reach ± 40% frequency range, for be controlled at ± 3% scope, must introduce tuning circuit.Tuning circuit is generally divided into active tuning and passive tuning, because active linearity of tuning degree is poor, generally adopt passive tuning circuit, and passive tuning circuit is divided into resistance tuning and capacitance tuning.In side circuit, although the frequency performance of electric capacity is better than the frequency characteristic of resistance under same precision condition, but for low frequency and multi-mode filter, is ensureing to need larger electric capacity under noise conditions, and then greatly increasing chip area.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of RC filter digital tuning circuitry, described tuning circuit is simple in structure, be easy to realize, power consumption is little, tuning precision is high, especially for low frequency and multi-mode filter, the present invention has greatly reduced chip area, thereby larger reduction cost, can extensive use with active filter in sheet in electronics, the field such as communicate by letter.
For solving the problems of the technologies described above, the technical solution used in the present invention is: a kind of RC filter digital tuning circuitry.It is characterized in that: comprise and produce periodically integrator circuit and the window comparator circuit of digital waveform, described integrator circuit comprises PMOS pipe M
1-M
4, NMOS manages M
5, NMOS manages M
7-M
8, capacitor C, programmable switch electric resistance array R
refand error amplifier U
1, described error amplifier U
1normal phase input end meet band gap voltage V
ref, described error amplifier U
1anti-phase input termination described in electric resistance array R
refinput, error amplifier U
1output termination NMOS pipe M
8grid, electric resistance array R
refoutput head grounding; NMOS manages M
8source class meet error amplifier U
1inverting input, NMOS manages M
8drain electrode meet PMOS pipe M
3drain electrode, PMOS manages M
3grid respectively with self drain electrode and PMOS pipe M
4grid connect, PMOS manages M
3source class meet PMOS pipe M
1drain electrode, PMOS manages M
1grid and the drain electrode of self and PMOS pipe M
2grid connect, PMOS manages M
1-M
2source class connect power supply, PMOS manages M
2drain electrode meet PMOS pipe M
4source class, PMOS manages M
4drain electrode meet NMOS pipe M
5drain electrode, NMOS manages M
5source class connect one end of capacitor C, NMOS manages M
5grid meet the output Vchar of digital circuit, the other end ground connection of capacitor C, NMOS manages M
7source class ground connection, NMOS manages M
7drain electrode meet NMOS pipe M
5source class, NMOS manages M
7grid meet the output Vset of digital circuit, the signal output part V of digital circuit and electric resistance array R
refcontrol end connect;
Described comparator circuit comprises comparator U
2-U
3, the normal phase input end of two comparators meets NMOS pipe M
5source electrode, comparator U
2negative-phase input meet band gap voltage V
h, comparator U
3negative-phase input meet band gap voltage V
l, comparator U
2-U
3output signal send to digital circuit.
Further technical scheme is: described programmable switch electric resistance array R
refcomprise resistance R
1-R
n, resistance R
xand NMOS pipe M
9-M
8+n, resistance R
1-R
nbe connected in series successively, NMOS manages M
9drain electrode and source class respectively with resistance R
1two ends connect, NMOS manages M
10drain electrode and source class respectively with resistance R
2two ends connect, NMOS manages M
11drain electrode and source class respectively with resistance R
3two ends connect, NMOS manages M
12drain electrode and source class respectively with resistance R
4two ends connect, NMOS manages M
13drain electrode and source class respectively with resistance R
5two ends connect, NMOS manages M
14drain electrode and source class respectively with resistance R
6two ends connect, the like, NMOS manages M
8+ndrain electrode and source class respectively with resistance R
ntwo ends connect; Resistance R
2resistance be resistance R
12 times, resistance R
3resistance be resistance R
14 times, resistance R
4resistance be resistance R
18 times, resistance R
5resistance be resistance R
116 times, resistance R
6resistance be resistance R
132 times, the like, resistance R
nresistance be resistance R
12
n-1doubly, described resistance R
1free end be electric resistance array R
refinput, described resistance R
xfree end be electric resistance array R
refoutput, NMOS manages M
9-M
8+nthe grid input control end that is data circuit, n is more than or equal to 1 natural number.
Further technical scheme is: the precision of described capacitor C is identical with the electric capacity in RC filter.
The beneficial effect that adopts technique scheme to produce is: compared with prior art, this circuit structure is simple, be easy to realize, power consumption is little, tuning precision is high, especially for low frequency and multi-mode filter, the present invention has greatly reduced chip area, thereby larger reduction cost, can extensive use with active filter in sheet in electronics, the field such as communicate by letter.
Brief description of the drawings
Below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation.
Fig. 1 is circuit theory diagrams of the present invention;
Fig. 2 is programmable switch electric resistance array R in Fig. 1
refcircuit theory diagrams;
Fig. 3 is the detailed tuning sequential chart of the present invention;
Fig. 4 is the electric resistance array control word of digital circuit output under 125 ° of ff process corner.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only a part of embodiment of the present invention, instead of whole embodiment.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
A lot of details are set forth in the following description so that fully understand the present invention, but the present invention can also adopt other to be different from alternate manner described here and implement, those skilled in the art can do similar popularization without prejudice to intension of the present invention in the situation that, and therefore the present invention is not subject to the restriction of following public specific embodiment.
Invention adopts resistance tuning circuit.Each tuning circuit must have an absolute standard, and in circuit, only has band gap voltage and crystal oscillator frequency to meet, and the crystal oscillator frequency that selection of the present invention is identical with filter RC constant, regulates to realize RC by by-pass cock electric resistance array.
As shown in Figure 1, the invention discloses a kind of RC filter digital tuning circuitry, comprise and produce periodically integrator circuit and the window comparator circuit of digital waveform, described integrator circuit comprises PMOS pipe M
1-M
4, NMOS manages M
5, NMOS manages M
7-M
8, capacitor C, programmable switch electric resistance array R
refand error amplifier U
1, the electric capacity in described capacitor C and filter keeps same precision.
Described error amplifier U
1normal phase input end meet band gap voltage V
ref, described error amplifier U
1anti-phase input termination described in electric resistance array R
refinput, error amplifier U
1output termination NMOS pipe M
8grid, electric resistance array R
refoutput head grounding; NMOS manages M
8source class meet error amplifier U
1inverting input, NMOS manages M
8drain electrode meet PMOS pipe M
3drain electrode, PMOS manages M
3grid respectively with self drain electrode and PMOS pipe M
4grid connect, PMOS manages M
3source class meet PMOS pipe M
1drain electrode, PMOS manages M
1grid and the drain electrode of self and PMOS pipe M
2grid connect, PMOS manages M
1-M
2source class connect power supply, PMOS manages M
2drain electrode meet PMOS pipe M
4source class, PMOS manages M
4drain electrode meet NMOS pipe M
5drain electrode, NMOS manages M
5source class connect one end of capacitor C, NMOS manages M
5grid meet the output Vchar of digital circuit, the other end ground connection of capacitor C, NMOS manages M
7source class ground connection, NMOS manages M
7drain electrode meet NMOS pipe M
5source class, NMOS manages M
7grid meet the output Vset of digital circuit, the signal output part V of digital circuit and electric resistance array R
refcontrol end connect.
Described comparator circuit comprises comparator U
2-U
3, the normal phase input end of two comparators meets NMOS pipe M
5source electrode, comparator U
2negative-phase input meet band gap voltage V
h, comparator U
3negative-phase input meet band gap voltage V
l, comparator U
2-U
3output signal send to digital circuit.
As shown in Figure 2, described programmable switch electric resistance array R
refcomprise resistance R
1-R
n, resistance R
xand NMOS pipe M
9-M
8+n, resistance R
1-R
nbe connected in series successively, NMOS manages M
9drain electrode and source class respectively with resistance R
1two ends connect, NMOS manages M
10drain electrode and source class respectively with resistance R
2two ends connect, NMOS manages M
11drain electrode and source class respectively with resistance R
3two ends connect, NMOS manages M
12drain electrode and source class respectively with resistance R
4two ends connect, NMOS manages M
13drain electrode and source class respectively with resistance R
5two ends connect, NMOS manages M
14drain electrode and source class respectively with resistance R
6two ends connect, the like, NMOS manages M
8+ndrain electrode and source class respectively with resistance R
ntwo ends connect; Resistance R
2resistance be resistance R
12 times, resistance R
3resistance be resistance R
14 times, resistance R
4resistance be resistance R
18 times, resistance R
5resistance be resistance R
116 times, resistance R
6resistance be resistance R
132 times, the like, resistance R
nresistance be resistance R
12
n-1doubly, described resistance R
1free end be electric resistance array R
refinput, described resistance R
xfree end be electric resistance array R
refoutput, NMOS manages M
9-M
8+nthe grid input control end that is data circuit, n is more than or equal to 1 natural number, the value of n need to be determined according to tuning precision.
Capacitance/resistance in RC filter adopts identical process materials type with described capacitance/resistance, and all formed by same elementary cell, concrete capacitance/resistance is that an integral multiple elementary cell is in parallel or in series, in the time of technique generation deviation, the ratio of capacitance/resistance deviation is identical, so described tuning circuit precision can determine the precision of RC constant in RC filter circuit.
Voltage V
ref, V
h, V
lpass be:
V
ref=（V
H +V
L）/2 （1）
(V
h-V
l)/V
ref=required tuning precision (2)
Described digital circuit can be write Verilog HDL program by specific algorithm, and comprehensively obtains physical circuit according to related software, produces periodic waveform signal V by it
char, V
setwith one group of electric resistance array control word V[5:0], control respectively NMOS pipe M
5, M
7and electric resistance array programmable switch electric resistance array R
ref.
In described tuning circuit, to consider imbalance, ghost effect and the factor such as do not mate, in circuit, each pipe sizing must carefully design to obtain optimum precision.For error amplifier, first to ensure gain and stability requirement, owing to mainly containing random imbalance and symmetrical offset influence comparative result, input pipe sizing, reduce overdrive voltage and can reduce random imbalance by increase; Two amplifiers and error amplifier in comparator are selected to same amplifier, can reduce symmetrical offset influence.But comparator input pipe can not too, to avoid the impact of its parasitic capacitance on circuit, thereby in the time that comparator is identical with error amplifier, must compromise be considered input pipe size again.
Described NMOS pipe M
8play voltage at this and turn the function of current, should choose the long and larger breadth length ratio of minimum grid to obtain little impedance, avoid circuit to cause large impact; Described PMOS pipe M
3and M
4for cascade pipe, rise herein and increase output impedance improvement direct current matching effect, should get larger breadth length ratio and grid length to obtain large output impedance; For PMOS pipe M
1and M
2the current mirror forming, for guaranteeing electric current I
1, I
2accurately equate, get same size and choose the long and larger overdrive voltage of larger grid to reduce mismatch.
NMOS manages M
5and M
7in circuit, play on-off action, respectively the V in corresponding diagram 1
char, V
set, the size that switching tube is little can reduce parasitic capacitance and charge injection effect, and so now opening resistor is larger, the consideration of also should compromising.
Described Fig. 2 is programmable switch electric resistance array R
ref, in order to control circuit RC constant, in general, n is larger, and tuning precision is higher, must ensure that tuning precision is greater than 1/2 simultaneously
n-1, n is the binary signal control figure place of digital circuit output herein, for obtaining ± 3% tuning precision, n gets 6; Control switch is nmos switch pipe M
9-M
14.As shown in Figure 2:
Programmable switch electric resistance array R
refmaximum resistance
R
max=R
X +2
0R
1+2
1R
1+2
2R
1+2
3R
1+2
4R
1+2
5R
1 （3）
Programmable switch electric resistance array R
refminimum resistance
R
min= R
X （4）
R
center= （R
max﹒R
min）
1/2 （5）
The resistance and the electric capacity variation respectively ± 15% that cause for covering Yin Wendu and process corner etc., get R herein
max/ R
min=2.In electric resistance array, switching tube breadth length ratio must carefully be chosen simultaneously, and breadth length ratio is crossed conference and introduced larger ghost effect, and larger switch resistance is introduced in too small meeting, thereby all will impact RC parameter.
Specific works mode is: reference voltage V
ref, V
h, V
lproduced by data circuit band-gap reference, connect respectively error amplifier U
1two amplifier U in normal phase input end and comparator
2-U
3negative-phase input, error amplifier U
1negative-phase input connecting resistance array R
refinput, can obtain reference current I
1=V
ref/ R
ref.By its image current, to capacitor C, charging can obtain voltage V
cap, comparator is by comparing V
h, V
land V
cap, Output rusults is sent into the switching tube that produces 6 binary system control words in digital circuit and turn back to electric resistance array.Work as V
capbe greater than V
hor be less than V
ltime, by the adjusting to electric resistance array, increase respectively or reduce the control word of electric resistance array, finally make V
capin V
h, V
lbetween, its process can be described by formula (6)-(9):
V
cap = △Q/C = I
2△t/C = I
1△t/C = V
ref△t/R
refC （6）
Can be obtained by formula (6):
V
cap/ V
ref = △t/R
refC （7）
After tuning, circuit finally has:
V
cap/ V
ref = 1 （8）
Can be obtained by formula (7), (8):
△t
= R
refC （9）
Wherein, △ t is the charging interval, is the multiple of clock cycle, electric resistance array R
refidentical with the electric resistance array in filter; In capacitor C and filter kernel circuit, electric capacity is all got minimum capacity, thereby guarantees that its relative accuracy is identical.Through after tuning, tuning circuit time constant R
refc is determined by △ t, and R
refc precision is identical with time constant precision in filter kernel circuit.Because △ t is determined by crystal oscillator frequency, filter cutoff frequency is suitable with crystal oscillator frequency precision in theory.The actual tuning precision of this circuit depends on (V
h-V
l)/V
refratio, by the size of reference voltage described in Rational choice, may ultimately reach be less than ± 3% precision.
As can be seen from Figure 3, more once need 10 clock cycle, owing to need to comparing 2 at most
664 times, in the time getting crystal oscillator frequency 19.2M, maximum tuning period is 33.4 μ s.
Figure 4 shows that the tuning control word oscillogram that finally inputs to tuning resistor array under 125 ° of ff process corner of tuning circuit of the present invention, wherein V0, V1, V2, V3, V4, the V5 corresponding switching tube of corresponding diagram 2 switch resistance array respectively; Tuning control word in Fig. 4 is 010011,0,1 disconnection and closure of corresponding respective switch pipe respectively.
Compared with prior art, this circuit structure is simple, be easy to realize, power consumption is little, tuning precision is high, especially for low frequency and multi-mode filter, the present invention has greatly reduced chip area, thereby larger reduction cost, can extensive use with active filter in sheet in electronics, the field such as communicate by letter.
Claims (3)
1. a RC filter digital tuning circuitry, is characterized in that: comprise and produce periodically integrator circuit and the window comparator circuit of digital waveform, described integrator circuit comprises PMOS pipe M
1-M
4, NMOS manages M
5, NMOS manages M
7-M
8, capacitor C, programmable switch electric resistance array R
refand error amplifier U
1, described error amplifier U
1normal phase input end meet band gap voltage V
ref, described error amplifier U
1anti-phase input termination described in electric resistance array R
refinput, error amplifier U
1output termination NMOS pipe M
8grid, electric resistance array R
refoutput head grounding; NMOS manages M
8source class meet error amplifier U
1inverting input, NMOS manages M
8drain electrode meet PMOS pipe M
3drain electrode, PMOS manages M
3grid respectively with self drain electrode and PMOS pipe M
4grid connect, PMOS manages M
3source class meet PMOS pipe M
1drain electrode, PMOS manages M
1grid and the drain electrode of self and PMOS pipe M
2grid connect, PMOS manages M
1-M
2source class connect power supply, PMOS manages M
2drain electrode meet PMOS pipe M
4source class, PMOS manages M
4drain electrode meet NMOS pipe M
5drain electrode, NMOS manages M
5source class connect one end of capacitor C, NMOS manages M
5grid meet the output Vchar of digital circuit, the other end ground connection of capacitor C, NMOS manages M
7source class ground connection, NMOS manages M
7drain electrode meet NMOS pipe M
5source class, NMOS manages M
7grid meet the output Vset of digital circuit, the signal output part V of digital circuit and electric resistance array R
refcontrol end connect;
Described comparator circuit comprises comparator U
2-U
3, the normal phase input end of two comparators meets NMOS pipe M
5source electrode, comparator U
2negative-phase input meet band gap voltage V
h, comparator U
3negative-phase input meet band gap voltage V
l, comparator U
2-U
3output signal send to digital circuit.
2. RC filter digital tuning circuitry according to claim 1, is characterized in that: described programmable switch electric resistance array R
refcomprise resistance R
1-R
n, resistance R
xand NMOS pipe M
9-M
8+n, resistance R
1-R
nbe connected in series successively, NMOS manages M
9drain electrode and source class respectively with resistance R
1two ends connect, NMOS manages M
10drain electrode and source class respectively with resistance R
2two ends connect, NMOS manages M
11drain electrode and source class respectively with resistance R
3two ends connect, NMOS manages M
12drain electrode and source class respectively with resistance R
4two ends connect, NMOS manages M
13drain electrode and source class respectively with resistance R
5two ends connect, NMOS manages M
14drain electrode and source class respectively with resistance R
6two ends connect, the like, NMOS manages M
8+ndrain electrode and source class respectively with resistance R
ntwo ends connect; Resistance R
2resistance be resistance R
12 times, resistance R
3resistance be resistance R
14 times, resistance R
4resistance be resistance R
18 times, resistance R
5resistance be resistance R
116 times, resistance R
6resistance be resistance R
132 times, the like, resistance R
nresistance be resistance R
12
n-1doubly, described resistance R
1free end be electric resistance array R
refinput, described resistance R
xfree end be electric resistance array R
refoutput, NMOS manages M
9-M
8+nthe grid input control end that is data circuit, n is more than or equal to 1 natural number.
3. RC filter digital tuning circuitry according to claim 1, is characterized in that: the precision of described capacitor C is identical with the electric capacity in RC filter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410489061.9A CN104202014B (en) | 2014-09-23 | 2014-09-23 | Digital tuning circuit for RC (resistor-capacitor) filter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410489061.9A CN104202014B (en) | 2014-09-23 | 2014-09-23 | Digital tuning circuit for RC (resistor-capacitor) filter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104202014A true CN104202014A (en) | 2014-12-10 |
| CN104202014B CN104202014B (en) | 2017-02-08 |
Family
ID=52087256
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410489061.9A Active CN104202014B (en) | 2014-09-23 | 2014-09-23 | Digital tuning circuit for RC (resistor-capacitor) filter |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104202014B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108111146A (en) * | 2018-01-30 | 2018-06-01 | 上海航天芯锐电子科技有限公司 | The auto-calibration circuits of the time constant of active filter |
| CN108259021A (en) * | 2018-01-10 | 2018-07-06 | 广西师范大学 | A kind of CMOS broadbands distribution variable band-pass filter |
| CN111884608A (en) * | 2020-08-03 | 2020-11-03 | 广芯电子技术（上海）股份有限公司 | Class D audio power amplifier and sampling triangular wave generating and filtering circuit used therein |
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| US20080136473A1 (en) * | 2006-11-09 | 2008-06-12 | Jan Bollenbeck | Filter circuit arrangement |
| CN204145433U (en) * | 2014-09-23 | 2015-02-04 | 中国电子科技集团公司第十三研究所 | RC filter digital tuning circuitry |
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| CN1983808A (en) * | 2005-12-12 | 2007-06-20 | 深圳艾科创新微电子有限公司 | Bandwith-adjusting low-channel filter |
| US20080136473A1 (en) * | 2006-11-09 | 2008-06-12 | Jan Bollenbeck | Filter circuit arrangement |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108259021A (en) * | 2018-01-10 | 2018-07-06 | 广西师范大学 | A kind of CMOS broadbands distribution variable band-pass filter |
| CN108111146A (en) * | 2018-01-30 | 2018-06-01 | 上海航天芯锐电子科技有限公司 | The auto-calibration circuits of the time constant of active filter |
| CN108111146B (en) * | 2018-01-30 | 2023-09-08 | 上海航天芯锐电子科技有限公司 | Automatic calibration circuit for time constant of active filter |
| CN111884608A (en) * | 2020-08-03 | 2020-11-03 | 广芯电子技术（上海）股份有限公司 | Class D audio power amplifier and sampling triangular wave generating and filtering circuit used therein |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104202014B (en) | 2017-02-08 |
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