CN104201885A - Photovoltaic system optimizer and power switching circuit thereof - Google Patents
Photovoltaic system optimizer and power switching circuit thereof Download PDFInfo
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- CN104201885A CN104201885A CN201410468779.XA CN201410468779A CN104201885A CN 104201885 A CN104201885 A CN 104201885A CN 201410468779 A CN201410468779 A CN 201410468779A CN 104201885 A CN104201885 A CN 104201885A
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/56—Power conversion systems, e.g. maximum power point trackers
Abstract
The invention provides a photovoltaic system optimizer and power switching circuit thereof. The input side of the circuit is divided into a path A and a path B which are respectively connected with a first photovoltaic component and a second photovoltaic component. The path A comprises a first input capacitor, a first NMOS transistor and a first diode, wherein the first input capacitor is parallelly connected between the first positive and negative input ends, the first negative input end is connected with a negative output end and grounded, the drain of the first NMOS transistor is connected with the first positive input end, the grid of the first NMOS transistor receives a first drive signal, the anode of the first diode is connected with the first negative input end, and the cathode of the second diode is connected with the source of the first NMOS transistor. The path B comprises a second input capacitor, a second NMOS transistor and a second diode, wherein the second input capacitor is parallelly connected between second positive and negative input ends, the second positive input end is connected with a positive output end, the source of the second NMOS transistor is connected with the second negative input end, the grid of the NMOS transistor receives a second drive signal, the anode of the second diode is connected with the drain of the second NMOS transistor, and the cathode of the second diode is connected with the second positive input end. The power switching circuit further comprises an inductor which is respectively connected with the source of the first NMOS transistor and the drain of the second NMOS transistor and an output capacitor parallelly connected between the positive and negative output ends.
Description
Technical field
The present invention relates to the distributed photovoltaic technical field of generating electricity by way of merging two or more grid systems, specifically, the present invention relates to a kind of two assembly optimizers and power conversion circuit thereof of distributed photovoltaic system.
Background technology
Due to recyclability and the spatter property of solar energy, parallel network power generation technology is able to fast development.Optimizer structure is a kind of efficient grid-connected scheme wherein, and each photovoltaic module connects the optimizer of a lifting press, will after the output series connection of optimizer, by centralized inverter, energy be passed to electrical network.The MPPT maximum power point tracking that optimizer structure is each photovoltaic module by the MPPT maximum power point tracking of photovoltaic array (MPPT) decoupling zero, when solution photovoltaic module does not mate and partly covers problem, also can monitor the performance of photovoltaic module, facilitate the O&M of system.
Because optimizer is the parts of the extra increase of photovoltaic system, thus very high for cost requirement, wish to reduce costs as far as possible.One of them important way adopts two assembly optimizers exactly, and namely an optimizer connects two photovoltaic modulies.Current way is that series connection photovoltaic module accesses optimizer later, as shown in Figure 1.Fig. 1 is the schematic diagram of power conversion circuit of two assembly optimizers of a kind of photovoltaic system of the prior art.After the electric current and voltage sampling of input and output, issue controller, controller produces control signal, issues driving chip, drives chip controls switch element, realizes electric power conversion.
But such way has several problems:
1. there is no independently MPPT, such as a photovoltaic module lost efficacy, there is no electric current, the photovoltaic module of these two series connection all can not have electric current, cannot work.
2. can not monitor the performance of single photovoltaic module.
3. because input voltage doubles, the electric pressure of electric capacity, switch raises, and causes the difficulty of Component selection.
4. due to the doubling of power, the capacitance grades such as inductance, electric capacity raise, and cause the difficulty of Component selection.
5. after optimizer quits work, the output voltage of two series connection photovoltaic modulies may, higher than 80V, can not meet electric power decree and require the output of photovoltaic module lower than 80V.
Another kind of way is to adopt completely independently change-over circuit of two-way, directly output series connection mutually, as shown in Figure 2.Fig. 2 is the schematic diagram of power conversion circuit of two assembly optimizers of another kind of photovoltaic system of the prior art.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of two assembly optimizers and power conversion circuit thereof of distributed photovoltaic system, can realize low-cost and high performance optimizing structure.
For solving the problems of the technologies described above, the invention provides a kind of power conversion circuit of optimizer of photovoltaic system, the input side of described power conversion circuit is divided into A road and two, B road branch road, is connected respectively with the first photovoltaic module with the second photovoltaic module;
Described A road comprises:
The first input capacitance, is parallel between the first positive input terminal and the first negative input end, and described the first negative input end is connected with the negative output terminal of described power conversion circuit and common ground;
The first switching tube, its drain electrode end is connected with described the first positive input terminal, and its gate terminal and first drives signal to be connected; And
The first diode, its positive terminal is connected with described the first negative input end, and its negative pole end is connected with the source terminal of described the first switching tube;
Described B road comprises:
The second input capacitance, is parallel between the second positive input terminal and the second negative input end, and described the second positive input terminal is connected with the positive output end of described power conversion circuit;
Second switch pipe, its source terminal is connected with described the second negative input end, and its gate terminal is connected with two driving signal; And
The second diode, its positive terminal is connected with the drain electrode end of described second switch pipe, and its negative pole end is connected with described the second positive input terminal;
Described power conversion circuit also comprises:
Inductance, its one end is connected with the source terminal of described the first switching tube, and its other end is connected with the drain electrode end of described second switch pipe; And
Output capacitance, is parallel between described positive output end and described negative output terminal.
Alternatively, described the first switching tube and/or described second switch pipe are NMOS pipe.
Alternatively, described the first driving signal and described two driving signal are interlaced.
Alternatively, described power conversion circuit is Buck conversion circuit.
For solving the problems of the technologies described above, the present invention also provides a kind of optimizer of photovoltaic system, comprises power conversion circuit, and the input side of described power conversion circuit is divided into A road and two, B road branch road, is connected respectively with the first photovoltaic module with the second photovoltaic module;
Described A road comprises:
The first input capacitance, is parallel between the first positive input terminal and the first negative input end, and described the first negative input end is connected with the negative output terminal of described power conversion circuit and common ground;
The first switching tube, its drain electrode end is connected with described the first positive input terminal, and its gate terminal and first drives signal to be connected; And
The first diode, its positive terminal is connected with described the first negative input end, and its negative pole end is connected with the source terminal of described the first switching tube;
Described B road comprises:
The second input capacitance, is parallel between the second positive input terminal and the second negative input end, and described the second positive input terminal is connected with the positive output end of described power conversion circuit;
Second switch pipe, its source terminal is connected with described the second negative input end, and its gate terminal is connected with two driving signal; And
The second diode, its positive terminal is connected with the drain electrode end of described second switch pipe, and its negative pole end is connected with described the second positive input terminal;
Described power conversion circuit also comprises:
Inductance, its one end is connected with the source terminal of described the first switching tube, and its other end is connected with the drain electrode end of described second switch pipe; And
Output capacitance, is parallel between described positive output end and described negative output terminal.
Alternatively, described the first switching tube and/or described second switch pipe are NMOS pipe.
Alternatively, described the first driving signal and described two driving signal are interlaced.
Alternatively, described power conversion circuit is Buck conversion circuit.
Compared with prior art, the present invention has the following advantages:
The two assembly optimizers and the power conversion circuit thereof that the present invention proposes a kind of distributed photovoltaic system, can connect two photovoltaic modulies, and keep MPPT maximum power point tracking (MPPT) function, detection and the protection of each photovoltaic module to turn-off simultaneously.By adopting shared inductance and electric capacity, to reduce costs.
In addition, the present invention preferably adopts staggered driving signal, has reduced the voltage and current ripple on inductance, has reduced the parameter request of inductance, has also reduced power consumption, has improved the whole conversion efficiency of optimizer.
Accompanying drawing explanation
The above and other features of the present invention, character and advantage become more obvious by the description by below in conjunction with drawings and Examples, wherein:
Fig. 1 is the schematic diagram of power conversion circuit of two assembly optimizers of a kind of photovoltaic system of the prior art;
Fig. 2 is the schematic diagram of power conversion circuit of two assembly optimizers of another kind of photovoltaic system of the prior art;
Fig. 3 is the schematic diagram of power conversion circuit of two assembly optimizers of the photovoltaic system of one embodiment of the invention;
Fig. 4 a be one embodiment of the invention photovoltaic system two assembly optimizers power conversion circuit first to drive the duty ratio of signal and two driving signal be all the simulation waveform of 0.5 acquisition, first to drive signal and two driving signal be synchronous;
Fig. 4 b be another embodiment of the present invention photovoltaic system two assembly optimizers power conversion circuit first to drive the duty ratio of signal and two driving signal be all the simulation waveform of 0.5 acquisition, first drives signal and two driving signal for staggered;
Fig. 5 a be one embodiment of the invention photovoltaic system two assembly optimizers power conversion circuit first to drive the duty ratio of signal and two driving signal be all the simulation waveform of 0.3 acquisition, first to drive signal and two driving signal be synchronous;
Fig. 5 b be another embodiment of the present invention photovoltaic system two assembly optimizers power conversion circuit first to drive the duty ratio of signal and two driving signal be all the simulation waveform of 0.3 acquisition, first drives signal and two driving signal for staggered;
Fig. 6 a be one embodiment of the invention photovoltaic system two assembly optimizers power conversion circuit first to drive the duty ratio of signal and two driving signal be all the simulation waveform of 0.7 acquisition, first to drive signal and two driving signal be synchronous;
Fig. 6 b be another embodiment of the present invention photovoltaic system two assembly optimizers power conversion circuit first to drive the duty ratio of signal and two driving signal be all the simulation waveform of 0.7 acquisition, first drives signal and two driving signal for staggered;
Fig. 7 be Fig. 4 a to Fig. 6 b illustrated embodiment photovoltaic system two assembly optimizers power conversion circuit first to drive the duty ratio of signal and two driving signal be all respectively the summary list of 0.3,0.5 and 0.7 simulation result obtaining.
Embodiment
Below in conjunction with specific embodiment and Figure of description, the invention will be further described; set forth in the following description more details so that fully understand the present invention; but the present invention obviously can implement with the multiple alternate manner that is different from this description; those skilled in the art can do similar popularization, deduction according to practical situations without prejudice to intension of the present invention in the situation that, therefore should be with content constraints protection scope of the present invention of this specific embodiment.
The embodiment of the power conversion circuit of the optimizer of photovoltaic system
Fig. 3 is the schematic diagram of power conversion circuit of two assembly optimizers of the photovoltaic system of one embodiment of the invention.It should be noted that these and follow-up other accompanying drawing are all only as example, it is not to draw according to the condition of equal proportion, and should not using that this is construed as limiting as the protection range to actual requirement of the present invention.As shown in Figure 3, the output of two photovoltaic module A and B is the input of the power conversion circuit 300 of separate connection optimizer separately, and these two inputs are two branch roads of corresponding power conversion circuits 300 respectively.The input side of this power conversion circuit 300 is divided into A road and two, B road branch road (the latter half is A road, and the first half is B road), is connected respectively with the first photovoltaic module A with the second photovoltaic module B.
Wherein, this A road comprises: the first input capacitance Cin1, the first switching tube Q1 and the first diode D1.The first input capacitance Cin1 is parallel between the first positive input terminal PV1+ and the first negative input end PV1-, and this first negative input end PV1-is connected with the negative output terminal OUT-of this power conversion circuit 300 and common ground.The first switching tube Q1 can be NMOS pipe, and its drain electrode end is connected with this first positive input terminal PV1+, and its gate terminal and first drives signal Drive1 to be connected.The positive terminal of the first diode D1 is connected with this first negative input end PV1-, and its negative pole end is connected with the source terminal of this first switching tube Q1.
This B road comprises: the second input capacitance Cin2, second switch pipe Q2 and the second diode D2.The second input capacitance Cin2 is parallel between the second positive input terminal PV2+ and the second negative input end PV2-, and this second positive input terminal PV2+ is connected with the positive output end OUT+ of this power conversion circuit 300.Second switch pipe Q2 can manage for NMOS, and its source terminal is connected with this second negative input end PV2-, and its gate terminal is connected with two driving signal Drive2.The positive terminal of the second diode D2 is connected with the drain electrode end of this second switch pipe Q2, and its negative pole end is connected with this second positive input terminal PV2+.In addition, this power conversion circuit 300 also comprises: inductance L and output capacitance Cout.One end of inductance L is connected with the source terminal of this first switching tube Q1, and its other end is connected with the drain electrode end of this second switch pipe Q2.Output capacitance Cout is parallel between this positive output end OUT+ and this negative output terminal OUT-.
As can be seen here, the first positive input terminal PV1+ on A road and the second negative input end PV2-on B road are only connected by 1 inductance L.Compare with Fig. 2 of prior art, in the present embodiment, only have an inductance L, rather than two L1 and L2.In addition, output capacitance also only has 1 output capacitance Cout, rather than two Cout1 and Cout2.
In the present embodiment, be respectively used to drive this first driving signal Drive1 and this two driving signal Drive2 of this first switching tube Q1 and this second switch pipe Q2 interlaced, rather than synchronous.
The present invention has been the first driving signal Drive1 and two driving signal Drive2 is synchronous and is staggered emulation, the output voltage V out and the voltage VL in output current Iout and inductance L and the electric current I L that have obtained optimizer, Fig. 4 a to Fig. 6 b has shown respectively the result of simulation waveform.
Wherein, Fig. 4 a is that the duty ratio of the first driving signal and two driving signal is all 0.5 simulation waveform, and both are synchronous; Fig. 4 b is that the duty ratio of the first driving signal and two driving signal is all 0.5 simulation waveform, and both are for staggered.Fig. 5 a is that the duty ratio of the first driving signal and two driving signal is all 0.3 simulation waveform, and both are synchronous; Fig. 5 b is that the duty ratio of the first driving signal and two driving signal is all 0.3 simulation waveform, and both are for staggered.Fig. 6 a is that the duty ratio of the first driving signal and two driving signal is all 0.7 simulation waveform, and both are synchronous; Fig. 6 b is that the duty ratio of the first driving signal and two driving signal is all 0.7 simulation waveform, and both are for staggered.
Fig. 7 be Fig. 4 a to Fig. 6 b illustrated embodiment photovoltaic system two assembly optimizers power conversion circuit first to drive the duty ratio of signal and two driving signal be all respectively the summary list of 0.3,0.5 and 0.7 simulation result obtaining.In Fig. 7, summed up each parameter in these simulation result waveforms.Voltage VL in inductance L and electric current I L are adopted to peak-to-peak value, so that relatively.Clearly, adopt staggered signal and the synchronizing signal of driving can obtain almost identical output voltage and output current, but the voltage VL of inductance L and electric current I L difference are very large.For duty ratio, be 0.3,0.5 and 0.7 these three kinds of situations, the peak-to-peak value of the staggered voltage and current driving is all significantly smaller than synchronously driven situation.The designing requirement of inductance L just reduces greatly like this, has namely reduced cost.Power consumption in inductance L also reduces greatly simultaneously, has improved the whole conversion efficiency of optimizer.
In the present invention, it is example that this power conversion circuit 300 in Fig. 3 be take Buck conversion circuit (BUCK circuit), but also can use other circuit that possess similar functions.
The embodiment of the optimizer of photovoltaic system
For simplicity, the present embodiment is continued to use element numbers and the partial content of previous embodiment, wherein adopts identical label to represent identical or approximate element.
This optimizer of photovoltaic system has comprised power conversion circuit.Fig. 3 is the schematic diagram of power conversion circuit of two assembly optimizers of the photovoltaic system of one embodiment of the invention.As shown in Figure 3, the output of two photovoltaic module A and B is the input of the power conversion circuit 300 of separate connection optimizer separately, and these two inputs are two branch roads of corresponding power conversion circuits 300 respectively.The input side of this power conversion circuit 300 is divided into A road and two, B road branch road (the latter half is A road, and the first half is B road), is connected respectively with the first photovoltaic module A with the second photovoltaic module B.
Wherein, this A road comprises: the first input capacitance Cin1, the first switching tube Q1 and the first diode D1.The first input capacitance Cin1 is parallel between the first positive input terminal PV1+ and the first negative input end PV1-, and this first negative input end PV1-is connected with the negative output terminal OUT-of this power conversion circuit 300 and common ground.The first switching tube Q1 can be NMOS pipe, and its drain electrode end is connected with this first positive input terminal PV1+, and its gate terminal and first drives signal Drive1 to be connected.The positive terminal of the first diode D1 is connected with this first negative input end PV1-, and its negative pole end is connected with the source terminal of this first switching tube Q1.
This B road comprises: the second input capacitance Cin2, second switch pipe Q2 and the second diode D2.The second input capacitance Cin2 is parallel between the second positive input terminal PV2+ and the second negative input end PV2-, and this second positive input terminal PV2+ is connected with the positive output end OUT+ of this power conversion circuit 300.Second switch pipe Q2 can manage for NMOS, and its source terminal is connected with this second negative input end PV2-, and its gate terminal is connected with two driving signal Drive2.The positive terminal of the second diode D2 is connected with the drain electrode end of this second switch pipe Q2, and its negative pole end is connected with this second positive input terminal PV2+.In addition, this power conversion circuit 300 also comprises: inductance L and output capacitance Cout.One end of inductance L is connected with the source terminal of this first switching tube Q1, and its other end is connected with the drain electrode end of this second switch pipe Q2.Output capacitance Cout is parallel between this positive output end OUT+ and this negative output terminal OUT-.
As can be seen here, the first positive input terminal PV1+ on A road and the second negative input end PV2-on B road are only connected by 1 inductance L.Compare with Fig. 2 of prior art, in the present embodiment, only have an inductance L, rather than two L1 and L2.In addition, output capacitance also only has 1 output capacitance Cout, rather than two Cout1 and Cout2.
In the present embodiment, be respectively used to drive this first driving signal Drive1 and this two driving signal Drive2 of this first switching tube Q1 and this second switch pipe Q2 interlaced, rather than synchronous.
The present invention has been the first driving signal Drive1 and two driving signal Drive2 is synchronous and is staggered emulation, the output voltage V out and the voltage VL in output current Iout and inductance L and the electric current I L that have obtained optimizer, Fig. 4 a to Fig. 6 b has shown respectively the result of simulation waveform.
Wherein, Fig. 4 a is that the duty ratio of the first driving signal and two driving signal is all 0.5 simulation waveform, and both are synchronous; Fig. 4 b is that the duty ratio of the first driving signal and two driving signal is all 0.5 simulation waveform, and both are for staggered.Fig. 5 a is that the duty ratio of the first driving signal and two driving signal is all 0.3 simulation waveform, and both are synchronous; Fig. 5 b is that the duty ratio of the first driving signal and two driving signal is all 0.3 simulation waveform, and both are for staggered.Fig. 6 a is that the duty ratio of the first driving signal and two driving signal is all 0.7 simulation waveform, and both are synchronous; Fig. 6 b is that the duty ratio of the first driving signal and two driving signal is all 0.7 simulation waveform, and both are for staggered.
Fig. 7 be Fig. 4 a to Fig. 6 b illustrated embodiment photovoltaic system two assembly optimizers power conversion circuit first to drive the duty ratio of signal and two driving signal be all respectively the summary list of 0.3,0.5 and 0.7 simulation result obtaining.In Fig. 7, summed up each parameter in these simulation result waveforms.Voltage VL in inductance L and electric current I L are adopted to peak-to-peak value, so that relatively.Clearly, adopt staggered signal and the synchronizing signal of driving can obtain almost identical output voltage and output current, but the voltage VL of inductance L and electric current I L difference are very large.For duty ratio, be 0.3,0.5 and 0.7 these three kinds of situations, the peak-to-peak value of the staggered voltage and current driving is all significantly smaller than synchronously driven situation.The designing requirement of inductance L just reduces greatly like this, has namely reduced cost.Power consumption in inductance L also reduces greatly simultaneously, has improved the whole conversion efficiency of optimizer.
In the present invention, it is example that this power conversion circuit 300 in Fig. 3 be take Buck conversion circuit (BUCK circuit), but also can use other circuit that possess similar functions.
The two assembly optimizers and the power conversion circuit thereof that the present invention proposes a kind of distributed photovoltaic system, can connect two photovoltaic modulies, and keep MPPT maximum power point tracking (MPPT) function, detection and the protection of each photovoltaic module to turn-off simultaneously.By adopting shared inductance and electric capacity, to reduce costs.
In addition, the present invention preferably adopts staggered driving signal, has reduced the voltage and current ripple on inductance, has reduced the parameter request of inductance, has also reduced power consumption, has improved the whole conversion efficiency of optimizer.
Although the present invention with preferred embodiment openly as above, it is not for limiting the present invention, and any those skilled in the art without departing from the spirit and scope of the present invention, can make possible change and modification.Therefore, every content that does not depart from technical solution of the present invention, any modification, equivalent variations and the modification above embodiment done according to technical spirit of the present invention, within all falling into the protection range that the claims in the present invention define.
Claims (8)
1. the power conversion circuit of the optimizer of a photovoltaic system (300), the input side of described power conversion circuit (300) is divided into A road and two, B road branch road, is connected respectively with the first photovoltaic module (A) with the second photovoltaic module (B);
Described A road comprises:
The first input capacitance (Cin1), be parallel between the first positive input terminal (PV1+) and the first negative input end (PV1-), described the first negative input end (PV1-) is connected with the negative output terminal (OUT-) of described power conversion circuit (300) and common ground;
The first switching tube (Q1), its drain electrode end is connected with described the first positive input terminal (PV1+), and its gate terminal and first drives signal (Drive1) to be connected; And
The first diode (D1), its positive terminal is connected with described the first negative input end (PV1-), and its negative pole end is connected with the source terminal of described the first switching tube (Q1);
Described B road comprises:
The second input capacitance (Cin2), be parallel between the second positive input terminal (PV2+) and the second negative input end (PV2-), described the second positive input terminal (PV2+) is connected with the positive output end (OUT+) of described power conversion circuit (300);
Second switch pipe (Q2), its source terminal is connected with described the second negative input end (PV2-), and its gate terminal is connected with two driving signal (Drive2); And
The second diode (D2), its positive terminal is connected with the drain electrode end of described second switch pipe (Q2), and its negative pole end is connected with described the second positive input terminal (PV2+);
Described power conversion circuit (300) also comprises:
Inductance (L), its one end is connected with the source terminal of described the first switching tube (Q1), and its other end is connected with the drain electrode end of described second switch pipe (Q2); And
Output capacitance (Cout), is parallel between described positive output end (OUT+) and described negative output terminal (OUT-).
2. the power conversion circuit of optimizer according to claim 1 (300), is characterized in that, described the first switching tube (Q1) and/or described second switch pipe (Q2) are NMOS pipe.
3. the power conversion circuit of optimizer according to claim 2 (300), is characterized in that, described the first driving signal (Drive1) and described two driving signal (Drive2) are interlaced.
4. the power conversion circuit of optimizer according to claim 3 (300), is characterized in that, described power conversion circuit (300) is Buck conversion circuit.
5. the optimizer of a photovoltaic system, comprise power conversion circuit (300), the input side of described power conversion circuit (300) is divided into A road and two, B road branch road, is connected respectively with the first photovoltaic module (A) with the second photovoltaic module (B);
Described A road comprises:
The first input capacitance (Cin1), be parallel between the first positive input terminal (PV1+) and the first negative input end (PV1-), described the first negative input end (PV1-) is connected with the negative output terminal (OUT-) of described power conversion circuit (300) and common ground;
The first switching tube (Q1), its drain electrode end is connected with described the first positive input terminal (PV1+), and its gate terminal and first drives signal (Drive1) to be connected; And
The first diode (D1), its positive terminal is connected with described the first negative input end (PV1-), and its negative pole end is connected with the source terminal of described the first switching tube (Q1);
Described B road comprises:
The second input capacitance (Cin2), be parallel between the second positive input terminal (PV2+) and the second negative input end (PV2-), described the second positive input terminal (PV2+) is connected with the positive output end (OUT+) of described power conversion circuit (300);
Second switch pipe (Q2), its source terminal is connected with described the second negative input end (PV2-), and its gate terminal is connected with two driving signal (Drive2); And
The second diode (D2), its positive terminal is connected with the drain electrode end of described second switch pipe (Q2), and its negative pole end is connected with described the second positive input terminal (PV2+);
Described power conversion circuit (300) also comprises:
Inductance (L), its one end is connected with the source terminal of described the first switching tube (Q1), and its other end is connected with the drain electrode end of described second switch pipe (Q2); And
Output capacitance (Cout), is parallel between described positive output end (OUT+) and described negative output terminal (OUT-).
6. the optimizer of photovoltaic system according to claim 5, is characterized in that, described the first switching tube (Q1) and/or described second switch pipe (Q2) are NMOS pipe.
7. the optimizer of photovoltaic system according to claim 6, is characterized in that, described the first driving signal (Drive1) and described two driving signal (Drive2) are interlaced.
8. the optimizer of photovoltaic system according to claim 7, is characterized in that, described power conversion circuit (300) is Buck conversion circuit.
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| CN105262138A (en) * | 2015-11-26 | 2016-01-20 | 浙江昱能科技有限公司 | Photovoltaic module optimizer |
| CN105978386A (en) * | 2015-11-26 | 2016-09-28 | 浙江昱能科技有限公司 | Direct current and alternating current power conversion device and photovoltaic power generation system |
| CN107706941A (en) * | 2017-10-19 | 2018-02-16 | 江苏固德威电源科技股份有限公司 | Solar energy optimizes system |
| CN110915117A (en) * | 2017-04-17 | 2020-03-24 | 华为技术有限公司 | Multi-buck single-boost optimizer |
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