CN104170267B9 - CMOS-based TX/RX switch - Google Patents
CMOS-based TX/RX switch Download PDFInfo
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- CN104170267B9 CN104170267B9 CN201380004662.XA CN201380004662A CN104170267B9 CN 104170267 B9 CN104170267 B9 CN 104170267B9 CN 201380004662 A CN201380004662 A CN 201380004662A CN 104170267 B9 CN104170267 B9 CN 104170267B9
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0211—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/645—Inductive arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0261—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6605—High-frequency electrical connections
- H01L2223/6611—Wire connections
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6661—High-frequency adaptations for passive devices
- H01L2223/6672—High-frequency adaptations for passive devices for integrated passive components, e.g. semiconductor device with passive components only
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
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- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
A novel and useful Radio Frequency (RF) Front End Module (FEM) circuit is provided that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11WLAN, 3G and 4G cellular standards, bluetooth, ZigBee, etc. The configuration of the FEM circuit allows the use of common, relatively low cost semiconductor fabrication techniques, such as standard CMOS processes. The FEM circuit includes a power amplifier including one or more sub-amplifiers having high and low power circuits and whose outputs are combined to produce an overall desired power gain. An integrated multi-tap transformer with primary and secondary windings arranged in a novel configuration provides efficient power combining and transfers the power generated by the sub-amplifiers to the antenna.
Description
The reference of priority application
This application claims following priority：The sequence number No.61/704,510 of the submission on the 23rd of September in 2012,
The U. S. application of entitled " An Integrated Transformer (integrated transformer) ", in September, 2012
Sequence number No.61/705,150, entitled " the A Method and System for Noise for submitting to for 25th
Reduction in Wireless Communication (for the method and system of noise reduction in radio communication) "
U. S. application, the sequence number No.61/720 that on October 30th, 2012 submits to, 001, entitled " System and
Method for Radio Frequency Signal Amplification (radiofrequency signal amplify system and
Method) " U. S. application, the sequence number No.61/726 that on November 15th, 2012 submits to, 699, entitled " DC
DC Converter with Fast Output Voltage Transitions (are changed with fast output voltage
DC-DC transformers) " U. S. application, on November 15th, 2012 submit to sequence number No.61/726,717,
Entitled " High-Efficiency Envelop Tracking Method and System Utilizing
DC-DC Converter With Fast Output Voltage Transitions are (using with quick defeated
Go out the efficient envelope tracking and system of the DC-DC transformers of voltage conversion) " U. S. application, 2012
Serial No. No.61/727,120 of on November 16, in submission, entitled " A Method and Device for
Self Aligned PA and LNA VSWR Out/In Improvement,Dynamically
Adjust to Antenna (are improved for autoregistration PA and LNA VSWR input/outputs, dynamic is adjusted
The method and apparatus of antenna) " U. S. application, on November 16th, 2012 submit to sequence number No.
61/727,121st, entitled " A Method and Device for Self Aligned Linearity Driven
The U. S. application of LNA Improvement (the improved method and apparatus of autoregistration Linear Driving LNA) ",
Its all the elements is hereby incorporated by reference.
Technical field
The present invention relates to radio frequency (RF) circuit, more particularly, to high linearity and high efficiency power
RF front-end modules (FEM) circuit of amplifier.
Background technology
At present, wireless communication system is be related to from any to find in many scenes of the information transfer of another point should
With, and there is the extensive form of the specific needs for being suitable to meet each scene.These systems are included for long distance
From the cell phone and two-way radio of voice communication, and the short-range data network for computer system etc.
Deng.In general, radio communication be related to be modulated with represent data radio frequency (RF) carrier signal and
Meet modulation, transmission, reception and the demodulation of the signal of one group of standard.For radio data network, exemplary mark
It is accurate to include WLAN (IEEE802.11), bluetooth (IEEE802.15.1) and ZigBee (IEEE
802.15.4), they are typically time domain duplex system, wherein two-way link is emulated on time division communication channel.
One element of wireless communication system is the transceiver for including transmitter and acceptor circuit.Tool
There is the transceiver of digital baseband subsystem to carry digital data coding to baseband signal and by baseband signal with RF
Ripple signal is modulated together.Modulation for WLAN includes OFDM (OFDM), orthogonal phase shift
Keying (QPSK) and quadrature amplitude modulation (16QAM, 64QAM)；For the modulation bag of WLAN
Include GFSK and 4/8-DQPSK；And for Zigbee modulation include BPSK and OQPSK (or
MSK)。
Receive after signal from antenna, the transceiver by RF signal down coversions, demodulated base band signal and will be by base
Numerical data represented by band signal is decoded.The antenna for being connected to transceiver converts the electrical signal to electromagnetic wave
And vice versa.According to specific configuration, the transceiver can include special transmission (TX) line and specially
There can be the transmission/reception line of combination with reception (RX) line or transceiver.In single TX and RX
In the case of line, send line and reception line is typically integrated into individual antenna, especially for inexpensive and/or little chi
Very little application.
Circuit between transceiver and antenna is commonly referred to front-end module (FEM).The FEM includes RF
Power amplifier (PA), which passes through weaker in the wireless device for amplify such as cellular handset etc
Input signal is generating output sending signal.Many these communication equipments are configured to work at for different communication
In the different frequency bands of system.For example, the third generation (3G) cellular communication system, 4G honeycombs (LTE) system,
802.11WLAN systems etc..
Thus, it is desirable to have a kind of front-end module, its disclosure satisfy that modern wireless standards (such as 802.11,3G and
4G cellular systems) performance requirement, while reducing manufacture complexity, size and cost.
The content of the invention
The present invention is a kind of novel and useful radio frequency (RF) front-end module (FEM) circuit, and which provides
High linearity and power efficiency, and meet Modern wireless communication standard (such as 802.11WLAN, 3G and 4G
Cellular standards, bluetooth, ZigBee etc.) requirement.The configuration permission of FEM circuits uses common, relative
The semiconductor fabrication of low cost, such as standard CMOS process.The FEM circuits include bimodulus power
Amplifier, which includes one or more sub- amplifier, the output of this little amplifier is combined to total to produce
Required power gain.Multi-tap transformer with the primary and secondary winding arranged with novel configuration
Antenna is sent to there is provided efficient power combing and by the power generated by independent sub- amplifier.
Therefore, according to the present invention, there is provided a kind of semiconductor duplexer, which includes：First antenna port,
Which is used to be coupled to first antenna；Second antenna port, which is used to be coupled to the second antenna；Transmission/receiving port,
Which is used to be coupled to the first antenna or second antenna；Matching network, which is coupled to the transmission/reception
Port；First switch, its series coupled between the first antenna port and the matching network；And the
Two switches, its series coupled between second antenna port and the matching network.
According to the present invention, a kind of semiconductor duplexer is additionally provided, which includes：First antenna port, its use
In being coupled to first antenna；Second antenna port, which is used to be coupled to the second antenna；Transmission/receiving port, its
The first antenna or second antenna or coupling are coupled to from described first day for RF signals will be sent
The reception RF signals of line or second antenna；First field-effect transistor (FET) is switched, and which has source
Pole, drain and gate terminal, the drain terminal are coupled to the first antenna port, and the source electrode is coupled to
Transmission/the receiving port, the gate terminal is operable to be used to control first FET switch to receive
First enables signal；And second field-effect transistor (FET) switch, which has source electrode, drain and gate
Terminal, the drain terminal are coupled to second antenna port, and the source electrode is coupled to the transmission/receiving terminal
Mouthful, the gate terminal is operable to be used for the second enable signal for controlling second FET switch to receive.
Description of the drawings
Only by way of example the present invention is been described by herein with reference to accompanying drawing, in the accompanying drawings：
Fig. 1 shows the frame of example two-band multi-chip front-end module (FEM) built according to the present invention
Figure；
Fig. 2 shows the block diagram of the example single-chip FEM circuits built according to the present invention；
Fig. 3 shows the block diagram of the example dc-dc built according to the present invention；
Fig. 4 shows the block diagram of the example RX path sections of the FEM circuits built according to the present invention；
Fig. 5 shows the block diagram of the first example TX path sections of FEM circuits；
Fig. 6 shows the block diagram of the second example TX path sections of FEM circuits；
Fig. 7 shows the block diagram of the 3rd example TX path sections of FEM circuits；
Fig. 8 shows the block diagram of the 4th example TX path sections of FEM circuits；
Fig. 9 shows the block diagram of the 5th example TX path sections of FEM circuits；
Figure 10 shows the block diagram of the 6th example TX path sections of FEM circuits；
Figure 11 is the block diagram of the low and high part for being shown more particularly in power amplifier circuit；
Figure 12 A show the schematic diagram of the first example differential PA circuits；
Figure 12 B are the signals for being shown more particularly in the first example differential PA circuits with transformer connection
Figure；
Figure 13 A show the schematic diagram of the second example differential PA circuits；
Figure 13 B are the signals for being shown more particularly in the second example differential PA circuits with transformer connection
Figure；
Figure 14 shows the schematic diagram of the 3rd example differential PA circuits；
Figure 15 shows the layout of the first example integrated transformer of the power amplifier for the present invention；
Figure 16 shows the layout of the second example integrated transformer of the power amplifier for the present invention；
Figure 17 shows the layout of the 3rd example integrated transformer of the power amplifier for the present invention；
Figure 18 shows the layout of the 4th example integrated transformer of the power amplifier for the present invention；
Figure 19 A show the layout of the 5th example integrated transformer of the power amplifier for the present invention；
Figure 19 B show the layout of the 6th example integrated transformer of the power amplifier for the present invention；
Figure 19 C show the layout of the 7th example integrated transformer of the power amplifier for the present invention；
Figure 20 shows the layout of the 8th example integrated transformer of the power amplifier for the present invention；
Figure 21 shows the layout of the 9th example integrated transformer of the power amplifier for the present invention；
Figure 22 shows the layout of the tenth example integrated transformer of the power amplifier for the present invention；
Figure 23 shows the layout of the 11st example integrated transformer of the power amplifier for the present invention；
Figure 24 shows the block diagram of the 7th example TX path sections of FEM circuits；
Figure 25 shows the block diagram of the 8th example TX path sections of FEM circuits；
Figure 26 A show the AS block diagram of the example dc-dc of the present invention；
Figure 26 B show the high level block diagram of the example sync DC-DC step-down controllers of the present invention；
Figure 27 shows the block diagram of the example dc-dc comprising fine-adjusting unit of the present invention；
Figure 28 shows the figure of the output voltage of DC-DC converter circuit；
Figure 29 shows the figure of the rising edge of the output voltage of DC-DC converter circuit；
Figure 30 shows the figure of the trailing edge of the output voltage of DC-DC converter circuit；
Figure 31 shows the block diagram of the 9th example TX path sections of FEM circuits；
Figure 32 shows the block diagram of the example dc-dc comprising multiple fine-adjusting units of the present invention；
Figure 33 shows the figure of the output voltage of the DC-DC change-over circuits for RF inputs；
Figure 34 is the figure of the output voltage that the DC-DC change-over circuits for RF inputs are illustrated in greater detail；
Figure 35 shows the schematic diagram of the first example TX/RX switch；
Figure 36 shows the schematic diagram of the second example TX/RX switch；
Figure 37 shows the schematic diagram of example antenna RF switch；
Figure 38 shows the curve map of the power added efficiency (PAE) depending on power output；
Figure 39 shows the curve map of the power output depending on input power；
Figure 40 shows the curve map of the AM2AM and AM2PM response of power amplifier circuit；
Figure 41 shows the linearizing curve map realized by the power amplifier circuit of the present invention；
Figure 42 show power amplifier keep out of the way working region before and after RF signals curve map；
Figure 43 shows the curve map of the frequency spectrum of the power amplifier for QAM64；
Figure 44 show the dynamic for QAM64 keep out of the way before and after time domain RF ofdm signal
Curve map；
Figure 45 shows the curve map of the reception for QAM64 and transmission planisphere；
Figure 46 shows the curve map of the frequency spectrum of the power amplifier for QAM256；
Figure 47 show the dynamic for QAM256 keep out of the way before and after time domain RF OFDM letters
Number curve map；
Figure 48 shows the curve map of the reception for QAM256 and transmission planisphere；And
Figure 49 shows the high level block diagram of the exemplary wireless device of the FEM circuits comprising the present invention.
Specific embodiment
The RF circuits of such as transceiver are commonly manufactured as integrated circuit, because microdevice size and lower
Cost, the integrated circuit are usually used complementary metal oxide semiconductors (CMOS) (CMOS) technology.Small size
Cmos device reduces Current draw and requires lower cell voltage, so as to be suitable for limiting with a large amount of power consumptions
The portable use of system.Wireless communication link must be reliable and have high data throughput in width
Amount, this needs higher power level in antenna output end.For example, above-mentioned WLAN and Bluetooth
Usually require that as 20dBm (i.e. 100mW) or more power levels.
But, higher power output requires higher electric current and voltage level in RF circuits.It is many at present
Cmos device is produced using 0.18 micron process, and AS utilizes 130 nanometers, 90 nanometers, 65 nanometers
With 45 nanometer technologies.Due to the breakdown voltage of the reduction of the semiconductor devices in integrated circuit, resulting collection
Into circuit voltage in the range of 1.8V is extremely less than 1.2V.Especially for OFDM, QPSK,
When QAM, the signal with envelope variation, is extremely difficult to the power level of+20dBm of 1.8V.
Increase power requirement and normally result in efficiency decline, this is because the power of greater proportion is lost as heat, with
Shorter battery life afterwards.Additionally, for the identical power level for increasing electric current, impedance is lowered by.
50Ohm impedances are designed to have in view of most RF circuits, due to increased power attenuation, for quilt
The design of the match circuit of the impedance of reduction is also problematic in that.
Conventional transceiver for honeycomb, WLAN, Bluetooth, ZigBee etc. will not generally be generated enough
Power or there is no enough RX sensitivity, and reliable communication needs enough RX under many circumstances
Sensitivity.Contemporary integrated circuits transceiver components have the transmission power level less than 0dBm, although also having
Some devices are with 10 or 20dBm power level, but still the 20-25dBm needed for being less than.Therefore,
The regulation of extra RF signals is necessary.
Circuit between transceiver and antenna is commonly known as front-end module or FEM.The FEM includes
For increasing the power amplifier of transmit power and improving the low-noise amplifier (LNA) of receiving sensitivity.
The various filter circuits of such as bandpass filter can also be included, clean sending signal is provided at antenna
And protect receiving circuit to avoid reaching the external blocking signal of antenna.The FEM is also switched including RF,
It is to be switched fast between reception and sending function and dry in the transition process between preventing from sending and receiving
Disturb.The RF switches can be by the universal input/output line of transceiver and/or the control protocol control decided through consultation in advance
System.The RF switches are understood to individual antenna is connected to input or the power amplification of low-noise amplifier
The single-pole double-throw switch (SPDT) of the output end of device.With the shared transceiver for sending and receiving line (such as with reference to bluetooth
The transceiver used with ZigBee systems) generally in the input and low-noise amplifier of power amplifier
Output includes that the 2nd RF is switched, and sends and receives line for suitable control transceiver end.Described second
RF switches (which increasing TX/RX isolation) can be by the same of the transceiver for controlling the RF switches
Universal input/output line traffic control.The power amplifier can be also opened or be closed by the enable output from transceiver
Close.It is described to make energy line change voltage to control gain or arrange power amplifier bias current.
The performance of association, manufacture and Cost Problems make it necessary to power amplifier and low-noise amplifier
RF switches are manufactured on the different substrate of substrate.Power amplifier is manufactured generally on GaAs (GaAs) substrate,
Which provides high-breakdown-voltage and reliability.Can also be using other substrates, such as SiGe (SiGe).Additionally,
Power amplifier can utilize HBT (HBT), metal-semiconductor field effect transistor
(MESFET) or HEMT (HEMT), wherein HBT manufacturing costs are minimum.It is low
Noise amplifier can also be manufactured on the GaAs substrates with HBT transistors.However, due to high insertion
Loss or low isolation, using the RF switches of HBT transistors with poor Performance Characteristics.
One solution of the problems referred to above includes configuring using Multi-core, in the configuration, power amplifier and
Low-noise amplifier manufacture is on a tube core using HBT transistors, and RF switch manufactures are at another
Using on such as tube core of HEMT transistors.Subsequently, two tube cores are packed in a single package.Compare
Traditional silicon substrate, the cost of the increase associated with GaAs substrates and complicated packaging technology are further improved
The cost of front-end module circuit.Another kind of solution be related to for power amplifier, low-noise amplifier and
The compound GaAs substrates of RF switches, which has HBT and HEMT transistors.But, this integrated electricity
Road manufacturing cost is higher.Alternatively, silicon substrate can be used for low-noise amplifier, power amplifier and RF switch.
However, due to the isolation of silicon substrate it is poor, the higher solution of possible use cost, such as on insulator
Silicon (SOI).These integrated circuits generally need negative voltage generator, and this causes bigger tube core for inclined
Circuits.Additionally, being needed by the glitch on the wide frequency ranges of the charge pump transmitting for negative voltage generator
Physical isolation, which in turns increases die-size.
The invention provides a kind of FEM circuits, solve the problems, such as set forth above.FEM circuits of the present invention
There is provided high linearity and power efficiency and meet Modern wireless communication standard (such as 802.11WLAN,
3G and 4G cellular standards etc.) requirement.Additionally, the configuration of FEM circuits is allowed using common, relative
The semiconductor fabrication of low cost, the CMOS technology for such as being provided on the market.
Fig. 1 shows the frame of example two-band multi-chip front-end module (FEM) built according to the present invention
Figure.The double frequency-band FEM model (being generally denoted as 10) including four modules, including duplexer
52nd, 2.4GHz FEM circuit modules 40,5GHz FEM circuit modules 28 and PMU (PMU)
Module 12.The 2.4GHz FEM circuits 28 are operationally received and are sent in 2.4GHz ISM bands
Signal, and 5GHz FEM circuits are operationally received and sending signal in 5GHz ISM bands.Each
The module can be structured on single integrated circuit, and the single integrated circuit has between chip
Printing or wire bond connection.Alternatively, FEM model can include single integrated circuit and/or can process list
Individual frequency band.
Duplexer 52 works for one or more antennas to be coupled to 2.4 and 5GHz antenna ports.PMU12
It is optional in circuit, it can include following part or all of：Dc-dc 24 is (for example,
3.3V), electrification reset circuit 20, the oscillating circuit 22, biasing circuit for producing clock signal and RF
Power ramping rise control, for 2.4GHz power amplifier (PA) DC-DC change-over circuits 26,
For the DC-DC change-over circuits 18 of 5GHz PA, clock monitor circuit 18 and control logic 14.
The 2.4GHz FEM circuit modules 40 include TX/RX switch 46, power amplifier circuit 42,
Low-noise amplifier (LNA) circuit 44, control logic 48 and interface (I/F) logic 50.The PA42
Work to amplify the TX signals for passing through antenna broadcast that baseband circuit is exported.LNA44 work with
The reception signal that amplification is received from antenna, and RX signals are exported to be demodulated and decoded by baseband circuit.
Similarly, the 5GHz FEM circuit modules 28 include TX/RX switch 34, power amplifier electricity
Road 30, low-noise amplifier (LNA) circuit 32, control logic 36 and interface (I/F) logic 38.Institute
State PA30 work to amplify the TX signals for passing through antenna broadcast of baseband circuit output.The LNA32
Work is to amplify from antenna the reception signal for receiving, and exports RX signals to be conciliate by baseband circuit demodulation
Code.
Fig. 2 shows the block diagram of the example single-chip FEM circuits built according to the present invention.Single-chip FEM
Circuit (being generally denoted as 130) includes：PA circuits 132, the TX for amplifying from baseband circuit are believed
Number being broadcasted by one or more antennas 140；LNA134, receives for amplifying from one or more antennas
To signal and export RX signals to be demodulated and decoded by baseband circuit；TX/RX switches 136, for inciting somebody to action
PA or LNA are coupled to antenna；Optional duplexer 138, for TX/RX switches are coupled to one
Or multiple antennas 140；Control logic 142；I/F logics 144 and DC-DC change-over circuits 146.
For example, multiple antennas 140 can be used in the system using space diversity.In mimo systems,
Using multiple antennas but each antenna is with the FEM circuit related to their own, wherein, in baseband circuit,
Multiple synthesis and the generation of multiple sending signals for receiving signal are carried out by signal transacting.
Fig. 3 shows the block diagram of the example dc-dc built according to the present invention.The DC-DC
Converter circuit (being generally denoted as 700) is including synchronous dc-dc 708, vernier control logic
704th, one or more fine-adjusting units 706, one or more trimmers 710, one or more output electricity
Container 712 and one or more output inductors 714.The function of the DC-DC converter circuit is basis
It is input to the vernier control command signal of vernier control logic and generates output voltage.Envelope detector is (in figure not
Illustrate) can be used to generate vernier control order so that the output voltage tracking RF input signals for being generated.
The operation of the DC-DC converter circuit is described in more detail hereinafter.
Fig. 4 shows the block diagram of the example TX path sections of the FEM circuits built according to the present invention.Institute
Stating TX path circuits (being generally denoted as 150) includes from the transmitter or transceiver (TRX) receiving
The matching network 152 of RF input signals, programmable delay 154, the PA156 for generating RF outputs,
Control logic module 158, envelope detector 160,170, low pass filter (LPF) 162,172, power
Detector 164,174 and analog-digital converter (ADC) 166,176.
In the present example embodiment, envelope detected is used for RF inputs and RF outputs, to optimize PA
Operation.Track the RF input signals and adjust PA gain and optional other parameters (by control
Logic module processed 158), with improve to greatest extent the linearity and reduce circuit power consumption.
Fig. 5 shows the block diagram of the first example TX path sections of FEM circuits.The TX paths are (total
It is denoted as on body 180) including programmable delay 182, bimodulus power amplifier circuit 184, multi-tap transformer
188th, pattern/biasing control 198, envelope detector 190,200, LPF192, ADC194,202 and
Control logic 196.
In the present example embodiment, using envelope detected tracking RF inputs and RF output signals.Generate
Envelope signal is one or more operating parameters for configuring bimodulus PA184, to improve line to greatest extent
Property degree, gain etc., and power consumption is reduced to greatest extent.The operation of double mode PA is described in more detail hereinafter.
In operation, feedforward arithmetic performs envelope detected in the input end to power amplifier.A/D converter is sampled
Envelope signal.Digital control logic work is to drive PA biasing controls according to envelope level, corresponding so as to enable
PA transistors, synthesize the output of corresponding PA transistors via multi-tap transformer.Programmable delay works
To compensate the delay between envelope detector and RF signal paths.The use of feedforward arithmetic realizes significant effect
Rate improves, and such as figure 41 illustrates, wherein, trace 540 is represented and performs linearisation by the feedforward arithmetic of Fig. 5
Front power added efficiency (PAE), trace 542 represent the PAE after linearisation.
Many modern wireless standards, such as 802.11 and particularly 802.11ac, its modulation for being generated are caused
Signal is with than larger peak-to-average force ratio.Consider such as orthogonal frequency division modulated (OFDM), peak-to-average force ratio is with subcarrier
The increase of number and increase and be about 20log (sub-carrier number).For example, using 256 subcarriers
OFDM modulation can produce the peak-to-average force ratio of 10-12dB.Additionally, in each subcarrier, using 256QAM
Need relatively good Error Vector Magnitude (EVM), for example, -32dB.Noise, distortion, glitch,
The phase noise of IQ mismatches and PLL, the non-linear of power amplifier, adjacent channel leakage ratio (ACLR)
All reduce EVM.Therefore, the overall linearity of power amplifier and FEM circuits is required relatively stringent.
Additionally, it is desirable to the consumption of battery is reduced as far as possible, therefore it is required that the circuit of FEM has high efficiency.
In addition, in one embodiment, expect the complementary metal oxide semiconductors (CMOS) (CMOS) using standard
Integrated circuit technique is building FEM circuits.Alternatively, the FEM circuits can be using any suitable
Semiconductor technology, such as GaAs (GaAs), SiGe (SiGe), indium gallium phosphide (InGaP), nitrogen
Change gallium (GaN) etc..It is desirable, however, that using CMOS technology be due to relatively low cost and complexity, with
And can be integrated with Digital Logic by analog circuit.
In one embodiment, the power amplifier is built with many sub- power amplifiers or sub- amplifier 186
Circuit 184.Input signal is branched out and is fed to per individual sub- amplifier, and which provides the power amplification
A part for total required gain of device.It is synthesized to generate RF output signals per the output of individual sub- amplifier.
In one embodiment, synthesizer unit includes multi-tap transformer, will be described below described take out more
One example of head transformer.
In operation, envelope detector 190 reads RF and is input into and generates the envelope of signal and represents, then will
Which filters and digitizes, and is input to control logic circuit 196.The RF outputs are read equally, also,
The digitised envelope for generating signal is represented, and is input to control logic circuit 196.The biasing of sub- amplifier 186
Controlled by bias control circuit 198, which is driven by one or more control signals from control logic 196
It is dynamic.The programmable delay compensate for the signal delay by envelope detector and digitization step.
Fig. 6 shows the block diagram of the second example TX path sections of FEM circuits.The TX paths are (overall
On be designated as 210) including bimodulus power amplifier 218, power controller 212, dc-dc 214 with
And effect is the ouput power detection circuit 216 for reading RF outputs.
In the present embodiment, the gain of power amplifier is by power control signal control.Believe in response to Power Control
Number and power output level, power controller generates the control signal for dc-dc, its modulation work(
The supply voltage of rate amplifier.Depend on and implement, the power amplifier 218 can include one or many
Individual sub- amplifier.
Fig. 7 shows the block diagram of the 3rd example TX path sections of FEM circuits.The TX paths are (total
Be denoted as on body 220) including limiter 232, bimodulus power amplifier 234, envelope detector 222, can compile
Cheng Yanchi 224, adjuster/buffer 226, ADC228 and fast DC-DC converter 230.In behaviour
In work, the circuit amplifies TX signals in the way of polarity, wherein, isolate the confined TX of amplitude
Signal is imported into PA.Control and the gain of the PA is adjusted to track the amplitude of initial TX signals.Read
Go out the RF to be input into and generate envelope and be digitized by ADC228.Fast DC-DC converter
226 drive adjusters or buffer circuits 226 to generate the gain (or power supply) of PA234.Depend on tool
Body realizes that the power amplifier 234 can include one or more sub- amplifiers.
Fig. 8 shows the block diagram of the 4th example TX path sections of FEM circuits.The TX paths are (overall
On be denoted as 240) including drive circuit/buffer 242, power splitter 244, one or more difference
Sub- amplifier 246 and power combiner 250.In operation, RF input signals are imported into drive circuit,
The output of drive circuit is imported into shunt.The shunt work is amplified to per height with providing input signal
Device 246.In one embodiment, shunt includes that the multi-tap with armature winding and multiple secondary windings becomes
Depressor 248, a secondary is for per individual sub- amplifier.May be adapted to process per individual sub- amplifier difference (as schemed institute
Show) or single ended signal.Multi-tap synthesis transformer 252 is coupled to per the difference output of individual sub- amplifier
Respective primary winding.Output signal is generated at secondary windings, and the RF outputs of TX path circuits are provided.
It should be noted that the impedance of each tapping is suitable to about 12.5Ohm, to produce about 50Ohm
Expectation RF output impedances.
In operation, each output of synthon amplifier is generating RF output signals.Carry per individual sub- amplifier
For a part for the required general power of power amplification circuit.By synthesizer multi-tap transformer, synthesis is per height
The power generated by amplifier, to generate the RF output signals of the total RF power with synthesis.
It should be noted that difference amplifier (or balance amplifier) is preferably as they can make
The voltage swing that must be may apply in equally loaded is doubled.This will make power output become quadruple, without
Any extra stress is produced on transistor.Therefore, efficient power is realized using difference subspace amplifier stage
Amplifier.
In one embodiment, shunt and synthesis transformer are all manufactured with CMOS and simulate sum with other
Word circuit is integrated on same tube core.In an alternative embodiment, transformer is manufactured using other technologies, such as GaAs,
InGaP, GaN etc..The transformer includes air-core and may take any suitable shape and configuration.
Multiple examples of integrated multi-tap transformer will be described in further detail below.Note, in one embodiment,
Transformer is configured to relatively wide band, can be adapted to 2.4 and 5.8GHz WLAN signals.Alternatively, from
Two transformers and two bandpass filters build duplexer, and a transformer and bandpass filter are used for a frequency
Band.It should be noted that the FEM circuits of the present invention not only can apply to WLAN signal, can also apply
In any modulation scheme for representing high peak-to-average power ratio, for example, 3G, 4G LTE etc..
Fig. 9 shows the block diagram of the 5th example TX path sections of FEM circuits.The TX paths are (overall
On be denoted as 259) including driver/demultiplexer circuit 241, one or more difference subspace amplifiers 251 and work(
Rate synthesizer 243.Driver/the demultiplexer circuit 241 includes multi-tap transformer 245, and which has primary
Winding and two secondary windings, a secondary windings correspond to a differential driver 247.Multi-tap transformer
255 include it is one-to-one to two transformers, each with the armature winding being associated with driver 247 and
For the secondary windings of two sub- amplifiers 251.Synthesizer 243 includes multi-tap transformer 253, and which has
Secondary windings with the armature winding being associated per individual sub- amplifier 251 and for generating RF output signals.
In operation, RF input signals are imported into drive circuit 241, and RF input signal branches are by which
Two signals.Each signal is imported into driver 247, and the output of driver 247 is further split into
Two signals.The shunt works to provide input signal to per individual sub- amplifier 251.In one embodiment
In, shunt includes transformer 245,255 and drive circuit 247.May be adapted to process per individual sub- amplifier
Difference (as shown in the figure) or single ended signal.Multi-tap conjunction is coupled to per the difference output of individual sub- amplifier
Into the respective primary winding of transformer 253.Output signal is generated in secondary windings, and TX paths electricity is provided
The RF outputs on road.It should be noted that the impedance of each tapping is suitable to about 12.5Ohm to produce
The RF output impedances of required about 50Ohm.
In operation, the RF output signals are generated from the synthesis of each output of sub- amplifier.Per height
A part for the general power of the power amplification circuit needed for amplifier contribution.By the synthesis multi-tap transformer
The power generated per individual sub- amplifier by synthesis, to generate the RF output signals of the total RF power with synthesis.
In one embodiment, shunt and synthesis transformer all with CMOS manufacture, and with other simulation and
Digital circuit is integrated on same tube core.In an alternative embodiment, the transformer is manufactured using other technologies,
Such as GaAs, GaN etc..The transformer includes air-core and may take any suitable shape and match somebody with somebody
Put.Multiple examples of integrated multi-tap transformer will be described in further detail below.
Figure 10 shows the block diagram of the 6th example TX path sections of FEM circuits.The TX paths are (overall
On be denoted as 260) including drive circuit 262,264, four sub- power amplifiers of bimodulus of power splitter
266 and power combiner 272.In operation, RF input signals are imported into drive circuit.Then drive
The output of device is branched out and is fed to per individual sub- amplifier.In the present embodiment, the quantity of sub- amplifier is 4
It is individual, but any amount can also be used according to concrete implementation.Total required gain is provided per individual sub- amplifier
A part.The output of the sub- amplifier is synthesized to generate RF output signals.
In one embodiment, one or more sub- power amplifiers of power amplifier are constituted parallel running and
Be identical per individual sub- amplifier, including independent high and low amplifier.The high amplifier operation is relative
Big keeps out of the way (backoff) (such as 12dB), is suitable for processing visible peak value in about 5% time
Input amplitude.In one embodiment, the high amplifier is implemented as C quasi-nonlinear amplifiers, and which has
Appropriate biasing is expeditiously amplifying peak signal.Low amplifier operation keeps out of the way (such as 6dB) in relatively low,
And be suitable to process visible relatively low average input amplitude in about 95% time.In one embodiment, institute
State low amplifier and be implemented as AB class linear amplifiers, there is appropriate biasing to amplify flat with high linearity for which
Equal signal.It should be noted that in an alternative embodiment, plural putting can be included per individual sub- amplifier
Big device and can be implemented as using the amplifier outside AB classes and C classes, this depends on specific application.
It should be noted that independent high and low amplifier used in per individual sub- amplifier, this will put will power
Big device and FEM circuits meet modern wireless standards (such as 802.11Wi-Fi (especially 802.llac), LTE,
3G, 4G etc.) Strict linear degree and spectrum efficiency requirement, the signal of these standards has higher peak equal
Than but of a relatively high efficiency is provided, cause battery consumption to minimize.
Figure 11 has been shown more particularly in the block diagram of the low and high part of power amplifier circuit.The circuit is (total
It is denoted as 280) representing a sub- amplifier of power amplification circuit 266 (Figure 10) on body.Implement at one
In example, the sub- amplifier of four identicals is used for generating total power demand gain.Although in an alternative embodiment,
They may differ.The circuit 280 includes high circuit paths and low circuit path.The high path bag
Include match circuit 282,286 and high power amplifier 285.The low path footpath includes match circuit 290,294
With power amplifier 292.Power combiner (for example, multi-tap transformer) 288 synthesizes high and low amplifier
Output, with generate a sub- amplifier RF export.In the case of high and low circuit path, multi-tap
Synthesis transformer include for constitute the power amplifier per individual sub- amplifier (in the exemplary embodiment
4) height and the output of low sub- amplifier tap.
Figure 40 shows the curve map of the AM2AM and AM2PM performances in high and low circuit path.Track
530 represent low circuit response, and track 534 represents the high circuit response depending on power output.526 table of track
Show synthesis response.Equally, track 532 represents low circuit response, and track 536 is represented depending on power output
High circuit response.Track 528 represents synthesis response.
Figure 12 A show in detail the schematic diagram of the first example of sub- amplifier circuit.The sub- amplifier circuit
(being generally denoted as 360) works to amplify the difference RF input signal for being applied to PA IN+ and PA IN- ends.
The circuit includes transistor current modulation topology to amplify the RF input signals.By one of sub- amplifier
Or the output of multiple examples is combined to, to generate the RF output signals with required overall gain.Sub- amplifier
Positive side includes capacitor 362,368,377, resistor 372,374, transistor 364,370,378, low
Power bias circuit 376, high power biasing circuit 366 and have 384 (L of power amplifier armature windingPA)
With the transformer 379 of secondary windings 382.Equally, the minus side of sub- amplifier include capacitor 402,398,393,
Resistor 404,406, transistor 400,396,394, low-power biasing circuit 390, high power biased electrical
Road 392 and have 386 (L of power amplifier armature windingPA) and secondary windings 388 transformer 380.
In operation, the low power transistor of positive negative circuit is biased, for use as the line for mean amplitude of tide input
Property A/AB class A amplifier As, and the high-capacity transistor of positive negative circuit is biased, for use as defeated for peak amplitude
The high efficiency C class A amplifier A for entering.The power generated by the height and lower part of sub- amplifier is existed by electric current synthesis
Transformer circuit (370,364 and 396,400) middle synthesis.Figure 12 B have been shown more particularly in integrated change
The sub- amplifier output connection of depressor 381.
Figure 13 A have been shown more particularly in the schematic diagram of the second example of sub- amplifier circuit.The sub- amplifier electricity
Road (being generally denoted as 300) work is input into amplifying difference RF for being applied to PA IN+ and PA IN- ends
Signal.The output of one or more examples of sub- amplifier is combined to, to generate with required overall gain
RF output signals.
The positive side of the sub- amplifier include capacitor 302,317,319,322, resistor 304,329,
Transistor 318,320 and 308,324, low-power biasing circuit 326 and high power biasing circuit 328, with
And there is 312 (L of low armature windingLO), 316 (L of high armature windingHI) and secondary windings 314 (PA OUT+)
Transformer 310.Equally, the minus side of sub- amplifier includes capacitor 330,347,349,352, resistor
332,359, transistor 348,350 and 334,354, low-power biasing circuit 356 and high power biased electrical
Road 358, and have 342 (L of low armature windingLO), 346 (L of high armature windingHI) and secondary windings
The transformer 340 of 344 (PA OUT-).
In operation, the low power transistor of positive negative circuit is biased, for use as the line for mean amplitude of tide input
Property A/AB class A amplifier As, and the high-capacity transistor of positive negative circuit is biased, for use as defeated for peak amplitude
The high efficiency C class A amplifier A for entering.In the present embodiment, synthesized the high and lower part of sub- amplifier by electric current
The power for being generated transformer circuit (312,316 and 342,346) in synthesis.Figure 13 B are more detailed
Show the sub- amplifier output connection of the integrated transformer 341.
In one embodiment, high and low armature winding 312,316 (342,346) corresponding in Figure 16
High and low armature winding 502,504.Secondary windings 314 (344) is corresponding to the secondary windings 518 in Figure 16.
Figure 14 has been shown more particularly in the schematic diagram of the 3rd example of sub- amplifier circuit.The sub- amplifier circuit
With it is shown in fig. 13 be similar with low and high-capacity transistor path circuit.Difference is the increase in
Parallel to second high-capacity transistor (HP1) of low power transistor (LP).
Sub- amplifier circuit (being generally the denoted as 410) work is applied to PA IN+ and PA IN- to amplify
The differential input signal at end.The output of one or more examples of the sub- amplifier is combined to, to generate tool
There are the RF output signals of required overall gain.
The positive side of the sub- amplifier includes capacitor 412,416,440,419,433, resistor 415,
419,443, transistor 418 (LP), 414 (HP1), 442 (HP2) and 420,434, low-power
Biasing circuit 417,2 biasing circuit 441 of 1 biasing circuit 413 of high power and high power, and have it is low just
Level 422 (L of windingLO), 426 (L of high armature windingHI) and secondary windings 424 (PA OUT+) change
Depressor 419.Equally, the minus side of sub- amplifier includes capacitor 446,450,454,435,437, resistance
Device 447,451,455, transistor 448 (LP), 452 (HP1), 444 (HP2) and 436,438,
Low-power biasing circuit 449,2 biasing circuit 445 of 1 biasing circuit 453 of high power and high power, and tool
There is 432 (L of low armature windingLO), 428 (L of high armature windingHI) and secondary windings 430 (PA OUT-)
Transformer 421.
In operation, the low power transistor of positive negative circuit is biased, for use as the line for mean amplitude of tide input
Property A/AB class A amplifier As, and the high power 1 and 2 transistor of high power of positive negative circuit are biased, for use as with
In the high efficiency C class A amplifier A of peak amplitude input.In the present embodiment, the height and lower part institute of sub- amplifier
The power of generation transformer circuit (422,426 and 428,432) in magnetically synthesized.
In one embodiment, high and low armature winding 422,426 (432,428) corresponding in Figure 16
High and low armature winding 502,504.Secondary windings 424 (430) is corresponding to the secondary windings 518 in Figure 16.
The FEM circuits of the present invention are using the power synthetic technique based on transformer generating RF output signals.
The power output ability of FEM increased based on the use of the power combing of transformer.Power amplifier is divided
Into many sub- amplifiers (being 4 in this example), and provide power a quarter per individual sub- amplifier
Series connection.Depending on the particular technology for adopting, this can reduce or eliminate any transistor stress to greatest extent
Problem.Each a quarter (i.e. sub- amplifier) is broken into further height and partial low-power.It is single than using
Individual crystal pipe amplifier, this makes efficiency at most increase by 40%.
With reference to Fig. 8 and 9, armature winding is driven by independent sub- amplifier PA1, PA2, PA3, PA4, and
Secondary windings is connected in series.The power of load is delivered to equal to the power output for being generated per individual sub- amplifier
Summation.It should be noted that some power may be consumed in any matching network of transformer is coupled to.
Therefore, power combiner has not only effectively been superimposed the alternating voltage of each sub- amplifier, also achieves impedance
The function of conversion.As identical electric current, therefore the sub- amplification are carried on the secondary windings of each transformer
Device is coupled to each other.Therefore, by the impedance seen per individual sub- amplifier by other sub- amplifiers output voltage and
Output impedance is determined.As fruit amplifier has identical output impedance, generates identical output voltage and become
Depressor has identical turn ratio, then turn ratio peace of the impedance seen per individual sub- amplifier by each transformer
The quantity (being 4 in the present example embodiment) of row level is determined.
Figure 15 shows the integrated transformation of the first example power synthesis for power amplifier of the invention
The layout of device.The transformer (being generally denoted as 460) is included with two-dimentional (2D) square arrangement
Four armature windings, wherein, winding 462 is coupled to the output of sub- power amplifier 1, and winding 464 is coupled to
The output of sub- power amplifier 3 is coupled in the output of sub- amplifier 2, winding 466, and winding 468 is coupled to son
The output of power amplifier 4.Secondary windings 470 is wrapped in around four armature windings and is coupled to TX/RX
Switch.It should be noted that in the present embodiment, magnetic field is line symmetrical about 461 and 463 and symmetrical.
The transformer has air-core and (for example, width, spacing and the thickness of metal level is configured in each frequency band
2.4GHz and 5GHz) enough performances are provided and make input and output impedance meet required inductance and Q
The factor.It should be noted that according to different applications, it is possible to implement the alternative configuration of Transformer Winding.For example,
Primary and secondary winding can be realized on identical or different metal level.
Figure 16 shows the layout of the second example integrated transformer of the power amplifier for the present invention.
The transformer (being generally denoted as 500) is including four groups of octagonal armature windings and a square secondary
Winding.Each group of armature winding in parallel includes high loop and low loop, with adapt to for example Figure 12 A, 12B,
The high and low amplifier of 13A, 13B, sub- amplifier shown in 14.The interior winding of each group of armature winding comes
From high amplifier and outer winding is from low amplifier.Middle winding is secondary windings, and which is between armature winding
Extend.Each is better controled over it should be noted that separating high and low-power winding and having the advantage that there is provided
The method of the phase distortion of sub- amplifier, so as to the improvement for providing total phase distortion of power amplifier synthesizes control
System.Additionally, outer (or interior) winding of stretching winding is also used for compensating the phase distortion between PA amplifiers.
FEM can be made to reach the efficiency and minimum EVM of maximum using multiple technologies described herein.
Specifically, integrated transformer includes winding 502,504,506,508,510,512,514,
516 and secondary windings 518, wherein, winding 504 is coupled to the low difference output of sub- amplifier 1, winding
The 502 high difference outputs for being coupled to sub- amplifier 1；Winding 508 is coupled to the low difference output of sub- amplifier 2,
Winding 506 is coupled to the high difference output of sub- amplifier 2；Winding 512 is coupled to the low difference of sub- amplifier 3
The high difference output of sub- amplifier 3 is coupled in output, winding 510；Winding 516 is coupled to sub- amplifier 4
Low difference output, winding 514 are coupled to the high difference output of sub- amplifier 4.It should be noted that each change
The outer armature winding of depressor is coupled to the low output of sub- amplifier rather than interior winding, this is because outer winding is longer
And inductance is bigger.The shorter interior winding coupled of length is to the high-power output per individual sub- amplifier.Secondary windings 518
It is wrapped between four armature windings to '+' and '-', and is coupled to TX/RX switches.'+' and '-' it is primary around
Between group, extension secondary windings can improve magnetic coupling between the two.The transformer has air-core and gold
Width, spacing and the thickness for belonging to layer is configured to provide foot in each frequency band (for example, 2.4GHz and 5GHz)
Enough performances and inductance and Q factor needed for meeting input and output impedance.It should be noted that root
According to different applications, it is possible to implement the alternative configuration of Transformer Winding.
Figure 17 shows the layout of the 3rd example integrated transformer of the power amplifier for the present invention.Institute
State transformer (being generally denoted as 570) including four groups of octagonal armature windings and square it is secondary around
Group.Each group of armature winding includes two parallel windings.Middle winding is secondary windings, and which is at the beginning of parallel
Extend between level winding.Current crowding (being close to) effect is which reduced, because electric current is spreaded more evenly across secondary
Level winding is so as to reducing loss.
Specifically, integrated transformer includes four groups of windings, and each group is associated with a difference amplifier respectively.
Every group of winding includes parallel primary winding 572,574 and secondary windings 576.The parallel primary winding coupled is arrived
Sub- amplifier PA1, PA2, PA3 and PA4.Parallel primary winding enables to transformer and processes higher electricity
Stream.Secondary windings 576 is wrapped in defeated to generate PA between four parallel armature windings by connector 579
Go out, the TX/RX switches that the PA outputs are subsequently coupled to.Extend between parallel armature winding secondary
Level winding improves magnetic coupling between the two and alleviates closing effect mentioned above.The transformation utensil
Width, spacing and the thickness for having air-core and metal level be configured to each frequency band (for example, 2.4GHz and
Enough performances 5GHz) are provided and make input and output impedance meet required inductance and Q factor.Need
It is noted that according to different applications, it is possible to implement the alternative configuration of Transformer Winding.
Figure 18 shows the layout of the 4th example integrated transformer of the power amplifier for the present invention.Institute
Transformer (being generally denoted as 560) is stated including four groups of octagonal armature windings and a secondary windings, it
Be arranged to continuous or linear array configuration.Each group of armature winding includes two parallel windings.This
Current crowding (being close to) effect is reduced, because electric current is spreaded more evenly across in secondary windings so as to reduce loss.
Which increases the current handling capability of the transformer.Middle winding is secondary windings, its parallel primary around
Extend between group.
Specifically, integrated transformer includes four groups of windings, and each group is associated with a difference amplifier respectively.
Every group of winding includes parallel primary winding 562,564 and secondary windings 566.Parallel armature winding is coupled to son
Amplifier PA1, PA2, PA3 and PA4.Secondary windings 566 by connector 568 be wrapped in four it is parallel
Armature winding between to generate the output of PA, PA output is subsequently coupled to TX/RX switches.
Extend secondary windings between parallel armature winding to improve magnetic coupling between the two and alleviate above
Described closing effect.The transformer has air-core and width, spacing and the thickness of metal level are configured
It is enough performances to be provided and input and output impedance is made in each frequency band (for example, 2.4GHz and 5GHz)
Inductance and Q factor needed for meeting.It should be noted that according to different applications, it is possible to implement transformer
The alternative configuration of winding.
In the circuit of Figure 19 A, the centre cap 588 of each transformer is connected to VDD.Except Figure 19 A
In transformer centre cap 588, the work class of parallel armature winding 582,584 and secondary windings 586
The integrated transformer being similar in Figure 18.
Figure 19 A show the layout of the 6th example integrated transformer of the power amplifier for the present invention.Institute
State four groups of windings that integrated transformer (being generally denoted as 571) includes configuring with linear row, each group of difference
It is associated with a difference subspace amplifier.Each group of winding includes a pair of parallel 581,583 He of armature winding
Secondary windings 585.Parallel armature winding in each group is coupled in PA1, PA2, PA3 and PA4
The height of the sub- amplifier of and low circuit output.In every group of winding, internal inductance device loop is used for low-power
Sub- amplifier and dispatch from foreign news agency sensor loop are used for the sub- amplifier of high power, for example, Figure 12 A, 12B, 13A,
Two cascade amplifiers shown in 13B.The centre cap 587 of each transformer is connected to VDD.It is secondary
Winding is placed between four groups of parallel armature windings by connector, to generate the output of PA, the PA
Output is subsequently coupled to TX/RX switches.Secondary windings is placed between parallel armature winding and improves two
Magnetic coupling between person and alleviate closing effect mentioned above.The transformer has air-core and gold
Width, spacing and the thickness for belonging to layer is configured to provide foot in each frequency band (for example, 2.4GHz and 5GHz)
Enough performances and inductance and Q factor needed for meeting input and output impedance.It should be noted that root
According to different applications, it is possible to implement the alternative configuration of Transformer Winding.
Figure 19 C show the layout of the 7th example integrated transformer of the power amplifier for the present invention.Institute
State four groups of windings that integrated transformer (being generally denoted as 491) includes configuring with linear row, each group of difference
It is associated with a difference subspace amplifier.Each group of winding includes a pair of parallel 501,503 He of armature winding
Secondary windings 505.Parallel armature winding in each group is coupled in PA1, PA2, PA3 and PA4
The height of the sub- amplifier of and low circuit output.The centre cap 507 of each transformer is connected to VDD.Need
It should be noted that being, the winding for PA1 and PA4 is longer than (stretch) winding of PA2 and PA3.This use
The phase mismatch produced in compensation PA amplifiers.
Secondary windings is placed between four groups of parallel armature windings, to generate the output of PA by connector,
The PA outputs are subsequently coupled to TX/RX switches.Secondary windings is placed between parallel armature winding
Improve magnetic coupling between the two and alleviate closing effect mentioned above.The transformer has air
The width of core and metal level, spacing and thickness are configured at each frequency band (for example, 2.4GHz and 5GHz)
Enough performances are provided and make input and output impedance meet required inductance and Q factor.Should be noted
It is, according to different applications, it is possible to implement the alternative configuration of Transformer Winding.This configures and described here
The configuration of any integrated transformer can be used for the configuration of any sub- amplifier mentioned above, i.e. Figure 12 A,
12B, 13A, 13B and 14 circuit.
Figure 20 shows the layout of the 8th example integrated transformer of the power amplifier for the present invention.Institute
Transformer (being generally denoted as 590) is stated including shunt 594, four sub- amplifiers 604 and synthesizer
606.The shunt includes an armature winding 600 and four groups of octagonal secondary windings, and they are arranged
For continuous or linear row array configuration.Every group of secondary windings includes two parallel windings 596,598.This
Increased the current handling capability of transformer.Middle winding is armature winding, and which is between parallel secondary windings
Extend.
Become to reduce and compensate outside two PA1, PA4 transformers and internal two PA2, PA3 as far as possible
Any phase mismatch between each transformer caused by difference between depressor, in shunt, difference output exist
Intersect and PA3 and PA4 windings between PA1 and PA2 windings.
The synthesizer includes four groups of octagonal armature windings, 610,608 and one secondary windings 611, they
It is arranged to continuous or linear row array configuration.Each group of armature winding includes two parallel windings.This
Current crowding (being close to) effect is reduced, because electric current is spreaded more evenly across in secondary windings so as to reduce loss.
Which increases the current handling capability of the transformer.Middle winding is secondary windings, its parallel primary around
Extend between group.
Specifically, shunt and synthesizer all include four groups of windings, each group with difference subspace amplifier PA1,
One in PA2, PA3 and PA4 is associated.The RF input signals are imported into buffer 592, its
Difference output is applied to the armature winding of shunt transformer.Each transformer of the shunt it is parallel
Secondary windings is coupled to the corresponding Differential Input of sub- amplifier.Armature winding 600 is wrapped in four groups of parallel secondary
Between winding, to be generated to four signal inputs of sub- amplifier.Conjunction is imported into per the output of individual sub- amplifier
Corresponding transformer in growing up to be a useful person.Secondary windings 611 is wrapped in four groups of parallel armature windings 610, between 608
To generate PA outputs, the PA outputs are subsequently coupled to TX/RX switches.The shunt and synthesis
Transformer in device all has air-core and width, spacing and the thickness of metal level are configured in each frequency band
(for example, 2.4GHz and 5GHz) provides enough performances and makes input and output impedance meet required electricity
Sense and Q factor.It should be noted that according to different applications, it is possible to implement the replacement of Transformer Winding is matched somebody with somebody
Put.
In a kind of substitute technology of any phase mismatch of transformer is overcome, tuning capacitor is added to synthesis
Each armature winding in device.But, the capacitor is probably what is damaged, so as to reduce power amplifier
Power gain.Such circuit is as shown in figure 21.The use of capacitor can make transformer realize preferably across
The phase compensation of Transformer Winding.It also reduces parasitic drain and causes relatively low phase place and fault in enlargement.
The transformer (being generally denoted as 620) is including 624, four sub- amplifiers 634 of shunt and closes
Grow up to be a useful person 636.The shunt includes an armature winding 630 and four groups of octagonal secondary windings, their quilts
It is arranged as continuous or linear row array configuration.Every group of secondary windings includes two parallel windings 626,628.
Which increase the current handling capability of transformer.Middle winding is armature winding, its parallel secondary windings it
Between extend.
The synthesizer includes four groups of octagonal armature windings 638,640, secondary windings 642 and an electric capacity
Device 646, they are arranged to continuous or linear row array configuration.Each group of armature winding includes that two are put down
Capable winding.Current crowding (being close to) effect is which reduced, because electric current is spreaded more evenly across in secondary windings
So as to reduce loss.Which increases the current handling capability of the transformer.Middle winding is secondary windings, its
Extend between parallel armature winding.
Specifically, shunt and synthesizer all include four groups of windings, each group with difference subspace amplifier PA1,
One in PA2, PA3 and PA4 is associated.The RF input signals are imported into buffer 622, its
Difference output is applied to the armature winding of shunt transformer.Each transformer of the shunt it is parallel
Secondary windings is coupled to the corresponding Differential Input of sub- amplifier.Armature winding 630 is wrapped in four groups of parallel secondary
Between winding, to be generated to four signal inputs of sub- amplifier.Conjunction is imported into per the output of individual sub- amplifier
Corresponding transformer in growing up to be a useful person.Secondary windings 642 is wrapped between four groups of parallel armature windings 638,640
To generate PA outputs, the PA outputs are subsequently coupled to TX/RX switches.The shunt and synthesis
The transformer of device all has air-core and width, spacing and the thickness of metal level are configured in each frequency band (example
Such as, 2.4GHz and 5GHz) enough performances are provided and make input and output impedance meet required inductance
And Q factor.It should be noted that according to different applications, it is possible to implement the alternative configuration of Transformer Winding.
In another kind of substitute technology of any phase mismatch of transformer is overcome so that two of the synthesizer
The armature winding (that is, PA2 and PA3 windings) of internal transformer is longer than the winding of two external transformers (i.e.,
PA1 and PA4 windings).The inductance of two internal primary windings is effectively increased to value L+ Δ L by this, wherein
L represents the inductance of two outside armature windings.This is caused without the need for the input to difference subspace amplifier is intersected.This
The circuit of sample is as shown in figure 22.It should be noted that the amount of inductance increase about 20% (that is, per side 10%)
Δ L, is effective for phase mismatch is reduced as far as possible.It is also to be noted that when the circuit being used in Figure 20
Electric capacity C646 change ± 20%, PVT inductance L change substantially ± 8%.
The transformer (being generally denoted as 650) includes 654, four sub- amplifiers 662 and of shunt
Individual synthesizer 663.The shunt includes an armature winding 657 and four groups of octagonal secondary windings, it
Be arranged to continuous or linear row array configuration.Every group of secondary windings include two parallel windings 656,
658.Which increase the current handling capability of the transformer.Middle winding is armature winding, and which is at parallel time
Extend between level winding.
The synthesizer include four groups of octagonal armature windings (664,666) and (674,672) He one
Secondary windings 668,676, they are arranged to continuous or linear row array configuration.As described above, it is right
There should be longer winding by winding inside the two of PA2 and PA3 groups, cause bigger inductance L+ Δ L.It is each
Group armature winding includes two parallel windings.Current crowding (being close to) effect is which reduced, because electric current is more
Secondary windings is evenly dispersed in so as to reduce loss.Which increases the current handling capability of the transformer.
Middle winding is secondary windings, and which extends between parallel armature winding.
Specifically, shunt and synthesizer all include four groups of windings, each group with difference subspace amplifier PA1,
One in PA2, PA3 and PA4 is associated.The RF input signals are imported into buffer 652, its
Difference output is applied to the armature winding of shunt transformer.Each transformer of the shunt it is parallel
Secondary windings is coupled to the corresponding Differential Input of sub- amplifier.Armature winding 657 is wrapped in four groups of parallel secondary
Between winding, to be generated to four signal inputs of sub- amplifier.Conjunction is imported into per the output of individual sub- amplifier
Corresponding transformer in growing up to be a useful person.Secondary windings 668,676 be wrapped in four groups of parallel armature windings (664,666)
(674,672) between to generate PA outputs, PA output is subsequently coupled to TX/RX switches.
The transformer of the shunt and synthesizer all has air-core and width, spacing and the thickness of metal level are matched somebody with somebody
Be set to enough performances are provided in each frequency band (for example, 2.4GHz and 5GHz) and make input and output resistance
Inductance and Q factor needed for anti-satisfaction.It should be noted that according to different applications, it is possible to implement transformation
The alternative configuration of device winding.
Figure 23 shows the layout of the 11st example integrated transformer of the power amplifier for the present invention.
In the alternate embodiment, in order to overcome the phase mismatch of transformer so that two internal transformers of synthesizer
Armature winding (i.e. PA2 and PA3 windings) be longer than two external transformers armature winding (i.e. PA1 and
PA4 windings).The inductance of two internal primary windings is effectively increased to value L+ Δ L by this, and wherein L is represented
The inductance of two outside armature windings.This is caused without the need for the input to difference subspace amplifier is intersected.Should be noted
To being, the amount Δ L of inductance increase about 20% (i.e. per side 10%), is effective for phase mismatch is reduced as far as possible
's.It is also to be noted that when the electric capacity C646 of the circuit being used in Figure 20 changes the electricity of ± 20%, PVT
The change substantially ± 8% of sense L.
The transformer (being generally denoted as 680) is including 690, four sub- amplifiers 688 of shunt and closes
Grow up to be a useful person 692.The shunt includes an armature winding 686 and four groups of rectangle secondary windings 684, and they are by cloth
It is set to continuous or linear row array configuration.
The synthesizer includes the armature winding 694 and a secondary windings 696 of four groups of rectangles, and they are arranged
For continuous or linear row array configuration.As described above, corresponding to inside two groups of PA2 and PA3 around
Group has longer winding, causes bigger inductance L+ Δ L.
Specifically, shunt and synthesizer all include four groups of windings, each group with difference subspace amplifier PA1,
One in PA2, PA3 and PA4 is associated.The RF input signals are imported into buffer 682, its
Difference output is applied to the armature winding of shunt transformer.Each transformer of the shunt it is parallel
Secondary windings is coupled to the corresponding Differential Input of sub- amplifier.Armature winding 686 surround four groups of secondary windings, with
It is generated to four signal inputs of sub- amplifier.Output per individual sub- amplifier is imported into corresponding in synthesizer
Transformer.Around four groups of armature windings 694 to generate PA outputs, the PA is exported secondary windings 696
It is subsequently coupled to TX/RX switches.The transformer of the shunt and synthesizer all has air-core and gold
Width, spacing and the thickness for belonging to layer is configured to provide foot in each frequency band (for example, 2.4GHz and 5GHz)
Enough performances and inductance and Q factor needed for meeting input and output impedance.It should be noted that root
According to different applications, it is possible to implement the alternative configuration of Transformer Winding.
In battery-operated wireless system (such as mobile phone), RF power amplifiers (PA) are typically most
Significant power consuming components.In order to minimize power consumption, system-level power management scheme is designed to very wide
Output power range in operation RF PA.When supply voltage is fixed, in the effect of the RF PA of lower power levels
Rate is low-down, and average power consumption and battery life are had a negative impact.In order to improve on broad power band
The overall efficiency of RF PA, implements the dynamic control of supply voltage.
Efficiency power amplifier (PAE) is the key factor in the RF designs of modern wireless systems.For example,
In cellular basestation, power consumption spends operator's millions of dollar every year.In smart mobile phone, due to battery
Life-span declines and mobile phone heating, is focusing more on the efficiency of PA.This poor efficiency is due to most of newest
3G the and 4G technologies of more speed have used the quadrature amplitude such as on OFDM (OFDM)
The modulator approach of the WCDMA and Long Term Evolution (LTE) of modulation (QAM) etc.All these skills
Art needs substantially less efficient linear PA.Typical linear RF PA are operated in A classes or AB classes come real
Existing its linearity.Maximum theoretical efficiency is 50%, but in practice, and highest efficiency is 30% to 35%
In the range of.When amplifier is run in compression or near the compression point, this efficiency is best accomplished by.When defeated
Enter signal at or approximately at generation compression during its peak value.In newest modulator approach, peak-to-average power ratio (PAPR)
It is very high.Then for most transmission, PA is operated in far below under compression point, outstanding linear so as to provide
Degree, and efficiency average out to 20% or less.This can cause to increase as the power that heat dissipates, and be drawn by PA
Overcurrent can cause shorter battery life.
The present invention solves this problem using envelope-tracking, and it is with the amplitude or envelope of dynamic tracking RF signals
Fast-changing D/C power instead of the fixed D/C power of tradition for PA.Envelope-tracking (ET) and
Envelope elimination and restoration (EER) is two kinds of technologies for realizing efficient linear RF power amplifier.Such as
Shown in Figure 24 and Figure 25, in both technologies, variable voltage is supplied to RF by the power supply after efficient modulation
Power amplifier.
Figure 24 shows the block diagram of the 7th example TX path sections of the FEM circuits comprising envelope-tracking.Institute
Circuit (being generally denoted as 760) is stated including input coupler 762, envelope detector 764, modulation power source
766 and linear RF power amplifier 768.In operation, the RF inputs letter is generated by envelope detector
Number envelope and the power supply that is entered into after modulation, power supply after modulation generates the envelope with RF input signals
Consistent D/C voltage output VOUT.Supply voltage of the voltage output as linear RF PA.Should be noted
, because power amplifier is based on linear topology (i.e. ET), dc-dc output voltage can be straight
PA supply voltages are connected in succession, so power buffer is optional.
Figure 25 shows the frame of the 8th example TX path sections of the FEM circuits including envelope elimination and recovery
Figure.The circuit (being generally denoted as 770) includes input coupler 772, envelope detector 774, modulation
Rear power supply 776, limiter 778 and linear R F power amplifier 779.In operation, envelope detected
Device generates the envelope of RF input signals the power supply being entered into after modulation, power supply after modulation generate with
The D/C voltage that the envelope of RF input signals is consistent exports VOUT.The limiter generates phase reference signal,
Phase reference signal is imported into non-linear PA.Voltage output VOUTAs the power supply of linear R F PA
Voltage.It should be noted that because the PA is based on nonlinear topology (i.e. EER), here electricity
Used in road, power buffer is not optional.
Will be described below and realized efficiently using the dc-dc changed with very fast output voltage
The technology of the envelope-tracking system of rate.
Figure 26 A show the system block diagram for realizing the closed loop RF Power Control by power supply.The circuit is (total
It is denoted as on body 950) including RF power amplifiers 956, output power detector 958, power controller block
952 and dc-dc 954.Output RF power read by detector 958, and with power control
Command signal processed compares.In response to the error between the RF power and order power of reading, the DC-DC
The vernier control adjustment output voltage (V of converter 954OUT).In the steady state, the power output of measurement is preferable
Ground is equal to power control command.In such a system, relative to wherein be used for RF PA supply voltage be constant
More conventional realization, whole efficiency improves depending on dc-dc, and which can be in very wide output electricity
Very high efficiency is kept in pressure scope and in power output level.Implementing the tradition for RF PA
In dc-dc, institute's facing challenges are to need to provide very fast output voltage transformation to respond RF PA
The change of power output.What is be described below is a kind of new method, in the dc-dc
Very quickly output voltage transformation is provided.
Figure 26 B show AS block diagram (step-down (buck) topology of example sync dc-dc
It is for illustration purposes only, but can be configured using boosting, normal shock (forward) and any other dc-dc).
The circuit (being generally denoted as 720) is including input voltage Vin722nd, switch 724,726, switch drive
Device 736, inductor L0728th, capacitor C0730th, resistor R1, pulse width modulation (PWM) generate
Device 734 and error amplifier 732.In operation, using step-down controller from higher DC input voltage (Vin)
Generate relatively low output voltage (VOUT).If the damage in switch (high side and downside FET) and inductor
Mistake is ignored, then dutycycle or ON time account for the ratio of the total time of converter and can be expressed as
As shown in fig. 26b, dutycycle is by error amplifier (Verr) and PWM ramp voltages (Vosc)
Output determined by.In this and other embodiment, Vosc signals can include sine, triangle, sawtooth
Or any other suitable signal.The ON time starts from the trailing edge of PWM ramp voltages, works as slope
Voltage stops when being equal to the output voltage of error amplifier.The output (Verr) of the error amplifier and set
Being set to makes output voltage (VOUT) feedback fraction be equal to internal reference voltage (Vref).This closed loop feedback system
System makes output voltage control in required level.Normally, the resistive divider network (R1 shown in Figure 26 B
And R2) be used for a part of output voltage is fed back to the end of oppisite phase of error amplifier.By this voltage and Vref
It is compared, and during steady-state adjustment, the output of error amplifier will not be less than holding feedback voltage etc.
In the voltage needed for Vref.Therefore, output voltage is represented by：
Can find out from equation (2), by changing reference voltage (Vref), thus it is possible to vary output voltage (VOUT)。
In order to very fast output voltage transformation is provided in dc-dc, institute of the present invention is described below
A kind of novel method for providing.Figure 27 shows the synchronization including example fast output voltage transfer circuit
The high level block diagram of DC-DC step-down controllers.The circuit (being generally denoted as 740) is including input voltage source
Vin742, switch 744,746, switch driver 759, output inductor L0748th, output capacitor C0749、
Fine-adjusting unit 750, vernier control block 754, resistor R1, R2, error amplifier 756 and PWM generate
Device 758.The fine-adjusting unit includes finely tuning buffer 752, capacitor Ctrim and switch S1, S2.
In operation, under equilibrium mode, switch S1 is connected and is switched S2 shut-offs.Capacitor Ctrim leads to
Cross fine setting buffer and be charged to Vtrim.In such a mode, the DC-DC in converter such as Figure 26 B turns
Parallel operation is worked like that and its output voltage values can be calculated using equation (2).Output capacitor (C0) filled
Electricity is to output voltage (VOUT).Once vernier control order is applied to UP command (i.e. output voltage increase),
Then switch S1 to turn off and switch S2 connections, so as to the trimmer (Ctrim) is connected in series to output
Capacitor (C0).Voltage on the two capacitors is defined as：VOUT+ Vtrim, such output voltage (VOUT)
Very rapidly increase (almost moment) to the new value being given by：
Vout_trim_up=Vout+Vtrim (3)
In order to the backfeed loop of dc-dc is maintained at limit, reference voltage (Vref) increase
The incremental voltage being given by
From output voltage (VOUT) to new voltage (Vout_trim_up) transformation happen very fast, this is because
Need not be to output capacitor (C0) and trimmer (Ctrim) charging.
Before applying to lower control command (i.e. output voltage decline), the stable state of dc-dc should
It is as follows.When the trimmer (Ctrim) is connected in series to output capacitor (C0) and by finely tuning buffering
When device is charged to Vtrim voltages, switchs that S1 is off and switch what S2 was to turn on.In such a mode,
Converter works as the conventional DC-DC converter in Figure 25, and its output voltage values can use equation
(2) calculate.After applying to lower control command, switch S1 and connect and switch S2 shut-offs, so as to finely tune
Capacitor (Ctrim) is from output capacitor (C0) disconnect.Output capacitor (C0) on voltage etc.
In VOUT- Vtrim, so as to output voltage (VOUT) rapidly decline (almost moment) be defined as below
It is new to be worth：
Vout_trim_down=Vout-Vtrim (5)
In order to the backfeed loop of dc-dc is maintained at limit, reference voltage must decline by under
The incremental voltage that formula is given
From output voltage (VOUT) to new voltage (Vout_trim_down) transformation happen very fast, this is
Because need not be to output capacitor (C0) charge.
Using synchronous DC-DC buck topologies using following parameter emulating proposed converter circuit：
C0=Ctrim=22 μ F；L0=6.8 μ H；Fsw=1.15MHz；VOUT=1.2V and for raise
Vtrim up=1.2V；VOUT=the 2.4V and Vtrim down=1.4V for lowering；Iload=500mA；
Vin=3V.Simulation result is displayed in Figure 28,29 and 30.Figure 28 shows
The analog electrical output corrugating of pressure converter.Figure 29 shows the rise output waveform of amplification, and Figure 30 is illustrated
The downward waveform for amplifying.
It should be noted that simulation result shows exist during the raising and lowering of output voltage very soon (less
In 0.1 μ Sec) voltage transformation.By these results and the following public affairs of use of routine DC-DC step-down controllers
The theoretical rising and falling time that formula is calculated is compared：
Wherein Dm=(D1+D2)/2 and | Δ D |=D2-D1.D1 is initial steady state dutycycle, and D2
It is final stable state dutycycle.
Using for above-mentioned simulation result identical parameters, wherein for raise D1=0.4, D2=0.8 and
For the D1=0.8, the D2=0.333 that lower, we obtain following result of calculation：
Trise=20.4 μ Sec
Tfall=21.5 μ Sec
Figure 31 shows the example using the dc-dc changed with fast output voltage mentioned above
The high level block diagram of efficient envelope tracking and system.The system (being generally denoted as 780) is including envelope
Detector 782, analog-digital converter (ADC) 784, the DC-DC changed with fast output voltage mentioned above
Converter 786, programmable delay 788 and RF power amplifiers (buffer) 789.It should be noted that
Power buffer is optional, because dc-dc output voltage can be directly connected to the power supply of PA
Voltage.
In operation, RF envelope signals (envelope input) output of envelope detector 782 is simultaneously applied to
A/D converter and PA power buffers (by postponing 788).A/D converter work is with by mould
Intend RF envelope signals and be quantified as data signal, then the data signal is applied as digital trimming controlling bus
It is added to the dc-dc with fast output voltage transformation.In one embodiment, vernier control
It is high (i.e. logical one) a moment only one of which position that one attribute of bus is, and other positions are low values
(i.e. logical zero).The content of digital trimming controlling bus is used for the output electricity for changing the dc-dc
Pressure (DC-DC VOUT).The output voltage tracks RF envelope signals and arrives there is provided variable supply voltage
PA power amplifiers (buffer).The DC-DC VOUTChange with RF envelope signals one, significantly
Increased PA power buffers efficiency and system whole efficiency.The programmable delay is used to compensate envelope detected
Delay between device and RF signal paths.
In an alternative embodiment, the element of another subsystem or such as baseband subsystems can be with envelope signal
The phase information of digital form is provided together.In this case, the A/D converter module is dispensable
And digital envelope can be trimmed off control circuit and be employed without A/D converter, so as to reduce element
And cost.
The dc-dc is included as shown in Figure 27 and in dc-dc mentioned above.For
RF envelope-tracking systems, the DC-DC with fast output voltage transformation for being configured to the present invention turns
Parallel operation, the converter are implemented as the dc-dc with many discrete output voltages.In order to realize
This target, increases n fine-adjusting unit, and wherein n is the digit of vernier control command line.Additionally, fine setting
Control module generates n Vtrim voltage (wherein n is the digit of vernier control command line) and variable
Vref voltages.
Figure 32 shows the block diagram of the example dc-dc comprising multiple fine-adjusting units of the present invention.It is described
Converter (being generally denoted as 790) is including voltage source Vin, switch 792,794, output inductor L0, it is defeated
Go out capacitor C0, switch driver 793, trimming circuit 796, resistor R1, R2, error amplifier 806
With PWM makers 808.The trimming circuit 796 includes multiple fine-adjusting units 798, switch S1, fine setting
Control module 802 and nor gate 804.Each fine-adjusting unit 798 includes finely tuning buffer 800, trimmer
Device Ctrim and switch S2.
When all vernier control bus signals have " 0 " value, the output of door 804 makes switch S1 connect and n
All S2 switches in individual fine-adjusting unit are both off.Ctrim capacitors in each fine-adjusting unit are each by which
From fine setting buffer be charged to suitable Vtrim.In such a mode, the converter is as traditional
Dc-dc works like that and can calculate its output voltage values using below equation (8).Output
Capacitor (C0) it is charged to initial output voltage (Vout_init)。
For example, if " 0 " position of vernier control bus is changed into during high level (i.e. " 1 " value), switch S1 is closed
Break and switch S2 connections, so as to the trimmer (Ctrim) by fine-adjusting unit ' 0 ' is connected serially to output electricity
Container (C0).Voltage on the two capacitors is defined as Vout_init+Vtrim<0>So that output voltage (Vout)
It is new value that very rapidly (almost moment) increases：
Vout_trim<0>=Vout_init+Vtrim<0> (9)
In order to the backfeed loop of dc-dc is maintained at limit, reference voltage (Vref) increase is used
Following formula and the incremental voltage that determines：
From output voltage (Vout_init) to new voltage (i.e. Vout_trim<l>When) transformation happen very fast,
This is because without the need for the output capacitor (C in fine-adjusting unit ' 1 '0) and trimmer (Ctrim) charging.
As can be seen that the numerical value by changing the vernier control bus, thus it is possible to vary the DC-DC conversions
The output voltage of device, it is as follows：
Wherein aiFor the numerical value of the i-th bit of n positions vernier control bus.
It should be noted that the advantage of the envelope-tracking method and system of the present invention is：The DC-DC conversions
Device can use the low switching frequency input envelope signal of the tracking with relatively high bandwidth of converter, therefore keep
Its high efficiency.
It should also be noted that the perfect linear PA suppressed with enough power supplys, changes in its supply voltage
Period, its linearity are impacted by minimally.Therefore, in most of the cases, without using smooth electricity
The necessity on road.
However, in reality, due to the fast transition of the supply voltage of PA, the linearity of the PA is subject to
Affect, in the case of particularly requiring low EVM (i.e. high linearity).It is therefore preferable that using in circuit
Smooth circuit module, such as power buffer.If we consider that non-linear PA (such as envelope eliminate with
Recover or be based in the system of pole (polar) emitter), wherein all of amplitude information is on PA power supplys,
This power buffer is necessary.This " power buffer " can include gain equal to 1 buffer, wherein its
Input is envelope signal and its power supply is from the stair-stepping, rough defeated of the dc-dc
Go out.Output voltage after which is smooth is used for the power supply of PA.
Following parameter in using DC-DC buck converter topologies come emulate the present invention tracking circuit：Quickly
Type A/D converter；Vernier control bus=7；C0=Ctrim<0:6>=22 μ F；L0=6.8 μ H；
FSW=1.15MHz；Vout_init=0.8V, Vin=3V；Vtrim<0>=150mV；Vtrim<1>=300
mV；Vtrim<2>=450mV；Vtrim<3>=600mV；Vtrim<4>=750mV；Vtrim<5>
=900mV；Vtrim<6>=1050mV；The input of RF envelopes includes the sinusoidal waveform that frequency is 10MHz.
Figure 33 shows the figure of the output voltage of the DC-DC change-over circuits for RF inputs, wherein track
810 represent PA power buffer supply voltages, and track 812 represents PA power buffer output voltages.Figure
The figure of 34 output voltages for illustrating in greater detail the DC-DC change-over circuits for RF inputs, wherein track
814 output voltages for representing PA power buffers supply voltage and the expression of track 816 PA power buffers.
The analogous diagram of Figure 33 and 34 shows dc-dc output voltage to the extraordinary of RF envelope signals
Tracking.
Figure 35 shows the schematic diagram of the first example TX/RX switch.The on-off circuit (is generally denoted as
480) including being coupled to the TX input ports of resistor R482, be coupled to the inductor L of RX output ports
484th, antenna port, capacitor C486, transistor Q488, low pass filter 490 and control logic circuit
498.Each low pass filter includes resistor 492,496 and is coupled to the capacitor 494 on ground, and they
Connected with T-shape configuration.
In operation, turned off by making transistor Q, the TX/RX switches are placed under reception pattern.
Under this pattern, signal path is to pass through inductor L to LNA circuits from antenna.In one embodiment,
The inductor may include the inductance for 1.4nH.In addition, inductor may be implemented as being connected to illusory weldering
The closing line with suitable thickness (such as, 0.7mil) and length of disk.
In order to TX/RX switches are placed under sending mode, turn on transistor Q.In such a mode, electricity
Container C and inductor L are combined into antiresonant circuit, so as to the output to emitter is presented high impedance, together
When show less than 0.5dB low insertion loss.Power from emitter is transferred to antenna by resistor R.
In one embodiment, switch is realized using standard CMOS technologies.In another embodiment, make
Switch is realized together with the appropriate peripheral cell for biasing and matching network with PIN diode.It is standby at one
In selecting embodiment, realize that using based on the switch of GaAs (GaAs) RF is switched.Opening based on GaAs
Close and the good linearity and isolation are provided, and low on-resistance and shut-off electric capacity.However, the shortcoming of GaAs
Including：(1) as their N- raceway grooves depletion-mode is configured, it is desirable to which negative grid voltage is turning off；(2)
GaAs switches are driven generally to need extra interface element；And (3) be difficult to it is integrated all on the same chip
Such as the other functions of logic control and memory etc.
In one embodiment, high power, low current are realized and presented to RF switches completely with CMOS
And high isolation, while can be integrated with logic control circuit and other functions based on digital circuit.It is such
RF switches can be included into wireless device, such as mobile phone, wireless phone etc., and which will in further detail below
Description.
Consider such as to include the wireless device of the wireless phone of base and one or more hand-held stations etc.The hand
Hold platform to generally include the single antenna with nearest manufacturer's trend to realize antenna diversity in hand-held station.Due to
The relatively small physical size of hand-held station, conventional space diversity is unpractiaca.Therefore, cordless phone manufacturers
Polarity diversity is realized in hand-held station, one of antenna is vertical polarization, and second antenna is horizontal polarization.
On the statistics of the about 10dB of the diversity antenna in pedestal is improved, link performance highest can be improved by this
6dB.In the case of antenna diversity in hand-held station (HS), the integrated CMOS DPDT switches of the present invention
Have the added advantage that, including：Require less PCB surface product, this in HS designs it is critical that；
It is easily integrated；And low BOM.Base station can include one or two antenna, and they are with relative to each other
Space angle is placed.Space diversity is realized in each time point, for example, direct wave sets up mutually long dry with back wave
Relate to rather than destructive interference antenna.
Logic control circuit 498 is used for the bias voltage of drain electrode, source electrode and the gate terminal for generating transistor Q.
Offset signal is applied to drain electrode, source electrode and the grid of transistor Q by low-pass filter network 490.LPF
The function of circuit 490 is to suppress the RF from drain electrode, source electrode and grid to logic control circuit 498 to reveal.Need
It should be noted that as it is known in the art, can be using other RC mode filter networks without departing from the present invention
Scope.It should be noted that the needs of RF choke coils are avoided using RC FL-networks, and ought
Switch needs RF choke coils (choke) when realizing in cmos circuitry.It is alternatively possible to outside chip
Portion is using RF choke coils or is integrated in chip.
In one embodiment, in order that switch in of a relatively high TX power levels (for example>25
DBm) and high VSWR, N-channel FET488 is built using deep N-well CMOS technology.
In one embodiment, in order that transistor Q conductings, are applied with respect to high voltage (such as 3.6V)
Grid is added to, and drain electrode and source terminal are connected to ground.Therefore, VGSFor the transistor forward bias of 3.6V.
In order that transistor Q shut-offs, high voltage (such as 3.6V) is applied to drain electrode and source electrode, and grid connects
To ground.Therefore, VGSFor the transistor reverse bias of -3.6V.It should be noted that reverse bias transistor with
Turn it off, rather than by grid, drain electrode and source electrode be connected to (or only control gate is extreme and keeps drain electrode
It is constant with source-biased) RF switches will be caused to realize significantly higher isolation (about 17 decibels).
Low-pass filter network 490 on the source electrode, drain and gate end can be used for providing termination, from
And make antenna that there is constant impedance relative to ground.The main purpose of LPF be suppress from drain electrode, grid and source electrode to
The radio-frequency leakage of logic control circuit, so as to prevent the RF loss of signal in logic control circuit.This is to pass through
Configure on-off circuit to realize, so as to the impedance of nmos pass transistor is only by the thing of nmos pass transistor itself
Reason parameter (such as RDS-ON、CDS-OFF、CG、CD、CS) determine and unrelated with logic control circuit.
It should be appreciated that the logic control circuit is exemplary, can use and transistor be caused with other elements
Q works, so as to the specific application of basis is with correct sequential and synchronous turn-on and turn-off.The transistor Q
Can be placed on chip with all related elements, so as to reduces cost.
It is to be further understood that RC network for low pass filter and be associated with transistor Q other
Element is an example, it is possible to use other circuits for performing similar functions, and this is known in electronic applications.
The grid of logic control circuit controlling transistor Q, drain electrode and source electrode.Opening compared to existing technology
Close, the configuration of CMOS technology and using there is provided with the low-power consumption of microammeter, and high-isolation and
Flexibility.
It should be noted that disclosed RF switches are can be also used in the available environment of one or more antennas,
For example in the hand-held station with and without antenna diversity and with and without MIMO functions.The RF
Switch is not limited to for any kind of equipment, and can be used in any environment for requiring multiple switch, such as
Wireless local network connecting point (WLAN AP), cell phone, wireless phone, communication system, radar system
Deng.
In an alternative embodiment, the RF switchgear distributions can be expanded with including extra transistor and
Control circuit for switching between extra port, for example, extra antenna, TX and RX ports.
Switch matrix can be used, such as N × Metzler matrix element, wherein each element are implemented as single NMOS
Transistor, L series parallel combinations or a T or PI combinations.Arbitrarily these combinations can be implemented as complementation
Switch, including NMOS and PMOS.It should be appreciated that various modifications and variations can be designed.For example, may be used
With using different peripheral cells and control circuit.
As described above, SPDT switch includes three outside terminals (i.e. pin or port)：Antenna, TX
And RX.In one embodiment, for each terminal (pin), all with one or more it is in parallel and/
Or the bonding line of series connection, external terminal is connected to the inside SPDT ends (i.e. bonding welding pad) on tube core for which.
In one embodiment, the diameter measurement of bonding line is made by nominal 0.7mil and by copper or gold.The bonding line
Be applied not only to the internal circuit on semiconductor element is connected to the external terminal of equipment packages, be also used for tuning or
The electric capacity of offseting transistor.One or more bonding lines of each pin show relatively high Q factor, this
Contribute to the relatively low insertion loss for connecting.Specific die site and using the quantity of parallel bonding line be suitable to adjust
Humorous nmos switch input capacitance, so as to simplify outside matching network, and for antenna realizes lower inserting
Enter loss.This will be described in further detail below.
Specifically, one or more bonding lines for outside TX pins being coupled to into semiconductor element it is operable with
The capacitance of drain of tuning nmos pass transistor Q.By exterior antenna pin be coupled to one of semiconductor element or
The operable source capacitance to tune nmos pass transistor Q of multiple bonding lines.Outside RX pins are coupled to
One or more bonding lines of semiconductor element are operable to the capacitance of drain for tuning nmos pass transistor Q.Institute
The combination that bonding line is stated with the shunt capacitor based on exterior PC B is formed in TX, RX and antenna and switch
The matching network arranged between transistor Q.
In each node, circuit sees twice capacitance of drain or twice source capacitance.Due to nmos device
Relatively large area (e.g., from about 1 mm wide), so this electric capacity about arrives 1.5pF 0.5.In order to tune
In the electric capacity that this input port is seen, the inductance shown by (one or more in parallel and/or series connection) bonding line
Combination with PCB copper cash is suitable to produce resonance and form tuning circuit in required frequency range.On PCB
The outer parallel connection outside capacitor of piece combine for the inductance with bonding line, with to TX, RX and antenna end
Mouth is presented the impedance of the 50Ohm of a matching.It should be noted that bonding line is typically with a diameter of 0.7
To a part for the encapsulation (such as square, flat, without lead or QFN) of 1mil, and by gold, copper
Or aluminum construction.
Figure 36 shows the schematic diagram of the second example TX/RX switch.It is described switch include integrated TX with
RX baluns and common TX/RX single ended antennas port.High-pass filter and branch nmos switch Q1
Combination can realize relatively high TX/RX isolations and low chip area.The switch (generally by
It is designated as 820) including for the Differential Input from power amplifier to be coupled to the transmitting portion and use of antenna
In the reception of the difference output that the signal received on antenna is coupled to low-noise amplifier (LNA) circuit
Part.The transmitting portion includes capacitor 851,853,873,878,892,894, inductor 880,
882nd, 874,876, including the TX baluns 828 of Transformer Winding 868,870,872, transistor 884,
886th, 888,890 and resistor 891,893,896,898.The receiving portion include capacitor C1,
836th, 838,842,848,854,856,850,852, inductor 862,864,844,846, bag
Include the RX baluns 826 of Transformer Winding 830,832,834, transistor Q1,866,860,840,858
With resistor 822,824,823.
The operation of the switch includes for appropriate control signal being applied to RX control inputs and TX controls are defeated
Enter.In order to TX/RX switches are placed under reception pattern, RX controls are configured to turn off Q1 and TX controls
System is configured to turn off transistor 886,888.Shut-off Q1 will allow the reception signal from antenna to pass through RX
Balun 826 reaches difference transistor to 866,860.The differential signal for being generated is output to LNA circuit (examples
As in Fig. 2 134).
In order to TX/RX switches are placed under sending mode, RX controls are configured to make Q1 conductings and TX
Control is configured to turn on transistor 886,888.Make Q1 conductings that sending signal will be prevented to enter and receive electricity
Road path.Differential signal input from power amplifier input will be imported into transistor 886,888, subsequently
TX baluns 828 are applied to, the output of TX baluns 828 is imported into antenna port.
Figure 37 shows the schematic diagram of example antenna RF switch.The duplexer (being generally denoted as 900)
Including for antenna port is coupled to antenna 1902 and antenna 2948 to realize two days of antenna diversity
Line end mouth.In single antenna application, one of nmos switch is disabled, so as to realize lower insertion loss.
The switch includes capacitor 904,906,908,924,926,944,946,940,942,949, bag
Include the matching network 922 of capacitor 923,925 and transformer 927, low pass filter 912,918,932,
936, inductor 910,946, transistor 914,931, control logic module 920,938 and resistor 916,
928、930、934。
In operation, control logic module configures transistor switch 914,931 with any one time by antenna end
Mouth is coupled to antenna 1 or antenna 2.In order to antenna 1 is coupled to antenna port, control logic module 920 is led to
Crossing antenna l control signals turns on transistor 914, and control logic module 938 is by the control letter of antenna 2
Number turn off transistor 931.In order to antenna 2 is coupled to antenna port, control logic module 920 passes through day
Line l control signals turn off transistor 914, and control logic module 938 is made by 2 control signal of antenna
Transistor 931 is turned on.Low pass filter 912,918,932,936 and control logic module 920,932
Operate the low pass filter 490 and control logic module 494 similar to the TX/RX switches in Figure 35.
Figure 38 shows the curve map of the power added efficiency (PAE) depending on power output.Track 520
Expression is operated in the PAE- power outputs that conventional power amplifier a little is kept out of the way in various thick and thin work.Track
The PAE- power outputs of the 522 FEM circuits and power amplifier for representing the present invention, which passes through using high/low
Sub- amplifier technique combines synchronous dc-dc and the envelope-tracking system based on fine-adjusting unit, effectively
Present multiple keeping out of the way a little.
Figure 39 shows the curve map of the power output depending on input power.Track 524 represents multiple
Power output-the input power of DC2DC working regions, according to Mean Input Power via envelope mentioned above
Tracking system selects thick, thin operating point.
Figure 40 shows the curve map of the AM2AM and AM2PM response of power amplifier circuit.
Figure 42 show power amplifier keep out of the way working region before and after RF signals curve map.Rail
Mark 540 represents the example RF signal of the input of the power amplifier of the present invention.Track 542 represents that power is put
RF signals after big device.Track 544 represents the dynamic buffer region for adopting in the exemplary embodiment.
Figure 43 shows the curve map of the frequency spectrum of the power amplifier for QAM64.Dashed trace represents work(
Sending signal before rate amplifier, and solid line track represents the signal for receiving.Figure 44 show for
The dynamic of QAM64 keep out of the way before and after time domain RF ofdm signal curve map.Fine line represents work(
Signal before rate amplifier, and heavy line represents that dynamic keeps out of the way the signal after power amplifier.Thick two-wire table
First for showing keeps out of the way threshold value TH1, and thin two-wire represents that second keeps out of the way threshold value TH2.Figure 45 show for
The reception of QAM64 and the figure of transmission planisphere.Choice refreshments represent power amplifier before transmission data, and
Thick point represents the data for receiving.
Figure 46 shows the curve map of the frequency spectrum of the power amplifier for QAM256.Dashed trace represents work(
Sending signal before rate amplifier, and solid line track represents the signal for receiving.Figure 47 show for
The dynamic of QAM256 keep out of the way before and after time domain RF ofdm signal curve map.Fine line is represented
Signal before power amplifier, and heavy line represents that dynamic keeps out of the way the signal after power amplifier.Thick two-wire
Represent that first keeps out of the way threshold value TH1, and thin two-wire represents that second keeps out of the way threshold value TH2.Figure 48 show for
The reception of QAM256 and the figure of transmission planisphere.Choice refreshments represent power amplifier before transmission data, and
Thick point represents the data for receiving.
Figure 49 shows the high level block diagram of the exemplary wireless device comprising FEM circuits of the present invention.Flat board/shifting
Bi-directional communication device of the dynamic equipment preferably with voice and/or its communication ability.Additionally, the equipment is optional
Ground is with the ability communicated with other computer systems via internet.It should be noted that the equipment can
With including any suitable wired or wireless equipment, such as multimedia player, mobile communication equipment, cell phone,
Wireless phone, smart mobile phone, PDA, PNA, bluetooth equipment, tablet computing device, such as iPad, Galaxy
Deng.Only it is for illustration purposes only, the equipment is shown as mobile device, such as based on cellular phone, wireless
Phone, smart mobile phone or super mobile phone.It should be noted that this example is not intended to limit the mechanism
Scope, because the present invention can be realized in extensive communication equipment.It will be further appreciated that shown movement
Equipment is deliberately simplified only to illustrate some components, and the mobile device can also be included beyond shown
Other assemblies and subsystem.
The mobile device (being generally denoted as 60) includes：One or more processors 62, which may include
BBP, CPU, microprocessor, DSP etc.；Selectively there is analog- and digital- part.The shifting
Dynamic equipment can be including multiple wireless devices 102 (such as cell phone, wireless phone etc.), with according to this
The FEM circuits 103 and one or more associated antennas of the power amplifier 105 invented and construct
104.Can include for Radio Link and any number of other wireless standards and wireless access technology (RAT)
Wireless device.Example includes, but not limited to DECT (DECT), CDMA
(CDMA), personal communication service (PCS), global mobile communication (GSM)/GPRS/EDGE3G
System, WCDMA, the wireless connections of offer WiMAX when in WiMAX wireless network ranges
WiMAX, provide when in the range of blue tooth radio network bluetooth wirelessly the bluetooth of connection, when focus or
The 802.11WLAN of wireless connection is provided when in the range of dedicated network, based on the wireless of infrastructure or net
LAN (WLAN), near-field communication, UWB, reception are sent from one or more orbiting GPS satellites
The GPS of GPS radio signals, allow users to listen to FM broadcast and in untapped FM
Radio station with low-power send audio frequency (so as to for example in the automobile with FM receiver or home stereo systems or
Digital broadcast television etc. is upper to be played back) FM transceivers.
The mobile device can also include that internal volatile memory 64 (such as RAM), persistence are deposited
Reservoir 68 (such as ROM) and flash memory 66.Non-volatile storage 68 also stores processor 62 and can hold
Capable application, including associated data files, the application allow equipment 60 to perform using associated data files
Its predetermined function.Some optional user interface facilities include：Trace ball/finger wheel, which can refer to including pressing
Wheel rail mark ball, for navigating, selecting menu setecting and confirmation action；QWERTY forms are arranged as such as
To be input into the keypad/keyboard of alphanumeric data；Numeric keypad, for input dial numeral and other controls
System and be input into (keyboard be likely to comprising the such as symbol of telephone call/end key, Menu key and ESC Escape etc,
Function and command key)；Earphone 88；Receiver 86 and/or loudspeaker 84；Microphone and associated audio frequency compile solution
Code device or other multimedia coding-decoders；The vibrator of warning user；One or more video cameras with it is mutually powered-down
Road 110,112；Display (multiple) 122 and the display controller 106 and touch screen controller 108 that associate.
Serial port includes micro USB port 76, correlation USB PHY74 and miniature SD ports 78.Other connect
Mouth connection potentially includes SPI, SDIO, PCI, USD etc., for providing computer of the serial link to user
Or other equipment.SIM/RUIM cards 80 provide the interface of the SIM or RUIM cards of user, so as to
Storage user data, such as address book entries, ID etc..
The battery 72 for being coupled to electric power management circuit 70 provides compact power.By USB power source or company
The AC/DC adapters for being connected to electric power management circuit provide external power source, and the electric power management circuit is operable
To manage the charging and discharging of battery.Except battery and AC/DC external power sources, extra optional power supply has
There is own power source to limit, including：Intercommunication telephone, DC/DC power supplys and any bus-powered power supply (such as exist
USB device under bus-powered pattern).
The operating system software performed by processor 62 is stored preferably in non-volatile storage (i.e. ROM68)
Or in flash memory 66, but it is also possible to it is stored in other kinds of storage device.Additionally, systems soft ware,
Specific device applications or part therein, can be temporarily loaded into volatile memory 64, such as arbitrary access
Memory (RAM).The signal of communication received by mobile device can also be stored in RAM.
Processor 62, in addition to its operating system functions, can perform software application on equipment 60.Can
One group of predetermined application of control basic device operations (such as data and voice communication) is installed during manufacture.It is additional
Can download from internet using (or application program), and install in memory to perform on a processor.
Alternatively, software can be by under any other suitable agreement, such as SDIO, USB, webserver etc.
Carry.
The other assemblies of the mobile device include accelerometer 114 for testing equipment action and direction, are used for
Detect magnetometer 116, FM radio 118 and antenna 120, bluetooth radio 98 and the antenna in magnetic field of the earth
100th, the 94 (bag of Wi-Fi radio based on 802.11 (including such as ' a ', ' b ', ' g ', ' n ', ' ac ' standard)
Include the FEM circuits 95 with the power amplifier 97 built according to the present invention and one or more antennas 96),
GPS90 and antenna 92.
According to the present invention, mobile device 60 be suitable to by electric catalog system be embodied as hardware, software or hardware and
The combination of software.In one embodiment, it is embodied as software task, operates to realize the journey of electric catalog system
Sequence code be performed as one or more tasks run on processor 62 and：(1) it is stored in one or many
In individual memory 64,66,68；Or (2) are stored in the local storage within processor 62 itself.
Terms used herein is intended merely to the purpose for describing specific embodiment, rather than intends to limit the present invention.
As used herein, singulative " ", " one " and " being somebody's turn to do " are also intended to include plural form, unless up and down
Text is clearly indicated otherwise.It should also be understood that term " including " used in this specification and/or "comprising" are specified
The presence of the feature stated, integer, step, operation, element and/or part, but it is not excluded for one or many
The presence or addition of individual further feature, integer, step, operation, element, part and/or their group.
The dress of counter structure, material, operation and all function limitations in claims below
Put or step equivalent, it is intended to including it is any for other specifically noted in the claims
Unit performs structure, material or the operation of the function combinedly.The given description of this invention
Its object is to illustrate and describe, be not exhaustive, be also not intended to limit the invention to institute
The form of statement.As many modifications and variations are readily apparent that to those skilled in the art, institute
A limited number of embodiments disclosed herein are not intended to be limited to the present invention.Accordingly, it should be understood that all conjunctions
Suitable modification thing, modification thing and equivalent can be attributed to or be within the spirit and scope of the invention.To implementing
The selection and explanation of example, is, for the principle and practical application of best explaining the present invention, to make affiliated skill
The those of ordinary skill in art field can understand that the present invention can have the tool of suitable desired special-purpose
There are the various embodiments of various changes.
Claims (19)
1. it is a kind of to send/reception switch, including：
TX ports, which is used to be coupled to RF sending signals；
RX ports, which is used to be coupled to RF reception signals；
Antenna port, which is used to be coupled to antenna；
Inductor, itself and the antenna port and RX ports series coupled；
And
The tandem compound that capacitor and field-effect transistor (FET) are switched, the tandem compound is across the inductance
Device parallel coupled, wherein the FET switch has source electrode, drain and gate terminal, the gate terminal can
Operate the control signal of the FET switch is controlled to receive；Wherein, at least one in following situations
It is true：
A () wherein, the switch is presented conducting in the transmit mode, so as to set up the inductor and described
The high impedance antiresonant circuit of capacitor；
(b) wherein, when the switch is presented conducting in the transmit mode, by the inductor and described
The operation of the high impedance antiresonant circuit of capacitor, prevents the RF sending signals from the RX ports.
2. transmission according to claim 1/reception is switched, wherein the switch is under the sending mode
Conducting is presented, so as to set up the high impedance antiresonant circuit of the inductor and the capacitor.
3. transmission according to claim 1/reception is switched, wherein when the switch is in the sending mode
During lower presentation conducting, by the inductor and the behaviour of the high impedance antiresonant circuit of the capacitor
Make, the RF sending signals are prevented from the RX ports.
4. transmission according to claim 1/reception is switched, wherein the switch is presented in the receiving mode
Be not turned on, the antenna port and the receiving port are coupled so as to pass through the inductor.
5. transmission according to claim 1/reception switch, is additionally included in the sending port and the day
The resistor connected between line end mouth.
6. transmission according to claim 1/reception is switched, wherein the inductor includes lumped inductor.
7. transmission according to claim 1/reception is switched, wherein the inductor includes one or more
Bonding line.
8. transmission according to claim 1/reception is switched, wherein the FET switch is using selected from following
Manufacturing, described group includes semiconductor technology in group：Complementary metal oxide semiconductors (CMOS) (CMOS), arsenic
Change gallium (GaAs), SiGe (SiGe) and gallium nitride (GaN).
9. transmission according to claim 1/reception is switched, wherein the transmission/reception switch is suitable to send
Meet selected from the signal of the wireless standard of the following group with receiving, described group includes：802.11WLAN、LTE、
WiMAX, HDTV, 3G honeycomb, 4G honeycombs and DECT.
10. it is a kind of to send/reception switch, including：
TX ports, which is used to be coupled to RF sending signals；
RX ports, which is used to be coupled to RF reception signals；
Antenna port, which is used to be coupled to antenna；
First balun, its it is operable with by the RF reception signal be coupled to the RX from the antenna port
Port；
Capacitor, which is connected with first balun；
Field-effect transistor (FET) is switched, its armature winding parallel coupled across first balun；And
Second balun, which is operable so that the RF sending signals are coupled to the antenna from the TX ports
Port.
11. transmissions according to claim 10/reception switch, wherein the FET switch is in sending mode
It is lower that conducting is presented, so that being coupled to the input end grounding of the low-noise amplifier (LNA) of the RX ports.
12. transmissions according to claim 10/reception switch, wherein the FET switch is in sending mode
It is lower that conducting is presented, so as to the RF sending signals are sent to the antenna port from the TX ports, together
When prevent the RF sending signals enter the RX ports.
13. transmissions according to claim 10/reception switch, wherein the FET switch is in sending mode
It is lower present conducting, thus the capacitor, the resultant impedance of the FET switch in the conduction state and
The reflected umpedance for being coupled to the low-noise amplifier (LNA) of the RX ports to the RF sending signals is in
Now relatively high impedance.
14. transmissions according to claim 10/reception switch, are additionally included in the TX ports and power
The matching network coupled between amplifier circuit.
15. transmissions according to claim 10/reception switch, are additionally included in the RX ports and low noise
The matching network coupled between acoustic amplifier.
16. transmissions according to claim 10/reception switch, wherein the FET switch is in reception pattern
Lower presentation is not turned on, so as to couple the antenna port and the receiving port by first balun.
17. transmissions according to claim 10/reception switch, also including tuning oscillating circuit, its coupling
To first balun to carry out impedance with the low-noise amplifier (LNA) for being coupled to the RX ports
Match somebody with somebody.
18. transmissions according to claim 10/reception switch, wherein the transmission/reception switch is using choosing
Manufacturing, described group includes semiconductor technology from the following group：Complementary metal oxide semiconductors (CMOS) (CMOS),
GaAs (GaAs), SiGe (SiGe) and gallium nitride (GaN).
19. transmissions according to claim 10/reception switch, wherein the transmission/reception switch is suitable to send out
Send and receive and meet selected from the signal of the wireless standard of the following group, described group includes：802.11WLAN、LTE、
WiMAX, HDTV, 3G honeycomb, 4G honeycombs and DECT.
Applications Claiming Priority (13)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201261705150P | 2012-09-25 | 2012-09-25 | |
| US61/705,150 | 2012-09-25 | ||
| US201261720001P | 2012-10-30 | 2012-10-30 | |
| US61/720,001 | 2012-10-30 | ||
| US201261726699P | 2012-11-15 | 2012-11-15 | |
| US201261726717P | 2012-11-15 | 2012-11-15 | |
| US61/726,717 | 2012-11-15 | ||
| US61/726,699 | 2012-11-15 | ||
| US201261727120P | 2012-11-16 | 2012-11-16 | |
| US201261727121P | 2012-11-16 | 2012-11-16 | |
| US61/727,120 | 2012-11-16 | ||
| US61/727,121 | 2012-11-16 | ||
| PCT/US2013/061623 WO2014052417A1 (en) | 2012-09-25 | 2013-09-25 | Cmos based tx/rx switch |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| CN104170267A CN104170267A (en) | 2014-11-26 |
| CN104170267B CN104170267B (en) | 2017-02-22 |
| CN104170267B9 true CN104170267B9 (en) | 2017-04-05 |
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Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201380004662.XA Active CN104170267B9 (en) | 2012-09-25 | 2013-09-25 | CMOS-based TX/RX switch |
| CN201380004622.5A Active CN104160553B (en) | 2012-09-25 | 2013-09-25 | RF duplexer based on CMOS |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
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| CN201380004622.5A Active CN104160553B (en) | 2012-09-25 | 2013-09-25 | RF duplexer based on CMOS |
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| WO (2) | WO2014052413A1 (en) |
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| CN110995224A (en) * | 2019-12-09 | 2020-04-10 | 成都知融科技股份有限公司 | Switch structure with transceiving switching and polarization switching functions |
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| CN112072327B (en) * | 2020-08-27 | 2023-12-19 | Oppo广东移动通信有限公司 | Antenna device and electronic equipment |
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Also Published As
| Publication number | Publication date |
|---|---|
| CN104160553A (en) | 2014-11-19 |
| WO2014052413A1 (en) | 2014-04-03 |
| WO2014052417A1 (en) | 2014-04-03 |
| CN104160553B (en) | 2017-03-01 |
| CN104170267B (en) | 2017-02-22 |
| CN104170267A (en) | 2014-11-26 |
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