CN104157659A - Radiation detector crosstalk segregating radiating reinforcing pixel structure and manufacturing method thereof - Google Patents
Radiation detector crosstalk segregating radiating reinforcing pixel structure and manufacturing method thereof Download PDFInfo
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Abstract
The invention relates to a radiation detector crosstalk segregating radiating reinforcing pixel structure and a manufacturing method thereof. The structure comprises an electrode field plate, a P well, a P + area, an insulating medium material, N type bulk silicon, an N type MOSFET, a P type MOSFET, a back electrode, a field plate metal electrode, a P + extracting electrode and a connecting field plate groove. According to the invention, the radiation detector pixel structure provides with an air gap and a groove field plate is adopted, an air gap separating structure exists between a top silicon MOSFET and a middle electrode filed plate and can effectively prevent a bottom electric potential from expanding towards the top silicon MOSFET area, and a TID effect generates in an insulating medium after shielding radiation ionization; the MOSFET in a circuit is surrounded by the groove silicon connected with the electrode field plate, the structure can further reduce the parasitic capacitance between the circuit and a sensor, and two parts of signals can be effectively prevented from crosstalk.
Description
Technical field
The present invention relates to a kind of radiation detector crosstalk manufacture method of isolation and radiation hardened dot structure of isolation and radiation hardened dot structure and radiation detector of crosstalking.
Background technology
Radiation detector is that the non equilibrium carrier by collecting the silicon atom generation ionization reaction generation around of charged particle and radiating particle incident path detects charged particle.The key parameter of weighing its performance comprises resolution, signal to noise ratio, reading speed and radiation hardened ability etc.For further improving signal to noise ratio and the radiation hardened ability of radiation detector, and improve charge collection efficiency and acquisition time, need to study the structure such as element sensor and transfer tube, charge-trapping mechanism and performance impact are provided to improvement project.
Silicon-on-insulator (Silicon On Insulator, SOI) pixel detector is that element sensor is integrated on one chip with sub-micron compensated semiconductor field effect transistor circuitry.Its feature is that size is little, and resolution is high and quality is low.And relatively conventional bulk silicon pixel detector, need not (Bonding on) " binding " bonding packaging technology, has larger improvement on complex manufacturing technology degree and cost.But SOI pixel detector exists some row problems in real work, such as back of the body matrix effect, total radiation dose effect produces hole trap burying in oxygen, and crosstalking between circuit and transducer etc.
Nested well structure (Nested well structure NWS) is proposed in article " F.F.Khalid; G.W.Deptuch; A.Shenai; et al.Monolithic Active Pixel Matrix with Binary Counters (MAMBO) ASIC.Nuclear Science Symposium Conference Record (NSS/MIC); 2010IEEE.2010; 1544-1550. ", this structure can buffer circuit and transducer between crosstalk, but this structure is for avoiding carrying on the back matrix effect, P well structure must comprise circuit part completely, can not independent optimization.Article " T.Miyoshi, Recent progress in development of SOI pixel detectors.Nuclear Science Symposium Conference Record (NSS/MIC), 2010 IEEE.2010, 1885-1888. " silicon (DSOI) dot structure on double insulator proposed, this structure comprises horizontal field plate burying in oxide structure, and this field plate current potential is adjustable, this structure also can well buffer circuit and transducer between crosstalk, but but because burying oxide structure under radiation condition, introduce a large amount of hole traps, thereby produce total ionizing dose (Total Ionizing Dose-TID) effect.Publication " application number: CN200980133383; Cheng Luoyun; have the fleet plough groove isolation structure of air gap, the cmos image sensor that adopts this fleet plough groove isolation structure and manufacturer thereof " has provided air gap fleet plough groove isolation structure, but this structure is mainly isolation structure between pixel and pixel, and the dark current that the air gap existing can avoid medium of oxides to produce affects main picture element signal, uncorrelated with the problem that will solve in this patent.Thereby, current need badly to solve in SOI radiation detector pixel between circuit and transducer, crosstalk and radiation TID effect.
Summary of the invention
The object of the present invention is to provide and a kind of further reduce between circuit and transducer and crosstalk, and a kind of radiation detector of radiation-screening TID effect crosstalk isolation and radiation hardened dot structure.The manufacture method that the present invention also aims to provide a kind of radiation detector to crosstalk isolation and radiation hardened dot structure.
The object of the present invention is achieved like this:
Radiation detector is crosstalked and is isolated and radiation hardened dot structure, comprises electrode field plate, P trap, and P+ region, dielectric material, N-type body silicon, N-type MOSFET, P type MOSFET, back electrode, field plate metal electrode, P+ extraction electrode, connects field-plate trench; Above electrode field plate, the two couples of N-type MOSFET that cooperatively interact and P type MOSFET are arranged on the both sides of P+ extraction electrode, and every couple of N-type MOSFET is provided with the both sides of P type MOSFET the field plate metal electrode being connected with electrode field plate; Electrode field plate, N-type MOSFET, P type MOSFET, P+ extraction electrode, field plate metal electrode are encapsulated in dielectric material jointly; The P+ region of center, dielectric material below for being connected with P+ extraction electrode, both sides, P+ region are P trap, P+ region and P trap are packaged together by N-type body silicon; Between electrode field plate and MOSFET, have air gap, air gap does not contact with the raceway groove of MOSFET, and air gap is no more than the spacing of border farthest of source electrode and drain electrode along the width of the horizontal direction of MOSFET source electrode and drain electrode line; Air gap is greater than the width of MOSFET along the vertical line direction of MOSFET source electrode and drain electrode line; The horizontal contact material of air gap is dielectric material.
Dielectric material is silicon nitride or silica.
The level of air gap is shaped as ellipse, rectangle or circle.
Radiation detector crosstalk isolation and the manufacture method of radiation hardened dot structure:
(1) adopt silicon-on-insulator epitaxial wafer, generate insulating medium layer;
(2) etching dielectric is heterogeneous texture;
(3) dock low-temperature bonding with the silicon-on-insulator epitaxial wafer of another top layer silicon continuous distribution or discontinuous distribution;
(4) remove and support silicon and dielectric material, at the silicon layer periphery of preparation MOSFET, groove is enclosed in etching one, fills with the identical extension heavily doped silicon material of the doping type of electrode field plate, extraction electrode field-plate trench.
The lateral etches size of etching dielectric is greater than the trench length of MOSFET.
Beneficial effect of the present invention is:
According to the radiation detector dot structure with air gap and groove field plate of the present invention, between top layer silicon MOSFET and target field plate, there is air gap isolation structure, this structure can effectively stop bottom potential to the expansion of top layer silicon MOSFET tagma, after radiation-screening ionization, produces TID effect in dielectric; In circuit, MOSFET is surrounded by the groove silicon being connected with field plate electrode, and this structure can further reduce parasitic capacitance between circuit and transducer, effectively shields between two parts of signals and crosstalks.
Brief description of the drawings
Fig. 1 is the nested trap dot structure having proposed;
Fig. 2 is silicon dot structure on the double insulator having proposed;
Fig. 3 is the dot structure that the present invention proposes;
Fig. 4 is the schematic diagram illustrating according to the concrete steps of the dot structure of the embodiment of the present invention;
Fig. 5 is the schematic diagram illustrating according to the concrete steps of the dot structure of the embodiment of the present invention;
Fig. 6 is the schematic diagram illustrating according to the concrete steps of the dot structure of the embodiment of the present invention;
Fig. 7 is the schematic diagram illustrating according to the concrete steps of the dot structure of the embodiment of the present invention;
Fig. 8 is the schematic diagram illustrating according to the concrete steps of the dot structure of the embodiment of the present invention;
Fig. 9 is the schematic diagram illustrating according to the concrete steps of the dot structure of the embodiment of the present invention;
Figure 10 is the schematic top plan view of a kind of groove of the present invention layout in pixel.
Figure 11 is the schematic top plan view of a kind of groove of the present invention layout in pixel.
Figure 12 is the schematic top plan view of a kind of groove of the present invention layout in pixel.
Figure 13 is the schematic top plan view of a kind of groove of the present invention layout in pixel.
Figure 14 be the present invention with N-type MOSFET in silicon dot structure on nested trap dot structure, double insulator the threshold voltage deviator comparison diagram under total radiation dose effect;
Figure 15 be the present invention with P type MOSFET in silicon dot structure on nested trap dot structure, double insulator the threshold voltage deviator comparison diagram under total radiation dose effect;
Figure 16 be the present invention with circuit in silicon dot structure on nested trap dot structure, double insulator with parasitic capacitance comparison diagram between sensor electrode.
Embodiment
Below in conjunction with rear accompanying drawing, the present invention is described further.
Radiation detector is crosstalked and is isolated and radiation hardened dot structure, comprises air gap, is formed on electrode field plate, is formed on the below of electric circuit metal oxide semiconductor field effect transistor.The horizontal contact material of air gap is silica medium material.Gap structure is in the time of depression angle, and figure can be rectangle, circle, the oval gap structure that waits oxide medium to surround; The step that forms gap structure can comprise: adopt silicon-on-insulator epitaxial wafer, generate certain thickness insulating medium layer, adopt etching mode, dielectric is etched to heterogeneous texture; Then dock low-temperature bonding with the silicon-on-insulator epitaxial wafer of another top layer silicon continuous distribution or discontinuous distribution; In the time preparing another silicon-on-insulator epitaxial wafer, if top layer silicon continuous distribution, the follow-up technology such as PN junction or shallow trench that need to adopt is isolated the mos field effect transistor generating; After two parts silicon-on-insulator wafer bonding, between the top layer silicon of gap structure in two parts silicon-on-insulator, and two parts top layer silicon is by dielectric materials for support.After bonding is processed, remove and support silicon and dielectric material, preparing the silicon layer periphery of mos field effect transistor, shallow ditch groove structure is enclosed in etching one, and extension heavily doped silicon material is filled, thereby extraction electrode field-plate trench, makes groove field plate surround the mos field effect transistor of circuit.Be positioned at the gap structure of electric circuit metal oxide semiconductor field effect transistor raceway groove below, the back of the body matrix effect that can effectively stop bottom potential to produce the expansion of electromotive force and to cause, can also avoid radiation ionization total dose effect in dielectric, to produce a large amount of hole charge, thereby affect the threshold voltage change of N-type or P type metal oxide semiconductor field-effect transistor; Groove field plate structure is protective circuit mos field effect transistor effectively, further reduces circuit with parasitic capacitance between transducer, between pad electrode, crosstalks, and improves radiation detector probe radiation reinforcement ability and detectivity.Therefore, in fact, air gap isolation structure according to the present invention can be applied to the fields such as business, military, space flight.
Target of the present invention is to provide has such air gap isolation and SOI radiation detector dot structure and the manufacture method thereof of groove field plate structure.Be particularly related to semiconductor field effect transistor channel part below in pixel top layer silicon circuit and, for space, do not have the dielectric materials such as silica; And semiconductor field effect transistor is around surrounded by silicon trench, is drawn, as control of Electric potentials field plate by electrode.Be mainly used in particle detector, radiation detector.
A kind of radiation detector is crosstalked and is isolated and radiation hardened dot structure, comprising: air gap, be formed on electrode field plate, and be formed on the below of electric circuit metal oxide semiconductor field effect transistor.The horizontal contact material of air gap is silica medium material.Gap structure, the horizontal contact material of air gap can be the insulant dielectric materials such as silicon nitride, or multilayer dielectricity.Gap structure, below mos field effect transistor, but does not contact with the channel part of mos field effect transistor.Gap structure is below mos field effect transistor, but transverse width is no more than the spacing of border farthest of source electrode and the drain electrode of mos field effect transistor.Gap structure will exceed the width of mos field effect transistor in the third dimension direction of plane, ensure that the channel part of mos field effect transistor does not contact with medium of oxides material.Gap structure is in the time of depression angle, and figure can be rectangle, circle, the oval gap structure that waits oxide medium to surround.Gap structure height can be mediated according to process conditions.Gap structure can form by silicon-on-insulator bonding technology.
The step that forms gap structure can comprise: adopt silicon-on-insulator epitaxial wafer, generate certain thickness insulating medium layer, adopt etching mode, dielectric is etched to heterogeneous texture; Then dock low-temperature bonding with the silicon-on-insulator epitaxial wafer of another top layer silicon continuous distribution or discontinuous distribution.In the time of growth insulating medium layer, this material can be silica, or the stacked dielectric material of a silica silicon nitride, or other dielectric materials.In the process of formation etching mask, etching can make SI semi-insulation medium be etched away completely, spills top layer silicon; Other SI semi-insulation media retain.Etching can make SI semi-insulation medium do not etched away completely, does not spill top layer silicon; Other SI semi-insulation media retain.In the process of formation etching mask, etching makes SI semi-insulation medium completely or complete etching, and its lateral etches size is greater than the channel length of mos field effect transistor; Ensure that mos field effect transistor raceway groove does not contact dielectric.In the time preparing another silicon-on-insulator epitaxial wafer, if top layer silicon continuous distribution, the follow-up technology such as PN junction or shallow trench that need to adopt is isolated the mos field effect transistor generating.Etching can make SI semi-insulation medium do not etched away completely, does not spill top layer silicon; Other SI semi-insulation media retain.In the time preparing another silicon-on-insulator epitaxial wafer, top layer silicon can be equal height with dielectric material upper surface.In the time preparing another silicon-on-insulator epitaxial wafer, top layer silicon can be non-equal height with dielectric material upper surface.In the time preparing another silicon-on-insulator epitaxial wafer, if the discontinuous distribution of top layer silicon, every part is in independence or circuit, to need connected mos field effect transistor.If top layer silicon continuous distribution, every part is in independence or circuit, to need connected mos field effect transistor.Continuous or the discontinuous distribution of top layer silicon, the lateral dimension of its silicon materials is greater than the lateral dimension that air gap etching stays; Ensure that dielectric material can physical support MOSFET device.After two parts silicon-on-insulator wafer bonding, between the top layer silicon of gap structure in two parts silicon-on-insulator, and two parts top layer silicon is by dielectric materials for support.After bonding is processed, remove and support silicon and dielectric material, preparing the silicon layer periphery of mos field effect transistor, shallow ditch groove structure is enclosed in etching one, and extension heavily doped silicon material is filled, thereby extraction electrode field-plate trench, makes groove field plate surround the mos field effect transistor of circuit.In the time that extension heavily doped silicon material is filled, ensure that the doping type of filling silicon is identical with the doping type of electrode field plate; Groove structure surrounds metal oxide semiconductor field effect transistor region, and groove can surround structure for rectangle, and is divided into the encirclement structure of outer rectangle and interior rectangle, and two parts are extraction electrode short circuit respectively; Groove can be the encirclement structure of straight flange or arc or polygon combination, and this encirclement structure is divided into outer encirclement and interior encirclement, two parts difference extraction electrode short circuit; Groove can be the encirclement structure of outer rectangle and interior rectangle, and these two parts surround structure can be by position, the space UNICOM in metal oxide semiconductor field effect transistor region together, extraction electrode short circuit respectively; Groove can be the encirclement structure of straight flange or arc or polygon combination, and these two parts surround structure can be by position, the space UNICOM in metal oxide semiconductor field effect transistor region together, extraction electrode short circuit respectively.
According to an aspect of the present invention, provide a kind of radiation detector crosstalk isolation and radiation hardened dot structure comprise: transducer, electronic circuit part and isolation structure between the two.Wherein Sensor section structure comprises: N-type extension 305, P trap 302, P+ region 303, back electrode 308 and P+ electrode 303.Electronic circuit part is made up of mos field effect transistor (Metal Oxide Semiconductor Field Effect Transistor MOSFET) 306 and 307, and the electrode of MOSFET 306 and 307 forms line with sensor electrode 310 according to physical circuit layout.Isolation structure comprises: field plate electrode 301, field-plate trench structure 311, the gap structure 312 between field plate and MOSFET.This patent propose radiation detector crosstalk isolation and radiation hardened dot structure feature specific as follows:
Air gap 312, is formed on field plate electrode 301, is formed on the below of electric circuit metal oxide semiconductor field effect transistor MOSFET.The horizontal contact material of air gap 312 is silica medium material 304.
The horizontal contact material of air gap 312 can be the insulant dielectric materials such as silicon nitride, or multilayer dielectricity;
Air gap 312 structures, below MOSFET 306/307, but do not contact with the channel part of MOSFET 306/307;
Air gap 312 structures are below MOSFET 306/307, but transverse width is no more than the spacing of border farthest of source electrode and the drain electrode of MOSFET;
Air gap 312 structures will exceed the width of MOSFET 306/307 in the third dimension direction of plane, ensure that the channel part of MOSFET 306/307 does not contact with medium of oxides material.
Air gap 312 structures are in the time of depression angle, and figure can be rectangle, circle, and ellipse, air gap 312 structures that polygon etc. oxide medium 304 surrounds, specifically can determine according to the actual breadth length ratio design of MOSFET 306/307;
Air gap 312 structure heights can be mediated according to process conditions.
Air gap 312 structures can form by SOI bonding technology;
The step that forms air gap 312 structures can comprise: adopt SOI epitaxial wafer, generate certain thickness insulating medium layer 401, adopt etching mode, dielectric is etched to heterogeneous texture 504; Then dock low-temperature bonding with the SOI epitaxial wafer of another top layer silicon continuous distribution or discontinuous distribution;
In the time of growth insulating medium layer 504, this material can be silica, or the stacked dielectric material of a silica silicon nitride, or other dielectric materials;
In the process of formation etching mask, etching can make SI semi-insulation medium 504 be etched away completely, spills top layer silicon 506; Other SI semi-insulation media retain;
In the process of formation etching mask, etching can make SI semi-insulation medium 504 do not etched away completely, does not spill top layer silicon 506; Other SI semi-insulation media retain;
In the process of formation etching mask, etching makes SI semi-insulation medium completely or complete etching, and its lateral etches size is greater than the channel length of MOSFET 306/307; Ensure that MOSFET 306/307 raceway groove does not contact dielectric.
In the time preparing another SOI epitaxial wafer, if top layer silicon 603 continuous distribution, the follow-up technology such as PN junction or shallow trench that need to adopt is isolated the MOSFET generating;
In the time preparing another SOI epitaxial wafer, top layer silicon 603 can be equal height with dielectric material 602 upper surfaces;
In the time preparing another SOI epitaxial wafer, top layer silicon 603 can be non-equal height with dielectric material 602 upper surfaces;
In the time preparing another SOI epitaxial wafer, if the discontinuous distribution of top layer silicon 603, every part is in independence or circuit, to need connected MOSFET 306/307;
In the time preparing another SOI epitaxial wafer, if top layer silicon 603 continuous distribution, every part is in independence or circuit, to need connected MOSFET 306/307;
Preparing when another SOI epitaxial wafer, the continuous or discontinuous distribution of top layer silicon 603, the lateral dimension of its silicon materials is greater than the lateral dimension that air gap 808 etchings stay; Ensure that dielectric material can physical support MOSFET 806/807 device;
After two parts SOI wafer bonding, between the top layer silicon of air gap 808 structures in two parts SOI, and two parts top layer silicon supports by dielectric material 804.
After bonding is processed, remove and support silicon 601 and dielectric material 602, at the silicon layer periphery of preparation MOSFET 906/907, shallow trench 911 structures are enclosed in etching one, and the filling of extension heavily doped silicon material, make it be connected with field plate electrode 901, thereby draw silicon materials electrode field plate 901;
Groove 911 structures are at regular intervals with MOSFET 906/907 structure, and this spacing is determined jointly by live width spacing dimension in pixel size and processing line;
In the time that extension heavily doped silicon material is filled, ensure that the doping type of filling silicon 911 is identical with the doping type of electrode field plate 901;
Groove 1004 structures are surrounded MOSFET region 1002, and groove 1004 can surround structure for rectangle, and are divided into the encirclement structure of outer rectangle and interior rectangle, and two parts are extraction electrode short circuit respectively;
Groove 1104 structures are surrounded MOSFET region 1102, and groove 1104 can be the encirclement structure of straight flange or arc or polygon combination, and this encirclement structure is divided into outer encirclement and interior encirclement, two parts difference extraction electrode short circuit;
Groove 1204 structures are surrounded MOSFET region 1202, and groove 1204 can be the encirclement structure of outer rectangle and interior rectangle, and these two parts surround structure can be by position, the space UNICOM in MOSFET region 1202 together, extraction electrode short circuit respectively;
Groove 1304 structures are surrounded MOSFET region 1302, and groove 1304 can be the encirclement structure of straight flange or arc or polygon combination, and these two parts surround structure can be by position, the space UNICOM in MOSFET region 1302 together, extraction electrode short circuit respectively.
According to another aspect of the invention, provide the pixelated radiation detector of manufacturing by above method.
Example embodiment of the present invention will be described with reference to the drawings below.If make theme of the present invention wordy to the description of known function or structure, by its omission.And for the object clearly illustrating, in accompanying drawing, the part of crucial point is simplified or amplifies.Herein, the position in feature layer or region can represent relative position, but actual conditions are not necessarily identical with ratio in schematic diagram.
Fig. 1 has provided the nested trap dot structure having proposed.This structure comprises N trap 101, P trap 102, P+ region 103, dielectric material 104, N-type body silicon 105, N-type (or P type) MOSFET 106, P type (or N-type) MOSFET 107, back electrode 108, N+ region 109, N+ metal electrode 110, the parts such as P+ extraction electrode 111.
Fig. 2 has provided silicon dot structure on the double insulator having proposed.This structure comprises electrode field plate 201, P trap 202, P+ region 203, dielectric material 204, N-type body silicon 205, N-type (or P type) MOSFET 206, P type (or N-type) MOSFET 207, back electrode 208, field plate metal electrode 209, the parts such as P+ extraction electrode 210.
Fig. 3 has provided the dot structure with air gap that the present invention proposes.This structure comprises electrode field plate 301, P trap 302, P+ region 303, dielectric material 304, N-type body silicon 305, N-type (or P type) MOSFET 306, P type (or N-type) MOSFET 307, back electrode 308, field plate metal electrode 309, P+ extraction electrode 310, connects the parts such as field-plate trench 311.
Fig. 4 to 9 illustrates the manufacturing step schematic diagram of pixel according to an embodiment of the invention.Fig. 4 to 9 is illustrated and pays close attention in pixel circuit with the isolation structure between transducer, therefore in figure about the MOSFET layout in transducer or circuit, be only all signal effect.
According to the manufacturing step of the dot structure with air gap of the present invention, as shown in Figure 4, in the top layer silicon 401 of silicon-on-insulator, mask etch goes out P+ injection zone 406, forms P+ region 403, and inject P trap 402 regions after the annealing of P+ Implantation.
Then, as shown in Figure 5, deposit one deck and 404 same dielectric media 504 in top layer silicon 501, after flattening surface, carry out mask etch, etch non-homogeneous dielectric structure 504, and etch-hole 506 can expose field plate structure 501, also can not expose field plate structure 501.
Then, as shown in Figure 6, separately prepare a silicon-on-insulator epitaxial wafer, its top layer silicon 603 can be discontinuous state, and upper surface is equal with dielectric 602.Here require top layer silicon 603 layouts will with etch-hole 506 think corresponding, ensure top layer silicon 603 do not contact with dielectric structure 504 as the part of raceway groove.
Then, as shown in Figure 7, after silicon epitaxial wafer 605 overturns on the silicon-on-insulator of preparation, after aiming at silicon-on-insulator epitaxial wafer 505, carry out low-temperature bonding, and silicon 706,707 is with between field plate, has gap structure 708.After bonding technology completes, remove and support silicon 601, and planarization, make silicon 706 and 707 spill surface.
Then, as shown in Figure 8, after mask etch, etch groove structure, and this groove through yard plate structure, extension heavily doped silicon material, is surrounded top layer silicon 806 and 807.And the concrete graphic structure of concrete mask can have more the shared space size of actual MOSFET and determine.To the planarization of extension heavily doped silicon, make its upper surface equal with 807 with top layer silicon 806 afterwards.Carry out again N-type and p type impurity and inject, form the required PN junction structure of top layer silicon 806 and 807 MOSFET.
Then, as shown in Figure 9, after heat growth gate oxide, depositing polysilicon again, etches away after redundance, after mask etch, get the electrode contact hole of top layer silicon MOSFET 906 and 907, on field-plate trench 911 structures and P+ region, metal electrode is drawn in etching simultaneously.Afterwards in deposit dielectric material 904, back metallization.These techniques are normally known in the art, so details is omitted.
The schematic top plan view that Figure 10 to 13 is groove of the present invention layout in pixel.Groove 1004 structures are surrounded MOSFET region 1002, and groove 1004 can surround structure for rectangle, and are divided into the encirclement structure of outer rectangle and interior rectangle, and two parts are extraction electrode short circuit respectively; Groove 1104 structures are surrounded MOSFET region 1102, and groove 1104 can be the encirclement structure of straight flange or arc or polygon combination, and this encirclement structure is divided into outer encirclement and interior encirclement, two parts difference extraction electrode short circuit; Groove 1204 structures are surrounded MOSFET region 1202, and groove 1204 can be the encirclement structure of outer rectangle and interior rectangle, and these two parts surround structure can be by position, the space UNICOM in MOSFET region 1202 together, extraction electrode short circuit respectively; Groove 1304 structures are surrounded MOSFET region 1302, and groove 1304 can be the encirclement structure of straight flange or arc or polygon combination, and these two parts surround structure can be by position, the space UNICOM in MOSFET region 1302 together, extraction electrode short circuit respectively.
Figure 14 and 15 for the present invention with N-type in silicon dot structure on nested trap dot structure, double insulator and P type MOSFET the threshold voltage deviator comparison diagram under total radiation dose effect.As seen from the figure, the present invention proposes the impact of not raying of dot structure total dose effect, and relative two kinds propose dot structure, have better radiation hardened ability.
Figure 16 be the present invention with circuit in silicon dot structure on nested trap dot structure, double insulator with parasitic capacitance comparison diagram between sensor electrode.Have figure etching, the present invention proposes dot structure has lower circuit with parasitic capacitance between sensor electrode, further reduces interelectrode crosstalking.
Radiation detector dot structure with air gap and groove field plate according to the present invention comprises: top layer silicon is with there being gap structure between field plate electrode, this gap structure lateral dimension is greater than the channel dimensions of top layer silicon MOSFET, and is less than the source-drain electrode Distances Between Neighboring Edge Points of top layer silicon MOSFET; Field plate structure has groove to draw, and this groove is surrounded MOSFET in circuit.Be positioned at the gap structure of circuit MOSFET raceway groove below, the back of the body matrix effect that can effectively stop bottom potential to produce the expansion of electromotive force and to cause, can also avoid radiation ionization total dose effect in dielectric, to produce a large amount of hole charge, thereby affect the threshold voltage change of N-type or P type MOSFET; Groove field plate structure is protective circuit MOSFET effectively, further reduces circuit with parasitic capacitance between transducer, between pad electrode, crosstalks, and improves radiation detector probe radiation reinforcement ability and detectivity.Therefore, in fact, air gap isolation structure according to the present invention can be applied to the fields such as business, military, space flight.
Above-mentioned for the present invention especially exemplified by embodiment, not in order to limit the present invention.Provided by the invention crosstalk isolation and radiation hardened dot structure be equally applicable to SOI imageing sensor.Equally, can be applied in all element sensors, such as element sensor, particle detector, radiation detector and their variant.Not departing from the spirit and scope of the invention, can do a little adjustment and optimization, protection scope of the present invention is as the criterion with claim.
Although described for illustrative purposes example embodiment of the present invention, those skilled in the art will be appreciated that and can carry out various amendments, interpolation and replacement, instead of departs from the disclosed scope and spirit of the present invention of claims.
Claims (5)
1. a radiation detector is crosstalked and is isolated and radiation hardened dot structure, comprise electrode field plate (301), P trap (302), P+ region (303), dielectric material (304), N-type body silicon (305), N-type MOSFET (306), P type MOSFET (307), back electrode (308), field plate metal electrode (309), P+ extraction electrode (310), connects field-plate trench (311); Above electrode field plate, two couples of N-type MOSFET that cooperatively interact (306) and P type MOSFET (307) are arranged on the both sides of P+ extraction electrode, and every couple of N-type MOSFET (306) is provided with the both sides of P type MOSFET (307) the field plate metal electrode (309) being connected with electrode field plate; Electrode field plate, N-type MOSFET, P type MOSFET, P+ extraction electrode, field plate metal electrode are encapsulated in dielectric material jointly; The P+ region of center, dielectric material below for being connected with P+ extraction electrode, both sides, P+ region are P trap, P+ region and P trap are packaged together by N-type body silicon; It is characterized in that: between electrode field plate and MOSFET, have air gap, air gap does not contact with the raceway groove of MOSFET, air gap is no more than the spacing of border farthest of source electrode and drain electrode along the width of the horizontal direction of MOSFET source electrode and drain electrode line; Air gap is greater than the width of MOSFET along the vertical line direction of MOSFET source electrode and drain electrode line; The horizontal contact material of air gap is dielectric material.
2. a kind of radiation detector according to claim 1 is crosstalked and is isolated and radiation hardened dot structure, it is characterized in that: described dielectric material is silicon nitride or silica.
3. a kind of radiation detector according to claim 1 is crosstalked and is isolated and radiation hardened dot structure, it is characterized in that: the level of described air gap is shaped as ellipse, rectangle or circle.
4. crosstalk isolation and the manufacture method of radiation hardened dot structure of radiation detector, is characterized in that:
(1) adopt silicon-on-insulator epitaxial wafer, generate insulating medium layer;
(2) etching dielectric is heterogeneous texture;
(3) dock low-temperature bonding with the silicon-on-insulator epitaxial wafer of another top layer silicon continuous distribution or discontinuous distribution;
(4) remove and support silicon and dielectric material, at the silicon layer periphery of preparation MOSFET, groove is enclosed in etching one, fills with the identical extension heavily doped silicon material of the doping type of electrode field plate, extraction electrode field-plate trench.
5. crosstalk isolation and the manufacture method of radiation hardened dot structure of a kind of radiation detector according to claim 4, is characterized in that: the lateral etches size of described etching dielectric is greater than the trench length of MOSFET.
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