CN104156039A - Reading and self-timekeeping clock system for satellite-borne computer real-time clock - Google Patents
Reading and self-timekeeping clock system for satellite-borne computer real-time clock Download PDFInfo
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- CN104156039A CN104156039A CN201410406602.7A CN201410406602A CN104156039A CN 104156039 A CN104156039 A CN 104156039A CN 201410406602 A CN201410406602 A CN 201410406602A CN 104156039 A CN104156039 A CN 104156039A
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Abstract
The invention discloses a reading and self-timekeeping clock system for a satellite-borne computer real-time clock. The reading and self-timekeeping clock system comprises a processor interface module, a register module, a time service and timing control module, a latching module and a timekeeping module, wherein the processor interface module is used for conducting communication with all processors in real time, the latching module is used for latching a current moment, and the timekeeping module is used for realizing accumulation of nanosecond values, microsecond values and second values. According to the reading and self-timekeeping clock system, a hardware mode is adopted to realize time management, the accuracy, stability and reliability of satellite time management are greatly improved, and therefore the performance of a control system for a satellite is improved. By means of the reading and self-timekeeping clock system, time for a CPU to participate in timekeeping and control is saved, delay of software timekeeping is shortened, CPU resources are effectively released, and the utilization rate of the CPU of the whole system is increased.
Description
Technical field
The invention belongs to clock system technical field, be specifically related to a kind of spaceborne computer real-time clock and read clock system when automorph.
Background technology
Along with the fast development of computer realm, precise time is had to stricter requirement.Especially in satellite system, keep the time synchronized of computing machine and time to be accurately necessary.According to Theory of Automatic Control, on star, track control and the attitude control of time management to Modern Satellite has vital meaning accurately.China's large satellite, moonlet are continued to use traditional Clock management mechanism, normally adopt the mode of software to realize, and on star, processor is held time, and carrys out refresh time by reading order.Realize this function with software, need to take certain resource and maintain the running of clock self, and precision and reliability also can not be guaranteed.
Summary of the invention
The object of the invention is to address the above problem, provide a kind of spaceborne computer real-time clock to read clock system when automorph, this system can realize efficiently, accurately the management of clock unit and improve greatly system reliability, take hard-wired method also to reduce the complexity of Star Service computer software, provide multiple interfaces to Software for Design personnel, simplified the work of writing of software program.
To achieve these goals, the technical solution adopted in the present invention is: comprise in real time with each processor between communicate processor interface module, register module, time service school time control module, for the latch module of latch current time time and for realizing nanosecond value, microsecond value and the cumulative timing module of value second; Processor interface module during respectively with register module, time service school control module and clock latch module be connected, when register module and time service school, module is all connected on timing module; , module is also connected with time latch module when in time service the school; The output terminal of timing module is connected on the input end of clock latch module.
Described timing module comprises nanosecond summary counter, microsecond summary counter and second summary counter; Adopt the counting clock of high precision temperature compensation crystal oscillator as three summary counters, three summary counters all adopt triplication redundancy design, and all adopt inner warm reset.
After Real Time Clock System reset finishes, the clock of mending crystal oscillator taking outside high precision temp is as benchmark, in this rising edge clock moment to nanosecond summary counter counting, nanosecond summary counter zero clearing after counting equals 999, microsecond summary counter adds 1, circulates with this; Microsecond summary counter zero clearing after microsecond summary counter equals 999999, a second summary counter adds 1, circulates with this.
Described clock latch module comprises latch, and the microsecond register corresponding with microsecond summary counter and second summary counter and second register; The input end of latch during with time service school module, microsecond summary counter and a second summary counter be connected, output terminal and microsecond register with second a register be connected; In the time that needs read current time, module output time latch signal when time service school, after time latch signal is synchronous by high precision clock, at the rising edge of high precision clock, the value of the current microsecond summary counter of latch and second summary counter, and transfer in microsecond register and second register and read for processor.
Compared with prior art, the present invention has following beneficial effect:
The present invention by real time with each processor between communicate processor interface module, register module, time service school time control module, be organically combined into one and work overall for the latch module of latch current time time and for realizing the cumulative timing module of nanosecond value, microsecond value and second value, adopt hardware mode to realize the management of time, improve greatly the accuracy of time management, stability and reliability on star, thereby promoted the performance of satellite control system.The present invention has saved the time of CPU participation timing and control, has both reduced the delay of software timing, effectively discharges again cpu resource, improves the utilization factor of whole system CPU.The present invention is significant to the normal operation of Modern Satellite.In order to ensure the accuracy of real-time clock, adopt the counting clock of high precision high precision temperature compensation crystal oscillator as real-time clock counting module.In order to ensure on star that the time has automorph ability, the module of real-time clock is only used inner warm reset, and dog stings the operations such as reset instruction reset does not affect clock unit operation.
Brief description of the drawings
Fig. 1 is one-piece construction schematic diagram of the present invention;
Fig. 2 is that the present invention is from punctual schematic diagram;
Fig. 3 is the schematic diagram reading the time of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the present invention is further detailed explanation:
Referring to Fig. 1 to Fig. 3, the present invention includes in real time with each processor between communicate processor interface module, register module, time service school time control module, for the latch module of latch current time time and for realizing nanosecond value, microsecond value and the cumulative timing module of value second; Processor interface module during respectively with register module, time service school control module and clock latch module be connected, when register module and time service school, module is all connected on timing module; , module is also connected with time latch module when in time service the school; The output terminal of timing module is connected on the input end of clock latch module.Timing module comprises nanosecond summary counter, microsecond summary counter and second summary counter; Adopt the counting clock of high precision temperature compensation crystal oscillator as three summary counters, three summary counters all adopt triplication redundancy design, and all adopt inner warm reset.After Real Time Clock System reset finishes, the clock of mending crystal oscillator taking outside high precision temp is as benchmark, in this rising edge clock moment to nanosecond summary counter counting, nanosecond summary counter zero clearing after counting equals 999, microsecond summary counter adds 1, circulates with this; Microsecond summary counter zero clearing after microsecond summary counter equals 999999, a second summary counter adds 1, circulates with this.Clock latch module comprises latch, and the microsecond register corresponding with microsecond summary counter and second summary counter and second register; The input end of latch during with time service school module, microsecond summary counter and a second summary counter be connected, output terminal and microsecond register with second a register be connected; In the time that needs read current time, module output time latch signal when time service school, after time latch signal is synchronous by high precision clock, at the rising edge of high precision clock, the value of the current microsecond summary counter of latch and second summary counter, and transfer in microsecond register and second register and read for processor.
Principle of the present invention and the course of work:
Spaceborne computer real-time clock is mainly made up of processor interface module, latch module and timing module from punctual and time reading system, and wherein processor interface module completes communicating by letter between real-time unit and different processor; The time of latch module latch current time, timing module completes the summary counter of nanosecond, microsecond and second value.
The read signal that Clockreading control module of the present invention is mainly sent according to processor is by the running status latch of Clock Managing Unit and send into bus, guarantees the last state of reading that processor can be stable.Mainly comprise nanosecond, microsecond, second three timers from punctual timing module, in order to adapt to space environment, all timing modules all adopt triplication redundancy design, in the time that space single event upset causes a certain timing module to break down, to hold a ballot, the module of two other redundancy can be won, thereby exports correct result, the module that ballot is won simultaneously also will refresh malfunctioning module, thereby complete detection and immunity to space single event upset.Concrete:
1, certainly punctual design
As shown in Figure 2, after Real Time Clock System resets and finishes, the clock of mending crystal oscillator taking outside high precision temp is as benchmark, in this rising edge clock moment to nanosecond summary counter counting, nanosecond summary counter zero clearing after counting equals 9, microsecond summary counter adds 1, so circulation, microsecond summary counter zero clearing after microsecond summary counter equals 999999, a second summary counter adds 1, so circulation.And to second, microsecond and nanosecond summary counter all carried out three moulds designs.
2, the time reads
As shown in Figure 3, in the time that needs read current time, output time latch signal, after this signal is synchronous by high precision clock, at the rising edge of clock, the value of the current microsecond of latch and second summary counter, to the visible microsecond and second register of processor, read for processor.
Certainly punctual mentality of designing and the method reading with the time that the present invention proposes, be integrated in the Real Time Clock System of multi-satellite, show by ground test and various environmental test, the certainly punctual and time reads and can meet high-reliability, the high-precision requirement of whole star to the time.Above content is only explanation technological thought of the present invention; can not limit protection scope of the present invention with this; every technological thought proposing according to the present invention, any change of doing on technical scheme basis, within all falling into the protection domain of the claims in the present invention book.
Claims (4)
1. spaceborne computer real-time clock reads a clock system when automorph, it is characterized in that: comprise in real time with each processor between communicate processor interface module, register module, time service school time control module, for the latch module of latch current time time and for realizing nanosecond value, microsecond value and the cumulative timing module of value second; Processor interface module during respectively with register module, time service school control module and clock latch module be connected, when register module and time service school, module is all connected on timing module; , module is also connected with time latch module when in time service the school; The output terminal of timing module is connected on the input end of clock latch module.
2. spaceborne computer real-time clock according to claim 1 reads clock system when automorph, it is characterized in that: described timing module comprises nanosecond summary counter, microsecond summary counter and second summary counter; Adopt the counting clock of high precision temperature compensation crystal oscillator as three summary counters, three summary counters all adopt triplication redundancy design, and all adopt inner warm reset.
3. spaceborne computer real-time clock according to claim 2 reads clock system when automorph, it is characterized in that: after Real Time Clock System reset finishes, the clock of mending crystal oscillator taking outside high precision temp is as benchmark, in this rising edge clock moment to nanosecond summary counter counting, nanosecond summary counter zero clearing after counting equals 999, microsecond summary counter adds 1, circulates with this; Microsecond summary counter zero clearing after microsecond summary counter equals 999999, a second summary counter adds 1, circulates with this.
4. read clock system when automorph according to the spaceborne computer real-time clock described in claim 2 or 3, it is characterized in that: described clock latch module comprises latch, and the microsecond register corresponding with microsecond summary counter and second summary counter and second register; The input end of latch during with time service school module, microsecond summary counter and a second summary counter be connected, output terminal and microsecond register with second a register be connected; In the time that needs read current time, module output time latch signal when time service school, after time latch signal is synchronous by high precision clock, at the rising edge of high precision clock, the value of the current microsecond summary counter of latch and second summary counter, and transfer in microsecond register and second register and read for processor.
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Cited By (6)
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|---|---|---|---|---|
| CN105068417A (en) * | 2015-07-17 | 2015-11-18 | 上海卫星工程研究所 | SpaceWire network time service and calibration method |
| CN105071887A (en) * | 2015-06-30 | 2015-11-18 | 许继集团有限公司 | Time synchronization method for process level device of intelligent substation |
| CN107643529A (en) * | 2017-07-28 | 2018-01-30 | 上海卫星工程研究所 | United during a kind of high rail remote sensing satellite independence method |
| CN107894706A (en) * | 2017-12-05 | 2018-04-10 | 山东航天电子技术研究所 | Time management system on a kind of star based on FPGA and CPU Comprehensive Controls |
| WO2020258958A1 (en) * | 2019-06-28 | 2020-12-30 | 华为技术有限公司 | Time synchronization method and server |
| CN112527238A (en) * | 2020-11-25 | 2021-03-19 | 中国电子科技集团公司第五十四研究所 | Satellite navigation signal correlation peak low resource construction device |
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105071887A (en) * | 2015-06-30 | 2015-11-18 | 许继集团有限公司 | Time synchronization method for process level device of intelligent substation |
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| CN107894706A (en) * | 2017-12-05 | 2018-04-10 | 山东航天电子技术研究所 | Time management system on a kind of star based on FPGA and CPU Comprehensive Controls |
| CN107894706B (en) * | 2017-12-05 | 2021-04-06 | 山东航天电子技术研究所 | On-satellite time management system based on FPGA and CPU integrated control |
| WO2020258958A1 (en) * | 2019-06-28 | 2020-12-30 | 华为技术有限公司 | Time synchronization method and server |
| CN112527238A (en) * | 2020-11-25 | 2021-03-19 | 中国电子科技集团公司第五十四研究所 | Satellite navigation signal correlation peak low resource construction device |
| CN112527238B (en) * | 2020-11-25 | 2022-03-04 | 中国电子科技集团公司第五十四研究所 | Satellite navigation signal correlation peak low resource construction device |
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Application publication date: 20141119 |