CN104155640B - A kind of laser radar echo Full wave shape harvester possessing sampled point timi requirement - Google Patents
A kind of laser radar echo Full wave shape harvester possessing sampled point timi requirement Download PDFInfo
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- CN104155640B CN104155640B CN201410401846.6A CN201410401846A CN104155640B CN 104155640 B CN104155640 B CN 104155640B CN 201410401846 A CN201410401846 A CN 201410401846A CN 104155640 B CN104155640 B CN 104155640B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
- G01S7/483—Details of pulse systems
- G01S7/486—Receivers
- G01S7/4861—Circuits for detection, sampling, integration or read-out
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
- G01S17/88—Lidar systems specially adapted for specific applications
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- Computer Networks & Wireless Communication (AREA)
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Abstract
The present invention discloses a kind of laser radar echo Full wave shape harvester possessing sampled point timi requirement, belongs to earth observation laser radar remote sensing technical field.This Full wave shape harvester is made up of main control module, high-speed ADC sampling module, high speed FIFO cache module, interpolative delay wire module, high speed coarse counter module and fine coding module of measuring, and in addition to high-speed ADC sampling module, all realizes inside FPGA.It is an object of the invention to provide a kind of laser radar echo Full wave shape harvester obtained in a comparatively simple manner with sampled point precise time location.Utilize the frequency-dividing clock that high-speed ADC sampling clock synchronizes as thick counting clock, control to preserve echo samples point data in regular hour interval, utilize interpolative delay chain that the time interval between main wave impulse and thick counting clock edge is finely measured simultaneously, thus obtain relative laser and launch the echo samples point that main wave impulse has precise time to position.It is simple that the present invention has peripheral circuit, it is achieved mode is simple and clear, functional interface flexibly configurable and cost performance advantages of higher.
Description
Technical field
The invention belongs to earth observation laser radar remote sensing technical field, specifically refer to one when possessing sampled point
Between the laser radar echo Full wave shape harvester of positioning function.
Background technology
Earth observation laser radar system is a kind of for the space-based platform such as aircraft and satellite, can accurately, soon
Speed obtains ground and the active optical remote sensing system of ground target three-dimensional spatial information.With other remote sensing technologies
Comparing, it is low that laser radar technique has production cost, and automaticity is high, affected little, data life by weather
The technological merits such as the product cycle is short, certainty of measurement is high.Hide additionally, due to laser pulse energy partly penetrates forest
Gear, directly acquisition true ground high-precision three-dimensional terrain information, therefore have traditional photography measuring method without
The substituted superiority of method.
Earth observation laser radar system develops from laser ranging technique, travels to and fro between machine by measurement
Light path between carrying platform and ground survey point also combines airborne platform self attitude and position measurement determines
Topocentric three-dimensional coordinate.Laser instrument is generated and transmitted by discrete laser pulse, beats on the object of earth's surface the most anti-
Penetrating, reception system can receive the echo impulse of reflection over time, accurately measures laser pulse from sending out
Be mapped to the propagation time Δ T being reflected back toward, in conjunction with the light velocity c in air, can calculate earth's surface object away from
From R.Measure system (Position And Orientation System, POS) by position and attitude to obtain
The space coordinates of any sampling instant lasing central and the spatial attitude of equipment on flight path, in conjunction with Laser Measuring
Amount lasing central, to distance R of ground object, just can try to achieve the space three-dimensional of each laser footprint point
Coordinate.Adding certain electromechanical equipment makes laser instrument swing at an angle, then along with platform
Flight, can obtain the three-dimensional coordinate of the cake in large quantities of certain fabric width, processes through data and can generate number
Word elevation model (Digital Elevation Model, DEM) and digital surface model (Digital Slope
Model, DSM).
Traditional laser radar system only records the discrete limited number of time echo launching laser, and echo is general first
For setting up the DSM surveying district, then remove non-ground points by certain algorithm, just can obtain the DEM surveying district.
But, this mode shields many device-dependent useful informations to user, as how echo-signal is measured
Being melted into the most discrete pulse signal, what impact is the shapes and sizes of the atural object characteristic echo-signal on obtaining have
Etc..The laser radar system of a new generation has possessed echo Full wave shape sampling functions, is mainly characterized by with the least
Sampling interval the laser radar echo signal from target is carried out sample record, form one and become in time
The echo-signal changed.User completely can be according to Wave data, in conjunction with its application to echo waveform data
It is analyzed and processes, complex target imaging can be realized by waveform sorting and inversion algorithm and feature is known
Not and extract.Comparing multiecho laser radar, Full wave shape laser radar can provide more target information.
Common laser radar echo Full wave shape digitizing solution is directly to use high-speed ADC chip (sample rate
More than 1GS/s) carry out Wave data collection.But the echo waveform that this method obtains does not possesses and launches master
Wave impulse split-second precision positions, and its precision depends on the sampling period (under sample rate 1GS/s, precision is 1ns).
Utilize this Wave data to cannot be carried out high-precision echo waveform to decompose and feature extraction.The most accurately measure
Waveform sampling point and the time relationship launching main wave impulse, it is thus achieved that include the Wave data of sampled point timi requirement
To high accuracy echo waveform analyze for particularly significant." a kind of high speed Full wave shape gathers with high-precision fixed document
Position technical research " propose a kind of method, utilize time figure conversion (Time to Digital Convert,
TDC) first chip obtains launching main wave impulse and echo impulse triggers the high precision time interval between the moment,
Recycling time explanation method records echo impulse and triggers the precise time of moment and first sampled point thereafter
Interval, so can obtain each sampled point of echo waveform according to sampling period relation and launch between pulse
Precise time interval relation.The deficiency of this method is that peripheral circuit structure is more and (includes FPGA, height
Speed ADC chip, in high precision TDC chip and time explanation circuit) and implementation complex.China is specially
Profit CN1719353A propose a kind of FPGA inner utilization carry chain temporal interpolation realize high-precision time
Between digital conversion method.The present invention enters utilizing FPGA internal carry chain temporal interpolation in this patent of reference
The part of row fine measurement, proposes one and is based only upon FPGA and high-speed ADC chip, when possessing sampled point
Between the laser radar echo Full wave shape harvester of positioning function.
Summary of the invention:
It is an object of the invention to provide a kind of laser radar echo Full wave shape possessing sampled point timi requirement to adopt
Storage, thus it is complete to obtain the laser radar echo with sampled point precise time location in a comparatively simple manner
Waveform decomposes and feature extraction for waveform.
The key problem in technology of the present invention is that the frequency-dividing clock utilizing high-speed ADC sampling clock to synchronize is as thick counting
Clock, controls to preserve echo samples point data in regular hour interval, utilizes interpolative delay chain pair simultaneously
Time interval between main wave impulse and thick counting clock edge is finely measured, thus obtains relative laser and send out
Penetrate the echo samples point that main wave impulse has precise time to position.
It is an object of the invention to be realized by following technological approaches.
The present invention discloses a kind of laser radar echo Full wave shape harvester possessing sampled point timi requirement, it by
A piece of fpga chip and a piece of high-speed ADC sampling A/D chip composition, FPGA is for building the master control mould of harvester
Block, high speed coarse counter module, high speed FIFO cache module, interpolative delay chain module and finely measure volume
Code module, high-speed ADC sampling A/D chip is for building the high-speed ADC sampling module of harvester.High-speed ADC is adopted
Sample chip sampling rate is passed through integrated phase lock core to more than 1Gsps, sampling clock by high stable constant-temperature crystal oscillator
Sheet frequency multiplication produces.Fpga chip possesses can generate the carry chain of ns level spread length for building interpolative delay
Chain.Main control module is by FPGA internal state machine logic realization.High speed FIFO cache module by FPGA inside
Storage resource realizes, and receives the high-speed data-flow of high-speed ADC output, caches Wave data.The thickest counting
Device module is realized by FPGA inner high speed enumerator.Interpolative delay chain module is by the Carry Chains in FPGA
Realize.Fine coding module of measuring is realized by the logical resource within FPGA.
During measurement, the main wave impulse of Laser emission enters interpolative delay chain module, and laser radar echo enters at a high speed
ADC sampling module, the thick counting clock that high speed coarse counter module uses is by high-speed ADC sampling module
Tong Bu with sampling clock and frequency dividing the synchrodata output clock of high-speed ADC chip provides, and main control module extracts
Pulse travel time data in interpolative delay chain module, send into fine coding module of measuring and obtain main wave impulse
With thick counting clock along the fine measurement result of time interval, main control module carries when main wave impulse arrives simultaneously
Signal to high speed coarse counter module start counting up for touching, and the count value of coarse counter controls a timing
Between interval in the sampled data stream write high speed FIFO cache module of high-speed ADC sampling module output.
This laser radar echo Full wave shape harvester possessing sampled point timi requirement is applied to carry out data acquisition
The method of collection is as follows:
(1) master control module controls interpolative delay chain module latches along interpolative delay chain on each thick counting clock edge
Data;
In measurement, master control module controls interpolative delay chain module latches interpolative delay on each thick counting clock edge
Data on chain, if latch data non-full zero, represent the main wave impulse of Laser emission and enter interpolative delay chain.This
Time latch result reflect the length passed by delay chain to thick counting clock of main wave impulse along this time interval
Degree.
(2) the thick counting clock that main control module arrives in main wave impulse is along time trigger high speed coarse counter module
Start counting up, simultaneously caching fine-time measurement module result;
If latch data occurs the most multiple 1 in interpolative delay chain module, then it is judged as that main ripple arrives, and
This thick counting clock starts counting up along time trigger high speed coarse counter module.Cache now interpolative delay simultaneously
Data on chain, send into fine-time and measure coding module and obtain main wave impulse and thick counting clock along between the time
Every fine measurement result cache in a register.The resolution of this result is each delay on interpolative delay chain
The time of unit.Under certain situation, the quantity of latch data continuous 1 is inadequate, represents main wave impulse and thick meter
Number clocks are along closely, and now measurement result is easily subject to clock jitter effect, can be deferred to next slightly
Counting clock is measured again.This just requires that the length of main pulse width and interpolative delay chain have to be larger than one slightly
Counted clock cycle;
(3) main control module utilizes the count value of thick counting to control in regular hour interval to preserve echo and adopts
Sampling point data;
Master control module controls starts at a high speed when high speed coarse counter module count value reaches and sets initial value
The sampled data stream write high speed FIFO cache module of ADC sampling module output, when thick count value reaches to gather
Write is stopped during counting step.Final high speed FIFO cache module have recorded from initial count to terminating meter
The ADC sampled data comprising return laser beam that number is interior during this period of time.
(4) main control module reads fine-time interval data and echo samples point data, completes this and measures;
The fine-time interval of main control module readout register caching and the sample waveform data of FIFO caching, complete
Become this to measure, wait that the most main wave impulse arrives.According to when measuring the main wave impulse obtained and slightly count
The fine-time interval on clock edge, the initial value of thick counting and counting step value, thick counting clock and sampling clock
Phase relation, the precise time interval of each sampled point and main wave impulse in FIFO caching can be calculated.
The present invention, based on FPGA and high-speed ADC chip, possesses following characteristics:
(1) compare the traditional method of acquisition echo Full wave shape, having and laser radar echo sampling can be clicked on
The advantage of row timi requirement.Its benefit is that laser radar echo can carry out high-precision echo waveform decomposition
And feature extraction;
(2) compare other methods that can realize echo samples point timi requirement, there is peripheral circuit simple,
The advantage that implementation is simple and clear;
(3) it is based primarily upon fpga chip, there is function and interface flexibly configurable, cost performance advantages of higher;
Accompanying drawing illustrates:
Fig. 1 is the ultimate principle block diagram of the present invention.
Fig. 2 is the basic sequential chart of data acquisition of the present invention.
Fig. 3 be when main wave impulse and thick counting clock closely time processing method schematic diagram.
Detailed description of the invention:
Present invention is mainly applied to the acquisition of airborne earth observation laser radar echo Full wave shape sampled point, laser
The Echo width of radar is typically at tens below ns.For high-precision echo Full wave shape is analyzed, ripple
Shape sample rate needs to reach 1Gsps, sampled point timi requirement precision below 100ps to be reached.
The implementation method of the present invention is discussed in detail below in conjunction with the accompanying drawings with embodiment.
Embodiment
Such as Fig. 1, the laser radar echo Full wave shape harvester of the present invention, including high-speed ADC sampling module,
High speed FIFO cache module, high speed coarse counter module, interpolative delay chain module, fine measurement encode mould
Block and main control module.In addition to high-speed ADC sampling module, remaining all module all realizes inside FPGA,
Fpga chip selects the XC4VLX80 of XILINX company.
ADC sampling module core is a piece of high-speed, high precision sampling ADC, uses National Semiconductor (existing
Have been incorporated into Texas Instrument) ADC12D800, sampling bit wide 12bit, high sampling rate be 1.6Gsps.This
Invention uses high stable 50MHz constant-temperature crystal oscillator to generate dutycycle by integrated phase lock chip SY89421V
The low jitter 500MHz clock of 50% is as sampling clock, and ADC works in doubleclocking along sampling configuration, reaches
1GHz sample rate.ADC works in single clock along data output mode, and data output synchronised clock is 250MHz,
Each synchronised clock is along 4 sampling point value of output.
High speed FIFO cache module uses the storage resource within FPGA to realize, and works in asynchronous FIFO mould
Formula, bit wide is 48bit, and the degree of depth is 1000, and data input clock is the data output synchronised clock of ADC
250MHz, each clock 4 12bit sampling number evidences of input, write by enabling signal control data,
4000 sampled points of once recordable, cover time interval 4us.
High speed coarse counter module is realized by FPGA inner high speed enumerator, and thick counting clock is the number of ADC
According to output synchronised clock 250MHz, a width of 12bit of meter digital, a counting cycle period reaches 16.384us,
According to the light velocity 3 × 108Km/s, can receive the return laser beam of target reflection outside nearly 2.5km distance.Pass through
Count value size controls the write of FIFO caching and enables, thus obtains echo samples point data and sampled point
And the thick clock cycle between main ripple.
Interpolative delay chain module is realized by the Carry Chains unit in XILINX FPGA, delay cell length
Being about 50ps, delay cell number is 100, and total length is about 5ns, exceedes thick counted clock cycle 4ns,
Complete the temporal interpolation to thick counting clock.
Fine coding module of measuring is realized by FPGA internal logic resource, by the thermometer on interpolative delay chain
Fine-time data between the main ripple of representation and thick clock edge are converted to binary numeral.
Main control module, by FPGA internal state machine logic realization, controls each module and works chronologically.
Introduce application below in conjunction with Fig. 2 and above-mentioned possess sampled point laser radar echo Full wave shape harvester number
Method according to gathering:
(1) at each thick counting clock along the data latched on interpolative delay chain;
In measurement, at each thick counting clock along the data latched on interpolative delay chain, this clock is exactly ADC
Data syn-chronization output clock 250MHz.The main wave impulse of Laser emission enters interpolative delay chain, latch data meeting
Occur that multiple continuous print 1 is worth.This latch result represents main wave impulse to thick counting clock along this time interval
The length passed by delay chain.
(2) the thick counting clock arrived in main wave impulse starts counting up along time trigger coarse counter, caching
Fine-time measurement result;
If latch data occurs continuous 51 on interpolative delay chain, then it is judged as that main ripple arrives, and thick at this
Counting clock starts counting up along time trigger coarse counter.Cache the data on now interpolative delay chain simultaneously,
Obtain main wave impulse and the thick counting clock fine measurement result along time interval through fine coding of measuring, deposit
Storage is in a register.The resolution of this result is the time of each delay cell on interpolative delay chain.I.e. continuous
The number of 1 is multiplied by delay units delay time 50ps and can obtain between main wave impulse and thick counting clock edge
Fine measure time T1.As it is shown on figure 3, under certain situation, latch data continuous 1 do not reach 5
Individual, now represent that main wave impulse and thick counting clock are along closely.Now measurement result is easily subject to clock
Effect of jitter, needs to be deferred to next thick counting clock and measures.This also require that simultaneously main pulse width and
The length of interpolative delay chain have to be larger than 4ns (a thick counted clock cycle);
(3) count value utilizing coarse counter controls to preserve echo samples in regular hour interval and counts
According to;
Coarse counter value reflection be after main wave impulse starts through time span, this time span differentiate
Rate is exactly coarse counter cycle 4ns.Start adopting that ADC exports when thick count value reaches and sets initial value
Sample data stream write FIFO caching, stops write when reaching acquisition length.The degree of depth of FIFO caching is
1000, bit wide is 48bit, can cache 4000 sampled points.Assuming that the distance of target is about 900m, can
Setting initial value as 1000, stop value is 2000, represents gate time from 4us to 8us, corresponding distance
Scope is 600m to 1200m.Final FIFO caching have recorded from initial count to when terminating counting this section
The interior ADC sampling number evidence comprising return laser beam.
(4) read fine-time interval data and echo samples point data, complete this and measure;
As in figure 2 it is shown, the sample waveform of fine-time interval T1 and the FIFO caching of readout register caching
Data, complete this and measure, wait that the most main wave impulse arrives.According to measure the main wave impulse that obtains with
The fine-time on thick counting clock edge is spaced T1, initial value T2 of thick counting and the counting step controlling collection
T3, can calculate the moment obtaining first sampled point relative to the precise time interval of main wave impulse is
(T2+1)×4ns+T1.But this value is ADC12D800 exports first sampled point moment and main wave impulse
The interval in moment, there is delayed phase contrast Tod in the synchronism output clock of ADC12D800 itself and sampling clock
For 3.15ns, the ADC12D800 sampled point collection moment has fixing 19 clock to prolong with output time in addition
Late.Plus the two parameter, the precise time interval in first sampled point moment and main wave impulse can be calculated
For (T2-18) × 4ns+T1-3.15ns, according to 1G sample rate the like, it is possible to obtain in caching
The precise time interval in each sampled point and main wave impulse moment, thus can obtain that to comprise sampled point accurate
The laser radar Full wave shape data of timi requirement.
Claims (2)
1. possessing a laser radar echo Full wave shape harvester for sampled point timi requirement, it is by a piece of FPGA
Chip and a piece of high-speed ADC sampling A/D chip composition, FPGA is for building the main control module of harvester, the thickest
Counter module, high speed FIFO cache module, interpolative delay chain module and finely measure coding module is high
Speed ADC sampling A/D chip is for building the high-speed ADC sampling module of harvester, it is characterised in that:
Described high-speed ADC sampling A/D chip sampling rate is to more than 1Gsps, and sampling clock is by high stable constant temperature
Crystal oscillator is produced by integrated phase lock chip frequency multiplication;
Described fpga chip possesses can generate the carry chain of ns level spread length for building interpolative delay
Chain;
Described main control module is by FPGA internal state machine logic realization, described high speed FIFO cache module
Realized by FPGA internal storage resources, receive the high-speed data-flow of high-speed ADC output, cache Wave data,
Described high speed coarse counter module is realized by FPGA inner high speed enumerator, described interpolative delay chain mould
Block is realized by the Carry Chains in FPGA, and described fine coding module of measuring is by the logic within FPGA
Resource realizes;
During measurement, the main wave impulse of Laser emission enters interpolative delay chain module, and laser radar echo enters at a high speed
ADC sampling module, the thick counting clock that high speed coarse counter module uses is by high-speed ADC sampling module
Tong Bu with sampling clock and frequency dividing the synchrodata output clock of high-speed ADC chip provides, and main control module extracts
Pulse travel time data in interpolative delay chain module, send into fine coding module of measuring and obtain main wave impulse
With thick counting clock along the fine measurement result of time interval, main control module provides when main wave impulse arrives and touches
Signal to high speed coarse counter module start counting up, and utilize the count value of coarse counter to control a timing
Between interval in the sampled data stream write high speed FIFO cache module of high-speed ADC sampling module output.
2. one kind based on the laser radar echo Full wave shape possessing sampled point timi requirement described in claim 1
Harvester Method Of Time Measurement, it is characterised in that comprise the steps:
(1) master control module controls interpolative delay chain module latches interpolative delay chain on each thick counting clock edge
On data;
In measurement, master control module controls interpolative delay chain module is prolonged along latching interpolation at each thick counting clock
Data on chain late, if latch data non-full zero, represent the main wave impulse of Laser emission and enter interpolative delay chain,
Now latch result reflects what main wave impulse was passed by thick counting clock along this time interval on delay chain
Length;
(2) the thick counting clock that main control module arrives in main wave impulse is along time trigger high speed coarse counter mould
BOB(beginning of block) counts, simultaneously caching fine-time measurement module result;
If latch data occurs the most multiple 1 in interpolative delay chain module, then it is judged as that main ripple arrives, and
This thick counting clock starts counting up along time trigger high speed coarse counter module;Cache now interpolative delay simultaneously
Data on chain, send into fine-time and measure coding module and obtain main wave impulse and thick counting clock along between the time
Every fine measurement result cache in a register, the resolution of this result is each delay on interpolative delay chain
The time of unit, under certain situation, the quantity of latch data continuous 1 is inadequate, represents main wave impulse and thick meter
Number clocks are along closely, and now measurement result is easily subject to clock jitter effect, can be deferred to next slightly
Counting clock is measured again, and this just requires that the length of main pulse width and interpolative delay chain have to be larger than one slightly
Counted clock cycle;
(3) main control module utilizes the count value of thick counting to control in regular hour interval to preserve echo and adopts
Sampling point data;
Master control module controls starts at a high speed when high speed coarse counter module count value reaches and sets initial value
The sampled data stream write high speed FIFO cache module of ADC sampling module output, when thick count value reaches to gather
Stop write during counting step, final high speed FIFO cache module have recorded from initial count to terminating meter
The ADC sampled data comprising return laser beam that number is interior during this period of time;
(4) main control module reads fine-time interval data and echo samples point data, completes this and measures;
The fine-time interval of main control module readout register caching and the sample waveform data of FIFO caching, complete
This is measured, and waits that the most main wave impulse arrives, according to measuring the main wave impulse and thick counting clock obtained
The fine-time interval on edge, the thick initial value counted and counting step value, thick counting clock and sampling clock
Phase relation, can calculate each sampled point and the precise time interval of main wave impulse in FIFO caching.
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CN112886952B (en) * | 2021-01-13 | 2024-04-05 | 中国科学院微电子研究所 | Dynamic delay compensation circuit of high-speed clock circuit |
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CN204086528U (en) * | 2014-08-15 | 2015-01-07 | 中国科学院上海技术物理研究所 | Possesses the laser radar echo Full wave shape collector of sampled point timi requirement |
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