CN104122724B - Low-color-error liquid crystal array substrate and drive method thereof - Google Patents
Low-color-error liquid crystal array substrate and drive method thereof Download PDFInfo
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- CN104122724B CN104122724B CN201410318192.0A CN201410318192A CN104122724B CN 104122724 B CN104122724 B CN 104122724B CN 201410318192 A CN201410318192 A CN 201410318192A CN 104122724 B CN104122724 B CN 104122724B
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- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 28
- 239000000758 substrate Substances 0.000 title claims abstract description 22
- 238000000034 method Methods 0.000 title claims abstract description 19
- 239000010409 thin film Substances 0.000 claims abstract description 76
- 229910052751 metal Inorganic materials 0.000 claims abstract description 22
- 239000002184 metal Substances 0.000 claims abstract description 22
- 239000010408 film Substances 0.000 claims description 29
- 238000007667 floating Methods 0.000 claims description 7
- 239000013078 crystal Substances 0.000 claims description 4
- 239000003990 capacitor Substances 0.000 abstract 2
- 238000010586 diagram Methods 0.000 description 6
- 230000000007 visual effect Effects 0.000 description 5
- 229910021419 crystalline silicon Inorganic materials 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000005034 decoration Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000004134 energy conservation Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000009191 jumping Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal (AREA)
Abstract
The invention relates to a low-color-error liquid crystal array substrate and a corresponding drive method. The low-color-error liquid crystal array substrate comprises a plurality of pixel structures, each pixel structure comprises a primary pixel area and a secondary pixel area, a gate line is arranged between each primary pixel area and the corresponding secondary pixel area and is provided with a first thin film transistor and a second thin film transistor which are connected to the primary pixel area and the secondary pixel area respectively, the position between each gate line and the corresponding secondary pixel area further comprises a public electrode wire and a metal component, each public electrode wire is provided with a standoff capacitor, and each metal component is provided with a share thin film transistor connected with the corresponding standoff capacitor and electrically connected with a data line through a through hole. Through the design of omitting a sub gate line, switches of the share thin film transistors are switched on directly through signal voltage of the data lines; the inconformity of voltage between each primary pixel area and the corresponding secondary pixel area is solved by adjusting the gate source capacitance of the thin film transistor in the primary pixel area, the aperture opening ratio is improved, and the processing cost is lowered.
Description
Technical field
The present invention relates to low colour cast liquid crystal array substrate and its corresponding driving method, the more particularly to a kind of sub- grid of omission
The dot structure of line.
Background technology
With the development of information-intensive society, people raise year by year to the demand of display device, thus having promoted liquid crystal panel
Fast development, the size of panel is also done bigger and bigger, and especially wide viewing angle, low energy consumption etc. are required with also more and more higher, and therefore thin film is brilliant
The dot structure of body pipe (tft) device and liquid crystal panel designs also towards diversified development.
General liquid crystal electron device is respectively provided with the display pattern of wide viewing angle, under the display pattern of wide viewing angle, due to
The liquid crystal molecule that different visual angles are observed points to difference, results in the cross-color observed under big visual angle.At present, in order to improve
One dot structure can be divided into main pixel region and two, sub-pixel area when dot structure designs by the cross-color at big visual angle
Point, and reduce the voltage in sub-pixel area by sharing thin film transistor (TFT) and OFF state electric capacity, thus controlling main pixel region and time picture
The liquid crystal rotation amount in plain area is poor, to improve the phenomenon of cross-color under wide viewing angle.And above-mentioned dot structure is divided into main pixel
The design in area and sub-pixel area is commonly referred to as low colour cast design (low color shift, lcs).
Fig. 1 shows the dot structure schematic diagram of prior art, and this dot structure includes main pixel region 11 and sub-pixel area
12nd, the first film transistor 13 being connected to main pixel region 11, the second thin film transistor (TFT) 14 being connected to sub-pixel area 12, shared
Thin film transistor (TFT) 15, main gate line 16 (main gate line), sub- grid line 17 (sub gate line), common electrode 18, OFF state
(cdown) critical component such as electric capacity 19 and shared thin film transistor (TFT) 15, the switch of wherein shared thin film transistor (TFT) 15 is by sub- grid
Line 17 is controlled, and the n-th root grid line is linked together with the (n+1)th or n+2 or n+3 or n+4 root main gate line.
The defect of above-mentioned design is, sub- grid line 17 can increase the overlapping area with data wire 20, not only affects pixel
Aperture opening ratio, the Probability also resulting in short-circuit (gate-drain short, gds) between grid line and data wire 20 increases, related
The cost of product manufacturing significantly rises.Therefore it is necessary to provide a kind of dot structure, to solve asking existing for prior art
Topic.
Content of the invention
It is an object of the invention to provide a kind of technical scheme of low colour cast liquid crystal array substrate, by omitting sub- grid line,
Reduce bad short circuit phenomenon to occur, and then increasing opening rate and cost-effective.
For reaching the object defined above of the present invention, the present invention is provided one kind to be different from prior art and is realized using two grid lines
The design of low colour cast array base palte, the liquid crystal array substrate of the present invention includes multiple dot structures, and each dot structure includes one
Main pixel region and a pixel region, described main pixel region and described sub-pixel interval are provided with a grid line, and described grid line is respectively
Connect a first film transistor and one second thin film transistor (TFT), and at least one data wire to be connected to described first thin
Film transistor and the second thin film transistor (TFT), wherein said grid line is also included with described sub-pixel interval: use electrode wires altogether, if
It is equipped with an OFF state electric capacity；And a metal parts, it is provided with a shared thin film transistor (TFT) and described OFF state capacitance connection, and lead to
Cross a through hole to electrically connect with described data wire.
In the liquid crystal array substrate of the present invention, the switch of described shared thin film transistor (TFT) can be directly by described data wire institute
Control.
In the liquid crystal array substrate of the present invention, described first film transistor has a first grid source capacitance, described
Second thin film transistor (TFT) has a second gate source capacitance, and described first grid source capacitance is more than described second gate source capacitance.
In the liquid crystal array substrate of the present invention, described metal parts is a floating dam.
Another object of the present invention is to providing a kind of driving method of liquid crystal array substrate, by omitting sub- grid line, directly
Connect and drive shared thin film transistor (TFT) to occur to reduce bad short circuit phenomenon with data wire, and then increasing opening rate and saving into
This.
For solving above-mentioned technical problem, the present invention provides a kind of driving method of liquid crystal array substrate, described liquid crystal array
Substrate includes multiple dot structures, and each dot structure includes a main pixel region and a pixel region, described main pixel region with
Described sub-pixel interval is provided with a grid line, and described grid line connects a first film transistor and one second film crystal respectively
Pipe, and at least one data wire is connected to described first film transistor and the second thin film transistor (TFT), described grid line with
Described sub-pixel interval also includes using electrode wires altogether, is provided with an OFF state electric capacity；And one first metal portion, it is provided with altogether
Enjoy thin film transistor (TFT), wherein said grid line produces a voltage signal and is used for controlling described first film transistor and one second thin
The switch of film transistor；Described shared thin film transistor (TFT) is electrically connected with described data wire by a through hole, and described data wire
Produce a voltage signal for controlling the switch of described shared thin film transistor (TFT).
Described in the driving method of the present invention, shared thin film transistor (TFT) and described OFF state capacitance connection, when described shared
During thin film transistor (TFT) conducting, an electric charge in described sub-pixel area is discharged into described OFF state electric capacity.
In the driving method of the present invention, described first film transistor has a first grid source capacitance, and described second
Thin film transistor (TFT) has a second gate source capacitance, and described first grid source capacitance is more than described second gate source capacitance.
In the driving method of the present invention, described metal parts is a floating dam.
In the driving method of the present invention, the voltage of described data wire is 0.2 volt or 14.2 volts when white picture.
In the driving method of the present invention, the voltage of described data wire is 7.7 volts or 7.2 volts when black picture.
The present invention passes through to omit the setting of sub- grid line, directly shares the switch of thin film transistor (TFT) with data line traffic control, and
By the gate-source capacitance of thin film transistor (TFT) in main pixel region being designed as the grid source electricity more than thin film transistor (TFT) in sub-pixel area
Hold, to adjust the voltage difference between main pixel region and sub-pixel area, make the voltage between main pixel region and sub-pixel area consistent.
Under the design of the present invention, sub- grid line can be omitted, reduce the overlapping part of data line and metal parts, reduce
The generation of the bad incidence rate of gds, realizes the display effect of low colour cast in the case of not reducing pixel aperture ratio, and that is, energy-conservation saves again
Cost-saving.
It is that the above of the present invention can be become apparent, preferred embodiment cited below particularly, and coordinate appended diagram, do
Describe in detail as follows:
Brief description
Fig. 1 is the dot structure schematic diagram of prior art.
Fig. 2 illustrates the dot structure schematic diagram of the present invention.
Fig. 3 is the generalized section at label " 50 " place in Fig. 2.
Specific embodiment
The explanation of following embodiment is with reference to additional schema, the particular implementation implemented in order to illustrate the present invention may be used to
Example.The direction term that the present invention is previously mentioned, for example " on ", D score, "front", "rear", "left", "right", " interior ", " outward ", " side "
Deng being only the direction with reference to annexed drawings.Therefore, the direction term of use is to illustrate and understand the present invention, and is not used to
Limit the present invention.In in figure, the similar unit of structure is to be represented with identical label.
The liquid crystal array substrate of the present invention includes multiple dot structures, and Fig. 2 illustrates each dot structure schematic diagram, each picture
Plain structure includes a main pixel region 31 and a sub-pixel area 32, setting between described main pixel region 31 and described sub-pixel area 32
It is equipped with a grid line 36, described grid line 36 is electrically connected with a first film transistor 33 and one second thin film transistor (TFT) 34
Grid level, and at least one data wire is connected to described first film transistor 33 and the source of the second thin film transistor (TFT) 34
Level, the drain electrode of described first film transistor 33 and the second thin film transistor (TFT) 34 be then connected to described main pixel region 31 with
And described sub-pixel area 32, for controlling the display of main pixel region 31 and sub-pixel area 32.Described grid line 36 and described picture
Also include between plain area 32: have altogether with electrode wires 37 and described common electrode line 37 is provided with an OFF state electric capacity 38, and a gold medal
Belong to part 39, be provided with a shared thin film transistor (TFT) 35 and described shared thin film transistor (TFT) 35 is used for and described OFF state electric capacity 38 electricity
Property connect, and electrically connected with described data wire 40 by a through hole 41.
In an embodiment of the present invention, described grid line 36, through hole 41, metal parts 39 and common electrode line 37 are all
One the first metal layer, can be simultaneously formed in liquid crystal array substrate, and described data wire 40 is then a second metal layer, is formed at institute
After stating the first metal layer, and part is had to overlap with described grid line 36 and through hole 41.
In an embodiment of the present invention, described main pixel region and the electrode in sub-pixel area are transparency conductive electrode, preferably
Tin indium oxide (ito).
In an embodiment of the present invention, described metal parts 39 is a floating dam.
Refer to diagram 3 it is illustrated that 3 illustrate the generalized section at label " 50 " place in 2 for the present invention, wherein, 39 is metal
Part, that is, the first metal layer, it can be a floating dam；51 is grid-silicon nitride layer (gate-sinx)；40 is data wire,
It is exactly second metal layer；52 is silicon nitride passivation (passivation-sinx).Therefore, described metal parts 39 passes through through hole
41 produce electrical connection with data wire 40,40.
And the voltage of general data line is all positive-negative half-cycle alternating voltage, for example, the voltage in white picture is 0.2 volt
Or 14.2 volts, the voltage in black picture is 7.7 volts or 7.2 volts.Current vs voltage curve according to existing non-crystalline silicon
(i-v curve) characteristic, above-mentioned 7.2 volts, 7.7 volts and 14.2 volts can open shared thin film transistor (TFT) 35
Switch.
Therefore, it is different from the switch that prior art controls shared thin film transistor (TFT) using sub- grid line, real in the present invention one
Apply in example, the switch of shared thin film transistor (TFT) 35 can directly be controlled by data wire 40, that is, the signal using data wire 40
Voltage come to open non-crystalline silicon share thin film transistor (TFT) 35 switch so that the electric charge in sub-pixel area 32 is releasably to OFF state electric capacity
38, reach the display effect of low colour cast.
Due to above-mentioned data wire 40 voltage when 0.2 volt close to threshold voltage (vth), shared thin film transistor (TFT) 35
Switch be considered as being not turned on, positive-negative half-cycle different, sub-pixel of sharing the degree that thin film transistor (TFT) 35 opens therefore under white picture
The electric charge of area 32 release is also different, leads to the positive half cycle voltage in sub-pixel area 32 to decline, the voltage of negative half period also and then declines, from
And its optimal share voltage (best vcom) is also required to adjust downwards.
Therefore, in order that winner's pixel region 31 is consistent with the optimal share voltage in sub-pixel area 32, implement in the present invention one
In example, visual actual state the gate-source capacitance (cgs) of thin film transistor (TFT) 33 in main pixel region 31 design big a bit, by jumping
The optimal share voltage of main pixel region 31 is pulled down to consistent with the optimal share voltage in sub-pixel area 32 by time variant voltage (δ vp).?
That is, make the first grid source capacitance of first film transistor 33 in main pixel region 31 be more than the second thin film in sub-pixel area 32
The second gate source capacitance of transistor 34, because of data wire is just controlled during shared thin film transistor (TFT) 35 by data wire 40 with improving
Optimal share voltage skew (best vcom shift) phenomenon caused by negative half period opening degree difference.
By above-mentioned dot structure design, the present invention can omit the configuration of sub- grid line, directly with the news of data line traffic control
Number voltage opens the switch of shared thin film transistor (TFT), and is changed using the gate-source capacitance adjusting thin film transistor (TFT) in main pixel region
Voltage inconsistence problems between philanthropist's pixel region and sub-pixel area.Therefore, the weight between data wire and grid line can not only be reduced
Tewo divides, increasing opening rate, also can reduce the cost of overall process.
The invention still further relates to a kind of driving method of liquid crystal array substrate, described liquid crystal array substrate includes: described liquid crystal
Display floater includes multiple dot structures, and each dot structure includes a main pixel region 31 and a pixel region 32, described master
It is provided with a grid line 36, described grid line 36 is electrically connected with a first film crystal between pixel region 31 and described sub-pixel area 32
Pipe 33 and one second thin film transistor (TFT) 34, described first film transistor 33 and the second thin film transistor (TFT) 34 are connected to
Described main pixel region 31 and described sub-pixel area 32, for controlling the display of main pixel region 31 and sub-pixel area 32, wherein
Also include between described grid line 36 and described sub-pixel area 32: use electrode wires 37 altogether, be provided with an OFF state electric capacity 38；And one
One metal portion 39, is provided with a shared thin film transistor (TFT) 35.
In an embodiment of the present invention, described metal parts 39 is a floating dam.
In an embodiment of the present invention, described main pixel region 31 and the electrode in sub-pixel area 32 are transparency conductive electrode, excellent
Elect tin indium oxide (ito) as.
In an embodiment of the present invention, described grid line 36 is used for producing the voltage signal being turned on and off to the first film crystalline substance
Body pipe 33, for controlling the switch of first film transistor 33, the drain electrode of first film transistor 33 is connected to the first pixel region
31, the source electrode of first film transistor 33 is connected to data wire 40, and described data wire 40 is when first film transistor 33 turns on
Input data drive signal, thus control the display of main pixel region 31.
In an embodiment of the present invention, described grid line 36 is used for producing the voltage signal being turned on and off to the second thin film crystalline substance
Body pipe 34, for controlling the switch of the second thin film transistor (TFT) 34, the drain electrode of the second thin film transistor (TFT) 34 is connected to the second pixel region
32, the source electrode of the second thin film transistor (TFT) 34 is connected to data wire 40, and described data wire 40 is when the second thin film transistor (TFT) 34 turns on
Input data drive signal, thus control the display in sub-pixel area 32.
Because the voltage of general data line is all positive-negative half-cycle alternating voltage, for example, the voltage in white picture is 0.2 volt
Special or 14.2 volts, the voltage in black picture is 7.7 volts or 7.2 volts.Current vs voltage according to existing non-crystalline silicon is bent
The characteristic of line (i-v curve), above-mentioned 7.2 volts, 7.7 volts and 14.2 volts all can open described shared film crystal
The switch of pipe 35.
Therefore, in one embodiment of this invention, the switch of described shared thin film transistor (TFT) 35 can be directly by described data
Line 40 is controlled, that is, described shared thin film transistor (TFT) 35 is electrically connected with data wire 40, using data wire by a through hole 41
40 voltage signal shares the switch of thin film transistor (TFT) 35 to open non-crystalline silicon.
In an embodiment of the present invention, described shared thin film transistor (TFT) 35 is connected with OFF state electric capacity 38, therefore when described common
When enjoying thin film transistor (TFT) 35 conducting, the electric charge in sub-pixel area 32 is discharged into the effect that described OFF state electric capacity 38 reaches low colour cast.
In an embodiment of the present invention, the voltage of described data wire is 0.2 volt or 14.2 volts when white picture.
In an embodiment of the present invention, the voltage of art data wire is 7.7 volts or 7.2 volts when black picture.
Due to above-mentioned data wire 40 voltage when 0.2 volt close to threshold voltage, the opening of shared thin film transistor (TFT) 35
Pass is considered as being not turned on, and therefore under white picture, positive-negative half-cycle shares the degree difference that thin film transistor (TFT) 35 is opened, sub-pixel area 32
The electric charge of release is also different, leads to the positive half cycle voltage in sub-pixel area 32 to decline, the voltage of negative half period also declines, thus it is optimal
Share voltage is also required to adjust downwards.
Therefore, in order that winner's pixel region 31 is consistent with the optimal share voltage in sub-pixel area 32, implement in the present invention one
In example, visual actual state in main pixel region 31 the gate-source capacitance design of thin film transistor (TFT) 33 big a bit, by saltus step electricity
The optimal share voltage of main pixel region 31 is pulled down to consistent with the optimal share voltage in sub-pixel area 32 by pressure.That is, making
In main pixel region 31, the first grid source capacitance of first film transistor 33 is more than the second thin film transistor (TFT) 34 in sub-pixel area 32
Second gate source capacitance, opened because of data wire positive-negative half-cycle during shared thin film transistor (TFT) 35 with improving to control by data wire 40
Optimal share voltage shift phenomenon caused by degree of leaving difference.
In sum although the present invention is disclosed above with preferred embodiment, but above preferred embodiment and be not used to limit
The present invention processed, those of ordinary skill in the art, without departing from the spirit and scope of the present invention, all can do various change and profit
Decorations, therefore protection scope of the present invention is defined by the scope that claim defines.
Claims (9)
1. a kind of liquid crystal array substrate, including multiple dot structures, each dot structure include a main pixel region and once as
Plain area, described main pixel region and described sub-pixel interval are provided with a grid line, and described grid line connects a first film crystal respectively
Pipe and one second thin film transistor (TFT), and at least one data wire is connected to described first film transistor and second thin
Film transistor is it is characterised in that described grid line is also included with described sub-pixel interval:
Use electrode wires altogether, be provided with an OFF state electric capacity；And
One metal parts, is provided with a shared thin film transistor (TFT) and described OFF state capacitance connection, and by a through hole with described
Data wire electrically connects；The switch of described shared thin film transistor (TFT) is to be controlled by described data wire.
2. liquid crystal array substrate according to claim 1 is it is characterised in that described first film transistor has one first
Gate-source capacitance value, described second thin film transistor (TFT) has a second gate source capacitance, and described first grid source capacitance is more than described
Second gate source capacitance.
3. liquid crystal array substrate according to claim 1 is it is characterised in that described metal parts is a floating dam.
4. a kind of driving method of liquid crystal array substrate, described liquid crystal array substrate includes multiple dot structures, each pixel knot
Structure includes a main pixel region and a pixel region, and described main pixel region and described sub-pixel interval are provided with a grid line, described
Grid line connects a first film transistor and one second thin film transistor (TFT) respectively, and at least one data wire is connected to institute
State first film transistor and the second thin film transistor (TFT), described grid line and described sub-pixel interval also include a common electrode
Line, is provided with an OFF state electric capacity, and one first metal portion, be provided with a shared thin film transistor (TFT) it is characterised in that:
Described grid line produces a voltage signal and is used for controlling opening of described first film transistor and one second thin film transistor (TFT)
Close；
Described shared thin film transistor (TFT) is electrically connected with described data wire by a through hole, and described data wire produces a voltage letter
Number for controlling the switch of described shared thin film transistor (TFT).
5. driving method according to claim 4 is it is characterised in that described shared thin film transistor (TFT) and described OFF state electric capacity
Connect, when described shared thin film transistor (TFT) turns on, an electric charge in described sub-pixel area is discharged into described OFF state electric capacity.
6. driving method according to claim 4 is it is characterised in that described first film transistor has a first grid source
Capacitance, described second thin film transistor (TFT) has a second gate source capacitance, and described first grid source capacitance is more than described second
Gate-source capacitance value.
7. driving method according to claim 4 is it is characterised in that described metal parts is a floating dam.
8. driving method according to claim 4 is it is characterised in that the voltage of described data wire is 0.2 when white picture
Volt or 14.2 volts.
9. driving method according to claim 4 is it is characterised in that the voltage of described data wire is 7.7 when black picture
Volt or 7.2 volts.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410318192.0A CN104122724B (en) | 2014-07-04 | 2014-07-04 | Low-color-error liquid crystal array substrate and drive method thereof |
| PCT/CN2014/084238 WO2016000296A1 (en) | 2014-07-04 | 2014-08-13 | Low color washout liquid crystal array substrate and driving method therefor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410318192.0A CN104122724B (en) | 2014-07-04 | 2014-07-04 | Low-color-error liquid crystal array substrate and drive method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104122724A CN104122724A (en) | 2014-10-29 |
| CN104122724B true CN104122724B (en) | 2017-01-18 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201410318192.0A Expired - Fee Related CN104122724B (en) | 2014-07-04 | 2014-07-04 | Low-color-error liquid crystal array substrate and drive method thereof |
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|---|---|
| CN (1) | CN104122724B (en) |
| WO (1) | WO2016000296A1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104503158B (en) * | 2014-12-17 | 2017-04-19 | 深圳市华星光电技术有限公司 | Array baseplate, liquid crystal display panel and detection method of liquid crystal display panel |
| CN105093756B (en) * | 2015-08-31 | 2019-01-22 | 深圳市华星光电技术有限公司 | Liquid crystal display pixel structure and preparation method thereof |
| TWI570492B (en) * | 2015-09-18 | 2017-02-11 | 友達光電股份有限公司 | Pixel structure |
| CN106773408A (en) * | 2016-12-29 | 2017-05-31 | 深圳市华星光电技术有限公司 | Dot structure and liquid crystal display panel |
| CN108121124B (en) * | 2017-12-26 | 2020-09-04 | 深圳市华星光电半导体显示技术有限公司 | COA type array substrate and display panel |
| CN110070800A (en) * | 2019-04-04 | 2019-07-30 | 深圳市华星光电技术有限公司 | Pixel electrode structure and pixel electrode production method |
| CN111176041A (en) * | 2020-02-21 | 2020-05-19 | Tcl华星光电技术有限公司 | Pixel structure and pixel circuit |
| CN112068371A (en) * | 2020-09-10 | 2020-12-11 | 深圳市华星光电半导体显示技术有限公司 | Array substrate and display panel |
| CN113219747B (en) * | 2021-04-23 | 2022-11-08 | 成都中电熊猫显示科技有限公司 | Array substrate, liquid crystal display panel and liquid crystal display |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1825172A (en) * | 2005-02-24 | 2006-08-30 | 三星电子株式会社 | Array substrate, method of manufacturing the same, display panel having the same, and liquid crystal display apparatus |
| CN101216645A (en) * | 2008-01-04 | 2008-07-09 | 昆山龙腾光电有限公司 | Low color error liquid crystal display and its driving method |
| CN101625489A (en) * | 2008-07-11 | 2010-01-13 | 奇美电子股份有限公司 | Liquid crystal display panel and drive method thereof |
| CN101718934A (en) * | 2009-12-28 | 2010-06-02 | 友达光电股份有限公司 | Display and photoelectric device thereof |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI363917B (en) * | 2008-02-01 | 2012-05-11 | Au Optronics Corp | Thin film transistor array substrate |
| CN201314993Y (en) * | 2008-12-18 | 2009-09-23 | 上海广电光电子有限公司 | LCD device in polydomain vertical alignment mode |
| US8854561B2 (en) * | 2009-11-13 | 2014-10-07 | Au Optronics Corporation | Liquid crystal display panel with charge sharing scheme |
| KR101793176B1 (en) * | 2010-08-05 | 2017-11-03 | 삼성디스플레이 주식회사 | Display device |
| KR20120021537A (en) * | 2010-08-06 | 2012-03-09 | 삼성전자주식회사 | Liquid crystal display and method for driving the same |
| CN103235428B (en) * | 2013-05-06 | 2015-08-12 | 深圳市华星光电技术有限公司 | The dim spot restorative procedure of liquid crystal panel and liquid crystal panel |
| CN103400563B (en) * | 2013-08-15 | 2015-04-15 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display device |
-
2014
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- 2014-08-13 WO PCT/CN2014/084238 patent/WO2016000296A1/en active Application Filing
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1825172A (en) * | 2005-02-24 | 2006-08-30 | 三星电子株式会社 | Array substrate, method of manufacturing the same, display panel having the same, and liquid crystal display apparatus |
| CN101216645A (en) * | 2008-01-04 | 2008-07-09 | 昆山龙腾光电有限公司 | Low color error liquid crystal display and its driving method |
| CN101625489A (en) * | 2008-07-11 | 2010-01-13 | 奇美电子股份有限公司 | Liquid crystal display panel and drive method thereof |
| CN101718934A (en) * | 2009-12-28 | 2010-06-02 | 友达光电股份有限公司 | Display and photoelectric device thereof |
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| CN104122724A (en) | 2014-10-29 |
| WO2016000296A1 (en) | 2016-01-07 |
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