CN104090165A - Silicon nano sensing array giant piezoresistive coefficient measuring system and four-point bending force-applying device - Google Patents
Silicon nano sensing array giant piezoresistive coefficient measuring system and four-point bending force-applying device Download PDFInfo
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Abstract
本发明是关于一种硅纳米传感阵列巨压阻系数测量系统及四点弯曲施力装置,该系统由四点弯曲施力装置、微小阻值检测装置和微小应变检测装置三部分构成。其中四点弯曲施力装置给硅纳米线传感阵列芯片施加均匀轴向应力(应变),该装置包括船型底座、底座滑轨槽、镜像放置的等高L型夹具、镜像放置的等高L型载荷支撑平台、螺母、垫片、螺纹连杆、顶部连杆、若干质量的砝码、托盘以及加载压头。通过间距可调的加载压头上的连杆往托盘上添加砝码对硅纳米线施加压力,通过微小阻值检测装置测出受压后桥路两端输出电压。本发明装置制作简单、体积小、成本低廉、功耗低,由于利用阵列式多点平均测量技术,因而它具有更高精度和更好的稳定性。
The invention relates to a silicon nanometer sensor array giant piezoresistive coefficient measurement system and a four-point bending force applying device. The system is composed of three parts: a four-point bending force applying device, a small resistance value detection device and a small strain detection device. Among them, the four-point bending force application device applies uniform axial stress (strain) to the silicon nanowire sensor array chip. type load support platform, nuts, spacers, threaded links, top links, weights of several masses, trays, and loading rams. Weights are added to the tray through the connecting rod on the loading head with adjustable spacing to exert pressure on the silicon nanowires, and the output voltage at both ends of the bridge after pressure is measured through a small resistance detection device. The device of the invention is simple to manufacture, small in volume, low in cost and low in power consumption, and has higher precision and better stability due to the use of array type multi-point average measurement technology.
Description
技术领域 technical field
本发明属于微纳机电系统技术领域,具体涉及一种硅纳米传感阵列巨压阻系数测量系统。 The invention belongs to the technical field of micro-nano electromechanical systems, and in particular relates to a silicon nanometer sensor array giant piezoresistive coefficient measurement system. the
背景技术 Background technique
目前,随着微纳米加工和分析等技术的发展,研究发现半导体材料在微纳米尺度下的尺寸效应、压阻效应、晶界效应等为其在力、热、光、电、磁等方面带来了独特性能,并由此制造出功能强大、性能优越的微纳米级电子元器件,广泛应用于微纳电子机械系统的传感器中,如压力传感器、加速度传感器及各种生化传感器。因此微纳米材料具有巨大的应用前景。传统掺杂工艺的硅压敏电阻的电阻应变系数较小,随着传感器尺寸的变小,传统掺杂工艺的压敏电阻已经不能满足现代高灵敏度测试的要求。硅纳米线作为一种新型的一维纳米材料,一直未有较好的方法来对表征其压阻效应和力敏特性的重要参数——压阻系数进行测量,极大地限制了硅纳米线传感结构的应用与开发。而硅纳米线传感结构能够具有巨大的压阻系数,因此研究巨压阻系数对硅纳米线的实用化开发很有意义。目前利用原子力显微镜(AFM)、扫描电子显微镜和透射电子显微镜(TEM)测量压阻系数时,发现靠近硅纳米线的两端处于拉伸状态,中间部分处于压缩状态,两个区域由于压阻效应产生的电阻变化相互抵消,使得测量准确性大为下降,其次,该方法设备复杂、昂贵、体积大,对环境、温度、湿度均有严格的要求,在使用上不便捷,测量时间长。 At present, with the development of micro-nano processing and analysis technologies, it has been found that the size effect, piezoresistive effect, grain boundary effect, etc. It has unique properties, and thus produces powerful and superior micro-nano-scale electronic components, which are widely used in sensors of micro-nano electromechanical systems, such as pressure sensors, acceleration sensors and various biochemical sensors. Therefore, micro-nano materials have great application prospects. The resistance gauge coefficient of silicon varistors with traditional doping process is small. As the size of the sensor becomes smaller, the varistors with traditional doping process can no longer meet the requirements of modern high-sensitivity testing. As a new type of one-dimensional nanomaterial, silicon nanowires have not had a good method to measure the piezoresistive coefficient, an important parameter that characterizes its piezoresistive effect and force-sensitive characteristics, which greatly limits the transmission of silicon nanowires. The application and development of sense structure. The silicon nanowire sensing structure can have a huge piezoresistive coefficient, so the study of the giant piezoresistive coefficient is very meaningful for the practical development of silicon nanowires. At present, when using atomic force microscope (AFM), scanning electron microscope and transmission electron microscope (TEM) to measure the piezoresistive coefficient, it is found that the two ends near the silicon nanowire are in a stretched state, and the middle part is in a compressed state. The two regions are due to the piezoresistive effect. The resulting resistance changes cancel each other out, which greatly reduces the measurement accuracy. Secondly, the method is complex, expensive, and bulky, and has strict requirements on the environment, temperature, and humidity. It is inconvenient to use and takes a long time to measure. the
利用MOS沟道以及结型场效应管(JFET)沟道的压阻效应也可以实现压阻检测。但是MOS沟道压阻检测的主要问题有三点。(1)MOS管是一种具有放大作用的晶体管,栅极电压的微小变化会引起沟道阻抗的显著变化,因此抗干扰能力差。(2)为实现压阻检测需要将MOS管连接成电桥,而MOS电桥存在负反馈,会造成压阻灵敏度的显著下降。理论计算表明增强型MOS管电桥的灵敏度小于力敏电阻电桥的一半。(3)构件弯曲时,最大应力出现在表面,随着深度的增加应力迅速下降。而MOS管结构特点决定了沟道无法制作在表面,造成灵敏度下降。JFET沟道压阻结构也存在MOS沟道压阻结构类似的问题,即对栅极电压敏感抗干扰能力差、存在负反馈会降低灵敏度等。 The piezoresistive detection can also be realized by utilizing the piezoresistive effect of the MOS channel and the junction field effect transistor (JFET) channel. However, there are three main problems in MOS channel piezoresistive detection. (1) The MOS tube is a kind of transistor with amplification effect, and a small change in the gate voltage will cause a significant change in the channel impedance, so the anti-interference ability is poor. (2) In order to realize the piezoresistive detection, it is necessary to connect the MOS tubes into a bridge, and the MOS bridge has negative feedback, which will cause a significant drop in piezoresistive sensitivity. Theoretical calculations show that the sensitivity of the enhanced MOS tube bridge is less than half of that of the force sensitive resistor bridge. (3) When the member is bent, the maximum stress appears on the surface, and the stress decreases rapidly as the depth increases. The structural characteristics of the MOS tube determine that the channel cannot be made on the surface, resulting in a decrease in sensitivity. The JFET channel piezoresistive structure also has problems similar to the MOS channel piezoresistive structure, that is, it is sensitive to gate voltage and has poor anti-interference ability, and the existence of negative feedback will reduce sensitivity. the
发明内容 Contents of the invention
本发明针对现有技术的不足,本发明提出了一种硅纳米传感阵列巨压阻系数测量系统,以达到简化巨压阻系数的检测装置和提高检测灵敏度和精度的目的,本发明利用多路复用开关实现阵列式多点平均测量应变和阻值的技术,因而它具有更高精度和更好的稳定性,使用便捷,缩短了测量时间。 The present invention aims at the deficiencies of the prior art. The present invention proposes a silicon nanometer sensor array giant piezoresistive coefficient measurement system to achieve the purpose of simplifying the detection device of the giant piezoresistive coefficient and improving the detection sensitivity and precision. The present invention utilizes multiple Multiplexing switches realize the technology of array multi-point average measurement of strain and resistance, so it has higher precision and better stability, easy to use, and shortens the measurement time. the
为了达到以上目标,本发明提供了一种硅纳米传感阵列巨压阻系数测量系统,包括四点弯曲施力装置、微小阻值检测装置和微小应变检测装置,其中,所述四点弯曲施力装置包括船型底座1、底座滑轨槽、螺母3、两个等高L型夹具4、顶部连杆5、两个等高L型载荷支撑平台12、砝码6、托盘7和加载压头8,所述底座1正表面标刻有刻度线2,所述底座滑轨槽设置在所述底座1的上端面;所述等高L型夹具4和等高L型载荷支撑平台12分别相对于所述四点弯曲施力装置的中心线对称设置,并且所述等高L型夹具4和等高L型载荷支撑平台12能滑动地设置在所述底座滑轨槽内;所述加载压头8设置在所述等高L型载荷支撑平台12的上部;所述螺母3包括上部螺母,所述上部螺母设置在所述托盘7和加载压头8之间,所述顶部连杆5从上至下依次穿过所述砝码6、托盘7中部、上部螺母和加载压头8中部;所述托盘7和加载压头8的两侧端部分别抵靠在所述等高L型夹具4上; In order to achieve the above goals, the present invention provides a silicon nano sensor array giant piezoresistive coefficient measurement system, including a four-point bending force application device, a small resistance detection device and a small strain detection device, wherein the four-point bending force application device The force device includes a boat-shaped base 1, base slide rail grooves, nuts 3, two equal-height L-shaped fixtures 4, top connecting rods 5, two equal-height L-shaped load support platforms 12, weights 6, trays 7 and loading pressure heads 8. The front surface of the base 1 is marked with a scale line 2, and the slide rail groove of the base is set on the upper end surface of the base 1; the equal-height L-shaped clamp 4 and the equal-height L-shaped load support platform 12 are respectively opposite It is arranged symmetrically on the centerline of the four-point bending force applying device, and the equal-height L-shaped clamp 4 and the equal-height L-shaped load support platform 12 can be slidably arranged in the slide rail groove of the base; The head 8 is arranged on the top of the equal height L-shaped load support platform 12; the nut 3 includes an upper nut, and the upper nut is arranged between the pallet 7 and the loading head 8, and the top connecting rod 5 is connected from the Pass through the weight 6, the middle part of the tray 7, the upper nut and the middle part of the loading head 8 in order from top to bottom; the ends on both sides of the tray 7 and the loading head 8 respectively abut against the equal-height L-shaped fixture 4 on;
所述微小阻值检测装置包括惠斯通电桥和微弱信号采集系统,所述惠斯通电桥由所述硅纳米线传感阵列13中的任一硅纳米线和与所述硅纳米线阻值相同的三个精密电阻构成;所述微弱信号采集系统包括前置放大电路、第二级放大滤波电路、电压跟随器、模数转换器和终端模块,所述前置放大电路、第二级放大滤波电路、电压跟随器、模数转换器和液晶显示模块顺次连接;所述微弱信号采集系统与所述惠斯通电桥的电压输出端相连接; The tiny resistance detection device includes a Wheatstone bridge and a weak signal acquisition system, and the Wheatstone bridge is composed of any silicon nanowire in the silicon nanowire sensing array 13 and the silicon nanowire resistance The same three precision resistors are formed; the weak signal acquisition system includes a preamplifier circuit, a second-stage amplifying filter circuit, a voltage follower, an analog-to-digital converter and a terminal module, and the preamplifier circuit, the second-stage amplifying The filter circuit, the voltage follower, the analog-to-digital converter and the liquid crystal display module are connected in sequence; the weak signal acquisition system is connected with the voltage output end of the Wheatstone bridge;
所述微小应变检测装置包括全桥式应变片11,所述全桥式应变片11分别粘贴在所述硅纳米线传感阵列芯片13的正反面的受力点位置,所述四个全桥式应变片(11)构成四个应变全桥电路实现应变多点平均测量,本发明采用四个全桥式应变片(11)构成了四个应变全桥电路,硅纳米线传感阵列芯片正反面各两个,从而实现对硅纳米线传感阵列芯片的应变多点平均测量;所述微弱信号采集系统与所述应变全桥电路的输出端相连接。 The micro-strain detection device includes a full-bridge strain gauge 11, and the full-bridge strain gauge 11 is respectively pasted on the force-bearing point positions on the front and back of the silicon nanowire sensor array chip 13, and the four full-bridge Type strain gauges (11) form four strain full-bridge circuits to realize strain multi-point average measurement. The present invention adopts four full-bridge strain gauges (11) to form four strain full-bridge circuits, and the silicon nanowire sensor array chip is There are two on the opposite side, so as to realize the multi-point average measurement of the strain on the silicon nanowire sensor array chip; the weak signal acquisition system is connected with the output end of the strain full bridge circuit.
本发明还提供了一种四点弯曲施力装置,包括船型底座1、底座滑轨槽、螺母3、两个等高L型夹具4、顶部连杆5、两个等高L型载荷支撑平台12、砝码6、托盘7和加载压头8,所述底座1正表面标刻有刻度线2,所述底座滑轨槽设置在所述底座1的上端面;所述等高L型夹具4和等高L型载荷支撑平台12分别相对于所述四点弯曲施力装置的中心线对称设置,并且所述等高L型夹具4和等高L型载荷支撑平台12能滑动地设置在所述底座滑轨槽内;所述加载压头8设置在所述等高L型载荷支撑平台12的上部;所述螺母3包括上部螺母,所述上部螺母设置在所述托盘7和加载压头8之间,所述顶部连杆5从上至下依次穿过所述砝码6、托盘7中部、上部螺母和加载压头8中部;所述托盘7和加载压头8的两侧端部分别抵靠在所述等高L型夹具4上。 The present invention also provides a four-point bending force applying device, which includes a ship-shaped base 1, base slide rail grooves, nuts 3, two equal-height L-shaped clamps 4, top connecting rods 5, and two equal-height L-shaped load support platforms 12. Weight 6, tray 7 and loading head 8, the front surface of the base 1 is marked with a scale line 2, and the slide rail groove of the base is set on the upper end surface of the base 1; the contour L-shaped fixture 4 and the equal-height L-shaped load support platform 12 are arranged symmetrically with respect to the center line of the four-point bending force applying device respectively, and the equal-height L-shaped clamp 4 and the equal-height L-shaped load support platform 12 can be slidably arranged on In the slide rail groove of the base; the loading head 8 is arranged on the top of the equal-height L-shaped load support platform 12; the nut 3 includes an upper nut, and the upper nut is arranged on the tray 7 and the loading pressure Between the heads 8, the top connecting rod 5 passes through the weight 6, the middle part of the tray 7, the upper nut and the middle part of the loading head 8 from top to bottom; The parts respectively abut against the said equal-height L-shaped clamps 4 . the
本发明的有益效果是: The beneficial effects of the present invention are:
1.本发明对进行四点弯曲的硅纳米线传感阵列芯片的长度测试范围大,硅纳米线传感阵列芯片的长度可以为连续变化的尺寸值,并且均在同一实验装置上安装测试。 1. The present invention has a large test range for the length of the silicon nanowire sensing array chip subjected to four-point bending, and the length of the silicon nanowire sensing array chip can be a continuously variable size value, and all of them are installed and tested on the same experimental device.
2.本发明对硅纳米线传感阵列芯片测试过程中均采用固定支撑平台,不会因为固定端约束产生过多的影响因素,保证测试结果的准确性。 2. The present invention adopts a fixed support platform during the testing process of the silicon nanowire sensor array chip, so that too many influencing factors will not be generated due to the constraints of the fixed end, and the accuracy of the test result is guaranteed. the
3.本发明在测试硅纳米线传感阵列芯片时,可以调整两个支撑点以及两个加载点的距离,消除测试样品在受压弯曲时产生过多伸长量,提高数据的准确性。 3. The present invention can adjust the distance between two support points and two loading points when testing the silicon nanowire sensor array chip, eliminate excessive elongation of the test sample when it is bent under pressure, and improve the accuracy of data. the
4.本发明采用基于多点平均测量技术的微小阻值检测装置和微小应变检测装置,整体装置制造简单、体积小、成本低、精度高、对环境的要求不高,测量时间大为减小,有很强的市场推广价值。 4. The present invention adopts a micro-resistance detection device and a micro-strain detection device based on multi-point average measurement technology. The overall device is simple to manufacture, small in size, low in cost, high in precision, low in environmental requirements, and greatly reduced in measurement time , has a strong marketing value. the
附图说明 Description of drawings
为了进一步说明本发明的内容及特点,结合以下附图进一步的描述,其中: In order to further illustrate the content and characteristics of the present invention, further description in conjunction with the following drawings, wherein:
图1.本发明的四点弯曲装置示意图。 Figure 1. Schematic diagram of the four-point bending device of the present invention.
图2.被测硅纳米线传感阵列的正表面图。 Figure 2. Front view of the tested silicon nanowire sensing array. the
图3.被测硅纳米线传感阵列的背面图。 Figure 3. Back view of the tested silicon nanowire sensing array. the
图4.本发明的微小应变检测和微小阻值检测装置整体框图。 Fig. 4. The overall block diagram of the micro-strain detection and micro-resistance detection device of the present invention. the
图5.本发明的硅纳米线和其阻值相同的三个精密电阻组成的全桥电路。 Fig. 5. A full bridge circuit composed of silicon nanowires of the present invention and three precision resistors with the same resistance value. the
图6.本发明微小应变检测和微小阻值检测装置的多路复用开关控制电路。 Fig. 6. The multiplexing switch control circuit of the micro-strain detection and micro-resistance detection device of the present invention. the
图7.本发明的前置放大电路。 Figure 7. The preamplifier circuit of the present invention. the
图8.本发明的第二级放大滤波电路与跟随器电路。 Fig. 8. The second-stage amplification filter circuit and follower circuit of the present invention. the
图9.本发明的A/D转换电路。 Fig. 9. A/D conversion circuit of the present invention. the
the
具体实施方式 Detailed ways
为使本发明/发明实施例的目的和技术方案更加清楚,下面将结合本发明/发明实施例的附图,对本发明/发明实施例的技术方案进行清楚、完整地描述。显然,所描述的实施例是本发明/发明的一部分实施例,而不是全部的实施例。基于所描述的本发明/发明的实施例,本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例,都属于本发明/发明保护的范围。 In order to make the purpose and technical solution of the present invention/the embodiment of the invention clearer, the following will clearly and completely describe the technical solution of the present invention/the embodiment of the invention in conjunction with the accompanying drawings of the present invention/the embodiment of the invention. Apparently, the described embodiments are some of the embodiments of the present invention/invention, but not all of them. Based on the described embodiments of the present invention/invention, all other embodiments obtained by persons of ordinary skill in the art without creative work shall fall within the protection scope of the present invention/invention. the
本技术领域技术人员可以理解,除非另外定义,这里使用的所有术语(包括技术术语和科学术语)具有与本发明/发明所属领域中的普通技术人员的一般理解相同的意义。还应该理解的是,诸如通用字典中定义的那些术语应该被理解为具有与现有技术的上下文中的意义一致的意义,并且除非像这里一样定义,不会用理想化或过于正式的含义来解释。 Those skilled in the art can understand that, unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which this invention/invention belongs. It should also be understood that terms such as those defined in commonly used dictionaries should be understood to have a meaning consistent with the meaning in the context of the prior art, and will not be interpreted in an idealized or overly formal sense unless defined as herein explain. the
本发明/发明中所述的“和/或”的含义指的是各自单独存在或两者同时存在的情况均包括在内。 The meaning of "and/or" mentioned in the present invention/invention means that each exists alone or both exist simultaneously. the
本发明/发明中所述的“内、外”的含义指的是相对于设备本身而言,指向设备内部的方向为内,反之为外,而非对本发明的装置机构的特定限定。 The meaning of "inside and outside" in this invention/invention means that relative to the device itself, the direction pointing to the inside of the device is inside, and vice versa is outside, rather than a specific limitation on the device mechanism of the present invention. the
本发明/发明中所述的“左、右”的含义指的是阅读者正对附图时,阅读者的左边即为左,阅读者的右边即为右,而非对本发明的装置机构的特定限定。 The meaning of "left and right" mentioned in this invention/invention means that when the reader is facing the accompanying drawings, the left side of the reader is the left, and the right side of the reader is the right, rather than the device mechanism of the present invention Specific restrictions. the
本发明/发明中所述的“连接”的含义可以是部件之间的直接连接也可以是部件间通过其它部件的间接连接。 The meaning of "connection" in the present invention/invention may be a direct connection between components or an indirect connection between components through other components. the
本发明/发明中所述的“顺时针”和“逆时针”的含义指的是附图中所显示的顺时针和逆时针的方向,是为了方便阅读者的阅读理解时的定义,而非对本发明/发明的装置机构的特定限定。 The meanings of "clockwise" and "counterclockwise" in this invention/invention refer to the clockwise and counterclockwise directions shown in the drawings, which are definitions for the convenience of readers' reading and understanding, not Specific limitations on the device mechanism of the invention/invention. the
图1是本发明的四点弯曲装置示意图;图2是被测硅纳米线传感阵列的正表面图;图3.是被测硅纳米线传感阵列的背面图;图4是本发明的微小应变检测和微小阻值检测装置整体框图;图5是本发明的硅纳米线和其阻值相同的三个精密电阻组成的全桥电路;图6是本发明微小应变检测和微小阻值检测装置的多路复用开关控制电路;图7是本发明的前置放大电路;图8是本发明的第二级放大滤波电路与跟随器电路;图9是本发明的A/D转换电路。本发明提供的硅纳米传感阵列巨压阻系数测量系统包括四点弯曲施力装置、微小阻值检测装置和微小应变检测装置三部分。其中四点弯曲施力装置给硅纳米线传感阵列芯片施加均匀轴向应力(应变),如图1所示,该装置包括船型底座1、底座滑轨槽、镜像放置的等高L型夹具4、镜像放置的等高L型载荷支撑平台12、螺母3、垫片9、螺纹连杆10、顶部连杆5、若干质量的砝码6、托盘7以及加载压头8。下面详述该四点弯曲装置的装配步骤: Fig. 1 is a schematic view of a four-point bending device of the present invention; Fig. 2 is a front surface view of a measured silicon nanowire sensing array; Fig. 3 is a back view of a measured silicon nanowire sensing array; Fig. 4 is a schematic diagram of the present invention Overall block diagram of micro-strain detection and micro-resistance detection device; Fig. 5 is a full-bridge circuit composed of silicon nanowires of the present invention and three precision resistors with the same resistance value; Fig. 6 is micro-strain detection and micro-resistance detection of the present invention The multiplexing switch control circuit of the device; Fig. 7 is the preamplifier circuit of the present invention; Fig. 8 is the second stage amplification filter circuit and follower circuit of the present invention; Fig. 9 is the A/D conversion circuit of the present invention. The silicon nano sensor array giant piezoresistive coefficient measurement system provided by the present invention includes three parts: a four-point bending force applying device, a small resistance value detection device and a small strain detection device. Among them, the four-point bending force application device applies uniform axial stress (strain) to the silicon nanowire sensor array chip. As shown in Figure 1, the device includes a boat-shaped base 1, a slide rail groove on the base, and a mirror-placed contour L-shaped fixture. 4. Contoured L-shaped load support platform 12 , nut 3 , spacer 9 , threaded connecting rod 10 , top connecting rod 5 , several weights 6 , tray 7 and loading head 8 placed in mirror image. The assembly steps of the four-point bending device are described in detail below:
(a)镜像放置的等高L型夹具4分别在底座上面的滑轨槽内滑动,插入螺纹连杆10,套上垫片9,再拧上螺母3,暂不拧紧,根据加载压头8的大小尺寸,利用底座1正表面的刻度线2,对称地调整镜像放置的等高L型夹具4到指定位置,拧紧螺母3,使L型夹具4与底座1紧固相连; (a) The L-shaped clamps 4 of equal height placed in the mirror image slide in the slide rail grooves above the base respectively, insert the threaded connecting rod 10, put on the gasket 9, and then screw on the nut 3, do not tighten it temporarily, according to the loading pressure head 8 Use the scale line 2 on the front surface of the base 1 to symmetrically adjust the mirrored L-shaped fixture 4 to the designated position, and tighten the nut 3 to make the L-shaped fixture 4 and the base 1 tightly connected;
(b)镜像放置的等高L型载荷支撑平台12,插入螺纹连杆10,套上垫片9,再拧上螺母3,暂不拧紧,根据硅纳米线传感阵列芯片13的长短不一的情况,利用底座1正表面的刻度线2,对称地调整镜像放置的等高L型载荷支撑平台12到指定位置,拧紧螺母3,使之与底座1紧固相连; (b) Insert the threaded connecting rod 10 into the L-shaped load support platform 12 placed in the mirror image, put the gasket 9 on it, and then screw on the nut 3, do not tighten it temporarily, depending on the length of the silicon nanowire sensor array chip 13 In the case of , use the scale line 2 on the front surface of the base 1 to symmetrically adjust the mirrored L-shaped load support platform 12 of equal height to the designated position, and tighten the nut 3 so that it is firmly connected with the base 1;
(c)通过往加载压头8的托盘7上添加砝码6,导致芯片受到轴向均匀应力,即可开展四点弯曲试验。 (c) By adding a weight 6 to the tray 7 loaded with the indenter 8, causing the chip to be subjected to axial uniform stress, a four-point bending test can be carried out.
下面详述本发明提供的四点弯曲加载装置与硅纳米线的四点弯曲试验的巨压阻系数检测过程,具体由以下步骤完成: The following describes the giant piezoresistive coefficient detection process of the four-point bending loading device provided by the present invention and the four-point bending test of silicon nanowires, which is specifically completed by the following steps:
本发明采用的测应变的方法是基于电阻应变计,将应变转化为电信号进行测量。即在硅纳米线传感阵列芯片13的受力点紧贴应变片11,其效果为当硅纳米线传感阵列芯片13发生一定程度的形变,应变片11也会产生相应的对等应变,输出与应变成正比的电压信号,利用PC上位机进行数据处理后可得硅纳米线传感阵列的应变值。其工作过程为:硅纳米线传感阵列受压发生轴向应变→应变片阻值发生变化→全桥输出电压发生变化→小信号放大→数据处理→记录相关应变数据。为了提高硅纳米线的应变测量精度,本发明采用应变片惠斯通全桥接法,其具有灵敏度高、测量范围宽、电路简单、精度高及易于实现温度补偿等特点,很好地满足了应变测量的要求。应变全桥的5V电源电压采用ADP3303; The strain measuring method adopted in the present invention is based on a resistance strain gauge, which converts the strain into an electrical signal for measurement. That is, the stress point of the silicon nanowire sensing array chip 13 is closely attached to the strain gauge 11. The effect is that when the silicon nanowire sensing array chip 13 is deformed to a certain degree, the strain gauge 11 will also produce a corresponding equivalent strain. Output a voltage signal proportional to the strain, and use the PC host computer for data processing to obtain the strain value of the silicon nanowire sensor array. Its working process is as follows: the silicon nanowire sensor array is compressed to produce axial strain → the resistance value of the strain gauge changes → the output voltage of the full bridge changes → small signal amplification → data processing → recording relevant strain data. In order to improve the strain measurement accuracy of silicon nanowires, the present invention adopts the strain gauge Wheatstone full-bridge method, which has the characteristics of high sensitivity, wide measurement range, simple circuit, high precision and easy temperature compensation, etc., which satisfies the strain well. measurement requirements. The 5V supply voltage of the strained full bridge adopts ADP3303;
粘贴应变片是最重要的一个环节,在测量过程中,为了要让硅纳米线传感阵列的变形如实地通过粘结层传递给应变片,要保证粘结层均匀、牢固、不产生蠕滑。其粘贴过程为:检查应变片阻值→清洗硅纳米线传感阵列芯片的表面→粘贴应变片→固化→测应变片的绝缘阻值→引出导线; Sticking the strain gauge is the most important part. During the measurement process, in order to transmit the deformation of the silicon nanowire sensor array to the strain gauge through the bonding layer, it is necessary to ensure that the bonding layer is uniform, firm and free of creep. . The pasting process is: check the resistance value of the strain gauge → clean the surface of the silicon nanowire sensor array chip → paste the strain gauge → cure → measure the insulation resistance of the strain gauge → lead out the wire;
通过杜邦线将多个应变计导电胶和应变片的接线端利用多路复用开关连接到微弱信号采集系统构成微小应变检测装置。具体地,由于电桥输出的差模应变信号很小,基于信号的特点,本发明采用AD公司生产的仪用集成运放AD620,AD620具有低功耗、增益可调节、高输入阻抗和共模抑制比的仪用放大器,特别适用做小信号的前置放大级,OP07具有低输入失调电压,低温漂,低输入噪声、电压幅度及长期稳定的高精度运算放大器,与电阻电容构成有源低通放大电路,通过级联的方式给电桥的微弱小信号进行放大滤波;A/D转换器是数据采集电路的核心部件,它负责输入的模拟信号转换为数字信号,以便中央处理器进行处理。正确选用A/D转换器是提高数据采集电路精度的关键。本发明采用的AD7794是ADI公司推出的高分辨的模数转换器,AD7794适合高精度测量应用中的低功耗、低噪声、完整模拟前段、内置一个低噪声24位的6路差分输入的 ;还集成了片内低噪声仪表放大器,因而可直接输入小信号到ADC。片内内置一个精密低噪声、低温漂带隙基准电压源,也可采用最多两个外部差分基准源,片内特性包括可编程的激励电流源,熔断电流控制和偏置电压产生器,通过低端电源开关可用来在两次转换之间关断桥式传感器,从而使系统功能降到最低,输出速率可在4.17HZ至470HZ的范围内变化,供电电压采用2.5V至5.25V供电,其时钟信号端口,数据写入端口和数据输出端分别与低功耗特性单片机STM32F103RBT6的PA3,PA5,PA6相连。AD7794的AIN1+和AIN1-用于采集电桥输出的模拟电压,基准源为REF1+和REF1-,通过A/D模数转换后可以将数据保存在EEPROM;数据的处理方面EEPROM模块由于储存数据较多,选用储存空间较大,成本较低的AT24C256储存器。这种EEPROM具有32KB容量,通过I2C总线与STM32相连,实现数据的储存与读取。RS232实现与上位机的通信工作,成功的将大量测试数据传输给PC机做数据处理和分析。当然也可以直观地将数值显示在LCD1602液晶上。 A plurality of strain gauge conductive adhesives and terminals of strain gauges are connected to a weak signal acquisition system through a multiplexing switch to form a micro strain detection device through Dupont wires. Specifically, because the differential mode strain signal output by the bridge is very small, based on the characteristics of the signal, the present invention adopts AD620, an instrument integrated operational amplifier produced by AD Company. AD620 has low power consumption, adjustable gain, high input impedance and common mode The instrument amplifier with rejection ratio is especially suitable for small signal preamplification stage. OP07 has low input offset voltage, low temperature drift, low input noise, voltage amplitude and long-term stable high-precision operational amplifier. Through the amplification circuit, the weak small signal of the bridge is amplified and filtered by cascading; the A/D converter is the core component of the data acquisition circuit, which is responsible for converting the input analog signal into a digital signal for processing by the central processing unit . The correct choice of A/D converter is the key to improving the accuracy of the data acquisition circuit. The AD7794 used in the present invention is a high-resolution analog-to-digital converter introduced by ADI. The AD7794 is suitable for low power consumption, low noise, and complete analog front-end in high-precision measurement applications. It has a built-in low-noise 24-bit 6-way differential input. ; It also integrates an on-chip low-noise instrumentation amplifier, so small signals can be directly input to the ADC. A precision low-noise, low-temperature drift bandgap reference voltage source is built-in on-chip, and up to two external differential reference sources can also be used. On-chip features include programmable excitation current source, fuse current control and bias voltage generator. The terminal power switch can be used to turn off the bridge sensor between two conversions, thereby minimizing the system function, the output rate can be changed in the range of 4.17HZ to 470HZ, the power supply voltage is 2.5V to 5.25V, and its clock The signal port, the data writing port and the data output port are respectively connected to PA3, PA5, and PA6 of the low-power-consumption single-chip microcomputer STM32F103RBT6. AIN1+ and AIN1- of AD7794 are used to collect the analog voltage output by the bridge, the reference source is REF1+ and REF1-, and the data can be saved in EEPROM after A/D analog-to-digital conversion; in terms of data processing, the EEPROM module stores more data , choose the AT24C256 storage device with larger storage space and lower cost. This EEPROM has a capacity of 32KB and is connected to STM32 through the I 2 C bus to realize data storage and reading. RS232 realizes the communication work with the upper computer, and successfully transmits a large amount of test data to the PC for data processing and analysis. Of course, the value can also be displayed intuitively on the LCD1602 liquid crystal.
当电桥处于平衡状态时△Usc=0,当硅纳米线传感阵列受到压载时带动应变片的应变变化,从而产生△Usc的变化。根据公式ε=△Usc/(Ui*K),可以计算硅纳米线传感阵列受压后的应变值。 When the bridge is in a balanced state, △Usc=0, and when the silicon nanowire sensing array is under pressure, the strain of the strain gauge changes, resulting in a change of △Usc. According to the formula ε=△Usc/(Ui*K), the strain value of the silicon nanowire sensing array after compression can be calculated. the
其中:ε——硅纳米线的受压后的应变值; Among them: ε——the strain value of the silicon nanowire after compression;
△Usc——应变片受压后全桥的输出电压; △Usc——The output voltage of the full bridge after the strain gauge is compressed;
Ui——应变全桥电源电压;
K——应变片的灵敏度系数。 K——The sensitivity coefficient of the strain gauge.
为了保证数据的更精确性,将多个应变片的全桥电路外接多路复用开关CD4052,CD4052是一个差分4通道数字控制模拟开关,有A、B两个二进制控制输入端和INH输入,具有低导通阻抗和很低的截止漏电流。幅值为4.5~20V的数字信号可控制峰峰值至20V的模拟信号。例如,若VDD=+5V,VSS=0,VEE=-13.5V,则0~5V的数字信号可控制-13.5~4.5V的模拟信号,这些开关电路在整个VDD-VSS和VDD-VEE电源范围内具有极低的静态功耗,与控制信号的逻辑状态无关,当INH输入端=“1”时,所有通道截止。二位二进制输入信号选通4对通道中的一通道,可连接该输入至输出。本发明采用的是第二路的Y通道,将控制位A、B接到STM32的PA1,PA2使其置1和0。将多路复用开关CD4052的各个通道的值取平均,记录平均应变值进行后续的数据处理; In order to ensure more accurate data, the multiplexer switch CD4052 is externally connected to the full bridge circuit of multiple strain gauges. CD4052 is a differential 4-channel digital control analog switch with two binary control input terminals A and B and INH input. It has low on-resistance and very low off-leakage current. A digital signal with an amplitude of 4.5 to 20V can control an analog signal from peak to peak to 20V. For example, if VDD=+5V, VSS=0, VEE=-13.5V, then the digital signal of 0~5V can control the analog signal of -13.5~4.5V, these switching circuits are in the whole VDD-VSS and VDD-VEE power supply range It has extremely low static power consumption and has nothing to do with the logic state of the control signal. When the INH input = "1", all channels are cut off. A 2-bit binary input signal strobes one of 4 pairs of channels that connect the input to the output. The present invention uses the second Y channel, and connects the control bits A and B to PA1 and PA2 of the STM32 to set them to 1 and 0. Average the values of each channel of the multiplexing switch CD4052, record the average strain value for subsequent data processing;
由于△R/R非常小,万用表测量不太精确,需要采用某些测量电路,将电阻相对变化△R/R的测量转换为电压的测量,通过△Uout=(△R/R)*U0式,可方便的计算出硅纳米线13的阻值微小变化。 Since △R/R is very small, the measurement of the multimeter is not very accurate, and some measurement circuits are needed to convert the measurement of the relative change of resistance △R/R into the measurement of voltage, through the formula △Uout=(△R/R)*U0 , the small change in the resistance value of the silicon nanowire 13 can be calculated conveniently.
其中:△Uout——电桥输出电压; Among them: △Uout——bridge output voltage;
U0——电源电压(供桥电压); U0——power supply voltage (for bridge voltage);
△R/R——硅纳米线的受压后阻值变化与受压前的阻值比。 △R/R——The ratio of the resistance value change of the silicon nanowire after compression to the resistance value before compression.
典型的测量电路采用惠斯通电桥,由于硅纳米线受到挤压应变,产生阻值的变化,从而引起电桥的不平衡,产生了差动信号。直流放大器输入级阻抗很高,与桥壁阻抗相比,其负载阻抗可视为无穷大。因此本发明采用了直流电桥,将硅纳米线传感阵列13中任一硅纳米线和其阻值相同的三个精密电阻组成的惠斯通全桥电路,测量发生应变时其阻值变化; A typical measurement circuit uses a Wheatstone bridge. Due to the silicon nanowires being squeezed and strained, the resistance value changes, which causes the imbalance of the bridge and generates a differential signal. The input stage impedance of the DC amplifier is very high, and its load impedance can be regarded as infinite compared with the bridge wall impedance. Therefore, the present invention adopts a direct current bridge, a Wheatstone full-bridge circuit composed of any silicon nanowire in the silicon nanowire sensing array 13 and three precision resistors with the same resistance value, and measures the change of its resistance value when strain occurs;
本发明利用多路复用开关CD4052将多个惠斯通电桥与微弱信号采集系统构成微小阻值检测装置,并将多个测量值取平均处理。其前置放大电路也是采用由AD620搭建的放大电路,二级输出级放大电路也是由OP07搭建的,为了抑制干扰,第一级作为一阶的低通滤波器,为了提高驱动能力,保证信号不会在前放衰减的太多,最后一级作为电压跟随器;微小阻值检测装置的A/D转换电器也采用高精度测量应用中的低功耗、低噪声、高分辨的AD7794模数转换器。最终输出的平均电压值显示在液晶LCD1602上。采用了阵列式多点平均测量技术提高阻值变化的测量精度。 The present invention utilizes a multiplex switch CD4052 to form a small resistance value detection device with a plurality of Wheatstone bridges and a weak signal acquisition system, and averages a plurality of measured values. Its pre-amplification circuit is also built by AD620, and the second-stage output stage amplifier circuit is also built by OP07. In order to suppress interference, the first stage is used as a first-order low-pass filter. In order to improve the driving ability and ensure that the signal does not There will be too much attenuation in the front amplifier, and the last stage is used as a voltage follower; the A/D converter of the tiny resistance detection device also uses the low power consumption, low noise, and high resolution AD7794 analog-to-digital conversion in high-precision measurement applications device. The average voltage value of the final output is displayed on the liquid crystal LCD1602. The array multi-point average measurement technology is adopted to improve the measurement accuracy of the resistance change.
根据底座1的正表面的刻度线2,对称地调整镜像(两个对立)放置的等高L型载荷支撑平台12顶部尖点之间距离,扭紧螺母3,固定在底座1上,然后将硅纳米线传感阵列芯片13放置在支撑平台12上,保证硅纳米线13横平竖直,保证加载压头8载荷作用于指定位置,保证加载的准确性和稳定性; According to the scale line 2 on the front surface of the base 1, symmetrically adjust the distance between the top points of the mirrored (two opposite) L-shaped load support platforms 12 of equal height, tighten the nut 3, fix it on the base 1, and then The silicon nanowire sensor array chip 13 is placed on the support platform 12 to ensure that the silicon nanowire 13 is horizontally flat and vertical, and that the load of the loading indenter 8 acts on the designated position, ensuring the accuracy and stability of loading;
加载压头先通过镜像(两个对立)放置的等高L型夹具3两边的滑轨将加载压头的两个压点置于硅纳米线传感阵列芯片13的表面,通过加载压头8上的连杆5向托盘7上添加若干质量的砝码6给硅纳米线传感阵列芯片13表面施加压力; The loading indenter first places the two pressure points of the loading indenter on the surface of the silicon nanowire sensor array chip 13 through the slide rails on both sides of the equal-height L-shaped fixture 3 placed in mirror image (two opposites), and passes through the loading indenter 8 The upper connecting rod 5 adds some weights 6 to the tray 7 to apply pressure to the surface of the silicon nanowire sensing array chip 13;
缓慢地添加砝码,运行加载压头8时,记录硅纳米线传感阵列13平均后的应变和阻值变化,并根据应变和阻值变化利用通用压阻系数公式实现对硅纳米线传感阵列的巨压阻系数的测算。 Slowly add weights, and when running the loading head 8, record the averaged strain and resistance value changes of the silicon nanowire sensing array 13, and use the general piezoresistive coefficient formula to realize silicon nanowire sensing according to the strain and resistance value changes Calculation of the giant piezoresistive coefficient of the array.
上述仅为本发明的具体实施例,并不限制本发明在其他材料压阻系数测量时的应用,凡在本发明的精神和原则之内所做的修改、等同替换和改进等,均应包含在本发明的保护范围之内。 The above are only specific embodiments of the present invention, and do not limit the application of the present invention to the measurement of piezoresistive coefficients of other materials. All modifications, equivalent replacements and improvements made within the spirit and principles of the present invention shall include Within the protection scope of the present invention. the
以上仅为本发明/发明的实施方式,其描述较为具体和详细,但并不能因此而理解为对本发明/发明专利范围的限制。应当指出的是,对于本领域的普通技术人员来说,在不脱离本发明构思的前提下,还可以做出若干变形和改进,这些均属于本发明/发明的保护范围。 The above is only the embodiment of the present invention/invention, and its description is relatively specific and detailed, but it should not be construed as limiting the patent scope of the present invention/invention. It should be noted that, for those skilled in the art, several modifications and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention/invention. the
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