CN104065457A - Merged decoding method and device - Google Patents
Merged decoding method and device Download PDFInfo
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- CN104065457A CN104065457A CN201410299501.4A CN201410299501A CN104065457A CN 104065457 A CN104065457 A CN 104065457A CN 201410299501 A CN201410299501 A CN 201410299501A CN 104065457 A CN104065457 A CN 104065457A
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Abstract
The embodiments of the invention disclose a merged decoding method and device for improving the PBCH information analysis capability of the PBCH receiving end. The method comprises the following steps: polarity reversal merger is performed on the LLR value of the first wireless frame received in the nth period and the LLR value obtained in m periods before analysis to obtain a LLR value subjected to polarity reversal merger; and PBCH analysis is performed according to the LLR value subjected to polarity reversal merger, and the obtained PBCH information is outputted after the analysis is succeed. By adopting the embodiments of the invention, PBCH merged decoding can be performed using wireless frame data of more different periods, so the PBCH receiving performance in the harsh wireless environment can be improved.
Description
Technical field
The present invention relates to communication technical field, relate in particular to a kind of method and device that merges decoding.
Background technology
Standard as the third generation and the wireless communication technology transition of the 4th generation, third generation partner program (The3rd Generation Partnership Project, be called for short 3GPP) Long Term Evolution (Long Term Evolution, be called for short LTE) there is the features such as bandwidth is flexible, transmission rate is high, network delay is little, be successfully applied to a lot of countries and regions.In LTE system, user, after obtaining cell synchronous, need to first obtain the information that Physical Broadcast Channel (Physical Broadcast Channel is called for short PBCH) carries, and just can carry out follow-up operation.
PBCH comprises 40 bits altogether, and wherein 24 is broadcast channel (Broadcast Channel is called for short BCH) information bit, and 16 is cyclic redundancy check (CRC) code (Cyclic Redundancy Check is called for short CRC).The transmission of PBCH, the 40ms of take i.e. four frames is one-period, every frame is once.With System Frame Number (System Frame Number, be called for short SFN) mould 4, be that in 0 initial 4 radio frames, the information in PBCH does not change, change be the sequence of scrambling.Generally, the system bandwidth in PBCH, configuration information and number of transmit antennas can not change, and the high-order information of SFN is along with the time is carried out circulating increasing progressively, as 0,1,2 ..., 255,0,1,2 ... circulation change like this.
In existing PBCH information analysis technical scheme, can merge at most SFN mould 4 and be the PBCH signal in 0 initial 4 radio frames, if publication number is disclosed technical scheme in CN102271023B.At low Signal to Interference plus Noise Ratio and/or only use single antenna to receive in the system of PBCH signal, use existing scheme, 4 radio frames that can only merge at most in same period are carried out the parsing of PBCH, the information analysis ability of PBCH is restricted, needs a kind of method that can promote parsing PBCH information capability.
Summary of the invention
The invention provides a kind of method and device that merges decoding, in order to promote PBCH receiving terminal, resolve the ability of PBCH information.
A kind of method that merges decoding that the embodiment of the present invention provides, comprising:
The log-likelihood ratio of the first radio frames that the n cycle is received (Loglikelihood Ratio is called for short LLR) value is carried out polarity inversion merging with the LLR value of m cycle acquisition by before resolving, obtains the LLR value of polarity inversion merging;
The LLR value merging according to described polarity inversion is carried out PBCH parsing, and the PBCH information obtaining is resolved in output after successfully resolved.
Preferably, the LLR value obtaining according to described polarity inversion merging also comprises after carrying out PBCH parsing:
If the LLR value merging according to described polarity inversion is carried out PBCH, resolve unsuccessfully, the LLR value of second radio frames that n cycle received and the LLR value weighting summation that described polarity inversion merging obtains, obtain the LLR value of weighting summation;
According to the LLR value of described weighting summation, carry out PBCH parsing, and the PBCH information obtaining is resolved in output after successfully resolved.
If carry out PBCH according to the LLR value of described weighting summation, resolve unsuccessfully, the 3rd radio frames n cycle being received merges parsing; Whether judgement resolves successful, and if so, the PBCH information obtaining is resolved in output; Otherwise the next radio frames that n cycle received merges parsing, until complete the merging of last radio frames that n cycle received, resolve.
Preferably, the LLR value of the described first radio frames that the n cycle is received is carried out polarity inversion merging with the LLR value of m cycle acquisition by before resolving, comprising:
The described LLR value by ad-hoc location in the LLR value of m cycle acquisition before resolving is carried out to polarity inversion, with the LLR value weighting summation of the first radio frames of described n in the cycle, obtain the LLR value that polarity inversion merges;
Wherein, described ad-hoc location is to set the position that numerical value is corresponding in bit reversal bitmap R*.
Preferably, according to following manner, generate described bit reversal bitmap R
*:
Generate SFN bit reversal bitmap;
By fill full 0 bit after described SFN bit reversal bitmap, and add CRC bit reversal bitmap, obtain PBCH bit reversal bitmap;
According to PBCH bit reversal bitmap, obtain bit reversal bitmap R
*.
Preferably, described generation SFN bit reversal bitmap, comprising:
When SFN is known, by described m in the cycle a high-order and SFN high position corresponding to first radio frames LLR value of n cycle of SFN corresponding to last cycle carry out mould 2 and add, obtain SFN bit reversal bitmap;
When SFN is unknown, directly sets and obtain SFN bit reversal bitmap.
Preferably, describedly according to PBCH bit reversal bitmap, obtain bit reversal bitmap R
*, comprising:
If after rate de-matching, before decoding, determine the LLR value that described polarity inversion merges, bit reversal bitmap R
*for R
0;
If the solution bit in rate de-matching is selected and prune after, separate bit collection and sub-block and determine the LLR value that described polarity inversion merges before interweaving, bit reversal bitmap R
*for R
1;
If determine the LLR value that described polarity inversion merges, bit reversal bitmap R after descrambling, before rate de-matching
*for R
2;
Wherein, described R
0for PBCH bit reversal bitmap carries out the bit reversal bitmap obtaining after chnnel coding;
Described R
1refer to R
0through the bit reversal bitmap that sub-block interweaves and bit collection obtains afterwards;
Described R
2refer to R
1through bit, select and prune the bit reversal bitmap obtaining afterwards.
A kind of device that merges decoding that the embodiment of the present invention provides, comprising:
LLR value reversion module, carries out polarity inversion for the LLR value that m the cycle by before resolving obtained;
LLR value merges module, for the LLR value of first radio frames that the n cycle is received with described in carry out the LLR value merging that polarity inversion obtains, obtain the LLR value of polarity inversion merging;
Parsing module, carries out PBCH parsing for the LLR value merging according to described polarity inversion, and the PBCH information obtaining is resolved in output after successfully resolved.
Preferably, described LLR value merge module also for:
If the LLR value merging according to described polarity inversion is carried out PBCH, resolve unsuccessfully, the LLR value of second radio frames that n cycle received and the LLR value weighting summation that described polarity inversion merging obtains, obtain the LLR value of weighting summation; If carry out PBCH according to the LLR value of described weighting summation, resolve unsuccessfully, the 3rd radio frames n cycle being received merges, until complete the merging of last radio frames that n cycle received;
Described parsing module also for:
According to the LLR value of described weighting summation, carry out PBCH parsing, and the PBCH information obtaining is resolved in output after successfully resolved; If carrying out PBCH according to the LLR value of described weighting summation resolves unsuccessfully, the 3rd radio frames n cycle being received merges the LLR value obtaining resolves, until complete the parsing that last radio frames that n cycle received merges the LLR value obtaining.
Preferably, described LLR value reversion module is used for:
The described LLR value by ad-hoc location in the LLR value of m cycle acquisition before resolving is carried out to polarity inversion;
Wherein, described ad-hoc location is to set the position that numerical value is corresponding in bit reversal bitmap R*;
Preferably, described LLR value reversion module also for:
Generate SFN bit reversal bitmap;
By fill full 0 bit after described SFN bit reversal bitmap, and add CRC bit reversal bitmap, obtain PBCH bit reversal bitmap;
According to PBCH bit reversal bitmap, obtain bit reversal bitmap R
*.
Preferably, described LLR value reversion module is used for generating SFN bit reversal bitmap, comprising:
When SFN is known, by described m in the cycle a high-order and SFN high position corresponding to first radio frames LLR value of n cycle of SFN corresponding to last cycle carry out mould 2 and add, obtain SFN bit reversal bitmap;
When SFN is unknown, directly sets and obtain SFN bit reversal bitmap.
Preferably, described LLR value reversion module is for obtaining bit reversal bitmap R according to PBCH bit reversal bitmap
*, comprising:
If after rate de-matching, before decoding, determine the LLR value that described polarity inversion merges, obtain bit reversal bitmap R
*for R
0;
If the solution bit in rate de-matching is selected and prune after, separate bit collection and sub-block and determine the LLR value that described polarity inversion merges before interweaving, obtain bit reversal bitmap R
*for R
1;
If determine the LLR value that described polarity inversion merges after descrambling, before rate de-matching, obtain bit reversal bitmap R
*for R
2;
Wherein, described R
0for PBCH bit reversal bitmap carries out the bit reversal bitmap obtaining after chnnel coding;
Described R
1refer to R
0through the bit reversal bitmap that sub-block interweaves and bit collection obtains afterwards;
Described R
2refer to R
1through bit, select and prune the bit reversal bitmap obtaining afterwards.
The embodiment of the present invention is carried out polarity inversion merging by the LLR value of the first radio frames that the n cycle receives with the LLR value obtaining by parsing m the cycle before, obtains the LLR value that polarity inversion merges; The LLR value merging according to described polarity inversion is carried out PBCH parsing, and the PBCH information obtaining is resolved in output after successfully resolved, realized and utilized the wireless frame data of more different cycles to carry out PBCH merging decoding, promoted the PBCH receptivity under severe wireless environment.
Accompanying drawing explanation
Fig. 1 is BCH information composition diagram;
Fig. 2 is BCH transmission channel coding block diagram;
Fig. 3 is bit pie graph after BCH information interpolation CRC;
Fig. 4 is LTE convolution coder;
Fig. 5 is background technology PBCH rate-matched procedure chart;
Fig. 6 is that embodiment of the present invention PBCH merges interpretation method flow chart;
Fig. 7 is that the polarity inversion of embodiment of the present invention LLR value merges flow chart;
Fig. 8 is embodiment of the present invention PBCH coding output bit reversal bitmap;
Fig. 9 is embodiment of the present invention PBCH coding output bit reversal bitmap calculation flow chart;
Figure 10 is the schematic diagram that embodiment of the present invention PBCH LLR value merges at diverse location;
Figure 11 is that embodiment of the present invention PBCH merges code translator figure.
Embodiment
The embodiment of the present invention is carried out polarity inversion merging by the LLR value of the first radio frames that the n cycle receives with the LLR value obtaining by parsing m the cycle before, obtain the LLR value that polarity inversion merges, the LLR value merging according to described polarity inversion is carried out PBCH parsing, and the PBCH information obtaining is resolved in output after successfully resolved, realized and utilized the wireless frame data of more different cycles to carry out PBCH merging decoding, promoted the PBCH receptivity under severe wireless environment.
Wherein, in the embodiment of the present invention, PBCH is merged the merging of the radio frames that can be consecutive periods, also can be the merging of the radio frames of discontinuous-cycle, for example, when the reception of PBCH is not data judging continuous or wherein some radio frames when very bad, can carry out the merging of the radio frames of discontinuous-cycle.
PBCH receiving terminal in the embodiment of the present invention can be the equipment such as subscriber equipment (User Equipment is called for short UE), evolved Node B (evolved Node B is called for short eNB) or via node (Relay Node is called for short RN).
Below in conjunction with Figure of description, the embodiment of the present invention is described in further detail.
The BCH information that in LTE system, PBCH is corresponding forms shown in Figure 1, and the BCH information bit of PBCH comprises system bandwidth 3 bits, configuration information 3 bits, high-order 8 bits of System Frame Number and retains position 10 bits.
In LTE system, BCH transmission channel coding process is shown in Figure 2, comprises and adds CRC, chnnel coding and rate-matched; Wherein, the CRC of interpolation is 16 bits, and chnnel coding is used and to be stung tail convolutional encoding, and rate-matched comprises that sub-block interweaves, bit collection, bit is selected and prune.
The bit formation that in LTE system, BCH information is added after CRC is shown in Figure 3, comprises altogether 40 bits, and wherein 24 is BCH information bit, and 16 is CRC bit; CRC bit is by 16 bit check bits and 16 bitmask sequences of indication LTE number of transmit antennas, to carry out mould 2 to add and obtain, and wherein, 16 bit check bits are generated by the generator polynomial of 24 BCH information and CRC.
The generator polynomial of 16 CRC is: g
cRC16(D)=D
16+ D
12+ D
5+
1.
Convolution coder in the LTE system that BCH chnnel coding is used is shown in Figure 4, and its constraint length is 7, and code check is 1/3.The initial condition of the register group of convolution coder is incoming bit stream c
klast 6 bits, the output bit flow of encoder is
with
, be called the first check bit stream, the second check bit stream and the 3rd check bit stream.For the chnnel coding of BCH, the length of each check bit stream is 40.
The rate-matched flow process of BCH is shown in Figure 5, and three output bit flows of convolution coder carry out respectively sub-block and interweave, and then pass through bit collection module, merge into a bit stream, and length is 120, is stored in virtual circular buffer; After bit selection and pruning, obtain the bit stream e of output
k.According to the Cyclic Prefix of LTE system (Cyclic Prefix is called for short CP) type, if conventional CP obtains e so
klength be 1920, if expansion CP, obtain so e
klength be 1728.
The merging interpretation method that the embodiment of the present invention provides is shown in Figure 6, and the method comprises the following steps:
The LLR value that the LLR value of step 601, first radio frames that the n cycle is received and m the cycle by before resolving obtain is carried out polarity inversion merging, obtains the LLR value of polarity inversion merging;
Step 602, the LLR value merging according to described polarity inversion are carried out PBCH parsing, and the PBCH information obtaining is resolved in output after successfully resolved.
In this step, m is more than or equal to 1 integer value, n >=m+1.PBCH being merged to the merging of the radio frames that can be consecutive periods, can be also the merging of the radio frames of discontinuous-cycle.
The embodiment of the present invention is for the merging of different cycles radio frames, and the cycle of merging can be for two or more, depending on actual service condition.
Below, the situation that two cycles merge of take is example:
The cycle of m is before one-period, is called the period 1 herein; The n cycle can be the one-period after the period 1, is called second round.The LLR value that can obtain for having resolved last radio frames of period 1 by resolving the LLR value of period 1 acquisition can be also the LLR value of having resolved two or more radio frames acquisitions of period 1.For the latter, the LLR value that its final LLR value obtaining obtains for soft information merging, i.e. the LLR value of weighting summation.Receive the first radio frames of second round, the LLR value of the first radio frames receiving second round and the LLR value obtaining by the period 1 before resolving are carried out to polarity inversion merging, obtain the LLR value that polarity inversion merges; The LLR value merging according to described polarity inversion is carried out PBCH parsing, and the PBCH information obtaining is resolved in output after successfully resolved.
If the LLR value merging according to described polarity inversion is carried out PBCH, resolve unsuccessfully, the LLR value of second radio frames receiving second round and described polarity inversion are merged to the LLR value weighting summation obtaining, obtain the LLR value of weighting summation; According to the LLR value of described weighting summation, carry out PBCH parsing, and the PBCH information obtaining is resolved in output after successfully resolved.
If carry out PBCH according to the LLR value of described weighting summation, resolve unsuccessfully, the receive second round the 3rd radio frames merged to parsing; Whether judgement resolves successful, and if so, the PBCH information obtaining is resolved in output; Otherwise, the next radio frames receiving second round is merged to parsing, until complete the merging of last radio frames that received second round, resolve.
The situation that three cycles merge of take is example:
The cycle of m is before two cycles, i.e. m=2, the situation that the process of the first two cycle radio frames of parsing merged referring to two cycles in above-described embodiment.PBCH receiving terminal to the merging of the first two cycle radio frames resolve unsuccessfully after, receive the first radio frames in n cycle, the LLR value that the LLR value of the first radio frames that the n cycle is received and two cycles by before resolving obtain is carried out polarity inversion merging, obtains the LLR value of polarity inversion merging; The LLR value merging according to described polarity inversion is carried out PBCH parsing, and the PBCH information obtaining is resolved in output after successfully resolved.
If the LLR value merging according to described polarity inversion is carried out PBCH, resolve unsuccessfully, the LLR value of second radio frames that n cycle received and the LLR value weighting summation that described polarity inversion merging obtains, obtain the LLR value of weighting summation; According to the LLR value of described weighting summation, carry out PBCH parsing, and the PBCH information obtaining is resolved in output after successfully resolved.
If carry out PBCH according to the LLR value of described weighting summation, resolve unsuccessfully, the 3rd radio frames n cycle being received merges parsing; Whether judgement resolves successful, and if so, the PBCH information obtaining is resolved in output; Otherwise the next radio frames that n cycle received merges parsing, until complete the merging of last radio frames that n cycle received, resolve.
Preferably, the LLR value of the described first radio frames that the n cycle is received is carried out polarity inversion merging with the LLR value of m cycle acquisition by before resolving, comprising:
The described LLR value by ad-hoc location in the LLR value of m cycle acquisition before resolving is carried out to polarity inversion, with the LLR value weighting summation of the first radio frames of described n in the cycle, obtain the LLR value that polarity inversion merges;
Wherein, described ad-hoc location is bit reversal bitmap R
*position corresponding to middle setting numerical value.Preferably, described setting numerical value can be 1.
The detailed process that embodiment of the present invention polarity inversion merges is shown in Figure 7, what suppose current parsing is the radio frames of i PBCH in the cycle, its corresponding SFN is the target SFNi described in figure, target SFNi and the SFN in previous PBCH cycle (i-1) are carried out to mould 2 to be added, obtain SFN bit reversal bitmap, and then can obtain the bit reversal bitmap R that SFN bit reversal bitmap is corresponding
*; Everybody of the LLR value obtaining before supposing is respectively A1, A2 ..., AK, for A1 position, judgement bit reversal bitmap R
*in the numerical value of corresponding with A1 position position whether be 1, if 1, polarity inversion is carried out in A1 position, if be not 1, polarity inversion is not carried out in A1 position; By each in the LLR value obtaining before is all carried out after above-mentioned processing, obtain the LLR value A1 ' after polarity inversion, A2 ' ..., AK '; By the LLR value A1 ' after current LLR value and polarity inversion, A2 ' ..., AK ' is weighted addition, obtains the LLR value that polarity inversion merges, and the LLR value merging according to polarity inversion is carried out PBCH parsing.
Preferably, according to following manner, generate described bit reversal bitmap R
*:
Generate SFN bit reversal bitmap;
By fill full 0 bit after described SFN bit reversal bitmap, and add CRC bit reversal bitmap, obtain PBCH bit reversal bitmap;
According to PBCH bit reversal bitmap, obtain bit reversal bitmap R
*.
Shown in Figure 8, in the embodiment of the present invention, according to the SFN bit reversal bitmap generating, before it, supplement 6 full 0 bits, after it, supplement 10 full 0 bits, and according to the CRC check position generation method of BCH, obtain CRC bit reversal bitmap; Wherein said above the filling 6 full 0 bits and can not do of SFN bit reversal bitmap, SFN bit reversal bitmap fill 10 full 0s below, according to the CRC computational methods of BCH, obtain CRC bit reversal bitmap.Order according to 60 bits, SFN bit reversal bitmap, 10 0 bits, CRC bit reversal bitmap, forms a PBCH bit reversal bitmap.
Preferably, described generation SFN bit reversal bitmap, comprising:
When SFN is known, by described m in the cycle a high-order and SFN high position corresponding to first radio frames LLR value of n cycle of SFN corresponding to last cycle carry out mould 2 and add, obtain SFN bit reversal bitmap.
For example, described m in the cycle SFN high position corresponding to last cycle be [0,000 0010], a SFN high position corresponding to first radio frames LLR value of n cycle is [0,000 0011], two SFN high positions are carried out mould 2 and are added, and obtain SFN bit reversal bitmap [0,000 0001]; If discontinuous, suppose described m in the cycle SFN corresponding to last cycle high-order be [0,000 0010], a SFN high position corresponding to first radio frames LLR value of n cycle is [0,000 0100], and two SFN high positions are carried out mould 2 and added, and obtain SFN bit reversal bitmap [0,000 0110].
When SFN is unknown, directly sets and obtain SFN bit reversal bitmap.
Concrete, when SFN (k) before and current SFN (k+p) are uncertain, can be by traversal all possible SFN (k) and SFN (k+p), obtain the S set (p) of SFN bit reversal bitmap=R1, R2 ..., Rn}.
For example, when merging the radio frames of two consecutive periods, p=1, carries out mould 2 by SFN (k) and SFN (k+1) and adds, obtain S (p)={ [0,000 0001], [0,000 0011], [0,000 0111], [0,000 1111], [00011111], [0,011 1111], [0,111 1111], [1,111 1111] }; Wherein, bit reversal bitmap [00000001] carries out mould 2 for [* * * * * * * 0] and a SFN high position [* * * * * * * 1] and adds and obtain by SFN is high-order, bit reversal bitmap [0,000 0011] carries out mould 2 for [* * * * * * 01] and a SFN high position [* * * * * * 10] and adds and obtain by SFN is high-order, * represent any one value in 0 or 1, high-order for the SFN that the radio frames of consecutive periods is corresponding, the * of its correspondence position is consistent, as [1,010 1000] and [1,010 1001].When merging the radio frames of two discontinuous-cycles, suppose p=2, SFN (k) and SFN (k+2) are carried out to mould 2 to be added, obtain S (p)={ [0,000 0010], [0,000 0110], [0,000 1110], [0,001 1110], [0,011 1110], [0,111 1110], [1,111 1110] }.Through checking, element number n≤8 in S set (p), and also n is relevant with p, finally can obtain the corresponding relation of a p and S (p).Therefore, can be for the value of p, set at random SFN bit reversal bitmap for any in the S (p) corresponding with p.Such as, for p=1, setting SFN bit reversal bitmap be [0,000 0001], and after attempting carrying out PBCH and resolving unsuccessfully, setting SFN bit reversal bitmap is [0,000 0011], again carries out PBCH parsing, and repetition said process, until successfully resolved.
With the example of merging into of two cycle radio frames, shown in Figure 9, in step 901, SFN1 corresponding to period 1 radio frames and SFN2 corresponding to radio frames second round are carried out to mould 2 and add, obtain SFN bit reversal bitmap; In step 902, before SFN bit reversal bitmap, supplement 6 full 0 bits, after supplement 10 full 0 bits; In step 903, add CRC bit reversal bitmap; Obtain in the manner described above a PBCH bit reversal bitmap shown in Fig. 8.
In step 904, for PBCH bit reversal bitmap, according to 3GPP LTE, sting tail convolutional coding method, obtain three check bit streams, the order that three check bit streams that obtain are flowed according to the first check bit stream, the second check bit stream and the 3rd check bit, respectively export successively a bit, finally obtain the data sequence of 120 bits, be called PBCH coding output bit reversal bitmap R
0.
In step 905, three check bits that described PBCH bit reversal bitmap is obtained through convolutional encoding flow, and send into the BCH rate-matched module of Fig. 5, and the bit sequence after the bit collection obtaining is called PBCH coding output bit reversal bitmap R
1; Through step 906, obtain the bit sequence after bit selection and pruning, be called PBCH coding output bit reversal bitmap R
2.
At PBCH receiving terminal, obtain PBCH coding output bit reversal bitmap R
0, R
1and R
2method, can be in real time to calculate and generate, can be to be also stored in system storage district and to read in after off-line generates.
Preferably, describedly according to PBCH bit reversal bitmap, obtain bit reversal bitmap R
*, comprising:
If after rate de-matching, before decoding, determine the LLR value that described polarity inversion merges, bit reversal bitmap R
*for R
0;
If the solution bit in rate de-matching is selected and prune after, separate bit collection and sub-block and determine the LLR value that described polarity inversion merges before interweaving, bit reversal bitmap R
*for R
1;
If determine the LLR value that described polarity inversion merges, bit reversal bitmap R after descrambling, before rate de-matching
*for R
2;
Wherein, described R
0for PBCH bit reversal bitmap carries out the bit reversal bitmap obtaining after chnnel coding;
Described R
1refer to R
0through the bit reversal bitmap that sub-block interweaves and bit collection obtains afterwards;
Described R
2refer to R
1through bit, select and prune the bit reversal bitmap obtaining afterwards.
Specific implementation process in this step is shown in Figure 10, and step 101 is descrambling process, and step 102 is selected and pruning process for separating bit, and step 103 is for separating bit collection and sub-block interleaving process, and step 104 is decode procedure, and step 105 is CRC check process.According to LLR value, be incorporated in the position in PBCH receiver, * value is 0,1 or 2, respectively corresponding 106a, 106b and 106c.
Described 106a:
Use LLR to merge a position.The soft information that demodulation obtains for present frame PBCH, use corresponding scrambler section to carry out after descrambling, with current SFNi (i=1,2, n, SFN high-order number corresponding to PBCH LLR of n for obtaining) corresponding BCH information is decoding target, takes out by SFNj corresponding to the LLR value of storing (j=1,2,, n, j ≠ i) and the corresponding PBCH coding of the SFN bit reversal bitmap output bit reversal bitmap that generates of current SFNi
, will store in LLR value sequence Aj
the LLR value that is the position of 1 correspondence is carried out polarity inversion, and then the LLR value sequence Ai weighting summation corresponding with current SFNi, separates bit by the LLR value sequence after this addition and select and prune.
The weights of the LLR value weighting summation in described 106a, can be:
Wherein, frame number corresponding to LLR sequence of K for merging;
Or:
Described 106b:
Use LLR to merge b position.For present frame PBCH, separate bit and select and prune the soft information obtaining, the BCH information that the current SFN of take is corresponding is decoding target, takes out the corresponding PBCH coding of the SFN bit reversal bitmap being generated by SFNj corresponding to the LLR value of storing and current SFNi output bit reversal bitmap
to store in LLR value sequence Aj
the LLR value that is the position of 1 correspondence is carried out polarity inversion, the LLR value sequence Ai weighting summation corresponding with current SFNi then, and the LLR value sequence after this is added separates bit collection and sub-block interweaves.
The weights of the LLR value weighting summation in described 106b are identical with the weights of LLR value weighting summation in 106a.
Described 106c:
Use LLR to merge c position.For the soft information of separating after bit collection and sub-block interweave, the BCH information that the current SFNi of take is corresponding is decoding target, takes out the corresponding PBCH coding of the SFN bit reversal bitmap being generated by SFNj corresponding to the LLR value of storing and current SFNi output bit reversal bitmap
to store in LLR value sequence Aj
the LLR value that is the position of 1 correspondence is carried out polarity inversion, and then the LLR value sequence Ai weighting summation corresponding with current SFNi, carries out decoding by the LLR value sequence after this addition.
The weights of the LLR value weighting summation in described 106c are identical with the weights of LLR value weighting summation in 106a.
The LLR merging mode of above-mentioned three kinds of diverse locations is mutually independently, that is to say, after making therein certain position merge, do not repel and in other positions, carry out the worth merging of LLR, for example, after using LLR to merge a position between step 101 and 102 SFN1 and LLR value corresponding to SFN2 are merged, can also merge using LLR to merge LLR value with the SFN3 corresponding LLR value of b position after to aforementioned SFN1 and LLR value merging corresponding to SFN2 between step 102 and 103.Everyly in the present invention spirit scope, three kinds of LLR merging modes are carried out to different combinations, also within the scope of protection of the invention.
For said method flow process, the embodiment of the present invention also provides a kind of device that merges decoding, and the particular content of this device can be implemented with reference to said method, does not repeat them here.
The embodiment of the present invention provides a kind of device that merges decoding, shown in Figure 11.The embodiment of the present invention merges code translator and comprises:
LLR value reversion module 111, carries out polarity inversion for the LLR value that m the cycle by before resolving obtained;
LLR value merges module 112, for the LLR value of first radio frames that the n cycle is received with described in carry out the LLR value merging that polarity inversion obtains, obtain the LLR value of polarity inversion merging;
Parsing module 113, carries out PBCH parsing for the LLR value merging according to described polarity inversion, and the PBCH information obtaining is resolved in output after successfully resolved.
Preferably, described LLR value merge module also 112 for:
If the LLR value merging according to described polarity inversion is carried out PBCH, resolve unsuccessfully, the LLR value of second radio frames that n cycle received and the LLR value weighting summation that described polarity inversion merging obtains, obtain the LLR value of weighting summation; If carry out PBCH according to the LLR value of described weighting summation, resolve unsuccessfully, the 3rd radio frames n cycle being received merges, until complete the merging of last radio frames that n cycle received;
Described parsing module 113 also for:
According to the LLR value of described weighting summation, carry out PBCH parsing, and the PBCH information obtaining is resolved in output after successfully resolved; If carrying out PBCH according to the LLR value of described weighting summation resolves unsuccessfully, the 3rd radio frames n cycle being received merges the LLR value obtaining resolves, until complete the parsing that last radio frames that n cycle received merges the LLR value obtaining.
Preferably, described LLR value reversion module 111 for:
The described LLR value by ad-hoc location in the LLR value of m cycle acquisition before resolving is carried out to polarity inversion;
Wherein, described ad-hoc location is to set the position that numerical value is corresponding in bit reversal bitmap R*;
Preferably, described LLR value reversion module 111 also for:
Generate SFN bit reversal bitmap;
By fill full 0 bit after described SFN bit reversal bitmap, and add CRC bit reversal bitmap, obtain PBCH bit reversal bitmap;
According to PBCH bit reversal bitmap, obtain bit reversal bitmap R
*.
Preferably, described LLR value reversion module 111 also for:
When SFN is known, by described m in the cycle a high-order and SFN high position corresponding to first radio frames LLR value of n cycle of SFN corresponding to last cycle carry out mould 2 and add, obtain SFN bit reversal bitmap;
When SFN is unknown, directly sets and obtain SFN bit reversal bitmap.
Preferably, described LLR value reversion module 111 also for:
If after rate de-matching, before decoding, determine the LLR value that described polarity inversion merges, obtain bit reversal bitmap R
*for R
0;
If the solution bit in rate de-matching is selected and prune after, separate bit collection and sub-block and determine the LLR value that described polarity inversion merges before interweaving, obtain bit reversal bitmap R
*for R
1;
If determine the LLR value that described polarity inversion merges after descrambling, before rate de-matching, obtain bit reversal bitmap R
*for R
2;
Wherein, described R
0for PBCH bit reversal bitmap carries out the bit reversal bitmap obtaining after chnnel coding;
Described R
1refer to R
0through the bit reversal bitmap that sub-block interweaves and bit collection obtains afterwards;
Described R
2refer to R
1through bit, select and prune the bit reversal bitmap obtaining afterwards.
It can be seen from the above:
The embodiment of the present invention is carried out polarity inversion merging by the LLR value of the first radio frames that the n cycle receives with the LLR value obtaining by parsing m the cycle before, obtains the LLR value that polarity inversion merges; The LLR value merging according to described polarity inversion is carried out PBCH parsing, and the PBCH information obtaining is resolved in output after successfully resolved, realized and utilized the wireless frame data of more different cycles to carry out PBCH merging decoding, promoted the PBCH receptivity under severe wireless environment.
Those skilled in the art should understand, embodiments of the invention can be provided as method, system or computer program.Therefore, the present invention can adopt complete hardware implementation example, implement software example or in conjunction with the form of the embodiment of software and hardware aspect completely.And the present invention can adopt the form that wherein includes the upper computer program of implementing of computer-usable storage medium (including but not limited to magnetic disc store, CD-ROM, optical memory etc.) of computer usable program code one or more.
The present invention is with reference to describing according to flow chart and/or the block diagram of the method for the embodiment of the present invention, equipment (system) and computer program.Should understand can be in computer program instructions realization flow figure and/or block diagram each flow process and/or the flow process in square frame and flow chart and/or block diagram and/or the combination of square frame.Can provide these computer program instructions to the processor of all-purpose computer, special-purpose computer, Embedded Processor or other programmable data processing device to produce a machine, the instruction of carrying out by the processor of computer or other programmable data processing device is produced for realizing the device in the function of flow process of flow chart or a plurality of flow process and/or square frame of block diagram or a plurality of square frame appointments.
These computer program instructions also can be stored in energy vectoring computer or the computer-readable memory of other programmable data processing device with ad hoc fashion work, the instruction that makes to be stored in this computer-readable memory produces the manufacture that comprises command device, and this command device is realized the function of appointment in flow process of flow chart or a plurality of flow process and/or square frame of block diagram or a plurality of square frame.
These computer program instructions also can be loaded in computer or other programmable data processing device, make to carry out sequence of operations step to produce computer implemented processing on computer or other programmable devices, thereby the instruction of carrying out is provided for realizing the step of the function of appointment in flow process of flow chart or a plurality of flow process and/or square frame of block diagram or a plurality of square frame on computer or other programmable devices.
Although described the preferred embodiments of the present invention, once those skilled in the art obtain the basic creative concept of cicada, can make other change and modification to these embodiment.So claims are intended to all changes and the modification that are interpreted as comprising preferred embodiment and fall into the scope of the invention.
Obviously, those skilled in the art can carry out various changes and modification and not depart from the spirit and scope of the present invention the present invention.Like this, if within of the present invention these are revised and modification belongs to the scope of the claims in the present invention and equivalent technologies thereof, the present invention is also intended to comprise these changes and modification interior.
Claims (12)
1. merge an interpretation method, it is characterized in that, comprising:
The LLR value that the log-likelihood ratio LLR value of the first radio frames that the n cycle is received and m cycle by before resolving obtain is carried out polarity inversion merging, obtains the LLR value of polarity inversion merging;
The LLR value merging according to described polarity inversion is carried out Physical Broadcast Channel PBCH parsing, and the PBCH information obtaining is resolved in output after successfully resolved.
2. the method for claim 1, is characterized in that, the LLR value obtaining according to described polarity inversion merging also comprises after carrying out PBCH parsing:
If the LLR value merging according to described polarity inversion is carried out PBCH, resolve unsuccessfully, the LLR value of second radio frames that n cycle received and the LLR value weighting summation that described polarity inversion merging obtains, obtain the LLR value of weighting summation;
According to the LLR value of described weighting summation, carry out PBCH parsing, and the PBCH information obtaining is resolved in output after successfully resolved;
If carry out PBCH according to the LLR value of described weighting summation, resolve unsuccessfully, the 3rd radio frames n cycle being received merges parsing; Whether judgement resolves successful, and if so, the PBCH information obtaining is resolved in output; Otherwise the next radio frames that n cycle received merges parsing, until complete the merging of last radio frames that n cycle received, resolve.
3. the method for claim 1, is characterized in that, the LLR value of the described first radio frames that the n cycle is received is carried out polarity inversion merging with the LLR value of m cycle acquisition by before resolving, comprising:
The described LLR value by ad-hoc location in the LLR value of m cycle acquisition before resolving is carried out to polarity inversion, with the LLR value weighting summation of the first radio frames of described n in the cycle, obtain the LLR value that polarity inversion merges;
Wherein, described ad-hoc location is to set the position that numerical value is corresponding in bit reversal bitmap R*.
4. method as claimed in claim 3, is characterized in that, according to following manner, generates described bit reversal bitmap R
*:
Generation system frame number SFN bit reversal bitmap;
By fill full 0 bit after described SFN bit reversal bitmap, and add cyclic redundancy check (CRC) code CRC bit reversal bitmap, obtain PBCH bit reversal bitmap;
According to PBCH bit reversal bitmap, obtain bit reversal bitmap R
*.
5. method as claimed in claim 4, is characterized in that, described generation SFN bit reversal bitmap, comprising:
When SFN is known, by described m in the cycle a high-order and SFN high position corresponding to first radio frames LLR value of n cycle of SFN corresponding to last cycle carry out mould 2 and add, obtain SFN bit reversal bitmap;
When SFN is unknown, directly sets and obtain SFN bit reversal bitmap.
6. method as claimed in claim 4, is characterized in that, describedly according to PBCH bit reversal bitmap, obtains bit reversal bitmap R
*, comprising:
If after rate de-matching, before decoding, determine the LLR value that described polarity inversion merges, bit reversal bitmap R
*for R
0;
If the solution bit in rate de-matching is selected and prune after, separate bit collection and sub-block and determine the LLR value that described polarity inversion merges before interweaving, bit reversal bitmap R
*for R
1;
If determine the LLR value that described polarity inversion merges, bit reversal bitmap R after descrambling, before rate de-matching
*for R
2;
Wherein, described R
0for PBCH bit reversal bitmap carries out the bit reversal bitmap obtaining after chnnel coding;
Described R
1refer to R
0through the bit reversal bitmap that sub-block interweaves and bit collection obtains afterwards;
Described R
2refer to R
1through bit, select and prune the bit reversal bitmap obtaining afterwards.
7. a merging code translator, is characterized in that, comprising:
Log-likelihood ratio LLR value reversion module, carries out polarity inversion for the LLR value that m the cycle by before resolving obtained;
LLR value merges module, for the LLR value of first radio frames that the n cycle is received with described in carry out the LLR value merging that polarity inversion obtains, obtain the LLR value of polarity inversion merging;
Parsing module, carries out Physical Broadcast Channel PBCH parsing for the LLR value merging according to described polarity inversion, and the PBCH information obtaining is resolved in output after successfully resolved.
8. merging code translator as claimed in claim 7, is characterized in that, described LLR value merge module also for:
If the LLR value merging according to described polarity inversion is carried out PBCH, resolve unsuccessfully, the LLR value of second radio frames that n cycle received and the LLR value weighting summation that described polarity inversion merging obtains, obtain the LLR value of weighting summation; If carry out PBCH according to the LLR value of described weighting summation, resolve unsuccessfully, the 3rd radio frames n cycle being received merges, until complete the merging of last radio frames that n cycle received;
Described parsing module also for:
According to the LLR value of described weighting summation, carry out PBCH parsing, and the PBCH information obtaining is resolved in output after successfully resolved; If carrying out PBCH according to the LLR value of described weighting summation resolves unsuccessfully, the 3rd radio frames n cycle being received merges the LLR value obtaining resolves, until complete the parsing that last radio frames that n cycle received merges the LLR value obtaining.
9. merging code translator as claimed in claim 7, is characterized in that, described LLR value reversion module is used for:
The described LLR value by ad-hoc location in the LLR value of m cycle acquisition before resolving is carried out to polarity inversion;
Wherein, described ad-hoc location is to set the position that numerical value is corresponding in bit reversal bitmap R*.
10. merging code translator as claimed in claim 9, is characterized in that, described LLR value reversion module also for:
Generation system frame number SFN bit reversal bitmap;
By fill full 0 bit after described SFN bit reversal bitmap, and add cyclic redundancy check (CRC) code CRC bit reversal bitmap, obtain PBCH bit reversal bitmap;
According to PBCH bit reversal bitmap, obtain bit reversal bitmap R
*.
11. merging code translators as claimed in claim 10, is characterized in that, described LLR value reversion module also for:
When SFN is known, by described m in the cycle a high-order and SFN high position corresponding to first radio frames LLR value of n cycle of SFN corresponding to last cycle carry out mould 2 and add, obtain SFN bit reversal bitmap;
When SFN is unknown, directly sets and obtain SFN bit reversal bitmap.
12. merging code translators as claimed in claim 10, is characterized in that, described LLR value reversion module also for:
If after rate de-matching, before decoding, determine the LLR value that described polarity inversion merges, obtain bit reversal bitmap R
*for R
0;
If the solution bit in rate de-matching is selected and prune after, separate bit collection and sub-block and determine the LLR value that described polarity inversion merges before interweaving, obtain bit reversal bitmap R
*for R
1;
If determine the LLR value that described polarity inversion merges after descrambling, before rate de-matching, obtain bit reversal bitmap R
*for R
2;
Wherein, described R
0for PBCH bit reversal bitmap carries out the bit reversal bitmap obtaining after chnnel coding;
Described R
1refer to R
0through the bit reversal bitmap that sub-block interweaves and bit collection obtains afterwards;
Described R
2refer to R
1through bit, select and prune the bit reversal bitmap obtaining afterwards.
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109586847A (en) * | 2018-12-05 | 2019-04-05 | 北京邮电大学 | A kind of method of multiple and different transmission merged blocks |
| CN109756947A (en) * | 2017-11-01 | 2019-05-14 | 普天信息技术有限公司 | The received method of PBCH, terminal, electronic equipment and storage medium |
| CN110266320A (en) * | 2019-07-01 | 2019-09-20 | 京信通信系统（中国）有限公司 | LDPC coding and interpretation method, device and coding/decoding system |
| CN111699646A (en) * | 2018-02-14 | 2020-09-22 | 高通股份有限公司 | Combining decision metrics for scrambled payloads |
| CN112217597A (en) * | 2019-07-10 | 2021-01-12 | 大唐移动通信设备有限公司 | Method and equipment for demodulating physical broadcast channel PBCH |
| CN116707540A (en) * | 2017-01-09 | 2023-09-05 | 中兴通讯股份有限公司 | Rate matching processing method and device for Polar codes |
| CN116707540B (en) * | 2017-01-09 | 2024-04-26 | 中兴通讯股份有限公司 | Rate matching processing method and device for Polar codes |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102158446A (en) * | 2010-02-11 | 2011-08-17 | 中兴通讯股份有限公司 | Method and device for decoding physical broadcast channel (PBCH) in time division duplex (TDD) system |
| CN102271023A (en) * | 2010-09-30 | 2011-12-07 | 重庆重邮信科通信技术有限公司 | Method and device for detecting system frame number of long term evolution (LTE) system |
| CN102904667A (en) * | 2011-07-27 | 2013-01-30 | 杰脉通信技术(上海)有限公司 | Method for decoding tail biting convolution codes of PBCH (physical broadcast channel) decoding in LTE (long term evolution) |
-
2014
- 2014-06-27 CN CN201410299501.4A patent/CN104065457B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102158446A (en) * | 2010-02-11 | 2011-08-17 | 中兴通讯股份有限公司 | Method and device for decoding physical broadcast channel (PBCH) in time division duplex (TDD) system |
| CN102271023A (en) * | 2010-09-30 | 2011-12-07 | 重庆重邮信科通信技术有限公司 | Method and device for detecting system frame number of long term evolution (LTE) system |
| CN102904667A (en) * | 2011-07-27 | 2013-01-30 | 杰脉通信技术(上海)有限公司 | Method for decoding tail biting convolution codes of PBCH (physical broadcast channel) decoding in LTE (long term evolution) |
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116707540A (en) * | 2017-01-09 | 2023-09-05 | 中兴通讯股份有限公司 | Rate matching processing method and device for Polar codes |
| CN116707540B (en) * | 2017-01-09 | 2024-04-26 | 中兴通讯股份有限公司 | Rate matching processing method and device for Polar codes |
| CN109756947A (en) * | 2017-11-01 | 2019-05-14 | 普天信息技术有限公司 | The received method of PBCH, terminal, electronic equipment and storage medium |
| CN109756947B (en) * | 2017-11-01 | 2021-08-06 | 普天信息技术有限公司 | PBCH (physical broadcast channel) receiving method, terminal, electronic equipment and storage medium |
| CN111699646A (en) * | 2018-02-14 | 2020-09-22 | 高通股份有限公司 | Combining decision metrics for scrambled payloads |
| CN111699646B (en) * | 2018-02-14 | 2023-08-22 | 高通股份有限公司 | Combining decision metrics of scrambled payloads |
| CN109586847A (en) * | 2018-12-05 | 2019-04-05 | 北京邮电大学 | A kind of method of multiple and different transmission merged blocks |
| CN109586847B (en) * | 2018-12-05 | 2020-08-07 | 北京邮电大学 | Method for combining multiple different transmission blocks |
| CN110266320A (en) * | 2019-07-01 | 2019-09-20 | 京信通信系统（中国）有限公司 | LDPC coding and interpretation method, device and coding/decoding system |
| CN110266320B (en) * | 2019-07-01 | 2021-03-12 | 京信通信系统（中国）有限公司 | LDPC encoding and decoding method, device and encoding and decoding system |
| CN112217597A (en) * | 2019-07-10 | 2021-01-12 | 大唐移动通信设备有限公司 | Method and equipment for demodulating physical broadcast channel PBCH |
| CN112217597B (en) * | 2019-07-10 | 2022-04-01 | 大唐移动通信设备有限公司 | Method and equipment for demodulating physical broadcast channel PBCH |
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