CN109495208B

CN109495208B - Encoding method and device

Info

Publication number: CN109495208B
Application number: CN201710812449.1A
Authority: CN
Inventors: 黄凌晨; 李榕; 徐晨; 乔云飞; 王俊; 沈祖康; 杜颖钢
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2017-09-11
Filing date: 2017-09-11
Publication date: 2022-04-29
Anticipated expiration: 2037-09-11
Also published as: CN109495208A

Abstract

The application provides a coding method and a coding device. The method comprises the following steps: performing CRC coding on A information bits to be coded to obtain a first bit sequence, wherein the first bit sequence comprises L CRC bits and A information bits, performing interleaving operation on the first bit sequence to obtain a second bit sequence, the first interleaving sequence adopted by the interleaving operation is obtained according to the longest interleaving sequence supported by the system and a preset rule, the length of the first interleaving sequence is equal to A + L, or the second interleaving sequence adopted by the interleaving operation is the longest interleaving sequence, and the length of the second interleaving sequence is equal to K_max+L，K_maxThe second bit sequence is polarization encoded for the maximum number of information bits corresponding to the longest interleaving sequence. Therefore, in the distributed CRC coding, when the number of the information bits is larger than, smaller than or equal to the maximum number of the information bits, the interleaving sequence required by the interleaving process is obtained according to the longest interleaving sequence supported by the system.

Description

Encoding method and device

Technical Field

The present application relates to the field of communications technologies, and in particular, to an encoding method and apparatus.

Background

The communication system generally adopts channel coding to improve the reliability of data transmission and ensure the quality of communication. Currently, a 5G Mobile communication system includes three application scenario Enhanced Mobile broadband (eMBB), URLLC, and Massive Machine-Type Communications (mtc), and new requirements are provided for data communication, and polar (polarization) codes are the first channel coding method that can be strictly proven to "reach" channel capacity, and may be applied to 5G communication and future communication systems.

Disclosure of Invention

The application provides a coding method and a coding device, which are used for realizing that in distributed CRC coding, when the number of information bits is larger than, smaller than or equal to the maximum number of information bits, an interleaving sequence required by an interleaving process is obtained according to the longest interleaving sequence supported by a system.

In a first aspect, the present application provides an encoding method, including: performing Cyclic Redundancy Check (CRC) coding on A information bits to be coded to obtain a first bit sequence, wherein the first bit sequence comprises L CRC bits and A information bits, L, A is a positive integer, performing interleaving operation on the first bit sequence to obtain a second bit sequence, the first interleaving sequence adopted by the interleaving operation is obtained according to the longest interleaving sequence supported by a system and a preset rule, the length of the first interleaving sequence is equal to A + L, or the second interleaving sequence adopted by the interleaving operation is the longest interleaving sequence, and the length of the second interleaving sequence is equal to K_max+L，K_maxThe second bit sequence is polarization encoded for the maximum number of information bits corresponding to the longest interleaving sequence.

According to the coding method provided by the first aspect, CRC coding is performed on A information bits to be coded through a sending end to obtain a first bit sequence, then interleaving operation is performed on the first bit sequence to obtain a second bit sequence, wherein the first interleaving sequence adopted in the interleaving operation is obtained according to a longest interleaving sequence and a preset rule, the length of the first interleaving sequence corresponds to the number of the information bits to be coded, or the second interleaving sequence adopted in the interleaving operation is directly the longest interleaving sequence, and finally polarization coding is performed on the second bit sequence. Therefore, in the distributed CRC coding, when the number of the information bits is less than the maximum number of the information bits, the interleaving sequence required by the interleaving process is obtained according to the longest interleaving sequence supported by the system.

In one possible design, rules are presetComprises the following steps: taking out all indexes more than or equal to K from the longest interleaving sequence according to the sequence of the indexes_max-index of A, subtracting K from all indexes taken_max-a, forming a first interleaving sequence, and performing an interleaving operation on the first bit sequence, including: and carrying out interleaving operation on the first bit sequence by adopting the first interleaving sequence to obtain a second bit sequence.

By the encoding method provided by the embodiment, when the first interleaving sequence is adopted for interleaving operation, the operation of obtaining the first interleaving sequence according to the longest interleaving sequence and the preset rule can be processed in parallel, and after the first interleaving sequence is obtained, the second bit sequence can be directly obtained by adopting the first interleaving sequence for interleaving operation, so that the time delay can be reduced, and the encoding time delay can be reduced.

In one possible design, the preset rules are: all indexes smaller than A and the indexes larger than or equal to K are taken out from the longest interleaving sequence according to the sequence of the indexes_maxFor the index greater than or equal to K in the extracted index_maxBy K_max-a, forming a first interleaving sequence, and performing an interleaving operation on the first bit sequence, including: and arranging A information bits in the first bit sequence in a reverse order according to the indexes of the information bits to obtain a third bit sequence, and performing interleaving operation on the third bit sequence by adopting the first interleaving sequence to obtain a second bit sequence.

In one possible design, when the second interleaving sequence used in the interleaving operation is the longest interleaving sequence, the interleaving operation is performed on the first bit sequence, and the interleaving operation includes: expanding the first bit sequence to include K_maxA fourth bit sequence of + L bits, the first K in the fourth bit sequence_max-the value of a bits is set to null, the restBit from Kth_maxAnd the-A +1 bits start to sequentially correspond to the bits in the first bit sequence, the longest interleaving sequence is adopted to perform interleaving operation on the fourth bit sequence to obtain a fifth bit sequence, and bits with null values are removed from the fifth bit sequence to obtain a second bit sequence.

In one possible design, the longest interleaving sequence is any one of the sequences in table one in the specification.

In one possible design, the longest interleaving sequence is any one of the sequences in table two in the specification.

In one possible design, if A>K_maxThen, for the last K in A information bits in the first bit sequence_maxCarrying out the interleaving operation on the bits and the L CRC bits to obtain a sixth bit sequence; the second bit sequence is the first A-K of A information bits in the first bit sequence_maxA combination of a preceding information bit and a succeeding sixth bit sequence. Thus, interleaving is performed only in a part of the information bits, and a scheme when the number of information bits is greater than the maximum number of information bits can be supported.

In one possible design, the above coding method may be implemented by hardware, for example, by a circuit, one or more integrated circuits. The above-described encoding methods may also be implemented in software, for example, by one or more processors executing the above-described encoding methods by reading instructions stored in memory. The one or more processors may be integrated in one chip or distributed across multiple chips. The above coding method may also be partly implemented by hardware and partly by software, for example, the processor may execute the above step of "interleaving the first bit sequence" by reading instructions stored in the memory, and the step of "polarization coding the second bit sequence" by a logic circuit or an accelerator. Of course, those skilled in the art can also adopt a combination of the above modes when the concrete implementation is realized.

In a second aspect, the present application provides an encoding apparatus comprising: a first encoding module for encodingPerforming Cyclic Redundancy Check (CRC) coding on the A information bits to be coded to obtain a first bit sequence, wherein the first bit sequence comprises L CRC bits and A information bits, and L, A is a positive integer; the interleaving module is used for performing interleaving operation on the first bit sequence to obtain a second bit sequence; the length of the first interleaving sequence is equal to A + L, or the length of the second interleaving sequence is equal to K_max+L，K_maxThe maximum number of information bits corresponding to the longest interleaving sequence; and the second coding module is used for carrying out polarization coding on the second bit sequence.

In one possible design, the preset rules are: taking out all indexes more than or equal to K from the longest interleaving sequence according to the sequence of the indexes_max-index of A, subtracting K from all indexes taken_max-a, constituting a first interleaving sequence, the interleaving module being configured to: and carrying out interleaving operation on the first bit sequence by adopting the first interleaving sequence to obtain a second bit sequence.

In one possible design, the preset rules are: all indexes smaller than A and the indexes larger than or equal to K are taken out from the longest interleaving sequence according to the sequence of the indexes_maxFor the index greater than or equal to K in the extracted index_maxBy K_max-a, constituting a first interleaving sequence, the interleaving module being configured to: and arranging A information bits in the first bit sequence in a reverse order according to the indexes of the information bits to obtain a third bit sequence, and performing interleaving operation on the third bit sequence by adopting the first interleaving sequence to obtain a second bit sequence.

In one possible design, when the second interleaving sequence used for the interleaving operation is the longest interleaving sequence, the interleaving module is configured to: expanding the first bit sequence to include K_maxA fourth bit sequence of + L bits, the first K in the fourth bit sequence_max-setting the value of A bits to null and the remaining bits from the Kth_max-A +1 bits are sequentially mapped to bits in the first bit sequence starting with the longest interleavingAnd the sequence carries out interleaving operation on the fourth bit sequence to obtain a fifth bit sequence, and bits with null values are removed from the fifth bit sequence to obtain a second bit sequence.

In one possible design, if A>K_maxThen, for the last K in A information bits in the first bit sequence_maxCarrying out the interleaving operation on the bits and the L CRC bits to obtain a sixth bit sequence;

the second bit sequence is the first A-K of A information bits in the first bit sequence_maxA combination of a preceding information bit and a succeeding sixth bit sequence.

The advantages of the coding apparatus provided in the second aspect and the possible designs of the second aspect may refer to the advantages brought by the possible embodiments of the first aspect and the first aspect, and are not described herein again.

In one possible design, the apparatus is a base station or a terminal.

In a third aspect, the present application provides an encoding apparatus comprising: a processor;

the processor is used for calling program instructions in the memory to execute the coding method in the first aspect and any one of the possible designs of the first aspect.

In one possible design, the apparatus further includes a memory to store the program instructions.

The memory may be internal to the processor or external to the processor. The processor may be integrated in a terminal or a base station.

The processor may be a circuit, or one or more integrated circuits, or one or more dedicated chips. The processor may also be a general-purpose chip, and the functions of the above-mentioned codes can be implemented by loading program instructions for implementing the above-mentioned coding method onto the processor. The processor may also be a combination of one or more of a circuit, an integrated circuit, an application specific chip, and a general purpose chip.

In one possible design, the apparatus is a base station or a terminal.

In a fourth aspect, the present application provides an encoding apparatus comprising:

the input interface is used for acquiring a bit sequence to be coded;

a logic circuit, configured to execute the method in each possible design including the first aspect and the first aspect based on the obtained bit sequence to be encoded, so as to obtain an encoded bit;

and the output interface is used for outputting the coded bits.

In one possible design, the apparatus is a base station or a terminal.

In a fifth aspect, the present application provides a communication device comprising the coding apparatus and the transceiver provided in the third aspect and in each possible design of the third aspect or in each possible design of the fourth aspect and in each possible design of the fourth aspect;

the transceiver is used for transmitting the bits coded by the coding device.

In a sixth aspect, the present application provides a readable storage medium comprising: a readable storage medium and a computer program for implementing the coding method provided in the first aspect above and in each of the possible designs of the first aspect above.

In a seventh aspect, the present application provides a program product, which is characterized in that the program product includes a computer program, the computer program is stored in a readable storage medium, the computer program can be read by at least one processor of an encoding apparatus from the readable storage medium, and the computer program is executed by the at least one processor to enable the encoding apparatus to implement the encoding method described in the first aspect and each possible design of the first aspect.

Drawings

Fig. 1(a) and 1(b) are schematic diagrams of communication system architectures applied in the embodiments of the present application;

FIG. 2 is a flow diagram of a communication system;

FIG. 3 is a flowchart of an embodiment of an encoding method provided herein;

fig. 4 is a schematic flowchart of an encoding method provided in the present application;

fig. 5 is a schematic flow chart of an encoding method provided in the present application;

fig. 6 is a schematic flow chart of an encoding method provided in the present application;

FIG. 7 is a diagram illustrating an exemplary structure of an encoding apparatus according to an embodiment of the present disclosure;

FIG. 8 is a second schematic structural diagram of an encoding apparatus according to an embodiment of the present application;

FIG. 9 is a third exemplary diagram of an encoding apparatus according to an embodiment of the present invention;

FIG. 10 is a diagram illustrating a structure of a decoding apparatus according to an embodiment of the present application;

FIG. 11 is a second schematic structural diagram of a decoding apparatus according to an embodiment of the present application;

FIG. 12 is a third exemplary diagram of a decoding apparatus according to the present invention;

fig. 13 is a schematic structural diagram of a network device and a terminal in the embodiment of the present application.

Detailed Description

Communication systems usually adopt channel coding to improve the reliability of data transmission and ensure the quality of communication, and Polar (Polar) code is the first channel coding method that can be strictly proven to "reach" the channel capacity. Polar code is a linear block code with a generator matrix of G_NThe coding process is

Is a binary row vector with length N (i.e., code length); and is

Here, the

Is defined as log₂N matrices F₂Kronecker product of (Kronecker), x₁ ^NAre the coded bits (also called code words),

and generating matrix G_NAnd obtaining coded bits after multiplication, wherein the multiplication process is a coding process. In the encoding process of the Polar code,

a part of the bits is used to carry information, called information bits, and the set of indexes of the information bits is marked as A;

the other part of the bits are fixed values predetermined by the transmitting and receiving terminals, called frozen bits, and the set of the index is the complement A of A^cAnd (4) showing. The freeze bit is normally set to 0, and the sequence of freeze bits can be arbitrarily set only by pre-agreement of the transmitting and receiving ends. In order to improve the performance of Polar codes, outer codes with Check capability may be cascaded outside Polar codes, and the CA-Polar codes are Polar codes of cascaded Cyclic Redundancy Check (CRC) codes.

The encoding process of the CA-Polar code is as follows: and performing CRC coding on information bits of the information to be coded to obtain a bit sequence after CRC coding, wherein the bit sequence after CRC coding comprises the information bits and the CRC bits, and then performing Polar coding on the bit sequence after CRC coding. The decoding of the CA-Polar code adopts a CA-SCL (CRC-assisted successful decoding List) decoding algorithm, after the SCL decoding is finished, CRC checking is carried out on L candidate paths output by the SCL decoding, the candidate paths passing the CRC checking are used as decoding output results, and if no candidate path passes the CRC checking, the decoding is judged to fail. Therefore, the CA-Polar code can carry out CRC check after the channel decoding is finished, and the time occupied by the decoding process of decoding failure is the same as the time occupied by the decoding process of decoding success. In a control channel downlink blind detection scene of a wireless communication system, decoding is usually required to be tried tens of times, and at most, decoding can be successfully performed only once, and if decoding attempts which fail decoding can be stopped in advance (early stop), decoding delay and average energy consumption of the whole blind detection can be effectively reduced. Distributed CRC coding, which introduces an interleaving operation after the end of the conventional CRC coding, i.e., CRC bits obtained by CRC coding are distributed among information bits, is proposed as a CRC coding method with an early stop capability. In the SCL decoding process at the decoding end, at a certain time before the decoding end, when all the candidate paths cannot satisfy the check of the partial CRC bits that have been decoded, the decoding can be ended in advance.

The interleaving operation is performed by a pre-stored interleaving sequence, and since the coding process of the CRC coding is related to the number of information bits, the length of the interleaving sequence is the same as the sum of the number of information bits plus the number of check bits. If the number of information bits that the system needs to support is too large, a large number of interleaving sequences need to be stored, and the system storage overhead is large. In the related art, the system storage overhead is saved by storing the longest interleaving sequence supporting the maximum information bit number, and the interleaving process is supported by adopting the longest interleaving sequence and introducing a small amount of extra operation when the information bit number is smaller than the maximum information bit number.

The embodiment of the present application can be applied to a wireless communication system, and it should be noted that the wireless communication system mentioned in the embodiment of the present application includes but is not limited to: long Term Evolution (LTE) and next generation 5G Mobile communication systems, such as Enhanced Mobile broadband (eMBB), URLLC, and mass Machine-Type Communications (mtc). Alternatively, the wireless communication system may be an end-to-end (D2D) communication system, another communication system, or a future communication system, etc.

The communication device related to the present application may be configured in a communication device, and the communication device mainly includes a network device or a terminal device. If the sending end in the application is the network equipment, the receiving end is the terminal equipment; if the sending end in the application is the terminal equipment, the receiving end is the network equipment.

In the embodiment of the present application, as shown in fig. 1(a), the communication system 100 includes a network device 110 and a terminal 112. When the wireless communication network 100 includes a core network, the network device 110 may also be connected to the core network. Network device 101 may also communicate with an IP network 200, such as the internet (internet), a private IP network, or other data network, among others. The network device provides services for terminals within the coverage area. For example, referring to fig. 1(a), network device 110 provides wireless access to one or more terminals within the coverage area of network device 110. In addition, there may be areas of overlapping coverage between network devices, such as

network devices

110 and 120. Network devices may also communicate with each other, for example, network device 110 may communicate with network device 120.

Since the encoding method described in this embodiment may be used when the network device 110 or the terminal 112 sends information or data, for convenience of description, the communication system 100 is simplified to a system including the sending end 101 and the receiving end 102 as shown in fig. 1 (b). The transmitting end 101 may be a network device 110, and the receiving end 102 is a terminal 112; alternatively, the transmitting end 101 is the terminal 112, and the receiving end 102 is the network device 110. Network device 110 may be a device for communicating with a terminal device. For example, the ue may be an Evolved Node B (eNB or eNodeB) in an LTE system, a network side device in a 5G network, a network side device in another network for communicating with a terminal, or a network side device in a future network. Or the network device may also be a relay station, an access point, a vehicle-mounted device, etc. In an end-to-end (D2D) communication system, the network Device may also be a terminal that functions as a base station. A terminal may include various handheld devices, vehicle-mounted devices, wearable devices, computing devices or other processing devices connected to a wireless modem with wireless communication capabilities, as well as various forms of User Equipment (UE), Mobile Station (MS), and the like.

The encoding process referred to in this application is roughly: and performing CRC (cyclic redundancy check) on the information to be coded, if necessary, performing operations such as interleaving on the bit sequence subjected to CRC, and then performing Polar code coding. Besides, the coded bits after Polar code coding can be subjected to one or more of rate matching, modulation, digital-to-analog conversion, frequency conversion and the like according to the target code length M.

Fig. 2 is a schematic flow chart of a communication system, as shown in fig. 2, at a transmitting end, a signal source sequentially undergoes signal source coding, channel coding, rate matching (optional steps) and modulation, and then is transmitted. At the receiving end, the signals are output to the information sink through demodulation, rate de-matching (optional steps), channel decoding and information source decoding in sequence. Embodiments of the present application relate generally to channel coding and channel decoding (referred to as channel coding for short), and will be described below by way of specific examples.

The application provides a coding method and a coding device, so as to realize how to obtain an interleaving sequence required by an interleaving process according to a longest interleaving sequence supported by a system when the number of information bits is less than the maximum number of information bits in distributed CRC coding, and ensure good performance, such as reducing coding delay, reducing false alarm probability and the like, wherein the number of information bits corresponding to the longest interleaving sequence supported by the system is the maximum number of information bits. The following describes the encoding method and apparatus provided in the present application in detail with reference to the accompanying drawings.

It should be noted that, in order to perform the interleaving function, there are two numbering manners for the interleaved sequence, that is, a manner of adopting a positive sequence number and a negative sequence number (hereinafter, referred to as a positive sequence number and a negative sequence number) for the information bits. The positive sequence number, i.e. the index of the corresponding information bit in the interleaved sequence, has the same sequence as the index of the information bit, i.e. index 0 corresponds to the 0 th information bit, index 1 corresponds to the 1 st information bit, etc. The order of the inverted sequence number, i.e. the index of the corresponding information bit in the interleaved sequence, is opposite to the order of the index of the information bit, i.e. index 0 corresponds to the last 1 bit information bit, index 1 corresponds to the 2 nd from last bit information bit, etc.

In addition, the interleaving sequence according to the embodiment of the present application has a minimum index of 0 based on the interleaving sequence. If the minimum index of the actually used interleaving sequence is 1, the method of the present application can be simply adjusted, all examples in the present application start from index 0, and in actual application, if the minimum index starts from index 1, the corresponding index is increased by 1.

Fig. 3 is a flowchart of an embodiment of an encoding method provided in the present application, and as shown in fig. 3, an execution main body of the embodiment is a sending end (an encoding end), and the method of the embodiment may include:

s101, a sending end performs CRC coding on A information bits to be coded to obtain a first bit sequence, wherein the first bit sequence comprises L CRC bits and A information bits, and L, A is a positive integer.

Specifically, after receiving a information bits to be encoded, the sending end adds L CRC bits to obtain a first bit sequence.

S102, the sending end carries out interleaving operation on the first bit sequence to obtain a second bit sequence.

The interleaving operation comprises two interleaving sequences, namely a first interleaving sequence and a second interleaving sequence, different interleaving sequences correspond to different interleaving operations, the first interleaving sequence is obtained according to the longest interleaving sequence supported by a system and a preset rule, and the length of the first interleaving sequence is equal to A + L. The second interleaving sequence is the longest interleaving sequence, and the length of the second interleaving sequence is equal to K_max+L，K_maxThe maximum number of information bits corresponding to the longest interleaving sequence. The longest interleaving sequence supported by the system is hereinafter referred to as the longest interleaving sequence.

The longest interleaving sequence supported by the system can be pre-stored or can be obtained by means of online calculation.

The first interleaving sequence has two reading modes which respectively correspond to two preset rules.

In the first embodiment, the preset rule is: taking out all indexes more than or equal to K from the longest interleaving sequence according to the sequence of the indexes_max-index of A, subtracting K from all indexes taken_max-a, constituting a first interleaving sequence. For example, the longest interleaving sequence is {2,3,5,9,10,12,4,6,11,13,0,7,14,1,8,15}, and the maximum number of information bits K corresponds to the longest interleaving sequence_max＝12，L＝4，A＝10，K_maxFirst, taking all indexes with indexes greater than or equal to 2 in the sequence of indexes from the longest interleaving sequence, wherein the indexes are {2,3,5,9,10,12,4,6,11,13,7,14,8,15}, and subtracting 2 from all the indexes taken, so that the first interleaving sequence is {0,1,3,7,8,10,2,4,9,11,5,12,6,13 }.

Correspondingly, the interleaving operation performed on the first bit sequence by the sending end may specifically be: and the sending end adopts the first interleaving sequence to carry out interleaving operation on the first bit sequence to obtain a second bit sequence.

In the first method, the longest interleaving sequence is a positive sequence number.

In the second embodiment, the preset rule is: all indexes smaller than A and the indexes larger than or equal to K are taken out from the longest interleaving sequence according to the sequence of the indexes_maxFor the index greater than or equal to K in the extracted index_maxBy K_max-a, constituting a first interleaving sequence. For example: the longest interleaving sequence is {1,2,6,8,9,12,0,5,7,13,4,11,14,3,10,15}, and the maximum number of information bits K corresponds to the longest interleaving sequence_max＝12，L＝4，A＝10，K_maxAnd a, firstly, taking all indexes with the index less than 10 and the index greater than or equal to 12 from the longest interleaving sequence in the sequence of indexes, wherein the indexes are {1,2,6,8,9,12,0,5,7,13,4,14,3,15}, and subtracting 2 from the index greater than or equal to 12 from the taken indexes, wherein the first interleaving sequence is composed of {1,2,6,8,9,10,0,5,7,11,4,12,3,13 }.

Correspondingly, the interleaving operation performed on the first bit sequence by the sending end may specifically be: the transmitting end performs reverse ordering on the a information bits in the first bit sequence according to the index of the information bits to obtain a third bit sequence, the reverse ordering is also called reverse ordering, for example, the first bit sequence is {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14}, {0,1,2,3,4,5,6,7,8,9,10} is information bits, and {11,12,13,14} is CRC bits, the information bits are reversely ordered to {10,9,8,7,6,5,4,3,2,1,0}, and the obtained third bit sequence is {10,9,8,7,6,5,4,3,2,1,0,11,12,13,14 }. And then the sending end adopts the first interleaving sequence to carry out interleaving operation on the third bit sequence to obtain a second bit sequence.

In the second method, the longest interleaving sequence is the reverse order number.

The second interleaving sequence may directly use the longest interleaving sequence, and correspondingly, the sending end performs interleaving operation on the first bit sequence, which may specifically be:

the transmitting end expands the first bit sequence to contain K_maxA fourth bit sequence of + L bits, the first K in the fourth bit sequence_max-the value of A bits is set to null and the remaining bits are from K_maxThe a +1 bits start to correspond in sequence to the bits in the first bit sequence.

For example, K_max＝12，L＝4，A＝10，K_maxThe transmitting end expands the first bit sequence (including 4 CRC bits and 10 information bits) into a fourth bit sequence including 12+ 4-16 bits, the first 2 bits in the fourth bit sequence have null values, and the remaining bits correspond to the bits in the first bit sequence in order from the 3 rd bit.

And the sending end adopts the longest interleaving sequence to carry out interleaving operation on the fourth bit sequence to obtain a fifth bit sequence.

And the transmitting end removes the bits with null values from the fifth bit sequence to obtain a second bit sequence.

When the second interleaving sequence is adopted for interleaving operation, the first bit sequence needs to be expanded before interleaving, bits with empty values in the interleaved bit sequence need to be removed after interleaving, and interleaving operation time delay is long; compared with the interleaving operation by adopting the second interleaving sequence, when the interleaving operation is carried out by adopting the first interleaving sequence, the operation of obtaining the first interleaving sequence according to the longest interleaving sequence and the preset rule can be processed in parallel, and after the first interleaving sequence is obtained, the second bit sequence can be directly obtained by adopting the first interleaving sequence to carry out the interleaving operation, so that the time delay can be reduced, and the coding time delay can be reduced.

In this approach, the longest interleaved sequence is the positive sequence number.

S103, the transmitting end carries out polarization coding on the second bit sequence.

The coding method for the transmitting end to perform polarization coding on the second bit sequence may adopt an existing polarization coding method, and is not described herein again.

S104 (not shown), the transmitting end performs some or all of the steps including but not limited to rate matching, modulation, digital-to-analog conversion, frequency conversion, etc. on the third bit sequence, and then transmits the third bit sequence.

It should be noted that the rate matching step in step S104 is optional, and if the code length of the code is the same as that of the target code, the rate matching is not required. Since the focus of the embodiment of the present invention is not on step S104, it is not described in detail here, for example, in one possible implementation manner, a person skilled in the art may refer to the practice in the prior art.

In the encoding method provided in this embodiment, CRC encoding is performed on a number of information bits to be encoded through a sending end to obtain a first bit sequence, and then interleaving is performed on the first bit sequence to obtain a second bit sequence, where a first interleaving sequence used in the interleaving operation is obtained according to a longest interleaving sequence and a preset rule, a length of the first interleaving sequence corresponds to a number of the information bits to be encoded, or the second interleaving sequence used in the interleaving operation is directly the longest interleaving sequence, and finally polarization encoding is performed on the second bit sequence. Therefore, in the distributed CRC coding, when the number of the information bits is less than the maximum number of the information bits, the interleaving sequence required by the interleaving process is obtained according to the longest interleaving sequence supported by the system.

The following describes in detail the technical solution of the embodiment of the method shown in fig. 3, using several specific embodiments.

Fig. 4 is a schematic flow chart of an encoding method provided by the present application, which illustrates, in this embodiment, an interleaving sequence used in an interleaving operation as a first interleaving sequence obtained according to a preset rule of the first mode, where a longest interleaving sequence of a distributed CRC code is a sequence pi 1 with a positive sequence number, and a maximum information bit length corresponding to the interleaving sequence pi 1 is K_maxThe CRC polynomial is g, the number of CRC bits is L, and the CRC length is L. Suppose that A information bits to be encoded are { a }₀，a₁，…，a_A-1}，The number of information bits A is less than or equal to K_max. The execution main body of this embodiment is a sending end (encoding end), and as shown in fig. 4, the method of this embodiment includes:

s201, performing CRC coding on A information bits to be coded to obtain a first bit sequence { b }₀，b₁,…,b_A+L-1}。

Wherein, { b₀，b₁,…,b_A-1Is A information bits, { b_A，b_A+1,…,b_A+L-1Is L CRC bits.

S202, all indexes are taken out from the longest interleaving sequence according to the sequence of the indexes and are more than or equal to K_max-index of A, subtracting K from all indexes taken_max-a, constituting a first interleaving sequence pi 1'.

Taking the example shown in fig. 4, if the longest interleaving sequence pi 1 is {2,3,5,9,10,12,4,6,11,13,0,7,14,1,8,15}, L is 4, and a is 10, then the maximum number of information bits K corresponding to the longest interleaving sequence is obtained_max＝12，K_maxFirst, taking out all indexes with indexes greater than or equal to 2 from pi 1 according to the sequence of the indexes, wherein the taken out part is {2,3,5,9,10,12,4,6,11,13,7,14,8,15}, and subtracting 2 from all the taken out indexes respectively to form a first interleaving sequence pi 1' with the values of {0,1,3,7,8,10,2,4,9,11,5,12,6,13 }. In specific implementation, other methods may be used to obtain pi 1 'from the longest interleaving sequence, but pi 1' obtained by different methods is also the same as long as pi 1 is constant.

S203, adopting the first interleaving sequence pi 1' to align the first bit sequence { b₀，b₁,…,b_A+L-1Performing interleaving operation to obtain a second bit sequence c₀，c₁,…,c_A+L-1}。

Specifically, the first bit sequence shown in fig. 4 is { b }₀，b₁,…,b₁₃H, a first bit sequence b is aligned with a first interleaving sequence pi 1' {0,1,3,7,8,10,2,4,9,11,5,12,6,13}₀，b₁，b₂，b₃，b₄，b₅，b₆，b₇，b₈，b₉，b₁₀，b₁₁，b₁₂，b₁₃After the interleaving operation is performed,

and S204, carrying out polarization coding on the second bit sequence.

S205 (not shown), the transmitting end performs some or all of the steps including but not limited to rate matching, modulation, digital-to-analog conversion, frequency conversion, etc. on the third bit sequence, and then transmits the third bit sequence.

It should be noted that the rate matching step in step S205 is optional, and if the code length of the code is the same as that of the target code, the rate matching is not required. Since the focus of the embodiment of the present invention is not on step S205, it is not described in detail here, for example, in one possible implementation manner, a person skilled in the art may also refer to the practice in the prior art.

In this example, the following table one shows. For the interleaved sequence in Table one, a 24-bit CRC (with a polynomial of D)²⁴+D²³+D²¹+D²⁰+D¹⁷+D¹⁵+D¹³+D¹²+D⁸+D⁴+D²+ D +1) as a different maximum number of information bits K_maxCorresponding positive sequence numbered interleaved sequences are provided. Note that here the maximum number of information bits K_maxCRC length L is not counted; if the maximum bit number K 'specified by a certain system'_maxWhen the CRC length L is taken into account, K is required to be the basis of when an interleaving sequence is selected_max＝(K'_max-L) is selected.

Watch 1

In Table I, corresponds to K_maxEight sets of 24 positive-sequence numbered interleaved sequences are provided, 140, 160, and 200, respectively. For each K_maxThe first, third, fifth and seventh groups of interleaving sequences have better early stop effect when applied to the low code rate polarization code; when the second, fourth, sixth and eighth groups of interleaving sequences are applied to the high-code-rate polarization code, the effect of early stop is better; when the first and second groups of interleaving sequences are applied to the SC decoding of the polar code, the effect of early stop is better; when the third and the fourth groups of interleaving sequences are applied to the decoding of the polarization code SCL, the effect of early stop is better; the fifth and sixth groups of interleaving sequences have better early-stopping effect when being applied to long-code long-polarization codes; the seventh and eighth interleaving sequences have better early stop effect when applied to the short code long polarization code.

It should be noted that in practical systems, if the interleaving sequence is numbered in positive sequence, and the maximum number of information bits required by the system is not located in table one, but is smaller than K provided in table one_maxThe values 200, 160, or 140 may be obtained by selecting a certain set of interleaving sequences from table one according to the characteristics of different sets of interleaving sequences to extract the interleaving sequences with the required length. For example, if the maximum number of information bits required by the system is K_max3A value less than a certain maximum number of information bits K as shown in Table one_max2(K_max3<K_max2) First, a group of interleaving sequences is selected from the table I according to the characteristics of different groups of interleaving sequences, and the length of the group is K_max2The interleaving sequence of (2); then, the numerical value of the sequence is taken out to be more than or equal to (K)_max2-K_max3) Is indexed (i.e., values less than (K) in the sequence are deleted_max2-K_max3) Index of (K), and then subtract (K) from all remaining index values_max2-K_max3) And obtaining the required interleaving sequence.

Note that if K_max3Less than 140, the length K in a certain group of interleaving sequences is selected_max2 Sequences 140, 160 or 200, K taken from the three sequences_max3The length sequences are the same; if K_max3Less than 160, the length K in some group of interleaving sequence is selected_max2Sequences of either 160 or 200, K taken from both sequences_max3The length sequences are the same; if K_max3If the value is less than 200, K in a certain group of interleaving sequences is selected_max2 Sequence number 200 taken K_max3Length sequence.

Any one of 8 sets of positive-numbered interleaved sequences in Table one, where K_maxIs an interleaving sequence of 140, can be derived from K according to the method described above_maxIs 160 or K_maxTaking out from the interleaving sequence of 200; wherein K_maxAn interleaving sequence of 160, from K according to the method described above_maxTaken out of the interleaved sequence of 200. The sequences retrieved are identical to the corresponding sequences in Table one. Therefore, K in Table I can also be considered_maxThe interleaving sequence with the length of 140 or 160 is that the maximum information bit number (140 or 160) is less than K shown in table one_maxAn embodiment of interleaving sequence with the maximum information bit number length is obtained when the length is 200.

In addition, in order to distinguish the indexes of the corresponding information bits and the corresponding CRC bits in the interleaved sequence, the indexes of the corresponding CRC bits may be replaced with a symbol form or a larger numerical value. For example, as follows, for the interleaved sequence in Table one

[0,2,3,5,6,8,11,12,13,16,19,20,22,24,28,32,33,35,37,38,39,40,41,42,44,46,47,49,50,54,55,57,59,60,62,64,67,69,74,79,80,84,85,86,88,91,94,102,105,109,110,111,113,114,116,118,119,121,122,125,126,127,129,130,131,132,136,137,141,142,143,147,148,149,151,153,155,158,161,164,166,168,170,171,173,175,178,179,180,182,183,186,187,189,192,194,198,199,200,1,4,7,9,14,17,21,23,25,29,34,36,43,45,48,51,56,58,61,63,65,68,70,75,81,87,89,92,95,103,106,112,115,117,120,123,128,133,138,144,150,152,154,156,159,162,165,167,169,172,174,176,181,184,188,190,193,195,201,10,15,18,26,30,52,66,71,76,82,90,93,96,104,107,124,134,139,145,157,160,163,177,185,191,196,202,27,53,72,73,78,83,98,99,140,197,205,31,77,100,135,206,108,209,97,146,203,204,101,207,208,210,211,212,213,214,215,216,217,218,219,220,221,222,223]，

The index of more than or equal to 200 is replaced by Pn, and the values of n are 0,1,2, … and 23, so that the index can be obtained

[0,2,3,5,6,8,11,12,13,16,19,20,22,24,28,32,33,35,37,38,39,40,41,42,44,46,47,49,50,54,55,57,59,60,62,64,67,69,74,79,80,84,85,86,88,91,94,102,105,109,110,111,113,114,116,118,119,121,122,125,126,127,129,130,131,132,136,137,141,142,143,147,148,149,151,153,155,158,161,164,166,168,170,171,173,175,178,179,180,182,183,186,187,189,192,194,198,199, P0,1,4,7,9,14,17,21,23,25,29, 175,178,179,180,182,183,186, 150, 94, 150, 94, 150, 72, 150, 95, 72, 95, 72, 95, 72, 95, 72, 95, 72, 95, 72, 95P, 95. Here, the selection of the substitute symbol and the selection of the subscript are not limited to the above-described case without causing ambiguity.

Replacing the index greater than or equal to 200 with the index value plus 400 can obtain

[0,2,3,5,6,8,11,12,13,16,19,20,22,24,28,32,33,35,37,38,39,40,41,42,44,46,47,49,50,54,55,57,59,60,62,64,67,69,74,79,80,84,85,86,88,91,94,102,105,109,110,111,113,114,116,118,119,121,122,125,126,127,129,130,131,132,136,137,141,142,143,147,148,149,151,153,155,158,161,164,166,168,170,171,173,175,178,179,180,182,183,186,187,189,192,194,198,199,600,1,4,7,9,14,17,21,23,25,29,34,36,43,45,48,51,56,58,61,63,65,68,70,75,81,87,89,92,95,103,106,112,115,117,120,123,128,133,138,144,150,152,154,156,159,162,165,167,169,172,174,176,181,184,188,190,193,195,601,10,15,18,26,30,52,66,71,76,82,90,93,96,104,107,124,134,139,145,157,160,163,177,185,191,196,602,27,53,72,73,78,83,98,99,140,197,605,31,77,100,135,606,108,609,97,146,603,604,101,607,608,610,611,612,613,614,615,616,617,618,619,620,621,622,623]. Here, the number of increments of the index value is not limited to a value that does not cause index duplication in the entire sequence.

Fig. 5 is a schematic flow chart of an encoding method provided by the present application, which illustrates, in this embodiment, an interleaving sequence used in an interleaving operation as a first interleaving sequence obtained according to a preset rule of the second mode, where a longest interleaving sequence of a distributed CRC code is a sequence pi 2 with an inverted serial number, and a maximum information bit length corresponding to pi 2 is K_maxThe CRC polynomial is g, the number of CRC bits is L, and the CRC length is L. Suppose that A information bits to be encoded are { a }₀，a₁，…，a_A-1The number of information bits A is less than or equal to K_max. The execution main body of this embodiment is a sending end (encoding end), and as shown in fig. 5, the method of this embodiment includes:

s301, performing CRC coding on A information bits to be coded to obtain a first bit sequence { b }₀，b₁,…,b_A+L-1}。

S302, all indexes smaller than A and indexes larger than or equal to K are taken out from the longest interleaving sequence pi 2 according to the sequence of the indexes_maxFor the index greater than or equal to K in the extracted index_maxBy K_max-a, constituting a first interleaving sequence pi 2'.

Taking the example shown in figure 5 as an example,the longest interleaving sequence pi 2 is {1,2,6,8,9,12,0,5,7,13,4,11,14,3,10,15}, L is 4, and a is 10, then the maximum number of information bits K corresponding to the longest interleaving sequence is obtained_max＝12，K_maxAnd a, first, taking all indexes with the index less than 10 and the index greater than or equal to 12 out of pi 2 according to the sequence of the indexes, wherein the taken part is {1,2,6,8,9,12,0,5,7,13,4,14,3,15}, and subtracting 2 from the index greater than or equal to 12 out of the taken indexes, so that a first interleaving sequence pi 2' is formed into {1,2,6,8,9,10,0,5,7,11,4,12,3,13 }.

S303, arranging A information bits in the first bit sequence in a reverse order according to the indexes of the information bits to obtain a third bit sequence.

Specifically, the first bit sequence { b }₀，b₁,…,b_A+L-1A information bits in the sequence are arranged in a reverse order according to the index of the information bits to obtain a third bit sequence b₀',b₁',...,b_A+L-1' }, wherein, when k is 0,1, …, A-1, b_k'＝b_A-1-k(ii) a When k is A, A +1, …, A + L-1, b_k'＝b_k。

S304, adopting the first interleaving sequence pi 2' to pair the third bit sequence { b₀',b₁',...,b_A+L-1' } interleaving to obtain the second bit sequence.

Specifically, the first bit sequence shown in fig. 4 is { b }₀，b₁,…,b₁₃H, the first bit sequence b₀，b₁,…,b₁₃The 10 information bits in the sequence are arranged in the reverse order according to the index of the information bits to obtain a third bit sequence b₉，b₈,b₇，b₆，b₅，b₄，b₃，b₂，b₁，b₁₀，b₁₁，b₁₂,b₁₃H, the third bit sequence b is mapped with the first interleaving sequence pi 2' {1,2,6,8,9,10,0,5,7,11,4,12,3,13}₉，b₈,b₇，b₆，b₅，b₄，b₃，b₂，b₁，b₁₀，b₁₁，b₁₂,b₁₃Get the first after interweavingThe two-bit sequence is { b }₈，b₇，b₃，b₁，b₀，b₁₀，b₉，b₄，b₂，b₁₁，b₅，b₁₂，b₆，b₁₃}。

And S305, polarization coding is carried out on the second bit sequence.

S306 (not shown), the transmitting end performs some or all of the steps including but not limited to rate matching, modulation, digital-to-analog conversion, frequency conversion, etc. on the third bit sequence, and then transmits the third bit sequence.

It should be noted that the rate matching step in step S306 is optional, and if the code length of the code is the same as that of the target code, the rate matching is not required. Since the focus of the embodiment of the present invention is not on step S306, it is not described in detail here, for example, in one possible implementation manner, a person skilled in the art may refer to the practice in the prior art.

In this embodiment, as shown in table two below, for the interleaved sequences in table two, different CRC lengths L and different maximum numbers of information bits K are used_maxDifferent CRC polynomials and corresponding interleaved sequences of inverted numbering are provided. Note that here the maximum number of information bits K_maxCRC length L is not counted; if the maximum bit number K 'specified by a certain system'_maxWhen the CRC length L is taken into account, K is required to be the basis of when an interleaving sequence is selected_max＝(K'_max-L) is selected.

Watch two

In Table two, corresponds to K_maxEight sets of 24 out-of-order numbered interleaved sequences are provided, 140, 160, and 200, respectively. The eight sets of reverse-order interleaved sequences correspond to the corresponding positive-order numbered interleaved sequences in table one. For each K_maxThe first, third, fifth and seventh groups of interleaving sequences have better early stop effect when applied to the low code rate polarization code; when the second, fourth, sixth and eighth groups of interleaving sequences are applied to the high-code-rate polarization code, the effect of early stop is better; when the first and second groups of interleaving sequences are applied to the SC decoding of the polar code, the effect of early stop is better; when the third and the fourth groups of interleaving sequences are applied to the decoding of the polarization code SCL, the effect of early stop is better; the fifth and sixth groups of interleaving sequences have better early-stopping effect when being applied to long-code long-polarization codes; the seventh and eighth interleaving sequences have better early stop effect when applied to the short code long polarization code.

It should be noted that in practical systems, if the interleaving sequence is numbered in reverse order, the maximum number of information bits required by the system is not located in table two, but is smaller than K provided in table two_maxThe values 200, 160 or 140 can be obtained by selecting a certain group of interleaving sequences from table two according to the characteristics of different groups of interleaving sequences, and extracting the interleaving sequences with the required length. For example, if the maximum number of information bits required by the system is K_max3The value is less than the maximum number of information bits K in Table two_max2(K_max3<K_max2) First, a group of interleaving sequences is selected from the table two according to the characteristics of different groups of interleaving sequences, and the length of the group is K_max2The interleaving sequence of (2); then all indexes smaller than K are taken out according to the sequence of the indexes_max3And the sum index is greater than or equal to K_max2Is indexed (i.e., the value of K or more in the sequence is deleted)_max3And is less than K_max2Index of) and then the numerical value in the sequence is greater than or equal to K_max2Minus the value of (K) of all indices_max2-K_max3) And obtaining the required interleaving sequence.

Any one of 8 sets of interleaved sequences numbered in reverse order in Table two, where K_maxIs an interleaving sequence of 140, can be derived from K according to the method described above_maxIs 160 or K_maxTaking out from the interleaving sequence of 200; wherein K_maxAn interleaving sequence of 160, from K according to the method described above_maxTaken out of the interleaved sequence of 200. The sequences extracted were identical to the corresponding sequences in Table II. Therefore, K in Table I can also be considered_maxThe interleaving sequence with the length of 140 or 160 is that the maximum information bit number (140 or 160) is less than K shown in table one_maxAn embodiment of interleaving sequence with the maximum information bit number length is obtained when the length is 200.

In addition, in order to distinguish the indexes of the corresponding information bits and the corresponding CRC bits in the interleaved sequence, the indexes of the corresponding CRC bits may be replaced with a symbol form or a larger numerical value. For example, as follows, for the interleaved sequence in Table two

[199,197,196,194,193,191,188,187,186,183,180,179,177,175,171,167,166,164,162,161,160,159,158,157,155,153,152,150,149,145,144,142,140,139,137,135,132,130,125,120,119,115,114,113,111,108,105,97,94,90,89,88,86,85,83,81,80,78,77,74,73,72,70,69,68,67,63,62,58,57,56,52,51,50,48,46,44,41,38,35,33,31,29,28,26,24,21,20,19,17,16,13,12,10,7,5,1,0,200,198,195,192,190,185,182,178,176,174,170,165,163,156,154,151,148,143,141,138,136,134,131,129,124,118,112,110,107,104,96,93,87,84,82,79,76,71,66,61,55,49,47,45,43,40,37,34,32,30,27,25,23,18,15,11,9,6,4,201,189,184,181,173,169,147,133,128,123,117,109,106,103,95,92,75,65,60,54,42,39,36,22,14,8,3,202,172,146,127,126,121,116,101,100,59,2,205,168,122,99,64,206,91,209,102,53,203,204,98,207,208,210,211,212,213,214,215,216,217,218,219,220,221,222,223]，

[199,197,196,194,193,191,188,187,186,183,180,179,177,175,171,167,166,164,162,161,160,159,158,157,155,153,152,150,149,145,144,142,140,139,137,135,132,130,125,120,119,115,114,113,111,108,105,97,94,90,89,88,86,85,83,81,80,78,77,74,73,72,70,69,68,67,63,62,58,57,56,52,51,50,48,46,44,41,38,35,33,31,29,28,26,24,21,20,19,17,16,13,12,10,7,5,1,0, p0,198,195,192,190,185,182,178,176,174,170,165,163,156,154,151,148,143,141,138,136,134,131,129,124,118,112,110,107,104,96,93,87,84,82,79,76,71,66,61,55,49,47,45,43,40,37,34,32,30,27,25,23,18,15,11,9,6,4, P1,189,184,181,173,169,147,133,128,123,117,109,106,103,95,92,75,65,60,54,42,39,36,22,14,8,3, P2, 127, 172,146, 126,121,116,101,100,59,2, P5,168,122,99,64, P3, 91,9, 102, 4642, 84, P2,172, 596, 146, 63126, 121,116,101,100,59, P2, P5,168,122,99,64, P3, 91, 469, 102, 7378, P2, 193, 968, 3638, 3639, P2, 196, 366326, P2, 9623, P2, 968, 3626, P2, 196, 20, 366338, 3626, P2, 3626, P2, 20, 3638, 3626, P2, 369, P2, 20, P2, 20, 3638, 369, and the like. Here, the selection of the substitute symbol and the selection of the subscript are not limited to the above-described case without causing ambiguity.

[199,197,196,194,193,191,188,187,186,183,180,179,177,175,171,167,166,164,162,161,160,159,158,157,155,153,152,150,149,145,144,142,140,139,137,135,132,130,125,120,119,115,114,113,111,108,105,97,94,90,89,88,86,85,83,81,80,78,77,74,73,72,70,69,68,67,63,62,58,57,56,52,51,50,48,46,44,41,38,35,33,31,29,28,26,24,21,20,19,17,16,13,12,10,7,5,1,0,600,198,195,192,190,185,182,178,176,174,170,165,163,156,154,151,148,143,141,138,136,134,131,129,124,118,112,110,107,104,96,93,87,84,82,79,76,71,66,61,55,49,47,45,43,40,37,34,32,30,27,25,23,18,15,11,9,6,4,601,189,184,181,173,169,147,133,128,123,117,109,106,103,95,92,75,65,60,54,42,39,36,22,14,8,3,602,172,146,127,126,121,116,101,100,59,2,605,168,122,99,64,606,91,609,102,53,603,604,98,607,608,610,611,612,613,614,615,616,617,618,619,620,621,622,623]. Here, the number of increments of the index value is not limited to a value that does not cause index duplication in the entire sequence.

Fig. 6 is a schematic flow chart of an encoding method provided by the present application, and in this embodiment, an interleaving sequence adopted in an interleaving operation is taken as a longest interleaving sequence for example, a longest interleaving sequence of a distributed CRC code is a sequence pi 3 with a positive sequence number, and a maximum information bit length corresponding to pi 3 is K_maxThe CRC polynomial is g, the number of CRC bits is L, and the CRC length is L. Suppose that A information bits to be encoded are { a }₀，a₁，…，a_A-1The number of information bits A is less than or equal to K_max. The execution main body of this embodiment is a sending end (encoding end), and as shown in fig. 6, the method of this embodiment includes:

s401, CRC coding is carried out on A information bits to be coded to obtain a first bit sequence { b }₀，b₁,…,b_A+L-1}。

S402, converting the first bit sequence b₀，b₁,…,b_A+L-1Extend to includeK_max+ L fourth bit sequences c₀,c₁,...,c_Kmax+L-1K in the fourth bit sequence_max-the value of a bits is set to NULL, the remaining bits are from K_maxThe a +1 bits start to correspond in sequence to the bits in the first bit sequence.

Specifically, for the first bit sequence { b₀，b₁,…,b_A+L-1Spreading to obtain a fourth bit sequence { c }₀,c₁,...,c_Kmax+L-1Where, when K is 0,1, …, K_max-A-1，c_kNULL; when K is equal to K_max-A,K_max-A+1,…,K_max+L-1，c_k＝b_(k-(Kmax-A))。

Taking the example shown in FIG. 6, the first bit sequence shown in FIG. 6 is { b }₀，b₁,…,b₁₃Get the fourth bit sequence of { NULL, NULL, b }₀，b₁,…,b₁₃}。

S403, adopting the longest interleaving sequence pi 3 to the fourth bit sequence { c₀,c₁,...,c_Kmax+L-1Performing interleaving operation to obtain a fifth bit sequence d₀,d₁,...,d_Kmax+L-1}。

Taking the example shown in fig. 6 as an example, pi 3 is {2,3,5,9,10,12,4,6,11,13,0,7,14,1,8,15}, and pi 3 is used for the fourth bit sequence { NULL, b } shown in fig. 6₀，b₁,…,b₁₃Performing interleaving operation to obtain a fifth bit sequence of { b }₀，b₁,b₃，b₇,b₈，b₁₀,b₂，b₄,b₉，b₁₁,NULL，b₅，b₁₂,NULL,b₆，b₁₃}。

S404, from the fifth bit sequence { d₀,d₁,...,d_Kmax+L-1Removing the NULL bit to obtain a second bit sequence e₀，e₁,…,e_A+L-1}。

Taking the example shown in FIG. 6, the fifth bit sequence { b }₀，b₁,b₃，b₇,b₈，b₁₀,b₂，b₄,b₉，b₁₁,NULL，b₅，b₁₂,NULL,b₆，b₁₃Removing the NULL bits to obtain a second bit sequence e_nIs { b₀，b₁,b₃，b₇,b₈，b₁₀,b₂，b₄,b₉，b₁₁,b₅，b₁₂,b₆，b₁₃}。

And S405, carrying out polarization coding on the second bit sequence.

S406 (not shown), the transmitting end performs some or all of the steps including but not limited to rate matching, modulation, digital-to-analog conversion, frequency conversion, etc. on the third bit sequence, and then transmits the third bit sequence.

It should be noted that the rate matching step in step S406 is optional, and if the code length of the code is the same as that of the target code, the rate matching is not required. Since the focus of the embodiment of the present invention is not on step S406, it is not described in detail here, for example, in one possible implementation manner, a person skilled in the art may refer to the practice in the prior art.

In this embodiment, as shown in table one above, for the interleaving sequences in table one, the maximum number of information bits K is different for each interleaving sequence_maxDifferent positive-sequence numbered interleaved sequences are provided. See table one for details. The applicable scenarios of different interleaving sequences are also the same, and details can be referred to the description of each sequence in table i, and are not described herein again.

Based on the above embodiments, a method of how to distribute CRC bits among information bits when the number of information bits is greater than the maximum number of information bits needs to be considered. One straightforward approach is to interleave only a portion of the information bits, depending on the longest interleaving sequence supported by the system. Specifically, if the number of information bits A is greater than K_maxThen for the last K of A information bits_maxInterleaving the bits with L CRC bits according to one of the methods described above; first (A-K) of the remaining A information bits_max) And if the information bits are not interleaved, the interleaving is not performed. Will be (A-K)_max) Information bits not to be interleaved and K after interleaving_max+ L bit combinations, (A-K_max) K after interleaving and before information bit without interleaving_maxAfter + L bits, the combined bit sequence is polarization encoded. Optionally, K_maxThe bit where one bit participates in interleaving may also be the first K of A information bits_maxK agreed by single bit or arbitrary transmitting and receiving ends_maxThe bit at a location.

It should be noted that, after receiving the information bits to be decoded, the receiving end (decoding side) performs a deinterleaving operation. The receiving end obtains the interleaving sequence, and performs corresponding de-interleaving and decoding operations according to the corresponding relationship between the CRC bit position and each information bit determined by the interleaving sequence, and the process of obtaining the interleaving sequence during de-interleaving is consistent with that of the transmitting end (encoding side), and details can be referred to the description of the encoding end, which is not described herein again.

Based on the same inventive concept of the encoding method shown in fig. 3, as shown in fig. 7, an encoding apparatus 700 is further provided in the embodiment of the present application, where the encoding apparatus 700 is configured to perform the encoding and interleaving method shown in fig. 3. Some or all of the encoding and interleaving methods shown in fig. 3 may be implemented by hardware or may be implemented by software, and when implemented by hardware, the encoding apparatus 700 includes: an input interface 701, configured to obtain a bit sequence to be encoded; the logic circuit 702 is configured to execute the encoding and interleaving method shown in fig. 3, which is specifically described in the foregoing method embodiment and is not described herein again; and an output interface 703 for outputting the polarization-encoded bit sequence.

Optionally, the encoding apparatus 700 may be a chip or an integrated circuit when implemented.

Alternatively, when part or all of the encoding and interleaving methods of the above embodiments are implemented by software, as shown in fig. 8, the encoding apparatus 800 includes: a memory 801 for storing programs; a processor 802 for executing the program stored in the memory 801, when the program is executed, the encoding apparatus 800 may implement the encoding and interleaving methods provided by the corresponding embodiments of fig. 3.

Alternatively, the memory 801 may be a physically separate unit or may be integrated with the processor 802.

Alternatively, when part or all of the encoding and interleaving methods of the corresponding embodiments in fig. 3 are implemented by software, the encoding apparatus 800 may only include the processor 802. The memory 801 for storing programs is located outside the encoding device 800, and the processor 802 is connected to the memory 801 through circuits/wires for reading and executing the programs stored in the memory 801.

The processor 802 may be a Central Processing Unit (CPU), a Network Processor (NP), or a combination of a CPU and an NP.

The processor 802 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a Programmable Logic Device (PLD), or a combination thereof. The PLD may be a Complex Programmable Logic Device (CPLD), a field-programmable gate array (FPGA), a General Array Logic (GAL), or any combination thereof.

The memory 801 may include a volatile memory (volatile memory), such as a random-access memory (RAM); the memory 801 may also include a non-volatile memory (non-volatile memory), such as a flash memory (flash memory), a Hard Disk Drive (HDD) or a solid-state drive (SSD); the memory 801 may also comprise a combination of memories of the kind described above.

Based on the same inventive concept of the encoding and interleaving method shown in the corresponding embodiment of fig. 3, as shown in fig. 9, an embodiment of the present application further provides a schematic structural diagram of an embodiment of an encoding apparatus, where the encoding apparatus may include: the first encoding module 901 is configured to perform Cyclic Redundancy Check (CRC) encoding on a information bits to be encoded to obtain a first bit sequence, where the first bit sequence includes L CRC bits and a information bits, and L, A is a positive integer. Interweaving dieThe block 902 is configured to perform an interleaving operation on the first bit sequence to obtain a second bit sequence, where a first interleaving sequence used in the interleaving operation is obtained according to a longest interleaving sequence supported by a system and a preset rule, and a length of the first interleaving sequence is equal to a + L, or a second interleaving sequence used in the interleaving operation is the longest interleaving sequence, and a length of the second interleaving sequence is equal to K_max+L，K_maxThe maximum number of information bits corresponding to the longest interleaving sequence. The second encoding module 903 is configured to perform polarization encoding on the second bit sequence.

Optionally, the preset rule is: taking out all indexes more than or equal to K from the longest interleaving sequence according to the sequence of the indexes_max-index of A, subtracting K from all indexes taken_max-a, constituting said first interleaving sequence. The interleaving module 902 is configured to: and performing interleaving operation on the first bit sequence by adopting the first interleaving sequence to obtain the second bit sequence. Wherein the longest interleaving sequence is any one of the sequences in table one above.

Optionally, the preset rule is: taking out all indexes smaller than A and indexes greater than or equal to K from the longest interleaving sequence according to the sequence of the indexes_maxFor the index greater than or equal to K in the extracted index_maxBy K_max-a, constituting said first interleaving sequence. The interleaving module 902 is configured to: and arranging A information bits in the first bit sequence in a reverse order according to indexes of the information bits to obtain a third bit sequence, and performing interleaving operation on the third bit sequence by adopting the first interleaving sequence to obtain the second bit sequence. Wherein the longest interleaving sequence is any one of the sequences in table two above.

Optionally, when the second interleaving sequence adopted in the interleaving operation is the longest interleaving sequence, the interleaving module 902 is configured to: expanding the first bit sequence to include K_maxA fourth bit sequence of + L bits, the first K in the fourth bit sequence_max-setting the value of A bits to null and the remaining bits from the Kth_max-A +1 bits start atAnd interleaving the fourth bit sequence by adopting the longest interleaving sequence corresponding to the bits in the first bit sequence, so as to obtain a fifth bit sequence, and removing bits with null values from the fifth bit sequence, so as to obtain the second bit sequence. Wherein the longest interleaving sequence is any one of the sequences in table one above.

Optionally, if the number of information bits a is greater than K_maxThen for the last K of A information bits_maxInterleaving the bits with L CRC bits according to one of the methods described above; first (A-K) of the remaining A information bits_max) And if the information bits are not interleaved, the interleaving is not performed. Will be (A-K)_max) Information bits not to be interleaved and K after interleaving_max+ L bit combinations, (A-K_max) K after interleaving and before information bit without interleaving_maxAfter + L bits, the combined bit sequence is polarization encoded. Optionally, K_maxThe bit where one bit participates in interleaving may also be the first K of A information bits_maxK agreed by single bit or arbitrary transmitting and receiving ends_maxThe bit at a location.

The apparatus of this embodiment may be configured to execute the technical solution of the method embodiment corresponding to fig. 3, and the implementation principle and the technical effect are similar, which are not described herein again.

It should be noted that, in fig. 9, a rate matching module, a modulation module, a digital-to-analog conversion module, a frequency conversion module, a transmission module, and other modules commonly used in the prior art are not shown, where the transmission module is configured to transmit the encoded sequence, and before transmission, operations such as rate matching (if needed), modulation, and the like are further performed.

Based on the same inventive concept as the decoding method provided in the foregoing embodiment, as shown in fig. 10, an embodiment of the present application further provides a decoding apparatus 1000, where the decoding apparatus 1000 may be configured to perform the deinterleaving and decoding method provided in the embodiment of the present application, and the decoding apparatus 1000 includes:

an obtaining module 1001, configured to obtain a bit sequence to be decoded;

the decoding module 1002 is configured to obtain an interleaving sequence, determine a correspondence between positions of CRC bits and information bits according to the interleaving sequence, perform corresponding de-interleaving and decoding operations, and obtain the interleaving sequence in accordance with a transmitting end (encoding side).

It should be noted that fig. 10 does not show a frequency conversion module, an analog-to-digital conversion module, a rate de-matching module, a demodulation module, and other modules commonly used in the prior art.

Based on the same inventive concept of the decoding method provided in the foregoing embodiment, as shown in fig. 11, an embodiment of the present application further provides a decoding apparatus 1100, where the decoding apparatus 1100 is configured to perform the foregoing deinterleaving and decoding method. Some or all of the deinterleaving and decoding methods described above may be implemented by hardware or may be implemented by software, and when implemented by hardware, the decoding apparatus 1100 includes: an input interface 1101 for obtaining a bit sequence to be decoded; a logic circuit 1102 for performing the deinterleaving and decoding methods described above; and an output interface 1103 for outputting the decoded sequence.

Optionally, the decoding apparatus 1100 may be a chip or an integrated circuit when implemented.

Alternatively, when part or all of the deinterleaving and decoding methods of the above embodiments are implemented by software, as shown in fig. 10, the decoding apparatus 1200 includes: a memory 1201 for storing a program; a processor 1202, configured to execute the program stored in the memory 1201, and when the program is executed, enable the decoding apparatus 1200 to implement the deinterleaving and decoding methods provided in the foregoing embodiments.

Alternatively, the memory 1201 may be a physically separate unit or may be integrated with the processor 1202.

Alternatively, when part or all of the deinterleaving and decoding methods of the above embodiments are implemented by software, the decoding apparatus 1200 may only include the processor 1202. The memory 1201 for storing the program is located outside the decoding apparatus 1200, and the processor 1202 is connected to the memory 1201 through a circuit/wire for reading and executing the program stored in the memory 1201.

The processor 1202 may be a Central Processing Unit (CPU), a Network Processor (NP), or a combination of a CPU and an NP.

The processor 1202 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a Programmable Logic Device (PLD), or a combination thereof. The PLD may be a Complex Programmable Logic Device (CPLD), a field-programmable gate array (FPGA), a General Array Logic (GAL), or any combination thereof.

Memory 1201 may include volatile memory (volatile memory), such as random-access memory (RAM); the memory 1201 may also include a non-volatile memory (non-volatile memory), such as a flash memory (flash memory), a Hard Disk Drive (HDD) or a solid-state drive (SSD); the memory 1201 may also include a combination of the above types of memory.

The embodiment of the present application further provides a network device, and as shown in fig. 13, the encoding apparatus and/or the decoding apparatus may be installed in the network device 110. In addition to the above-mentioned encoding means, the network device 110 may further include decoding means and a transceiver 1302, the bit sequence encoded by the encoding means is transmitted to the terminal 112 through the transceiver 1302 after subsequent change or processing, or the transceiver 1302 is further configured to receive information/data from the terminal 112, the information/data is converted into a sequence to be decoded (including but not limited to a part or all of frequency conversion, analog-to-digital conversion, demodulation, rate de-matching, and the like) through a series of processing, and the decoded sequence is obtained after processing by the decoding means. Network device 110 may also include a network interface 1304 for communicating with other network devices.

Similarly, the encoding means and/or the decoding means may be configured in the terminal 112. In addition to the above coding and/or decoding devices, the terminal 112 may further include a transceiver 1312, where the bit sequence encoded by the coding device is sent to the network device 110 through the transceiver 1312 after subsequent change or processing (including but not limited to some or all of rate matching, modulation, digital-to-analog conversion, frequency conversion, etc.), or the transceiver 1312 is further configured to receive information/data from the network device 110, where the information/data is converted into a sequence to be decoded (including but not limited to some or all of frequency conversion, analog-to-digital conversion, demodulation, rate de-matching, etc.) through a series of processing, and the decoded sequence is obtained after processing by the decoding device. The terminal 112 may further comprise an input/output interface 1314 for receiving information input by a user, and for transmitting the information to the network device 110, the information needs to be processed by the encoder and then transmitted to the network device 110 through the transceiver 1312. The decoded data from the decoder may also be presented to the user through input/output interface 1314 after subsequent processing.

The embodiment of the present application further provides a computer storage medium, which stores a computer program, where the computer program includes a program for executing the encoding method shown in fig. 3 and the foregoing embodiment and the decoding method provided by the foregoing embodiment.

The embodiment of the application also provides a Polar code encoding device, which comprises the encoding device shown in any one of the figures 7 to 9 and the decoding device shown in any one of the figures 10 to 12.

The embodiment of the present application further provides a computer program product containing instructions, which when run on a computer, causes the computer to execute the encoding method shown in fig. 3 and the decoding method provided by the above embodiment.

As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein. The computer instructions may also be transmitted from one computer-readable storage medium to another, for example, from one website site, computer, server, or data center to another website site, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.).

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application.

It will be apparent to those skilled in the art that various changes and modifications may be made in the embodiments of the present application without departing from the spirit and scope of the embodiments of the present application. Thus, if such modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to encompass such modifications and variations.

Claims

1. A method of encoding, comprising:

performing Cyclic Redundancy Check (CRC) coding on A information bits to be coded to obtain a first bit sequence, wherein the first bit sequence comprises L CRC bits and A information bits, and L, A is a positive integer;

carrying out interleaving operation on the first bit sequence to obtain a second bit sequence;

the length of the first interleaving sequence is equal to A + L, or the length of the second interleaving sequence is equal to K_max+L，K_maxThe maximum information bit number corresponding to the longest interleaving sequence;

polarization encoding the second bit sequence;

wherein, the first interleaving sequence is equal to, all indexes which are more than or equal to K are taken out from the longest interleaving sequence according to the sequence of the indexes_max-index of A, respectively subtracting K_max-A；

Alternatively, the first and second electrodes may be,

the first interleaving sequence is equal to, all indexes smaller than A and indexes larger than or equal to K are taken out from the longest interleaving sequence according to the sequence of the indexes_maxAnd for the index greater than or equal to K in the fetched index_maxBy K_max-A；

Wherein, the longest interleaving sequence is any one sequence in the following table I;

2. the method according to claim 1, wherein the preset rule is:

taking out all indexes more than or equal to K from the longest interleaving sequence according to the sequence of the indexes_max-index of A, subtracting K from all indexes taken_max-a, constituting said first interleaving sequence;

the interleaving operation on the first bit sequence comprises:

and performing interleaving operation on the first bit sequence by adopting the first interleaving sequence to obtain the second bit sequence.

3. The method according to claim 1, wherein the preset rule is:

taking out all indexes smaller than A and indexes greater than or equal to K from the longest interleaving sequence according to the sequence of the indexes_maxFor the index greater than or equal to K in the extracted index_maxBy K_max-a, constituting said first interleaving sequence;

the interleaving operation on the first bit sequence comprises:

arranging A information bits in the first bit sequence in a reverse order according to indexes of the information bits to obtain a third bit sequence;

and performing interleaving operation on the third bit sequence by adopting the first interleaving sequence to obtain the second bit sequence.

4. The method according to claim 1, wherein when the second interleaving sequence adopted by the interleaving operation is the longest interleaving sequence, the interleaving operation on the first bit sequence comprises:

expanding the first bit sequence to include K_maxA fourth bit sequence of + L bits, the first K in the fourth bit sequence_max-setting the value of A bits to null and the remaining bits from the Kth_max-a +1 bits start to correspond in sequence to bits in said first bit sequence;

interleaving the fourth bit sequence by using the longest interleaving sequence to obtain a fifth bit sequence;

and removing the bits with null values from the fifth bit sequence to obtain the second bit sequence.

5. A method of encoding, comprising:

polarization encoding the second bit sequence;

Alternatively, the first and second electrodes may be,

Wherein the longest interleaving sequence is any one of the following tables;

6. a method of encoding comprising all the features of the method of any one of claims 1 to 5, wherein A6 is present>K_maxThen, for the last K in A information bits in the first bit sequence_maxCarrying out the interleaving operation on the bits and the L CRC bits to obtain a sixth bit sequence;

7. A method of encoding, comprising:

the first interleaving sequence adopted by the interleaving operation is obtained according to the longest interleaving sequence supported by the system and a preset rule, the length of the first interleaving sequence is equal to A + L, or the second interleaving sequence adopted by the interleaving operation is the longest interleaving sequenceA second interleaving sequence with length equal to K_max+L，K_maxThe maximum information bit number corresponding to the longest interleaving sequence;

polarization encoding the second bit sequence;

wherein, if A6>K_maxThen, for the last K in A information bits in the first bit sequence_maxCarrying out the interleaving operation on the bits and the L CRC bits to obtain a sixth bit sequence;

the second bit sequence is the first A-K of A information bits in the first bit sequence_maxA combination of a preceding information bit and a succeeding sixth bit sequence;

Alternatively, the first and second electrodes may be,

the first interleaving sequence is equal to, all indexes smaller than A and indexes larger than or equal to K are taken out from the longest interleaving sequence according to the sequence of the indexes_maxAnd for the index greater than or equal to K in the fetched index_maxBy K_max-A。

8. An encoding apparatus, comprising:

the first coding module is used for performing Cyclic Redundancy Check (CRC) coding on A information bits to be coded to obtain a first bit sequence, wherein the first bit sequence comprises L CRC bits and A information bits, and L, A is a positive integer;

the interleaving module is used for performing interleaving operation on the first bit sequence to obtain a second bit sequence;

a second encoding module for polarization encoding the second bit sequence;

Alternatively, the first and second electrodes may be,

Wherein the longest interleaving sequence is any one of the following tables;

9. the apparatus of claim 8, wherein the preset rule is:

the interleaving module is configured to:

10. The apparatus of claim 8, wherein the preset rule is:

the interleaving module is configured to:

11. The apparatus of claim 8, wherein when the second interleaving sequence used in the interleaving operation is the longest interleaving sequence, the interleaving module is configured to:

expanding the first bit sequence to include K_maxFourth of + L bitsA bit sequence, the first K in the fourth bit sequence_max-setting the value of A bits to null and the remaining bits from the Kth_max-a +1 bits start to correspond in sequence to bits in said first bit sequence;

12. An encoding apparatus, comprising:

a second encoding module for polarization encoding the second bit sequence;

Alternatively, the first and second electrodes may be,

Wherein the longest interleaving sequence is any one of the following tables;

13. an encoding device, characterized in that it comprises all the features of the device according to any one of claims 8 to 12, wherein if a>K_maxThen, for the last K in A information bits in the first bit sequence_maxCarrying out the interleaving operation on the bits and the L CRC bits to obtain a sixth bit sequence;

the second bit sequence is A pieces of information in the first bit sequenceFirst A-K in bits_maxA combination of a preceding information bit and a succeeding sixth bit sequence.

14. An encoding apparatus, comprising:

a second encoding module for polarization encoding the second bit sequence;

wherein, if A>K_maxThen, for the last K in A information bits in the first bit sequence_maxCarrying out the interleaving operation on the bits and the L CRC bits to obtain a sixth bit sequence;

Alternatively, the first and second electrodes may be,

the first interleaving sequence is equal to, all indexes smaller than A and indexes larger than or equal to K are taken out from the longest interleaving sequence according to the sequence of the indexes_maxAnd for greater than or equal to the retrieved indexIs equal to K_maxBy K_max-A。

15. An encoding apparatus, comprising a processor; the processor is configured to: performing Cyclic Redundancy Check (CRC) coding on A information bits to be coded to obtain a first bit sequence, wherein the first bit sequence comprises L CRC bits and A information bits, and L, A is a positive integer;

polarization encoding the second bit sequence;

Alternatively, the first and second electrodes may be,

Wherein the longest interleaving sequence is any one of the following tables;

16. the apparatus of claim 15, further comprising a memory for storing program instructions.

17. The apparatus of claim 15, wherein the preset rule is:

the processor is configured to:

18. The apparatus of claim 15, wherein the preset rule is:

the processor is configured to:

19. The apparatus of claim 15, wherein when the second interleaving sequence used for the interleaving operation is the longest interleaving sequence, the processor is configured to:

20. An encoding apparatus, comprising a processor; the processor is configured to: performing Cyclic Redundancy Check (CRC) coding on A information bits to be coded to obtain a first bit sequence, wherein the first bit sequence comprises L CRC bits and A information bits, and L, A is a positive integer;

polarization encoding the second bit sequence;

Alternatively, the first and second electrodes may be,

Wherein the longest interleaving sequence is any one of the following tables;

21. an encoding device, characterized in that it comprises all the features of the device according to any one of claims 15 to 20, wherein if a>K_maxThen, for the last K in A information bits in the first bit sequence_maxCarrying out the interleaving operation on the bits and the L CRC bits to obtain a sixth bit sequence;

22. An encoding apparatus, comprising a processor; the processor is configured to: performing Cyclic Redundancy Check (CRC) coding on A information bits to be coded to obtain a first bit sequence, wherein the first bit sequence comprises L CRC bits and A information bits, and L, A is a positive integer;

polarization encoding the second bit sequence;

Alternatively, the first and second electrodes may be,

23. An encoding apparatus, comprising:

the input interface is used for acquiring a bit sequence to be coded;

logic circuitry for performing the method of any one of claims 1 to 6 on the basis of the obtained bit sequence to be encoded, resulting in encoded bits;

and the output interface is used for outputting the coded bits.

24. A communication device, characterized in that it comprises an encoding apparatus according to claims 15-23 and a transceiver;

the transceiver is used for transmitting the bits coded by the coding device.

25. A readable storage medium, comprising: readable storage medium and computer program for implementing the encoding method of any one of claims 1 to 7.