CN104062574A - Check Method Of Semiconductor Device And Manufacturing Method For Semiconductor Device Employing Same - Google Patents
Check Method Of Semiconductor Device And Manufacturing Method For Semiconductor Device Employing Same Download PDFInfo
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- CN104062574A CN104062574A CN201410092725.8A CN201410092725A CN104062574A CN 104062574 A CN104062574 A CN 104062574A CN 201410092725 A CN201410092725 A CN 201410092725A CN 104062574 A CN104062574 A CN 104062574A
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Abstract
In the check method of a semiconductor device, a contact resistance between a terminal lead of a semiconductor similar to a to-be-checked semiconductor device and a probe is preset; for a semiconductor devcie with a contact resistance value larger than a common value viewed as a valvue that cannot be misjudged in an electrical characteristic test, power electricity acting as a standard value is calculated in advance, by which the large contact resistance value can be decreased to the common value; with a method same as the contact ressitance measuring method, contact resistance of the targeted semiconductor devcie is measured; when the contact resistance is larger than the common value, power electricity as the standard valvue is applied and then the contact resistance is remeasured; and at last the contact resistance is guaranteed to the common value and a required electrical characteristic test is conducted.
Description
Technical field
The present invention relates to effectively stablize and the inspection method of semiconductor device of the electrical characteristics test that precision is high and the manufacture method of the semiconductor device of employing the method.
Background technology
Conventionally before the semiconductor device shipment that manufacture is completed, electrical characteristics are tested, are absolutely necessary for the test inspection operation of confirming face shaping.For example, in electrical characteristics test, under the state contacting at the terminal lead of the probe that makes to be connected with testing machine (detecting device) and semiconductor device, apply predetermined assigned voltage, electric current, the value of mensuration electric current and voltage now or this value are along with the variation of time, and contrast with the electric current and voltage reference value of regulation, to judge acceptance or rejection.
But in semiconductor device, particularly power supply control check with the test of the semiconductor devices such as IC, the voltage that applies when electrical characteristics test, electric current are conventionally special or below several milliamperes in the three ten-day period of hot season, and minute is also conventionally below millisecond.Must carry out high-precision mensuration to small electric current and voltage like this at short notice, but the following situation of known existence:, in the time measuring, can be subject to the impacts such as the contact resistance that causes because of the oxide film at terminal lead surface self-assembling formation etc., cause obtaining correct measurement result, specification product are mistaken for to substandard product etc., so that the stability of measuring in electrical characteristics inspection has problems.
Therefore, in the inspection operation of semiconductor device, for the state with stable carries out high-precision electrical characteristics test, the contact resistance that makes the terminal lead surface that is formed at semiconductor device must be become to large oxide film etc. and remove to reduce contact resistance, then make probe contact to test.In order to remove this oxide film, known following inspection method: utilize cut, wipe, scrape, the mechanical method such as acupuncture removes local oxide film, makes probe and basalis metal directly contact to carry out electrical characteristics test.
About above-mentioned existing inspection method, carry out detailed a little explanation below.As the semiconductor device of inspected object, mostly carry out solder bonds to be carried and to be arranged in electrical equipment in the position of its terminal lead.Therefore, be applied with the solder coating being formed by Sn or SnAg alloy on its surface.But, on the surface of such solder coating, conventionally can form the minimum and high-resistance oxide film of thickness owing to reacting with airborne oxygen.About forming such oxide film, not only have surface as described above by the semiconductor device of the terminal lead of scolder plating in, and in having by the semiconductor device of terminal lead surface or the aluminium alloy terminal etc. of nickel plating, even if how many membranous ground, film thicknesses there are differences, all can form oxide film.About all semiconductor devices with the terminal lead that is formed with such oxide film, although be unlikely to make electrical characteristics test to become unstable, there will be in certain proportion (several % left and right) misjudged semiconductor device.
For above-mentioned semiconductor device, with reference to Fig. 3, Fig. 8, Fig. 9, testing fixture and inspection method are in the past described in detail.First, with on socket, utilize not shown Handling device to carry semiconductor device 20 (for example shape of SOP8 pin) at the SOP shown in the amplification profile of Fig. 3 (Small OutlinePackage: little outline packages) 8 pins.This SOP8 pin is the Special electric attribute testing fixtures that possess upper-lower casing 3,4 with socket 30, and this upper-lower casing 3,4 has saddle and the space of the terminal lead 21 of the main part of semiconductor device 20 and 8 pins being fixed and is accommodated in assigned position.And, closing upper-lower casing at 3,4 o'clock, the terminal lead 21 being made up of 8 pins has respectively primary probe 1 and assist probes 2, and this primary probe 1 is arranged at lower house 4 and from below and this lower house 4 Elastic Contact, and this assist probes 2 is arranged at upper shell 3 and from top and this upper shell 3 Elastic Contact.The state of opening from above-below direction at these upper shells 3 and lower house 4, on the regulation saddle of lower house 4, be provided with the semiconductor device 20 (for example SOP8 pin) that carries out electrical characteristics test.Then,, if the upper-lower casing of closed socket 3,4, primary probe 1 and assist probes 2 carry out Elastic Contact from the terminal lead 21 of above-below direction and semiconductor device.In order to confirm initial contact condition (size of the contact resistance of probe and terminal lead), as shown in Figure 9, temporarily utilize transfer relay 35 that the circuit of assist probes 2 (electrical wiring) is switched to power ground terminal 34 from the feedback system sensing terminals 33 of testing machine (detecting device).Apply terminal 32 from power supply and flow through the Weak current about 1～10mA.The contact resistance Rcon that voltage while confirming thus or the pH-value determination pH of resistance obtain is (for example 0.1 Ω < Rcon < 1 Ω) (being judged to be " YES ") within the limits prescribed in the E1 of Fig. 8 step.Then, the path that again utilizes transfer relay 35 to switch assist probes 2 one sides, returns to the state that assist probes 2 is connected with feedback system sensing terminals 33.In E2 step, according to required electrical characteristics pilot project, the semiconductor device that is judged as " YES " in described E1 step is applied to voltage, electric current, measure magnitude of voltage/current value now or this signal along with the variation of time, by with the reference value of regulation compare to judge qualified/defective.Confirmed above-mentioned initial contact resistance Rcon in described E1 step time, for example, because of contact resistance large (being more than 1 Ω) and contact condition is bad is judged as " NO ", in the case, the electrical characteristics that do not specify are tested and are distinguished as contact substandard product and discharge.In most situation, if this contact substandard product is not considered to exist abnormal in the profile such as bending of distortion, terminal lead, observe in the mode of range estimation, the foreign matter that the adhering on surface of terminal lead is removed, or the significant oxide film of pruning, on this basis, if can again test (" YES ") in E3 step, return to E1 step, again implement electrical characteristics test.If in E3 step be " NO ", divide into substandard product (" substandard product processing "), and by its eliminating.Feedback system sensing terminals, power ground terminal and the power supply of waiting a moment narration apply the title that terminal is the terminal that possesses of common electronic circuit testing machine.
In above-mentioned E1 step, about contact resistance Rcon, judge to whether contact condition is qualified that using 0.1 Ω < Rcon < 1 Ω as benchmark (" YES " judges and " NO " judges) is an example, it can change along with the difference of the membranous ground of oxide film, film thickness, mensuration environment temperature etc.
As the method that reduces different contact resistance, the known oxide film that has metal epithelium surface to being formed at terminal lead and a thinner thickness applies electric current and voltage, to reduce the method etc. of contact resistance.
About the test inspection method of such semiconductor device, the on the books inspection method (patent documentation 1) of implementing efficiently electrical characteristics test and improving significantly the handling capacity detecting.Also record following inspection method, check with the insulating coating of electrode surface so that check probe and inspection electrode is realized good electrically contacting by removing, reducing thus pin presses, eliminate the damage that electrode is caused, without probe is cleaned, thereby improve detection efficiency (patent documentation 2).
Prior art document
Patent documentation
Patent documentation 1: Japanese Patent Laid-Open 2004-191208 communique (0006th～0007 section)
Patent documentation 2: Japanese Patent Laid-Open 2002-139542 communique (0008th～0011 section)
Summary of the invention
Invent technical matters to be solved
But as mentioned above, all methods of utilizing the mechanical disposal route such as prune to remove the oxide film on terminal lead surface all can cause damage to the terminal lead of semiconductor device, or likely cause new bad order.Because a large amount of semiconductor devices is carried out to electrical characteristics test, so in the process that repeatedly makes repeatedly probe contact with terminal lead, if because oxide film is attached to the wearing and tearing of probe front or probe front, make to cause the destruction of described oxide film fully not because of front end in contact, must probe front be cleaned or probe is changed.And exceed in the hot environment of 100 DEG C measuring environment temperature, can accelerating oxidation, thus thicker oxide film formed on the surface of probe or terminal lead, and more easily make the oxide film of pruning from terminal lead be attached on probe.Therefore, make probe become unstable with contacting of terminal lead, may increase the occurrence frequency of loose contact.Consequently, there is the problem that necessary probe cleaning interval shortens or the exchange frequency of probe increases.In addition, can produce following problem: if the occurrence frequency of loose contact increases so that the generation quantity of substandard product increases, loose contact product as described above, due to after the processing that reduces contact resistance value, again carry out electrical characteristics test, so the number of times of electrical characteristics test is increased, has reduced test efficiency.
In above-mentioned patent documentation 1,2, the main test taking wafer, as object, except common primary probe, also needs the application specific probe for reducing contact condition.And, be judged to be contact resistance larger in the situation that, need to carry out following operation in order to reduce contact resistance: using power source special to execute the alive while between primary probe and application specific probe, electric current is measured, in the process that makes voltage increase, resistance sharply declines, and is confirmed whether to flow out electric current.Utilizing this operation, confirm the situation that resistance sharply declines, and confirmed to remove after thereby oxide film improves the situation of "on" position to reduce contact resistance, need to carry out following operation: electrical source exchange is become to original electric source for test purposes, the electrical characteristics test specifying.Above-mentioned operation needs complicated step and control, cannot realize efficient the test procedure.
The present invention is that problem in view of the above description and designing obtains.The object of the present invention is to provide the inspection method of following semiconductor device: reduce the cleaning frequency and the replacement frequency that cause because of the surface oxidation of probe, reduce the test frequency again of loose contact product, test efficiency can be improved, thereby high-precision electrical characteristics test can be stably carried out.
The technical scheme that technical solution problem adopts
In the inspection method of the semiconductor device of claim 1, use primary probe and assist probes to measure the electrical characteristics of the semiconductor device with multiple signal terminals, described primary probe for applying electric current and voltage to described semiconductor device in the time carrying out described mensuration, described assist probes for measuring the electric current and voltage that is applied to described semiconductor device in the time carrying out described mensuration, it is characterized in that, comprise: the first operation, in described the first operation, described primary probe and described assist probes are contacted with a described signal terminal of described semiconductor device, and the contact resistance between a described signal terminal and described primary probe and described assist probes is measured, this contact resistance that mensuration is obtained and first reference value threshold, in the time that described contact resistance that mensuration obtains is in described first reference value threshold value, advance to the second operation, in the time that described contact resistance that mensuration obtains is not in described first reference value threshold value, advance to the 3rd operation, the second operation, in described the second operation, measures the electrical characteristics of described semiconductor device, the 3rd operation, in described the 3rd operation, contact resistance between a described signal terminal and described primary probe and described assist probes is measured, this contact resistance that mensuration is obtained and the second reference value threshold, when measuring the contact resistance that obtains in described the 3rd operation in described the second reference value threshold value time, advance to the 4th operation, the 4th operation, in described the 4th operation, according to measure the contact resistance obtaining in described the first operation, determines the benchmark electric energy applying to a described signal terminal via described primary probe and described assist probes, advances to the 5th operation, the 5th operation, in described the 5th operation, will offer a described signal terminal by the determined benchmark electric energy of described the 4th operation via described primary probe and described assist probes, and the 6th operation, in described the 6th operation, contact resistance between a described signal terminal and described primary probe and described assist probes is measured, this contact resistance that mensuration is obtained and first reference value threshold, in the time that described contact resistance that mensuration obtains is in described first reference value threshold value, advance to described the second operation.
In the inspection method of the semiconductor device of claim 2, on the basis of the invention of the claims 1, described first reference value threshold value is 0.1 Ω < Rcon < 1 Ω, and described the second reference value threshold value is 1 Ω≤Rcon <, 10 Ω.
In the inspection method of the semiconductor device of claim 3, described electric energy is 0.01 watt-second to 0.05 watt-second.
In the inspection method of the semiconductor device of claim 4, described electric energy is that power is long-pending with the time that applies this power, applies the time of described power in the scope of 1ms to 10ms.
In the inspection method of the semiconductor device of claim 5, the environment temperature of described electrical characteristics test is to be up to the high-temperature atmosphere of 150 DEG C, has the metal material that easily forms oxide film under this high-temperature atmosphere on the surface of the terminal lead of semiconductor device.
In the inspection method of the semiconductor device of claim 6, in described the 5th operation, about the benchmark electric energy that is applied to a described signal terminal, by make its electric current be definite value and adjust its application time, meet thus the electric energy of described reference value to realize the reduction of contact resistance.
In the inspection method of the semiconductor device of claim 7, in described the 5th operation, about the benchmark electric energy that is applied to a described signal terminal, by make its application time be definite value and adjust its current value, meet thus the electric energy of described reference value to realize the reduction of contact resistance.
In the inspection method of the semiconductor device of claim 8, in the testing fixture of this semiconductor device, use primary probe and assist probes to measure the electrical characteristics of the semiconductor device with multiple signal terminals, described primary probe for applying electric current and voltage to described semiconductor device in the time carrying out described mensuration, described assist probes for measuring the electric current and voltage that is applied to described semiconductor device in the time carrying out described mensuration, use makes described primary probe and described assist probes contact with a described signal terminal of described semiconductor device, and the device that can measure the contact resistance between a described signal terminal and described primary probe and described assist probes, according to the distribution of measuring in advance the multiple described contact resistance value that obtain, taking the higher described contact resistance value of the frequency of occurrences as target, reduce described contact resistance value to obtain the electric energy that meets 0.1 Ω < Rcon < 1 Ω, make this electric energy corresponding with described benchmark electric energy.
In the manufacture method of the semiconductor device of claim 9, use the detection method of above-mentioned semiconductor device.
Invention effect
The inspection method of following semiconductor device can be provided according to the present invention, reduce the cleaning frequency and the replacement frequency that cause because of the surface oxidation of probe, the test frequency again that reduces loose contact product, can improve test efficiency, thereby can stably carry out high-precision electrical characteristics test.
Brief description of the drawings
Fig. 1 is the step process figure of the inspection method for semiconductor device of the present invention is described.
Fig. 2 is the concise and to the point figure of the electrical connection wiring between testing machine (detecting device), probe and the terminal lead of semiconductor device of the inspection method for semiconductor device of the present invention is described.
Fig. 3 is the amplification profile that semiconductor device is installed to the state of electrical characteristics test in socket of semiconductor device (SOP8 pin).
Fig. 4 is the graph of a relation between contact resistance and the load of probe (contact probe) of electrical characteristics involved in the present invention test socket.
Fig. 5 meets the application time of the electric energy that makes contact resistance reduction involved in the present invention and applies the graph of a relation between electric current.
Fig. 6 reduces at contact resistance involved in the present invention the comparison diagram that under the front and back of processing, mensuration environment at 150 DEG C, contact resistance distributes.
Fig. 7 is an example of the contact resistance distribution plan of the terminal lead of semiconductor device involved in the present invention.
Fig. 8 is the step process figure of the inspection method for existing semiconductor device is described.
Fig. 9 is the concise and to the point figure of the electrical connection wiring between testing machine (detecting device), probe and the terminal lead of semiconductor device of the inspection method for existing semiconductor device is described.
Embodiment
Below, with reference to accompanying drawing, the related embodiment of the inspection method of semiconductor device of the present invention is described in detail.In addition, in the explanation and accompanying drawing of following embodiment, identical structure is marked to identical symbol, and omit repeat specification.In addition, only otherwise exceed purport of the present invention, the present invention is not limited in the content that illustrated embodiment records below.
Before the inspection method of explanation semiconductor device of the present invention, the electrical connection first terminal lead using testing machine (detecting device) and semiconductor device as shown in Figure 2 being coupled together connect up shown in concise and to the point figure, describe as the semiconductor device 20 of SOP8 pin of an example of the semiconductor device of inspection object.This semiconductor device 20 has by scolder thickener and joins the patch-type semiconductor components and devices (becoming semi-conductor chip below) in the die pad portion (metal substrate) of aldary to.Separating with this die pad portion and keeping on the position of electric insulating state, being bonded to respectively each 4 at the right and left, amounting to one end of 8 metal terminal leads 21.Between the surface electrode of the semi-conductor chip in this terminal lead 21 and described die pad portion, utilize the wire taking Al as principal ingredient to be connected to be electrically connected.And, have by described semi-conductor chip, die pad portion, wire and the semiconductor device of the package assembly that terminal lead 21 etc. forms and see and have on the whole: in the case of make in order to be connected with outside other terminals of terminal lead 21 (8) respectively draw from the side respectively 4 to outside shape, the mould-forming that utilizes epoxy resin seals and the structure that obtains.In the time that described terminal lead 21 is installed to circuit arrangement, consider and utilize the combination of solder bonds to install, utilize and cover for the good metal film plating of solder wettability.
While the electrical characteristics of semiconductor device 20 being carried out to test determination in test inspection operation, use has the socket 30 of following structure: as shown in Figure 2, one end of wiring is connected to the testing machine 31 (detecting device) being formed by the circuit arrangement etc. of measuring electrical characteristics, and the other end of wiring is connected to the probe of the special saddle portion that the shape different from each specific semiconductor device as shown in Figure 3 match.This socket 30 has probe (primary probe 1, assist probes 2) as shown in Figure 3, and this probe is for contacting with the outside terminal lead-in wire 21 that is arranged on the semiconductor device 20 on the saddle being made up of above-mentioned housing 3,4, to carry out electric test.This private jack 30 has for the saddle of the semiconductor device in socket, with the structure of the probe Elastic Contact of suitable pressure and testing machine one side, wherein, the probe of this testing machine one side contacts with the terminal lead of drawing to outside from semiconductor device.Such private jack has primary probe 1, assist probes 2, this primary probe 1, assist probes 2 is for example probe or the contact probe of cantilevered fashion, the probe of cantilevered fashion is for example, on multiple (8) terminal lead 21 of the semiconductor device 20 on the assigned position that is accommodated in saddle, carry out with suitable pressure the cantilevered cantilevered fashion probe that the mode of Elastic Contact is assembled with the above-below direction from terminal lead 21, contact probe is on multiple terminal leads 21 of the semiconductor device 20 on the assigned position that is accommodated in saddle, the contact probe contacting in mobile in vertical direction mode.That is to say, the probe of these cantilevered fashion, primary probe 1 and assist probes 2 one end separately of contact probe contact respectively at the terminal lead 21 of semiconductor device, and its other end is connected with electrical characteristics testing machine.The probe that existence contacts with a terminal lead 21 is the situation of, also there is the amplification profile of socket 30 of use contact as shown in Figure 3 probe such, the situation that mostly makes a pair of probe being formed by primary probe 1 and assist probes 2 contact to carry out required electrical characteristics test determination with a terminal lead 21 in situation.
Particularly, primary probe 1 is assembled in the lower house 4 of socket 30, and assist probes 2 is assembled in the upper shell 3 of this socket.By upper shell 3 and lower house 4 are moved up and down respectively, thereby can make this socket 30 in opened condition or closure state.And, this socket 30 is in opened condition time, semiconductor device 20 is passed in and out, in the time that this socket 30 is closure state, one end of primary probe 1 and one end of assist probes 2 are contacted with the terminal lead 21 of semiconductor device 20 respectively from upper and lower both direction, and utilization is measured electrical characteristics with the motor characteristic testing machine 31 (detecting device) that the other end of primary probe 1 is connected with the other end of assist probes 2.The shape of the various semiconductor devices different from size and terminal lead quantity matches, and has prepared variform various socket, and these sockets have the primary probe and the assist probes that are configured to varying number.Apply required electric current and voltage to primary probe 1, assist probes 2 is for measuring so that it remains stable the voltage that is applied to primary probe 1, electric current.
[embodiment 1]
, the step of typical detection operation is described with reference to Fig. 1 to the related inventive embodiment of claim 4 as the claim 1 of the inspection method of semiconductor device of the present invention.First, utilize Fig. 2, Fig. 3, the brief configuration of the required fixture of the inspection method of semiconductor device of the present invention and electrical wiring is described.In the following description, for semiconductor device 20, be shaped as representative and give an example to be called as the encapsulation of SOP (SmallOut line Package: small-sized package), but also nonessential be such shape, can be applied to the semiconductor device of various shapes.As long as certainly changed the shape of semiconductor device, will change the shape of socket to measure.
Utilize the Handling device (not shown) that is for example called as executor, to be transported to the private jack 30 of the semiconductor device 20 shown in Fig. 3 as the semiconductor device 20 of object, and be accommodated in the locating of regulation of the private jack 30 of opening-like state.Fig. 3 represent that semiconductor device 20 is accommodated in to private jack and be close upper-lower casing state want portion's amplification profile.Said determination position at private jack 30 is provided with upper shell 3, is assembled in the assist probes 2 of this upper shell 3, lower house 4 and is assembled in the primary probe 1 of this lower house 4.In the time that the upper shell of private jack 30 3 and lower house 4 are closed, each primary probe 1 and assist probes 2 are clamped respectively multiple terminal leads 21 of the semiconductor device 20 locating described in being placed in from above-below direction, and carry out Elastic Contact with suitable load respectively.In addition, location is set by groove or projection, stably semiconductor device is arranged on upper shell 3 and lower house 4 making.In Fig. 3, show utilize be configured in mode opposing upper and lower primary probe 1 and assist probes 2, clamp semiconductor device terminal lead 21 to carry out the state of Elastic Contact.
In the primary probe 1 shown in Fig. 3 and assist probes 2, in order to there are multiple sharp-pointed front ends and to there is good electrically contacting, adopt surface to carry out structure Au plating, that be called as contact probe.The front end of this contact probe is by spring press, produces load according to pressing the length (amount of contraction) that its front end shrinks, by this load by front end by the surface that is pressed in terminal lead 21.The result obtaining after the relation between actual measurement contact resistance and the load of contact probe as shown in Figure 4,, set the amount of contraction that produces this load for following length, so that contact load is approximately 0.1～0.3N and can stably obtains good contact resistance (0.1 Ω left and right).About this contact load, if for example the center contact load as target is made as to 0.2N, even if there is the pressurization deviation of contact probe, also contact load can be limited in the scope of general 0.1～0.3N.Then,, in the step shown in Fig. 1, advance to electrical characteristics the test procedure.
If start electrical characteristics the test procedure, first carry out F1 step.In F1 step, contact condition between the primary probe 1 and the assist probes 2 that are installed on the terminal lead 21 of the semiconductor device 20 in above-mentioned private jack 30 and terminal is connected with testing machine (detecting device) is confirmed, the contact resistance that whether exists surperficial oxide film because being formed at terminal lead 21 etc. to cause is confirmed.For this reason, for the connecting line between the probe shown in Fig. 2 and testing machine 31 (detecting device), transfer relay 35 is worked, make to separate with feedback system sensing terminals 33 paths originally from the wiring of assist probes 2, and it is connected with power ground 34.Meanwhile, make to apply terminal 32 to the routing path of primary probe 1 from starting branch midway from power supply, similarly utilize transfer relay 35, make to be connected with feedback system sensing terminals 33 from the path of primary probe 1.
As shown in above-mentioned example, having used in the desirable contact of contact resistance contact probe (primary probe 1, assist probes 2) and that do not produce because of oxide film etc., as shown in Figure 4 above, if contact load is 0.2N on a contact position, be shown as 0.12 Ω～0.15 Ω left and right as resistance value (contact resistance value).In the socket 30 that used in an embodiment, because primary probe 1 and assist probes 2 become 2 locational contacts, therefore under the envisioned state that there is no oxide film, make contact resistance become the 0.24 Ω～0.30 Ω left and right of 2 times.Herein, exist other contact point to comprise the contact resistance etc. of the side of for example popping one's head in and become the situation of 0.5 Ω left and right, even if but greatly also seldom can exceed again 1 Ω.In order to make as far as possible the contact resistance beyond terminal lead not become problem, preferably use the surface that becomes not oxidizable after Au plating etc. to be used as detecting head surface.
Then, apply terminal 32 by power supply and apply the certain Weak current about 1mA to 10mA, apply the potential difference (PD) producing between terminal 32 and ground terminal 34 according to power supply, obtain the contact resistance between primary probe 1, assist probes 2 and terminal lead 21.In this example, current value is made as to the steady current of 10mA, under this state, measures the voltage producing between primary probe and assist probes to obtain contact resistance Rcon.
Now, according to the Fig. 1 that represents test procedure, when contact resistance Rcon meets common contact resistance, i.e. (situation of "Yes" in F1 step) when 0.1 Ω <Rcon<1 Ω (the first baseline threshold) in F1 step, advance to the common electrical characteristics test procedure of F2 step, the electrical characteristics test of carrying out semiconductor device finishes test afterwards.In the time that contact resistance Rcon does not meet 0.1 Ω <Rcon<1 Ω in F1 step (situation of "No" in F1 step), then advance to F3 step.The more than processing for carrying out in F1 step.In F3 step, in the situation that above-mentioned contact resistance Rcon is below 0.1 Ω (situation of "No" in F3 step), because terminal lead 21 may, because the reason outside anticipation is in short circuit or abnormal low resistance state, therefore advance to the loose contact treatment step of F7.And, even contact resistance Rcon is that 10 Ω are above in the situation that (situation of "No" in F3 step) in F3 step, lead terminal 21 may because of not contact or because of foreign matter occur insulation or in abnormal high resistance state, therefore with above-mentioned situation in the same manner, advance to the loose contact treatment step of F7.In the time that contact resistance meets 1 Ω≤Rcon10 <, 10 Ω (the second baseline threshold) in F3 step (situation of "Yes" in F3 step), consider that contact resistance may become large because of delicate impacts such as the oxide films on terminal lead 21 surfaces, therefore to improve contact condition (reduction contact resistance) in order attempting, to advance to F4 step.
F4 step is the step of determining the condition that contact resistance is reduced and advancing to F5 step afterwards.After F5 step in, the contact resistance between the contact resistance between outside terminal lead 21 and primary probe 1 and outside terminal lead-in wire 21 and assist probes 2 is reduced to processing.The processing like this contact resistance being reduced as shown in Figure 3, at the terminal lead 21 that utilizes primary probe 1 and assist probes 2 to clamp semiconductor device to carry out under the state of Elastic Contact, by current flowing between primary probe 1 and assist probes 2, thereby in the contact portion of primary probe 1 and outside terminal lead-in wire 21 and the contact portion of assist probes 2 and outside terminal lead-in wire 21, apply the electric energy of regulation.By applying such electric energy, can reduce and be formed at the outside terminal impact that the oxide film on 21 surfaces produces the contact resistance between probe (primary probe 1 and assist probes 2) and outside terminal lead-in wire 21 that goes between, can reduce the contact resistance between probe (primary probe 1 and assist probes 2) and outside terminal lead-in wire 21.Therefore, in F4 step, according to the contact resistance value of measuring in F1 step and obtain in advance, for reducing the required electric energy of this contact resistance, determine the electric current that applies in order to produce electric energy and the time applying.
Herein, to describing for the validation test of determining the condition of attempting the contact condition that improves F4 step.That is to say, Fig. 5 shows a following example, and SnAg alloy plated is carried out on the surface of the terminal lead 21 to semiconductor device 20, under the condition that probe is used to contact probe, carries out above-mentioned validation test.Known in this validation test: in the scope of limited application time, by applying the electric current of the electric energy that meets certain grade, thereby to improve contact resistance.Below this validation test is described in detail.
Structure is as follows: on above-mentioned illustrated semiconductor device (SOP8 pin), use the contact probe that company of Ricoh manufactures to contact, the front end of this contact probe is shaped as crown shape, and it was implemented to Au plating, and its diameter is 0.26mm and 0.31mm, in addition, will measure environment set is 18～25 DEG C of room temperatures, contact load is 0.2N, and the current value while obtaining contact resistance is 0.1mA.
Shown in the relation formula described as follows (1) of electric current I, contact resistance Rcon, application time t, electric energy Wt.Obtain a big or small example of the electric energy Wt for improving contact resistance, in the scope of the satisfied electric energy Wt obtaining, for relation between electric current and application time in the situation that voltage is fixing, measured value shown in Figure 5 and the analogue value.Actual measurement to value (△ mark) be roughly consistent taking formula (1) as the result of basic numerical computation (× mark).In Fig. 5, known: make to apply electric current in the scope of 1.0A to 4.0A, actual measurement improves to contact resistance Rcon.If this scope that applies electric current is made as to application time, corresponds respectively to 10ms to 1ms.
If establish electric energy=Power x time=Wt, contact resistance is Rcon, and electric current is I, and application time is t, meets following mathematical expression.
< mathematical expression >
Ｗ·ｔ＝Ｒｃｏｎ×Ｉ
2×ｔ···（1）
Ｉ＝√（Ｗ·ｔ／（Ｒｃｏｎ×ｔ））···（2）
ｔ＝（Ｗ·ｔ／（Ｒｃｏｎ×Ｉ
2））···（3）
In Fig. 5 of this validation test structure of expression, the scope of the application time t that this formula (1) relation is set up is shorter, and the time that test spends is shorter, and efficiency is higher, even therefore in the scope of the application time t of 1ms to 10ms, the short application time of preferably trying one's best.And, within the scope of this application time, from obtained electric current, select the electric current of the condition that meets the electric energy Wt that contact resistance Rcon is improved, but being no more than in the scope of the maximum permissible current capacity being determined by testing machine (detecting device), determine this electric current.
Improve the size of electric energy of contact resistance probably more than 0.01 watt-second, in fact preferably in the scope of 0.01 watt-second to 0.05 watt-second left and right.In the case of the size of electric energy of improving this contact resistance being made as for example 0.01 watt-second, in the time that contact resistance is 1 Ω, in the situation that being 10ms, application time can obtain the steady current of 1A.If the electric energy of above-mentioned scope, though do not provide steady current also can, but also for example as constant voltage current flowing and the mode of the electric energy of regulation is provided.
When try hard to improve contact resistance in F5 step after, advance to F6 step.In F6 step, again apply terminal 32 and apply the Weak current of regulation from power supply, be determined at power supply and apply the voltage being generated by primary probe 1 between terminal and ground connection, again obtain contact resistance according to electric current and magnitude of voltage.In this embodiment, if this contact resistance is reduced in the scope of 0.1 Ω < Rcon < 1 Ω, make transfer relay 35 work, routing path between primary probe 1, assist probes 2 and testing machine (detecting device) 31 is restored to the original state, become primary probe 1 and apply with power supply the state that terminal 32 is connected and assist probes 2 is connected with feedback system sensing terminals 33, carry out required electrical characteristics test.If now contact resistance does not meet the condition of 0.1 Ω < Rcon < 1 Ω, advance to F7 step, process as loose contact product.
In F6 step, do not meet the condition of 0.1 Ω < Rcon < 1 Ω at contact resistance, not process as loose contact product immediately, also can advance to F3 step or F4 step, repeatedly carry out the processing of F4 step and F5 step.In the case, as long as following steps are set:, predetermine the number of times that carries out F5 step, in a series of operation, accumulative total is processed the number of times of F5 step, even also cannot improve contact resistance in the processing of having carried out stipulated number, advances to end operation.
Then, the related embodiment of claim 5 is described.About utilizing the method to improve contact condition, even if at room temperature also certainly possess such effect, but especially measure environment in normal temperature or exceeding room temperature until under the state of 150 DEG C effect better.Consider known from experience: under hot environment, the first-class impact of contact detecting head surface that terminal lead surface is contacted because the oxide film that is oxidized or peels off is attached to, be easy to cause contact resistance to increase, consequently, because this impact causes measuring, to become unsettled situation more.This is that such as terminal lead surface is SnPb alloy, Sn, SnAg alloy, SnAgCu alloy etc., the situation that the metal material of oxidation easily occurs at hot environment lower surface.Therefore, the inspection method of semiconductor device of the present invention is applied to mensuration under hot environment effective especially.Generally, temperature is 100～150 DEG C and is envisioned for hot environment, the present invention can bring into play effect under these circumstances especially.
Fig. 6 is the distribution plan of contact resistance, there is shown at 150 DEG C of hot environments in the distribution of this contact resistance, utilize the embodiment of the inspection method of semiconductor device of the present invention contact condition to be improved to an example of the variation (reduction) of the contact resistance before and after processing.Show after the improvement of contact condition involved in the present invention is processed, distribute and be probably improved as the situation of 400m Ω～900m Ω from the contact resistance of initial 1000m Ω～1500m Ω.
Then, the related embodiment of claim 6 is described.As explained above, in order to improve the required electric energy of contact resistance and electric current, between the time, meet the relation of formula (1).After being out of shape, this formula obtains formula (3).In the improvement of above-mentioned contact resistance is processed, according to this formula (3), applied electric current is made as to certain value, according to measured contact resistance Rcon, application time is increased and decreased to adjustment, to make to apply required electric energy.Can, in the scope of fan-out capability that is no more than the power supply that is installed on testing machine 31 (detecting device) and use, suitably determine the electric current applying.
Then, the related inventive embodiment of claim 7 is described.As explained above, in order to improve the required electric energy of contact resistance and electric current, between the time, meet the relation of formula (1).After being out of shape, this formula obtains formula (2).Therefore, the time applying is made as to definite value, increases and decreases adjustment according to measured contact resistance Rcon to applying electric current, to make to apply required electric energy.Be not limited in application time is increased and decreased, or increase and decrease applying electric current, can suitably select according to the characteristic specifications of the semiconductor device of the structure of testing machine 31 (detecting device) or inspection object.
Then, the related inventive embodiment of claim 8 is described.Fig. 7 shows the actual measurement distribution plan of contact resistance value in semiconductor device.According to Fig. 7, contact resistance is distributed in state from exceeding slightly 1 Ω to being almost the state of 2 Ω, shows especially contact resistance trend and is scattered in and is a bit larger tham that the resistance value of 1 Ω is more and to approach the resistance value of 2 Ω considerably less.Therefore, in the case of the distribution range of this contact resistance, contact resistance is improved according to this distribution range if try hard to, can more effectively improve contact condition.Therefore, will be predicted to be contact resistance value that frequency is the highest according to Fig. 7 as reference value, fixed current and set time are according to the rules decided applying condition, become required value with the electric energy that makes to apply in order to reduce contact resistance.If determine thus applying condition, simplify the decision process of the applying condition required in order to reduce contact resistance, simplify by making to process, even if do not utilize testing machine (detecting device) to carry out computing at every turn, also can try hard to improve contact resistance.Distribute according to the actual measurement of the contact resistance value shown in Fig. 7, obtain the electric energy applying in order to reduce the contact resistance described in embodiment 1, probably set as the situation of 800m Ω to 2000m Ω as target taking contact resistance, thereby try hard to reduce contact resistance value.The present invention is not limited in the embodiment, the Structural Tectonics that have exemplified out, can in the content of purport according to the invention, carry out suitable change to Structural Tectonics, each numerical value.
Then, the related invention of claim 9 is to manufacture semiconductor device by the claims 1 to the related inspection method of claim 8.Manufacture as described above semiconductor device, can shorten the required time that checks, the cheap semiconductor device of consequently can improving price, utilizes inspection method of the present invention to have can to improve the semiconductor device that electrical characteristics are complete and can reduce the effect of the substandard product incidence of semiconductor device.
The present invention does not append special power supply, but uses the simple structure of carrying out the test of electrical characteristics originally, and by the path that utilizes transfer relay to switch assist probes one side, can try hard to reduce thus contact resistance.As recorded in above-mentioned existing patent documentation 1, without such as obtaining the so complicated control of voltage that makes gradually voltage increase and make resistance rapid drawdown, just can improve required effect.Even in the hot test environment that exceedes 100 DEG C, surface alloying layer at terminal lead is more easily oxidized, or in the situation that the oxide film being peeled by it covers, also can be as required, utilize the simple processing that reduces contact resistance to obtain good low resistance contact state.By the good contact condition of long term maintenance, thus make probe front cleaning frequency, cause the replacement cycle of probe (for example contact probe) elongated along with the deterioration of contact condition, can make thus the operation that maintains preferably test become easy.
Label declaration
1: primary probe
2: assist probes
3: upper shell
4: lower house
20: semiconductor device
21: terminal lead
30: socket
31: testing machine
32: power supply applies
33: feedback system sensing
34: power ground
35: transfer relay
Claims (9)
1. the inspection method of a semiconductor device, use primary probe and assist probes to measure the electrical characteristics of the semiconductor device with multiple signal terminals, described primary probe for applying electric current and voltage to described semiconductor device in the time carrying out described mensuration, described assist probes for measuring the electric current and voltage that is applied to described semiconductor device in the time carrying out described mensuration, it is characterized in that, comprising:
The first operation, in described the first operation, described primary probe and described assist probes are contacted with a described signal terminal of described semiconductor device, and the contact resistance between a described signal terminal and described primary probe and described assist probes is measured, this contact resistance that mensuration is obtained and first reference value threshold, in the time that described contact resistance that mensuration obtains is in described first reference value threshold value, advance to the second operation, in the time that described contact resistance that mensuration obtains is not in described first reference value threshold value, advance to the 3rd operation,
The second operation, in described the second operation, measures the electrical characteristics of described semiconductor device;
The 3rd operation, in described the 3rd operation, contact resistance between a described signal terminal and described primary probe and described assist probes is measured, this contact resistance that mensuration is obtained and the second reference value threshold, when measuring the contact resistance that obtains in described the 3rd operation in described the second reference value threshold value time, advance to the 4th operation;
The 4th operation, in described the 4th operation, according to measure the contact resistance obtaining in described the first operation, determines the benchmark electric energy applying to a described signal terminal via described primary probe and described assist probes, advances to the 5th operation;
The 5th operation, in described the 5th operation, will offer a described signal terminal by the determined benchmark electric energy of described the 4th operation via described primary probe and described assist probes, advance to the 6th operation; And
The 6th operation, in described the 6th operation, contact resistance between a described signal terminal and described primary probe and described assist probes is measured, this contact resistance that mensuration is obtained and first reference value threshold, in the time that contact resistance that mensuration obtains is in described first reference value threshold value, advance to the second operation.
2. the inspection method of semiconductor device as claimed in claim 1, it is characterized in that, described first reference value threshold value is 0.1 Ω < Rcon < 1 Ω, and described the second reference value threshold value is 1 Ω≤Rcon <, 10 Ω.
3. the inspection method of semiconductor device as claimed in claim 1 or 2, is characterized in that,
Described electric energy is 0.01 watt-second to 0.05 watt-second.
4. the inspection method of semiconductor device as claimed any one in claims 1 to 3, is characterized in that,
Described electric energy is that power is long-pending with the time that applies this power, applies the time of described power in the scope of 1ms to 10ms.
5. the inspection method of the semiconductor device as described in any one in claim 1 to 4, is characterized in that,
The environment temperature of described electrical characteristics test is to be up to the high-temperature atmosphere of 150 DEG C, has the metal material that easily forms oxide film under this high-temperature atmosphere on the surface of the terminal lead of semiconductor device.
6. the inspection method of the semiconductor device as described in any one in claim 1 to 5, is characterized in that,
In described the 5th operation, about the benchmark electric energy that is applied to a described signal terminal, by make its electric current be definite value and adjust its application time, meet thus the electric energy of described reference value to realize the reduction of contact resistance.
7. the inspection method of semiconductor device as claimed in claim 5, is characterized in that,
In described the 5th operation, about the benchmark electric energy that is applied to a described signal terminal, by make its application time be definite value and adjust its current value, meet thus the electric energy of described reference value to realize the reduction of contact resistance.
8. the inspection method of the semiconductor device as described in any one in claim 1 to 7, is characterized in that,
In the testing fixture of this semiconductor device, use primary probe and assist probes to measure the electrical characteristics of the semiconductor device with multiple signal terminals, described primary probe for applying electric current and voltage to described semiconductor device in the time carrying out described mensuration, described assist probes for measuring the electric current and voltage that is applied to described semiconductor device in the time carrying out described mensuration
The device that use makes described primary probe and described assist probes contact and can measure the contact resistance between a described signal terminal and described primary probe and described assist probes with a described signal terminal of described semiconductor device, according to the distribution of measuring in advance the multiple described contact resistance value that obtain, taking the higher described contact resistance value of the frequency of occurrences as target, reduce described contact resistance value to obtain the electric energy that meets 0.1 Ω < Rcon < 1 Ω, make this electric energy corresponding with described benchmark electric energy.
9. a manufacture method for semiconductor device, is characterized in that,
Right to use requires the detection method of the semiconductor device that in 1 to 8, any one is recorded.
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| JP2013056593A JP6155725B2 (en) | 2013-03-19 | 2013-03-19 | Semiconductor device inspection method and semiconductor device manufacturing method using the same |
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| JP2014182005A (en) | 2014-09-29 |
| JP6155725B2 (en) | 2017-07-05 |
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