CN104050215B - 清除和重建相关性的系统和方法 - Google Patents

清除和重建相关性的系统和方法 Download PDF

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Publication number
CN104050215B
CN104050215B CN201410091598.XA CN201410091598A CN104050215B CN 104050215 B CN104050215 B CN 104050215B CN 201410091598 A CN201410091598 A CN 201410091598A CN 104050215 B CN104050215 B CN 104050215B
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value
data processing
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CN104050215A (zh
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R.延加
S.K.杜贝
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858—Result writeback, i.e. updating the architectural state or memory
    • G06F9/38585—Result writeback, i.e. updating the architectural state or memory with result invalidation, e.g. nullification

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
CN201410091598.XA 2013-03-14 2014-03-13 清除和重建相关性的系统和方法 Expired - Fee Related CN104050215B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/831,434 2013-03-14
US13/831,434 US9400653B2 (en) 2013-03-14 2013-03-14 System and method to clear and rebuild dependencies

Publications (2)

Publication Number Publication Date
CN104050215A CN104050215A (zh) 2014-09-17
CN104050215B true CN104050215B (zh) 2019-04-09

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Country Link
US (2) US9400653B2 (https=)
JP (2) JP6320801B2 (https=)
KR (1) KR102010312B1 (https=)
CN (1) CN104050215B (https=)
DE (1) DE102014103188A1 (https=)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10198263B2 (en) 2015-09-19 2019-02-05 Microsoft Technology Licensing, Llc Write nullification
US11681531B2 (en) 2015-09-19 2023-06-20 Microsoft Technology Licensing, Llc Generation and use of memory access instruction order encodings
US10180840B2 (en) * 2015-09-19 2019-01-15 Microsoft Technology Licensing, Llc Dynamic generation of null instructions
US10031756B2 (en) 2015-09-19 2018-07-24 Microsoft Technology Licensing, Llc Multi-nullification
US10061584B2 (en) 2015-09-19 2018-08-28 Microsoft Technology Licensing, Llc Store nullification in the target field
US10185568B2 (en) * 2016-04-22 2019-01-22 Microsoft Technology Licensing, Llc Annotation logic for dynamic instruction lookahead distance determination
US11474821B1 (en) * 2021-05-12 2022-10-18 International Business Machines Corporation Processor dependency-aware instruction execution

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CN101542430A (zh) * 2006-09-29 2009-09-23 Mips技术公司 用于处理器的加载/存储单元及其应用
CN102110024A (zh) * 2009-12-23 2011-06-29 英特尔公司 将计数值分配给在多核处理器上执行的任务
CN102282542A (zh) * 2008-10-14 2011-12-14 奇托尔·V·斯里尼瓦桑 对于多核芯片建立正式验证的并行软件的ticc-范例
WO2012045941A1 (fr) * 2010-10-07 2012-04-12 Commissariat A L'energie Atomique Et Aux Energies Alternatives Systeme d'ordonnancement de l'exécution de taches cadence par un temps logique vectoriel
CN102934076A (zh) * 2010-06-11 2013-02-13 松下电器产业株式会社 指令发行控制装置以及方法

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US6334182B2 (en) 1998-08-18 2001-12-25 Intel Corp Scheduling operations using a dependency matrix
US6311266B1 (en) 1998-12-23 2001-10-30 Cray Inc. Instruction look-ahead system and hardware
US6557095B1 (en) 1999-12-27 2003-04-29 Intel Corporation Scheduling operations using a dependency matrix
JP2003519833A (ja) 2000-01-03 2003-06-24 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド 依存性連鎖の発行および再発行が可能なスケジューラ
US6877086B1 (en) 2000-11-02 2005-04-05 Intel Corporation Method and apparatus for rescheduling multiple micro-operations in a processor using a replay queue and a counter
US6981129B1 (en) 2000-11-02 2005-12-27 Intel Corporation Breaking replay dependency loops in a processor using a rescheduled replay queue
US6950927B1 (en) 2001-04-13 2005-09-27 The United States Of America As Represented By The Secretary Of The Navy System and method for instruction-level parallelism in a programmable multiple network processor environment
JP2007029421A (ja) 2005-07-27 2007-02-08 Aruze Corp 遊技機及び遊技システム
US20070043932A1 (en) 2005-08-22 2007-02-22 Intel Corporation Wakeup mechanisms for schedulers
CN101258469B (zh) 2005-09-05 2010-09-15 日本电气株式会社 信息处理设备
US8291431B2 (en) 2006-08-29 2012-10-16 Qualcomm Incorporated Dependent instruction thread scheduling
US8099582B2 (en) 2009-03-24 2012-01-17 International Business Machines Corporation Tracking deallocated load instructions using a dependence matrix
US8959517B2 (en) 2009-06-10 2015-02-17 Microsoft Corporation Cancellation mechanism for cancellable tasks including stolen task and descendent of stolen tasks from the cancellable taskgroup
US20120023314A1 (en) 2010-07-21 2012-01-26 Crum Matthew M Paired execution scheduling of dependent micro-operations

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CN101542430A (zh) * 2006-09-29 2009-09-23 Mips技术公司 用于处理器的加载/存储单元及其应用
CN102282542A (zh) * 2008-10-14 2011-12-14 奇托尔·V·斯里尼瓦桑 对于多核芯片建立正式验证的并行软件的ticc-范例
CN102110024A (zh) * 2009-12-23 2011-06-29 英特尔公司 将计数值分配给在多核处理器上执行的任务
CN102934076A (zh) * 2010-06-11 2013-02-13 松下电器产业株式会社 指令发行控制装置以及方法
WO2012045941A1 (fr) * 2010-10-07 2012-04-12 Commissariat A L'energie Atomique Et Aux Energies Alternatives Systeme d'ordonnancement de l'exécution de taches cadence par un temps logique vectoriel

Also Published As

Publication number Publication date
DE102014103188A1 (de) 2014-09-18
US20140281404A1 (en) 2014-09-18
JP6320801B2 (ja) 2018-05-09
US20160321079A1 (en) 2016-11-03
US9400653B2 (en) 2016-07-26
JP2018106760A (ja) 2018-07-05
CN104050215A (zh) 2014-09-17
KR102010312B1 (ko) 2019-08-13
US10552157B2 (en) 2020-02-04
JP2014179101A (ja) 2014-09-25
JP6604689B2 (ja) 2019-11-13
KR20140113304A (ko) 2014-09-24

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