CN104038251B - A kind of conversion equipment for connecting PTN device and FSO equipment - Google Patents
A kind of conversion equipment for connecting PTN device and FSO equipment Download PDFInfo
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- CN104038251B CN104038251B CN201410226174.XA CN201410226174A CN104038251B CN 104038251 B CN104038251 B CN 104038251B CN 201410226174 A CN201410226174 A CN 201410226174A CN 104038251 B CN104038251 B CN 104038251B
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Abstract
The present embodiments relate to communication technical field, disclose a kind of conversion equipment for connecting PTN device and FSO equipment, this conversion equipment includes GE optical interface module, FSO non-standard optical interface module, first physical chip, second physical chip and signal processing module, wherein GE optical interface module connects the first physical chip, first physical chip connects signal processing module, signal processing module connects the second physical chip, second physical chip connects FSO non-standard optical interface module, GE optical interface module is used for connecting PTN device, FSO non-standard optical interface module is used for connecting FSO equipment.The FSO equipment that the enforcement embodiment of the present invention can make PTN device and operator currently used is connected, it is achieved that the interconnection of PTN device under the conditions of non-fiber, and maintains the synchronization of clock in whole transmission network.
Description
Technical field
The present invention relates to communication technical field, be specifically related to one and set with FSO for connecting PTN device
Standby conversion equipment.
Background technology
Along with the fast development of the communication technology, various communication services progressively change development towards " ALL IP ",
And PTN (Packet Transport Network, Packet Transport Network) equipment has become operator for building
The capital equipment of 4G LTE (Long Term Evolution, Long Term Evolution) network, mutual between PTN device
Connection can realize by laying optical cable.In actual process of construction, some as history relic protection zone,
Completed bustling district etc. cannot lay place and the short-term such as river, newly-built community of optical cable for a long time
Cannot lay the place of optical cable, cannot lay due to optical cable and put in place, operator cannot build new site and open
Logical new business and cannot build PTN loop, fiber break this may result in major part website cannot be normal
The problem of communication.To this end, operator uses microwave and FSO (Free Space Optical, free space optical
Communication) equipment realize under the conditions of non-fiber PTN device interconnection, owing to PTN device uses GE
(Gigabit Ethernet, gigabit Ethernet) interface, and what the FSO equipment that operator uses at present used
Being FE (Fast Ethernet) interface, this makes FSO equipment cannot be attached with PTN device, and then
The PTN device interconnection under the conditions of non-fiber cannot be realized.
Summary of the invention
The embodiment of the invention discloses a kind of conversion equipment for connecting PTN device and FSO equipment, be used for
Solve prior art causes because FSO equipment cannot be connected with PTN device under the conditions of non-fiber
The problem that PTN device can not interconnect.
The embodiment of the invention discloses a kind of conversion equipment for connecting PTN device and FSO equipment, including
GE optical interface module, FSO non-standard optical interface module, the first physical chip, the second physical chip
And signal processing module, wherein:
Described GE optical interface module connects described first physical chip, and described first physical chip connects
Described signal processing module, described signal processing module described second physical chip of connection, described second
Physical chip connects described FSO non-standard optical interface module, and described GE optical interface module is used for connecting
PTN device, described FSO non-standard optical interface module is used for connecting FSO equipment, described GE optical interface module
Be additionally operable to receive the GE optical signal that described PTN device sends, described GE optical signal is carried out opto-electronic conversion with
Generate differential electric signal and described differential electric signal is sent extremely described first physical chip, described first
Physical chip for carrying out clock and data recovery to generate the circuit of first frequency to described differential electric signal
The line clock of described first frequency is also sent to described signal processing module by clock signal, described
When signal processing module for being converted into the circuit of second frequency by the line clock of described first frequency
Clock signal, completes the jitter smoothing of line clock to described second frequency to generate the of low jitter
The line clock of the second frequency of described low jitter is also sent to institute by the line clock of two frequencies
State the second physical chip using the tranmitting data register as described second physical chip, described first physical layer
Chip is additionally operable to the data-signal in described differential electric signal is decoded the data after processing and processing
Signal sends to described signal processing module, and described signal processing module is additionally operable to the number after described process
The number of it is believed that carry out checking treatment and correct data-signal is divided into the first packet of carry data signals with
And the second packet of carrying clock signal, described signal processing module is additionally operable to described first packet
It is converted into the parallel data stream of the first transfer rate and described second packet is converted into described first transmission
Second packet of speed, described signal processing module is additionally operable to the also line number of described first transfer rate
Send to described second physical chip according to the second packet of stream and described first transfer rate, described
Second physical chip is for sending to described FSO nonstandard by the parallel data stream of described first transfer rate
Quasi-optical interface module, described FSO non-standard optical interface module is for by the also line number of described first transfer rate
Electro-optic conversion is carried out to generate FSO optical signal and the transmission of described FSO optical signal is set to described FSO according to stream
Standby.
In the embodiment of the present invention, this conversion equipment includes GE optical interface module, FSO non-standard optical interface mould
Block, the first physical chip, the second physical chip and signal processing module, wherein GE optical interface mould
Block connects the first physical chip, and the first physical chip connects signal processing module, signal processing module
Connecting the second physical chip, the second physical chip connects FSO non-standard optical interface module, and GE light connects
Mouth die block is used for connecting PTN device, and FSO non-standard optical interface module is used for connecting FSO equipment.Implement this
The FSO equipment that inventive embodiments can make PTN device and operator currently used is connected, it is achieved that non-fiber
Under the conditions of the interconnection of PTN device, and maintain the synchronization of clock in whole transmission network.
Accompanying drawing explanation
For the technical scheme being illustrated more clearly that in the embodiment of the present invention, below will be to required in embodiment
Accompanying drawing to be used is briefly described, it should be apparent that, the accompanying drawing in describing below is only the present invention
Some embodiments, for those of ordinary skill in the art, in the premise not paying creative work
Under, it is also possible to other accompanying drawing is obtained according to these accompanying drawings.
Fig. 1 is a kind of conversion equipment for connecting PTN device and FSO equipment disclosed in the embodiment of the present invention
Structural representation;
Fig. 2 is the another kind of conversion dress for connecting PTN device and FSO equipment disclosed in the embodiment of the present invention
The structural representation put.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out
Clearly and completely describe, it is clear that described embodiment is only a part of embodiment of the present invention, and
It is not all, of embodiment.Based on the embodiment in the present invention, those of ordinary skill in the art are not doing
Go out the every other embodiment obtained under creative work premise, broadly fall into the scope of protection of the invention.
The embodiment of the invention discloses a kind of conversion equipment for connecting PTN device and FSO equipment, it is possible to
The FSO equipment making PTN device and operator currently used is connected, it is achieved that the PTN under the conditions of non-fiber sets
Standby interconnection, and maintain the synchronization of clock in whole transmission network.
It is a kind of for connecting PTN device and FSO equipment disclosed in the embodiment of the present invention for referring to Fig. 1, Fig. 1
The structural representation of conversion equipment.As it is shown in figure 1, this conversion equipment 100 include GE optical interface module 101,
First physical chip 102, signal processing module the 103, second physical chip 104 and FSO are non-standard
Optical interface module 105, wherein:
GE optical interface module 101 connects the first physical chip 102, and the first physical chip 102 connects signal
Processing module 103, signal processing module 103 connects the second physical chip 104, the second physical chip 104
Connecting FSO non-standard optical interface module 105, GE optical interface module 101 is used for connecting PTN device, FSO
Non-standard optical interface module 105 is used for connecting FSO equipment, and GE optical interface module 101 is additionally operable to receive PTN
The GE optical signal that equipment sends, carries out opto-electronic conversion to generate differential electric signal and by difference by GE optical signal
The signal of telecommunication sends to the first physical chip 102, and the first physical chip 102 is for entering differential electric signal
Row clock data are recovered the line clock to generate first frequency and are believed by the line clock of first frequency
Number sending to signal processing module 103, signal processing module 103 is for believing the line clock of first frequency
Number it is converted into the line clock of second frequency, completes the shake of the line clock to second frequency
The line clock of the smooth second frequency to generate low jitter by the circuit of the second frequency of low jitter
Clock signal sends to the second physical chip 104 using the tranmitting data register as the second physical chip 104,
First physical chip 102 is additionally operable to the data-signal in differential electric signal is carried out 8B/10B decoding process
And the data-signal after processing sends to signal processing module 103, it is right that signal processing module 103 is additionally operable to
Data-signal after process carries out checking treatment and correct data-signal is divided into the of carry data signals
One packet and the second packet of carrying clock signal, signal processing module 103 is additionally operable to the first number
It is converted into the parallel data stream of the first transfer rate according to bag and the second packet is converted into the first transfer rate
The second packet, signal processing module 103 is additionally operable to the parallel data stream and of the first transfer rate
Second packet of one transfer rate sends to the second physical chip 104, and the second physical chip 104 is used
In sending the parallel data stream of the first transfer rate to FSO non-standard optical interface module 105, FSO is nonstandard
Quasi-optical interface module 105 is for carrying out electro-optic conversion to generate FSO by the parallel data stream of the first transfer rate
Optical signal also sends FSO optical signal to FSO equipment.
Optionally, first frequency is 62.5MHz.
Optionally, second frequency is 25MHz.
Optionally, the first transfer rate is 250Mbps.
In the embodiment of the present invention, in conversion equipment 100 as shown in Figure 1, the flow direction of signal includes that GE light connects
Mouth die block 101 → the first physical chip 102 → signal processing module 103 → the second physical chip 104 →
Non-standard optical interface module 105 → the second physical chip 104 of FSO non-standard optical interface module 105 and FSO
→ signal processing module 103 → the first physical chip 102 → GE optical interface module 101, i.e. the flow direction of signal
It is two-way, when the flow direction of signal is FSO non-standard optical interface module 105 → the second physical chip 104
→ signal processing module 103 → the first physical chip 102 → GE optical interface module 101, its general principle
For: FSO non-standard optical interface module 105 is additionally operable to receive the FSO optical signal that FSO equipment sends, by FSO
Optical signal carries out opto-electronic conversion to generate differential electric signal and to send differential electric signal to the second physical layer core
Sheet 104, the second physical chip 104 is for carrying out clock and data recovery to generate second to differential electric signal
The line clock of second frequency is also sent to signal processing module 103 by the line clock of frequency,
When signal processing module 103 for being converted into the circuit of first frequency by the line clock of second frequency
Clock signal, completes the jitter smoothing of the line clock to first frequency to generate the first frequency of low jitter
The line clock of the first frequency of low jitter is also sent to the first physical layer by the line clock of rate
Chip 102 is using the tranmitting data register as the first physical chip 102, and it is right that the second physical chip 104 is additionally operable to
The data-signal that data-signal in differential electric signal is decoded after processing and processing sends to signal
Reason module 103, signal processing module 103 is additionally operable to the data-signal after processing carries out checking treatment and incites somebody to action
Correct data-signal is divided into the first packet of carry data signals and the second number of carrying clock signal
According to bag, signal processing module 103 is additionally operable to be converted into the first packet the parallel data of the second transfer rate
Flowing and be converted into by the second packet the second packet of the second transfer rate, signal processing module 103 is also used
In the parallel data stream of the second transfer rate and the second packet of the second transfer rate are sent to first
Physical chip 102, the first physical chip 102 is for sending the parallel data stream of the second transfer rate
To GE optical interface module 101, GE optical interface module 101 is for flowing to the parallel data of the second transfer rate
Row electro-optic conversion is to generate GE optical signal and GE optical signal is sent to PTN device.
Optionally, the second transfer rate is 1250Mbps.
The FSO equipment that the enforcement embodiment of the present invention can make PTN device and operator currently used is connected, real
Show the interconnection of PTN device under the conditions of non-fiber, and maintain the synchronization of clock in whole transmission network.
Referring to Fig. 2, Fig. 2 is that disclosed in the embodiment of the present invention, another kind sets with FSO for connecting PTN device
The structural representation of standby conversion equipment.As in figure 2 it is shown, this conversion equipment 200 can include GE optical interface
Module the 201, first physical chip 202, signal processing module the 203, second physical chip 204 and
FSO non-standard optical interface module 205, wherein:
GE optical interface module 201 connects the first physical chip 202, and the first physical chip 202 connects signal
Processing module 203, signal processing module 203 connects the second physical chip 204, the second physical chip 204
Connecting FSO non-standard optical interface module 205, GE optical interface module 201 is used for connecting PTN device, FSO
Non-standard optical interface module 205 is used for connecting FSO equipment, and GE optical interface module 201 is additionally operable to receive PTN
The GE optical signal that equipment sends, carries out opto-electronic conversion to generate differential electric signal and by difference by GE optical signal
The signal of telecommunication sends to the first physical chip 202, and the first physical chip 202 is for entering differential electric signal
Row clock data are recovered the line clock to generate first frequency and are believed by the line clock of first frequency
Number sending to signal processing module 203, signal processing module 203 is for believing the line clock of first frequency
Number it is converted into the line clock of second frequency, completes the shake of the line clock to second frequency
The line clock of the smooth second frequency to generate low jitter by the circuit of the second frequency of low jitter
Clock signal sends to the second physical chip 204 using the tranmitting data register as the second physical chip 204,
First physical chip 202 is additionally operable to the data-signal in differential electric signal is carried out 8B/10B decoding process
And the data-signal after processing sends to signal processing module 203, it is right that signal processing module 203 is additionally operable to
Data-signal after process carries out checking treatment and correct data-signal is divided into the of carry data signals
One packet and the second packet of carrying clock signal, signal processing module 203 is additionally operable to the first number
It is converted into the parallel data stream of the first transfer rate according to bag and the second packet is converted into the first transfer rate
The second packet, signal processing module 203 is additionally operable to the parallel data stream and of the first transfer rate
Second packet of one transfer rate sends to the second physical chip 204, and the second physical chip 204 is used
In sending the parallel data stream of the first transfer rate to FSO non-standard optical interface module 205, FSO is nonstandard
Quasi-optical interface module 205 is for carrying out electro-optic conversion to generate FSO by the parallel data stream of the first transfer rate
Optical signal also sends FSO optical signal to FSO equipment.
As the optional embodiment of one, signal processing module 203 includes field programmable gate array
2031, analog pll circuit 2032, Double Data Rate synchronous DRAM 2033 and first in first out
Data buffer 2034, wherein:
First end of field programmable gate array 2031 connects the first end of the first physical chip 202, on-the-spot
Second end of programmable gate array 2031 connects the first of Double Data Rate synchronous DRAM 2033
End, the first end of the three-terminal link analog pll circuit 2032 of field programmable gate array 2031, on-the-spot
4th end of programmable gate array 2031 connects the first end of the second physical chip 204, field programmable gate
5th end of array 2031 connects the first end of first in first out data buffer 2034, analog pll circuit
Second end of 2032 connects the second end of the second physical chip 204, and Double Data Rate synchronous dynamic random stores
Second end of device 2033 connects the second end of first in first out data buffer 2034, the first physical chip 202
Second end connect GE optical interface module 201 the first end, the three-terminal link of the second physical chip 204
First end of FSO non-standard optical interface module 205, the second end of GE optical interface module 201 is used for connecting
PTN device, the second end of FSO non-standard optical interface module 205 is used for connecting FSO equipment, and scene can be compiled
The line clock of the first frequency that journey gate array 2031 sends for reception the first physical chip 202,
The line clock of first frequency is converted into the line clock of second frequency and by second frequency
Line clock sends to analog pll circuit 2032, and analog pll circuit 2032 has been used for second
The jitter smoothing of the line clock of frequency is to generate the line clock of the second frequency of low jitter also
The line clock of the second frequency of low jitter is sent to the second physical chip 204 using as second
The tranmitting data register of physical chip 204, field programmable gate array 2031 is additionally operable to receive the first physical layer core
Sheet 202 is by the data-signal after the process of the Gigabit Media stand-alone interface transmission simplified, after processing
Data-signal carries out checking treatment and correct data-signal is divided into the first packet of carry data signals
And the second packet of carrying clock signal, field programmable gate array 2031 is additionally operable to the first data
Bag stores in Double Data Rate synchronous DRAM 2033 with the speed of the 3rd frequency, first in first out
Data buffer 2034 is used for the speed with the 3rd frequency from Double Data Rate synchronous DRAM 2033
Reading the first packet, field programmable gate array 2031 is additionally operable to the speed with second frequency from advanced person first
Go out and data buffer 2034 reads the first packet, be the first transfer rate by the first data packet coding
Second packet is also converted into the second packet of the first transfer rate by parallel data stream, field-programmable
Gate array 2031 is additionally operable to the second number of the parallel data stream by the first transfer rate and the first transfer rate
Send to the second physical chip 204 according to bag.
As the optional embodiment of one, GE optical interface module 201 includes the first optical module 2011, wherein:
First end of the first optical module 2011 connects the second end of the first physical chip 202, the first optical module
Second end of 2011 is used for connecting PTN device, and the first optical module 2011 is for the GE optical signal that will receive
Carry out opto-electronic conversion to generate differential electric signal and to send differential electric signal to the first physical chip 202.
As the optional embodiment of one, FSO non-standard optical interface module 205 includes the second optical module
2051, wherein:
First end of the second optical module 2051 connects the 3rd end of the second physical chip 204, the second optical module
Second end of 2051 is used for connecting FSO equipment, and the second optical module 2051 is for receiving the second physical chip
The parallel data stream of 204 the first transfer rates sent, carries out electricity by the parallel data stream of the first transfer rate
Light conversion is to generate FSO optical signal and to send FSO optical signal to FSO equipment.
Optionally, first frequency is 62.5MHz.
Optionally, second frequency is 25MHz.
Optionally, the 3rd frequency is 125MHz.
Optionally, the first transfer rate is 250Mbps.
When the flow direction of signal is FSO non-standard optical interface module 205 → the second physical chip 204 → signal
During processing module 203 → the first physical chip 202 → GE optical interface module 201, analog pll circuit 2032
The 3rd end of three-terminal link the first physical chip, and its general principle is:
Second optical module 2051 of FSO non-standard optical interface module 205 is additionally operable to receive what FSO equipment sent
FSO optical signal, carries out opto-electronic conversion to generate differential electric signal and differential electric signal to be sent out by FSO optical signal
Delivering to the second physical chip 204, the second physical chip 204 is for carrying out clock number to differential electric signal
Send extremely according to the line clock recovered to generate second frequency and by the line clock of second frequency
Field programmable gate array 2031, field programmable gate array 2031 is for by the line clock of second frequency
Signal is converted into the line clock of first frequency, completes trembling of the line clock to first frequency
Move the line clock of the smooth first frequency to generate low jitter and by the line of the first frequency of low jitter
Road clock signal sends to the first physical chip 202 using during as the transmission of the first physical chip 202
Clock, the second physical chip 204 is additionally operable to be decoded the data-signal in differential electric signal processing and inciting somebody to action
Data-signal after process is sent to field programmable gate array 2031 by medium independent interface, and scene can
Programming gate array 2031 is additionally operable to the data-signal after processing carry out checking treatment and by correct data letter
Number being divided into the first packet and second packet of carrying clock signal of carry data signals, scene can
Programming gate array 2031 is additionally operable to the speed of second frequency, the first packet is stored first in first out data
In buffer 2034, Double Data Rate synchronous DRAM 2033 for the speed of the 3rd frequency from
Reading the first packet in first in first out data buffer 2034, field programmable gate array 2031 is additionally operable to
From Double Data Rate synchronous DRAM 2033, the first packet is read with the speed of the 3rd frequency,
By parallel data stream that the first data packet coding is the second transfer rate and the second packet is converted into second
Second packet of transfer rate, field programmable gate array 2031 is additionally operable to by the second transfer rate also
Second packet of row data stream and the second transfer rate sends to the first physical chip 202, the first thing
Reason layer chip 202 is for sending the parallel data stream of the second transfer rate to GE optical interface module 201, GE
Optical interface module 201 is for carrying out electro-optic conversion to generate GE light by the parallel data stream of the second transfer rate
Signal also sends GE optical signal to PTN device.
Optionally, the second transfer rate is 1250Mbps.
The FSO equipment that the enforcement embodiment of the present invention can make PTN device and operator currently used is connected, real
Show the interconnection of PTN device under the conditions of non-fiber, and maintain the synchronization of clock in whole transmission network.
One of ordinary skill in the art will appreciate that all or part of step in the various methods of above-described embodiment
Suddenly the program that can be by completes to instruct relevant hardware, and this program can be stored in computer-readable
In storage medium, storage medium may include that flash disk, read-only storage (Read-Only Memory,
ROM), random access device (Random Access Memory, RAM), disk or CD etc..
A kind of conversion for connecting PTN device and FSO the equipment above embodiment of the present invention provided
Device is described in detail, and principle and the embodiment of the present invention are entered by instantiation used herein
Having gone elaboration, the explanation of above example is only intended to help to understand method and the core concept thereof of the present invention;
Simultaneously for one of ordinary skill in the art, according to the thought of the present invention, in detailed description of the invention and
All will change in range of application, in sum, this specification content should not be construed as the present invention
Restriction.
Claims (8)
1. one kind is used for the conversion equipment connecting PTN device with FSO equipment, it is characterised in that include GE
Optical interface module, FSO non-standard optical interface module, the first physical chip, the second physical chip and
Signal processing module, wherein:
Described GE optical interface module connects described first physical chip, and described first physical chip connects
Described signal processing module, described signal processing module described second physical chip of connection, described second
Physical chip connects described FSO non-standard optical interface module, and described GE optical interface module is used for connecting
PTN device, described FSO non-standard optical interface module is used for connecting FSO equipment, described GE optical interface module
Be additionally operable to receive the GE optical signal that described PTN device sends, described GE optical signal is carried out opto-electronic conversion with
Generate differential electric signal and described differential electric signal is sent extremely described first physical chip, described first
Physical chip for carrying out clock and data recovery to generate the circuit of first frequency to described differential electric signal
The line clock of described first frequency is also sent to described signal processing module by clock signal, described
When signal processing module for being converted into the circuit of second frequency by the line clock of described first frequency
Clock signal, completes the jitter smoothing of line clock to described second frequency to generate the of low jitter
The line clock of the second frequency of described low jitter is also sent to institute by the line clock of two frequencies
State the second physical chip using the tranmitting data register as described second physical chip, described first physical layer
Chip is additionally operable to the data-signal in described differential electric signal is decoded the data after processing and processing
Signal sends to described signal processing module, and described signal processing module is additionally operable to the number after described process
The number of it is believed that carry out checking treatment and correct data-signal is divided into the first packet of carry data signals with
And the second packet of carrying clock signal, described signal processing module is additionally operable to described first packet
It is converted into the parallel data stream of the first transfer rate and described second packet is converted into described first transmission
Second packet of speed, described signal processing module is additionally operable to the also line number of described first transfer rate
Send to described second physical chip according to the second packet of stream and described first transfer rate, described
Second physical chip is for sending to described FSO nonstandard by the parallel data stream of described first transfer rate
Quasi-optical interface module, described FSO non-standard optical interface module is for by the also line number of described first transfer rate
Electro-optic conversion is carried out to generate FSO optical signal and the transmission of described FSO optical signal is set to described FSO according to stream
Standby.
Device the most according to claim 1, it is characterised in that described signal processing module includes existing
Field programmable gate array, Double Data Rate synchronous DRAM, first in first out data buffer and
Analog pll circuit, wherein:
First end of described field programmable gate array connects the first end of described first physical chip, institute
The second end stating field programmable gate array connects the first of described Double Data Rate synchronous DRAM
Holding, described in the three-terminal link of described field programmable gate array, the first end of analog pll circuit, described
4th end of field programmable gate array connects the first end of described second physical chip, and described scene can
5th end of programming gate array connects the first end of described first in first out data buffer, and described simulation is phase-locked
Loop second end connect described second physical chip the second end, described Double Data Rate synchronous dynamic with
Second end of machine memory connects the second end of described first in first out data buffer, described first physical layer
Second end of chip connects the first end of described GE optical interface module, the 3rd of described second physical chip
End connects the first end of described FSO non-standard optical interface module, and the second end of described GE optical interface module is used
In connecting described PTN device, the second end of described FSO non-standard optical interface module is used for connecting described FSO
Equipment, described field programmable gate array is for receiving described the first of described first physical chip transmission
The line clock of frequency, is converted into the line of second frequency by the line clock of described first frequency
The line clock of described second frequency is also sent to described analog pll circuit, institute by road clock signal
State analog pll circuit for completing the jitter smoothing of the line clock to described second frequency to generate
The line clock of the second frequency of described low jitter during by the circuit of the second frequency of described low jitter
Clock signal sends to described second physical chip using the tranmitting data register as described second physical chip,
Described field programmable gate array is additionally operable to receive described first physical chip and is situated between by the gigabit simplified
Data-signal after the described process that matter stand-alone interface sends, carries out school to the data-signal after described process
When testing described first packet and the carrying processing and being divided into by correct data-signal carry data signals
Described second packet of clock signal, described field programmable gate array is additionally operable to described first packet
Store in described Double Data Rate synchronous DRAM with the speed of the 3rd frequency, described advanced first
Go out data buffer for storing from described Double Data Rate synchronous dynamic random with the speed of described 3rd frequency
Device reads described first packet, and described field programmable gate array is additionally operable to the speed of described second frequency
Rate reads described first packet from described first in first out data buffer, is compiled by described first packet
Code is the parallel data stream of the first transfer rate and described second packet is converted into described first transmission speed
Second packet of rate, it is parallel that described field programmable gate array is additionally operable to described first transfer rate
Second packet of data stream and described first transfer rate sends to described second physical chip.
Device the most according to claim 1, it is characterised in that described GE optical interface module includes
One optical module, wherein:
Second end of the first end described first physical chip of connection of described first optical module, described first
Second end of optical module is used for connecting described PTN device, and described first optical module is described in will receive
GE optical signal carries out opto-electronic conversion to generate described differential electric signal and to send described differential electric signal to institute
State the first physical chip.
Device the most according to claim 1, it is characterised in that described FSO non-standard optical interface module
Including the second optical module, wherein:
3rd end of the first end described second physical chip of connection of described second optical module, described second
Second end of optical module is used for connecting described FSO equipment, and described second optical module is used for receiving described second thing
The parallel data stream of described first transfer rate that reason layer chip sends, by described first transfer rate also
Row data flow to row electro-optic conversion to generate described FSO optical signal and to send described FSO optical signal to institute
State FSO equipment.
5. according to the device described in any one of Claims 1 to 4, it is characterised in that described first frequency is
62.5MHz。
6. according to the device described in any one of Claims 1 to 4, it is characterised in that described second frequency is
25MHz。
Device the most according to claim 2, it is characterised in that described 3rd frequency is 125MHz.
8. according to the device described in any one of Claims 1 to 4, it is characterised in that described first transmission speed
Rate is 250Mbps.
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1283903A (en) * | 1999-08-05 | 2001-02-14 | 三星电子株式会社 | Optical receiver having no relation to bit rate, and receiving method thereof |
CN101383786A (en) * | 2008-07-07 | 2009-03-11 | 深圳市共进电子有限公司 | Method for implementing data interchange between optical network terminal and customer terminal using household gateway |
CN101907649A (en) * | 2010-07-07 | 2010-12-08 | 中国电力科学研究院 | FPGA-based sample data interface circuit for electronic mutual inductor |
CN102904706A (en) * | 2012-09-26 | 2013-01-30 | 烽火通信科技股份有限公司 | Device and method for synchronizing system frequency in packet transport network |
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2014
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1283903A (en) * | 1999-08-05 | 2001-02-14 | 三星电子株式会社 | Optical receiver having no relation to bit rate, and receiving method thereof |
CN101383786A (en) * | 2008-07-07 | 2009-03-11 | 深圳市共进电子有限公司 | Method for implementing data interchange between optical network terminal and customer terminal using household gateway |
CN101907649A (en) * | 2010-07-07 | 2010-12-08 | 中国电力科学研究院 | FPGA-based sample data interface circuit for electronic mutual inductor |
CN102904706A (en) * | 2012-09-26 | 2013-01-30 | 烽火通信科技股份有限公司 | Device and method for synchronizing system frequency in packet transport network |
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