CN104022158A - 一种MoS2薄膜晶体管 - Google Patents

一种MoS2薄膜晶体管 Download PDF

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CN104022158A
CN104022158A CN201410227041.4A CN201410227041A CN104022158A CN 104022158 A CN104022158 A CN 104022158A CN 201410227041 A CN201410227041 A CN 201410227041A CN 104022158 A CN104022158 A CN 104022158A
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CN104022158B (zh
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杨方方
刘江涛
刘念华
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Nanchang University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/24Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
    • H01L2029/42388Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor characterised by the shape of the insulating material

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  • Power Engineering (AREA)
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  • Ceramic Engineering (AREA)
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  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)

Abstract

本发明公开了一种MoS2薄膜晶体管,其特征是由下层的基底层、中间的沟道层和上层的栅介质层构成,所述沟道层是单层MoS2薄膜,所述基底层由特定厚度SiO2构成,所述栅介质层为特定厚度HfO2层。本发明可通过改变基底层和栅介质层的厚度来增加晶体管的透射率,从而得到超高光透射率MoS2薄膜晶体管,从而增加薄膜晶体管液晶显示器中像素的开口率,提高显示质量,降低功耗。

Description

一种MoS2薄膜晶体管
技术领域
本发明涉及一种薄膜晶体管结构,尤其涉及一种可控高透射率MoS2薄膜晶体管结构,属于薄膜晶体管技术领域。
背景技术
在显示领域,应用最为广泛的为液晶显示器(LCD),在液晶显示器像素中引入薄膜晶体管开关元件,可大大提高显示器件的性能,薄膜晶体管液晶显示已成为现在显示技术的主流。在液晶显示器中使用最为广泛的薄膜晶体管是氢化非晶硅薄膜晶体管,但非晶硅材料的迁移率低,漏极电流小,不能满足显示器高速、高亮度的要求,并且非晶硅材料是不透明的,它将占用像素中的一定面积,使像素开口率减小。由于光不能全部通过像素,为了获得足够的亮度,就需要增加光源光强,从而增加功率消耗。
对于上述问题,在液晶显示中采用透明薄膜晶体管将是一个有效解决的途径,单层MoS2的能带隙达到1.90ev,同时跃迁方式为坚直跃迁,是很好的电子开关材料。单层MoS2制作的薄膜晶体管开/关电流比达到108。单层MoS2厚度很薄只有0.65nm,故光吸收特别少,适合于制作透明薄膜晶体管器件。
发明内容
本发明的目的在于提供一种超高透射率的MoS2薄膜晶体管,本发明可通过简单易行的方法增强薄膜晶体管对光的透射率,增加晶体管中像素的开口率,从而提高显示质量,降低功耗。
为了实现上述目的,本发明采用了下述技术方案,一种MoS2薄膜晶体管,其特征是由特定厚度的下层基底层、中间的沟道层和特定厚度的上层栅介质层构成,所述沟道层是MoS2薄膜,电极用石墨烯材料。
所述沟道层为单层MoS2薄膜,单层MoS2厚度只有0.65nm,故光吸收特别少。
所述基底层由SiO2构成。所述栅介质层为高介电常数的HfO2。SiO2 层和HfO2层折射率分别为,基底层和栅介质层厚度采用普通矩形设计,根据对光透射率最大的要求,SiO2 层和HfO2层的厚度分别设计成,其中l、m为正整数,为透射光的波长,此时薄膜晶体管对该光的透射率t只与沟道层有关,
其中为沟道层的介电常数,d是沟道层的厚度,沟道层复折射率为n,公式中n1为复折射率的虚部,n0为复折射率的实部。由于沟道层MoS2薄膜的厚度极小,因而透射率t极大。
所述MoS2薄膜晶体管中SiO2 层和HfO2层厚度可分别根据红光、绿光和蓝光透射率最大的要求来制作,即设计SiO2 层和HfO2层的厚度为,其中分别取红光波长、绿光波长或蓝光波长。
作为本发明的一个特点,可通过改变基底层和栅介质层的厚度来增加晶体管的透射率。
从上述技术方案可以看出,本发明具有以下有益效果:
1.本发明基于目前极为成熟的二维纳米材料技术,利用单层MoS2薄膜的半导体性,制作成三明治结构的MoS2薄膜晶体管,获得了比较高的载流子迁移率和开/关电流比。
2.本发明可以增强薄膜晶体管对光的光透射, MoS2薄膜晶体管,通过改变其基底层和栅介质层的厚度来增加薄膜晶体管的光透射率,从而提高显示器中像素开口率,提高显示质量,降低功耗。
3. 本发明可用来制作柔韧卷曲屏,MoS2薄膜的机械强度如钢一般并且在被明显弯曲的情况下,电学性能也无下降。
4. 本发明可以应用于液晶显示领域,在全透明及柔韧卷曲屏的研究中具有重要意义。
附图说明
图1为本发明的示意图。
图2为实施例1所示MoS2薄膜晶体管对光透射率与透射光波长之间的关系。
图3为实施例2所示MoS2薄膜晶体管对光透射率与透射光波长之间的关系。
图4为实施例3所示MoS2薄膜晶体管对光透射率与透射光波长之间的关系。
在图中 1、SiO2基底层  2、MoS2沟道层  3、HfO2介质层  4、石墨烯源电极  5、石墨烯栅电极  6、石墨烯漏电极。
具体实施方式
如图1所示,一种MoS2薄膜晶体管,包括SiO2基底层(1)、MoS2沟道层(2)、HfO2介质层(3)其特征是MoS2沟道层(2)的下面设有SiO2基底层(1)、MoS2沟道层(2)的上面设有HfO2介质层(3)、所述MoS2沟道层(2)设有石墨烯源电极(4)、石墨烯漏电极(6),SiO2基底层(1)下设有石墨烯栅电极(5)。以下为三明治结构MoS2薄膜晶体管的三种实施例。
实施例1:
MoS2薄膜晶体管的基底层为SiO2折射率为,栅介质层为HfO2折射率为,根据红光透射率最大的要求,设计SiO2 层和HfO2层的厚度分别为,其中为红光的波长取为700nm,其中,故SiO2 层和HfO2层的厚度分别设计为239nm和140nm。
实施例2:
MoS2薄膜晶体管的基底层为SiO2折射率为,栅介质层为HfO2折射率为,根据绿光透射率最大的要求,设计SiO2 层和HfO2层的厚度分别为,其中为绿光的波长取为550nm,其中,故SiO2 层和HfO2层的厚度分别设计为188nm和110nm。
实施例3:
MoS2薄膜晶体管的基底层为SiO2折射率为,栅介质层为HfO2折射率为,根据蓝光透射率最大的要求,设计SiO2 层和HfO2层的厚度分别为,其中为蓝光的波长取为480nm,其中,故SiO2 层和HfO2层的厚度分别设计为164nm和96nm。

Claims (4)

1.一种MoS2薄膜晶体管,由SiO2层作为下层基底层、MoS2薄膜作为中间的沟道层和HfO2层作为上层栅介质层而构成,SiO2 层的折射率为, HfO2层的折射率,其特征是SiO2 层厚度,HfO2层的厚度,其中为透射光的波长,l和m为正整数。
2.根据权利要求1所述的MoS2薄膜晶体管,其特征是所述取红光波长、绿光波长或蓝光波长。
3.根据权利要求1或2所述的MoS2薄膜晶体管,其特征是所述沟道层为单层MoS2薄膜。
4.根据权利要求1或2所述的MoS2薄膜晶体管,其特征采用单层石墨烯做MoS2薄膜晶体管的电极。
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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104265311A (zh) * 2014-09-20 2015-01-07 无锡市翱宇特新科技发展有限公司 一种盾构刀盘土体搅拌装置
CN105470001A (zh) * 2015-12-08 2016-04-06 武汉理工大学 MoS2纳米薄片双栅场效应晶体管/超级电容器复合器件及其制备方法
CN105676259A (zh) * 2016-01-27 2016-06-15 无锡盈芯半导体科技有限公司 一种基于二硫化钼晶体管的闪烁体探测器及其制作方法
CN106328708A (zh) * 2015-07-03 2017-01-11 三星电子株式会社 包括二维材料结构的装置及形成该二维材料结构的方法
CN106486531A (zh) * 2015-08-31 2017-03-08 台湾积体电路制造股份有限公司 半导体装置
CN107017303A (zh) * 2016-01-06 2017-08-04 台湾积体电路制造股份有限公司 半导体装置结构
CN108133954A (zh) * 2017-12-20 2018-06-08 贵州民族大学 一种场效应管
CN108666375A (zh) * 2018-04-20 2018-10-16 华中科技大学 一种纳米层状横向同质pn二极管及其制备方法与应用
CN111725325A (zh) * 2020-06-30 2020-09-29 重庆大学 一种新型薄层二硫化钼场效应晶体管
US10910473B2 (en) 2016-06-13 2021-02-02 Cornell University Apparatuses with atomically-thin ohmic edge contacts between two-dimensional materials, methods of making same, and devices comprising same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012111009A2 (en) * 2011-02-14 2012-08-23 Yissum Research Development Company Of The Hebrew University Of Jerusalem Ltd. Heavily doped semiconductor nanoparticles
CN102709236A (zh) * 2011-12-15 2012-10-03 京东方科技集团股份有限公司 阵列基板及其制造方法、显示装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012111009A2 (en) * 2011-02-14 2012-08-23 Yissum Research Development Company Of The Hebrew University Of Jerusalem Ltd. Heavily doped semiconductor nanoparticles
CN102709236A (zh) * 2011-12-15 2012-10-03 京东方科技集团股份有限公司 阵列基板及其制造方法、显示装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
B.RADISAVLJEVIC ET AL: ""Single-layer MoS2 transistors"", 《NATURE NANOTECHNOLOGY》 *

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104265311A (zh) * 2014-09-20 2015-01-07 无锡市翱宇特新科技发展有限公司 一种盾构刀盘土体搅拌装置
CN106328708A (zh) * 2015-07-03 2017-01-11 三星电子株式会社 包括二维材料结构的装置及形成该二维材料结构的方法
CN106486531B (zh) * 2015-08-31 2020-01-14 台湾积体电路制造股份有限公司 半导体装置
CN106486531A (zh) * 2015-08-31 2017-03-08 台湾积体电路制造股份有限公司 半导体装置
CN105470001A (zh) * 2015-12-08 2016-04-06 武汉理工大学 MoS2纳米薄片双栅场效应晶体管/超级电容器复合器件及其制备方法
CN107017303A (zh) * 2016-01-06 2017-08-04 台湾积体电路制造股份有限公司 半导体装置结构
CN105676259A (zh) * 2016-01-27 2016-06-15 无锡盈芯半导体科技有限公司 一种基于二硫化钼晶体管的闪烁体探测器及其制作方法
US10910473B2 (en) 2016-06-13 2021-02-02 Cornell University Apparatuses with atomically-thin ohmic edge contacts between two-dimensional materials, methods of making same, and devices comprising same
CN108133954A (zh) * 2017-12-20 2018-06-08 贵州民族大学 一种场效应管
CN108133954B (zh) * 2017-12-20 2020-12-04 贵州民族大学 一种场效应管
CN108666375A (zh) * 2018-04-20 2018-10-16 华中科技大学 一种纳米层状横向同质pn二极管及其制备方法与应用
CN108666375B (zh) * 2018-04-20 2019-08-13 华中科技大学 一种纳米层状横向同质pn二极管及其制备方法与应用
CN111725325A (zh) * 2020-06-30 2020-09-29 重庆大学 一种新型薄层二硫化钼场效应晶体管

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