CN103995186A - Voice frequency range scanner lower computer system - Google Patents

Voice frequency range scanner lower computer system Download PDF

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Publication number
CN103995186A
CN103995186A CN201410205737.7A CN201410205737A CN103995186A CN 103995186 A CN103995186 A CN 103995186A CN 201410205737 A CN201410205737 A CN 201410205737A CN 103995186 A CN103995186 A CN 103995186A
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CN
China
Prior art keywords
dsp chip
interface
computer system
lower computer
reset circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201410205737.7A
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Chinese (zh)
Inventor
胡天吉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Lan Cui Electronic Science And Technology Co Ltd
Original Assignee
Suzhou Lan Cui Electronic Science And Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou Lan Cui Electronic Science And Technology Co Ltd filed Critical Suzhou Lan Cui Electronic Science And Technology Co Ltd
Priority to CN201410205737.7A priority Critical patent/CN103995186A/en
Publication of CN103995186A publication Critical patent/CN103995186A/en
Pending legal-status Critical Current

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Abstract

The invention discloses a voice frequency range scanner lower computer system which comprises a DSP chip, a reset circuit, a JTAG debugging interface, a clock circuit, a communication interface, an ADC interface and a power module. The DSP chip is respectively connected with the reset circuit, the JTAG debugging interface, the clock circuit, the communication interface, the ADC interface and the power module. The clock circuit provides accurate timing and timekeeping for the DSP chip. The reset circuit can control the DSP chip to be recovered to be in an initial state, the JATG debugging interface can be used for being connected to a computer to complete DSP chip software simulation, and the communication interface is used for connection of an upper computer and a lower computer and for conducting data communication. The voice frequency range scanner lower computer system has the advantages that the voice frequency range scanner lower computer system can accurately achieve testing of characteristics of a band stop network in a voice frequency range, the circuits are simple in structure, development cost is low, and large-range popularization and use are easy.

Description

A kind of audiorange scanner lower computer system
Technical field
The present invention relates to a kind of audiorange proving installation, particularly a kind of audiorange scanner lower computer system.
Background technology
In electronic surveying, often run into the problem that impedance operator to network and transport property are measured, wherein transport property comprises gain and attenuation characteristic, amplitude versus frequency characte, phase-frequency characteristic etc.Be used for measuring above-mentioned characteristic instrument we be called frequency-characteristic measuring-testing instrument, be called for short sweep generator.The eliminating of adjustment, calibration and fault that it is tested network provides greatly convenient.
Summary of the invention
The technical problem to be solved in the present invention is: the audiorange scanner that a kind of circuit structure is easy, measuring accuracy is high, cost of development is low lower computer system is provided.
The technical solution adopted for the present invention to solve the technical problems is: a kind of audiorange scanner lower computer system, comprise: dsp chip, reset circuit, JTAG debugging interface, clock circuit, communication interface, ADC interface, power module, described dsp chip respectively with reset circuit, JTAG debugging interface, clock circuit, communication interface, ADC interface, power module is connected, wherein, described clock circuit provides accurate timing for dsp chip, timing, described reset circuit can be controlled dsp chip and return to original state, described JATG debugging interface can be used for being connected to computing machine and completes dsp chip software emulation, described communication interface is used for the connection of host computer slave computer and carries out data communication, described ADC interface connection mode number converter is for carrying out the audio frequency receiving the conversion of simulating signal and digital signal and import changed digital signal into dsp chip processing, described power module provides operating voltage for lower computer system.
As preferred version, described reset circuit adopts resistance-capacitance type reset circuit, so that debugging can be carried out hand-reset.
As preferred version, described communication interface is that 9 core standard RS-232 mouths and other system carry out communication.
As preferred version, described power module adopts power conversion chip TPS767D301 chip.
As preferred version, described dsp chip is TMS320F28234 chip.
The invention has the beneficial effects as follows: audiorange scanner lower computer system of the present invention not only can accurately be realized in audiorange the characteristic of band resistance network is tested, and this circuit structure is simple, and cost of development is low, is easy to promote the use of on a large scale.
Brief description of the drawings
For the clearer explanation embodiment of the present invention, below the accompanying drawing of required use during embodiment is described is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is one-piece construction schematic diagram of the present invention.
Fig. 2 is that reset circuit of the present invention is implemented illustration.
Fig. 3 is jtag circuit connection diagram of the present invention.
Fig. 4 is crystal oscillating circuit connection diagram of the present invention.
Fig. 5 is communication interface circuit connection diagram of the present invention.
Fig. 6 is power module circuitry connection diagram of the present invention.
Embodiment
Now by reference to the accompanying drawings and specific embodiment, the present invention is further detailed explanation.These accompanying drawings are the schematic diagram of simplification, and basic structure of the present invention is only described in a schematic way, and therefore it only shows the formation relevant with the present invention.These embodiment are interpreted as only need not limiting the scope of the invention for the present invention is described.After having read content of the present invention, those skilled in the art can do various amendments to the present invention, and the variation of these equivalences and modification fall into the protection domain that the present invention limits equally.
Audiorange scanner lower computer system as shown in Figure 1, comprise: dsp chip, reset circuit, JTAG debugging interface, clock circuit, communication interface, ADC interface, power module, described dsp chip respectively with reset circuit, JTAG debugging interface, clock circuit, communication interface, ADC interface, power module is connected, wherein, described clock circuit provides accurate timing for dsp chip, timing, described reset circuit can be controlled dsp chip and return to original state, described JATG debugging interface can be used for being connected to computing machine and completes dsp chip software emulation, described communication interface is used for the connection of host computer slave computer and carries out data communication, described ADC interface connection mode number converter is for carrying out the audio frequency receiving the conversion of simulating signal and digital signal and import changed digital signal into dsp chip processing, described power module provides operating voltage for lower computer system.Can manually carry out when making system reset, can adopt resistance-capacitance type reset circuit as shown in Figure 2 to realize, for the debugging and the programming that realize program can adopt JTAG mouth as shown in Figure 3.Consider and provide accurate guarantee for dsp chip high speed acquisition and signal processing, can access from outside the active crystal oscillator of 30MHz, as shown in Figure 4, the delivery outlet OUT of active crystal oscillator is connected to the XCLKIN on dsp chip, for dsp chip provides at a high speed accurate clock signal.
Communication module interface circuit as shown in Figure 5, communication interface is connected to the SCI module of dsp chip, carries out serial communication by 9 core standard RS-232 mouths and other system.Wherein select the main devices of MAX232 as serial communication signal level modular converter.
Power module circuitry connection diagram as shown in Figure 6, the conversion chip of this circuit module can be selected TPS767D301 chip, this chip can be converted to+5V power supply that dsp chip is suitable for+3.3V and+1.9V level, in order to reduce the impact of numerical portion on simulation part, in this circuit connects by digital power and analog power, digitally with in analog separate, in analog and connect 0 Ohmage digitally, to suppress high-frequency crosstalk.
Above content combines embodiment accompanying drawing specific embodiments of the invention has been made to detailed description.In this instructions, each embodiment adopts the mode of going forward one by one to describe, and what each embodiment stressed is and the difference of other embodiment, between each embodiment identical similar part mutually referring to.
To the above-mentioned explanation of the disclosed embodiments, make professional and technical personnel in the field can realize or use the present invention.To be apparent for those skilled in the art to the multiple amendment of these embodiment, General Principle as defined herein can, in the situation that not departing from the spirit or scope of the present invention, realize in other embodiments.Therefore, the present invention will can not be restricted to these embodiment shown in this article, but will meet the wide region consistent with principle disclosed herein and novel features.

Claims (5)

1. an audiorange scanner lower computer system, it is characterized in that: comprising: dsp chip, reset circuit, JTAG debugging interface, clock circuit, communication interface, ADC interface, power module, described dsp chip respectively with reset circuit, JTAG debugging interface, clock circuit, communication interface, ADC interface, power module is connected, wherein, described clock circuit provides accurate timing for dsp chip, timing, described reset circuit can be controlled dsp chip and return to original state, described JATG debugging interface can be used for being connected to computing machine and completes dsp chip software emulation, described communication interface is used for the connection of host computer slave computer and carries out data communication, described ADC interface connection mode number converter is for carrying out the audio frequency receiving the conversion of simulating signal and digital signal and import changed digital signal into dsp chip processing, described power module provides operating voltage for lower computer system.
2. audiorange scanner lower computer system according to claim 1, is characterized in that: described reset circuit adopts resistance-capacitance type reset circuit, so that debugging can be carried out hand-reset.
3. audiorange scanner lower computer system according to claim 1, is characterized in that: described communication interface is that 9 core standard RS-232 mouths and other system carry out communication.
4. want the audiorange scanner lower computer system described in 1 according to right, it is characterized in that: described power module adopts power conversion chip TPS767D301 chip.
5. audiorange scanner lower computer system according to claim 1, is characterized in that: described dsp chip is TMS320F28234 chip.
CN201410205737.7A 2014-05-15 2014-05-15 Voice frequency range scanner lower computer system Pending CN103995186A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410205737.7A CN103995186A (en) 2014-05-15 2014-05-15 Voice frequency range scanner lower computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410205737.7A CN103995186A (en) 2014-05-15 2014-05-15 Voice frequency range scanner lower computer system

Publications (1)

Publication Number Publication Date
CN103995186A true CN103995186A (en) 2014-08-20

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CN201410205737.7A Pending CN103995186A (en) 2014-05-15 2014-05-15 Voice frequency range scanner lower computer system

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105630677A (en) * 2015-12-22 2016-06-01 深圳市东微智能科技有限公司 Device debugging method

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1480897A (en) * 2002-09-08 2004-03-10 安徽大学 High speed portable scanner based on DPS
US7734848B2 (en) * 2006-11-08 2010-06-08 Verigy (Singapore) Pte. Ltd. System and method for frequency offset testing
CN102193106A (en) * 2010-03-18 2011-09-21 长江大学 Method for generating frequency sweeping signal special for controllable seismic source
CN102523596A (en) * 2011-12-13 2012-06-27 北京北方烽火科技有限公司 High speed frequency sweep apparatus and realization method thereof
CN102883409A (en) * 2012-09-21 2013-01-16 北京北方烽火科技有限公司 Radio-frequency signal frequency sweeping method and device
CN204008867U (en) * 2014-05-15 2014-12-10 苏州蓝萃电子科技有限公司 A kind of audiorange scanning slave computer device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1480897A (en) * 2002-09-08 2004-03-10 安徽大学 High speed portable scanner based on DPS
US7734848B2 (en) * 2006-11-08 2010-06-08 Verigy (Singapore) Pte. Ltd. System and method for frequency offset testing
CN102193106A (en) * 2010-03-18 2011-09-21 长江大学 Method for generating frequency sweeping signal special for controllable seismic source
CN102523596A (en) * 2011-12-13 2012-06-27 北京北方烽火科技有限公司 High speed frequency sweep apparatus and realization method thereof
CN102883409A (en) * 2012-09-21 2013-01-16 北京北方烽火科技有限公司 Radio-frequency signal frequency sweeping method and device
CN204008867U (en) * 2014-05-15 2014-12-10 苏州蓝萃电子科技有限公司 A kind of audiorange scanning slave computer device

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
何苏勤等: "基于TMS320F2808的音频频率数字扫频仪", 《实验技术与管理》, vol. 28, no. 02, 28 February 2011 (2011-02-28) *
林伟民等: "基于TMS320F2812 DSP的音频数字扫频仪研制", 《信息化研究》, vol. 37, no. 01, 31 January 2011 (2011-01-31) *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105630677A (en) * 2015-12-22 2016-06-01 深圳市东微智能科技有限公司 Device debugging method
CN105630677B (en) * 2015-12-22 2018-06-26 深圳市东微智能科技股份有限公司 A kind of apparatus debugging method

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Application publication date: 20140820