CN103956890B - A kind of three-phase four-arm photovoltaic combining inverter drain current suppressing method - Google Patents

A kind of three-phase four-arm photovoltaic combining inverter drain current suppressing method Download PDF

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CN103956890B
CN103956890B CN201410131070.0A CN201410131070A CN103956890B CN 103956890 B CN103956890 B CN 103956890B CN 201410131070 A CN201410131070 A CN 201410131070A CN 103956890 B CN103956890 B CN 103956890B
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switching signal
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switching
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CN103956890A (en
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郭小强
菅佳敏
魏宝泽
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Yanshan University
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Abstract

The present invention discloses a kind of three-phase four-arm photovoltaic combining inverter drain current suppressing method, and its technical essential is: first by modulating waveRespectively with triangular carrier VCObtain logical signal S by comparatora、Sb、Sc, then make the Continuity signal S of corresponding A, B, C three-phaseT1; Continuity signal ST2With Continuity signal ST3Conducting in turn respectively, control logic signal Sa、Sb、ScObtain three-phase four-arm photovoltaic combining inverter switching signal through logic circuit. Beneficial effect of the present invention is that system switching signal generates without complicated space vector modulation, switching signal generative circuit only needs basic logic circuit, can adopt analog element to realize, implementation procedure is simple, can make system common-mode voltage constant, thereby realize effective inhibition of system leakage current simultaneously.

Description

A kind of three-phase four-arm photovoltaic combining inverter drain current suppressing method
Technical field
The invention belongs to Technics of Power Electronic Conversion field, relate to dc power and be input to the inversion that AC power is exportedDevice control technology, relates in particular to a kind of three-phase four-arm photovoltaic combining inverter drain current suppressing method.
Background technology
Non-isolation type three-phase photovoltaic grid-connected inverting body is long-pending little, efficiency is high, has good application prospect. SoAnd, adopt traditional three-phase four-arm photovoltaic combining inverter topology and modulator approach will cause system to occur largerLeakage current. Germany VDE-0126-1-1 standard regulation: photovoltaic system leakage current peak value is greater than 300mA,Photovoltaic combining inverter must excise in 0.3S from electrical network. Because leakage current can produce many harm, asCause electromagnetic interference, also can form potential threat to personal safety, so, three-phase four-arm photovoltaic solved alsoNet inverter leakage current problem is significant.
One of photovoltaic system leakage current solution is to ensure system common-mode voltage perseverance by modulation strategy at presentFixed. Modulation strategy can be divided into two classes: Space Vector Modulation Strategy and carrier modulation strategy. Chinese patent applicationNumber be 201210108752.5, its name is called " a kind of modulation methods that reduces three-phase PWM current transformer common-mode voltageMethod ", this application case adopts space vector modulation technique to improve system common-mode voltage performance, although common-mode voltageBe reduced to 1/6th of DC bus-bar voltage, but cannot ensure that common-mode voltage is constant. Chinese Patent Application No.Be 201110292043.8, its name is called " the little space vector carrier modulation multilevel converter control such as a kind ofMethod ", this application case adopts the addition of zero-sequence component and original modulating wave to obtain new modulating wave, then by withCarrier wave ratio obtains switching signal. Although the method can be improved output waveform, reduce harmonic content, but stillCannot ensure that system common-mode voltage is constant, therefore cannot realize effective inhibition of leakage current.
Summary of the invention
In order to solve problems of the prior art, the object of this invention is to provide a kind of three-phase four-arm lightThe carrier modulation strategy of volt combining inverter drain current suppressing, this modulation strategy is simple, and can ensure systemAltogether mode voltage is constant, thereby leakage current is effectively suppressed.
In order to realize foregoing invention object, the present invention is achieved by the following technical solutions:
A kind of three-phase four-arm photovoltaic combining inverter drain current suppressing method, its content comprises the steps:
(1) be by opening for the carrier modulation strategy of three-phase four-arm photovoltaic combining inverter drain current suppressingClose signal modulation system and realize, by modulating waveRespectively with triangular carrier VCBy comparator 1,Comparator 2, comparator 3 obtain logical signal Sa、Sb、Sc；
(2) by logical signal Sa、Sb、ScThe logic circuit of delivering to after comparator obtains switching signalS1aS2aS1bS2bS1cS2cS1dS2d, detailed process is:
Logical signal Sa、SbAnd ScBy or door 1 obtain logical signal a, logical signal Sa、SbAnd ScWithTime by obtaining logical signal b with door 1, logical signal a and logical signal b are patrolled by XOR gate 1Collect signal c, logical signal c obtains logical signal d by not gate 1;
Logical signal SaObtain logical signal e with logical signal d by XOR gate 2, logical signal SbWith patrolCollect signal d and obtain logical signal f by XOR gate 3, logical signal ScPass through XOR gate 4 with logical signal dObtain logical signal g;
Conducting enable signal generator has three kinds of duties in turn, and corresponding three kinds of output states are as follows:
1) in turn conducting enable signal generator at [0～T] given Continuity signal S in the cycleT1Be 1, conducting letterNumber ST2Be 0, Continuity signal ST3Be 0;
Logical signal e obtains switching signal S1a；
Switching signal S1aObtain switching signal S by not gate 22a；
Logical signal SbObtain switching signal S1b；
Switching signal S1bObtain switching signal S by not gate 32b；
Logical signal ScObtain switching signal S1c；
Switching signal S1cObtain switching signal S by not gate 42c；
Switching signal S1a, switching signal S1bWith switching signal S1cObtain switching signal S by XOR gate 51d；
Switching signal S1dObtain switching signal S by not gate 52d；
2) in turn conducting enable signal generator at [T～2T] given Continuity signal S in the cycleT1Be 0, conducting letterNumber ST2Be 1, Continuity signal ST3Be 0;
Logical signal SaObtain switching signal S1a；
Switching signal S1aObtain switching signal S by not gate 22a；
Logical signal f obtains switching signal S1b；
Switching signal S1bObtain switching signal S by not gate 32b；
Logical signal ScObtain switching signal S1c；
Switching signal S1cObtain switching signal S by not gate 42c；
Switching signal S1a, switching signal S1bWith switching signal S1cObtain switching signal S by XOR gate 51d；
Switching signal S1dObtain switching signal S by not gate 52d；
3) in turn conducting enable signal generator at [2T～3T] given Continuity signal S in the cycleT1Be 0, conductingSignal ST2Be 0, Continuity signal ST3Be 1;
Logical signal SaObtain switching signal S1a；
Switching signal S1aObtain switching signal S by not gate 22a；
Logical signal SbObtain switching signal S1b；
Switching signal S1bObtain switching signal S by not gate 32b；
Logical signal g obtains switching signal S1c；
Switching signal S1cObtain switching signal S by not gate 42c；
Switching signal S1a, switching signal S1bWith switching signal S1cObtain switching signal S by XOR gate 51d；
Switching signal S1dObtain switching signal S by not gate 52d。
Switching signal modulation system belongs to carrier modulation mode, and carrier wave used is single carrier, without judging referenceSector, vector place, also without complex calculation such as compute vectors action times;
Owing to adopting technique scheme, compared with prior art, beneficial effect of the present invention is that system opensClose signal and generate without complicated space vector modulation, switching signal generative circuit only needs basic logic electricityRoad, can adopt analog element to realize, and implementation procedure is simple, can make system common-mode voltage constant simultaneously,Thereby realize effective inhibition of system leakage current.
Brief description of the drawings
Fig. 1 is the schematic diagram of three-phase four-arm photovoltaic combining inverter
Fig. 2 is the switching signal carrier modulation strategy schematic diagram that the present invention proposes
Detailed description of the invention
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is made further to specific description in detail.
A kind of three-phase four-arm photovoltaic combining inverter drain current suppressing method: the method content comprises following stepRapid:
(1) Figure 1 shows that the schematic diagram of three-phase four-arm photovoltaic combining inverter, given first modulating wave v b * , v c * ;
(2) Figure 2 shows that the switching signal carrier modulation strategy schematic diagram that the present invention proposes, by modulating wave Respectively with triangular carrier VcObtain logical signal by comparator 1, comparator 2, comparator 3 S b , S c ;
(3) by logical signal Sa、Sb、ScThe simple logic circuit of delivering to after comparator obtains switching signalS1aS2aS1bS2bS1cS2cS1dS2d, detailed process is:
Logical signal Sa、SbAnd ScBy or door 1 obtain logical signal a, logical signal Sa、SbAnd ScWithTime by obtaining logical signal b with door 1, logical signal a and logical signal b are patrolled by XOR gate 1Collect signal c, logical signal c obtains logical signal d by not gate 1.
Logical signal SaObtain logical signal e with logical signal d by XOR gate 2, logical signal SbWith patrolCollect signal d and obtain logical signal f by XOR gate 3, logical signal ScPass through XOR gate 4 with logical signal dObtain logical signal g.
Conducting enable signal generator has three kinds of duties in turn, and corresponding three kinds of output states are as follows:
1) in turn conducting enable signal generator at [0～T] given Continuity signal S in the cycleT1Be 1, conducting letterNumber ST2Be 0, Continuity signal ST3Be 0;
Logical signal e obtains switching signal S1a；
Switching signal S1aObtain switching signal S by not gate 22a；
Logical signal SbObtain switching signal S1b；
Switching signal S1bObtain switching signal S by not gate 32b；
Logical signal ScObtain switching signal S1c；
Switching signal S1cObtain switching signal S by not gate 42c；
Switching signal S1a, switching signal S1bWith switching signal S1cObtain switching signal S by XOR gate 51d；
Switching signal S1dObtain switching signal S by not gate 52d；
2) in turn conducting enable signal generator at [T～2T] given Continuity signal S in the cycleT1Be 0, conducting letterNumber ST2Be 1, Continuity signal ST3Be 0;
Logical signal SaObtain switching signal S1a；
Switching signal S1aObtain switching signal S by not gate 22a；
Logical signal f obtains switching signal S1b；
Switching signal S1bObtain switching signal S by not gate 32b；
Logical signal ScObtain switching signal S1c；
Switching signal S1cObtain switching signal S by not gate 42c；
Switching signal S1a, switching signal S1bWith switching signal S1cObtain switching signal S by XOR gate 51d；
Switching signal S1dObtain switching signal S by not gate 52d；
3) in turn conducting enable signal generator at [2T～3T] given Continuity signal S in the cycleT1Be 0, conductingSignal ST2Be 0, Continuity signal ST3Be 1;
Logical signal SaObtain switching signal S1a；
Switching signal S1aObtain switching signal S by not gate 22a；
Logical signal SbObtain switching signal S1b；
Switching signal S1bObtain switching signal S by not gate 32b；
Logical signal g obtains switching signal S1c；
Switching signal S1cObtain switching signal S by not gate 42c；
Switching signal S1a, switching signal S1bWith switching signal S1cObtain switching signal S by XOR gate 51d；
Switching signal S1dObtain switching signal S by not gate 52d；
Table 1 is different on off states and system common-mode voltage VCMRelation, on off state shown in table 1 byThe carrier modulation strategy that in Fig. 2, the present invention proposes is realized.
Have as seen 8 kinds of on off states by table 1, wherein the 1st kind and the 8th kind is that on off state is nought stateSituation, the 2nd kind to the 7th kind is that on off state is the situation of effective status. From table 1, can see twoKind of nought state occurs respectively 3 times in table, if this is because 000 and 111 two kind of nought state while occurringOnly change the on off state of a brachium pontis in three brachium pontis, changed the low and high level number of this brachium pontis, can makeBecome inverter output voltage imbalance. Therefore by adding simple auxiliary circuit to make three-phase brachium pontis every the T timeObtain corresponding switching signal with logical signal d by XOR gate respectively, in Fig. 2, conducting enables letter in turnNumber generator is every T time-switching Continuity signal, corresponding A, B, C phase respectively.
To sum up, 8 kinds of switching signals can be divided into 3 kinds of situations:
1) at [0～T] in the cycle, Continuity signal ST1Be 1, Continuity signal ST2Be 0, Continuity signal ST3Be 0,As shown in the 1st row in table 1 and the 10th row, by logical conversion, 000 state is become to 100 states,111 states become 011 state, and in table, other states remain unchanged, with the 1st behavior example, now main circuitSwitching signal S corresponding to switching tube1a，S2b，S2c，S1dBe 1 entirely, switching signal S2a，S1b，S1c，S2dEntirelyBe 0, now VAN=VDN=Vdc，VBN=VCN=0, wherein VdcFor photovoltaic battery panel both end voltage, according to common modeVoltage computing formula: VCM=(VAN+VBN+VCN+VDN)/4, can obtain common-mode voltage VCM=Vdc/ 2. In like manner, other 7Plant under on off state and can ensure that equally common-mode voltage is constant.
2) at [T～2T] in the cycle, Continuity signal ST1Be 0, Continuity signal ST2Be 1, Continuity signal ST3Be 0,As shown in the 2nd row in table 1 and the 11st row, by logical conversion, 000 state is become to 010 state,111 states become 101 states, and in table, other states remain unchanged, with the 2nd behavior example, now main circuitSwitching signal S corresponding to switching tube2a，S1b，S2c，S1dBe 1 entirely, switching signal S1a，S2b，S1c，S2dEntirelyBe 0, now VAN=VCN=0，VBN=VDN=Vdc, according to common-mode voltage computing formula:VCM=(VAN+VBN+VCN+VDN)/4, can obtain common-mode voltage VCM=Vdc/ 2. In like manner, same under other 7 kinds of on off statesSample can ensure that common-mode voltage is constant.
3) at [2T～3T] given Continuity signal S in the cycleT1Be 0, Continuity signal ST2Be 0, Continuity signal ST3For1, as shown in the 3rd row in table 1 and the 12nd row, by logical conversion, 000 state is become to 001 state,111 states become 110 states, and in table, other states remain unchanged, with the 3rd behavior example, now main circuitSwitching signal S corresponding to switching tube2a，S2b，S1c，S1dBe 1 entirely, switching signal S1a，S1b，S2c，S2dEntirelyBe 0, now VAN=VBN=0，VCN=VDN=Vdc, according to common-mode voltage computing formula:VCM=(VAN+VBN+VCN+VDN)/4, can obtain common-mode voltage VCM=Vdc/ 2. In like manner, same under other 7 kinds of on off statesSample can ensure that common-mode voltage is constant.
No matter logical signal Sa、Sb、ScBe 0 or 1, carry out logical conversion by logic circuit, and notWith making Continuity signal S in the T cycleT1, Continuity signal ST2With Continuity signal ST3Conducting in turn, and give respectivelyTo logic circuit, all nought states all can be become to effective on off state, now can ensure common-mode voltageFor VCM=(VAN+VBN+VCN+VDN)/4=Vdc/2。
In sum, the logic circuit shown in the on off state shown in associative list 1 and Fig. 2, realizes systemAltogether mode voltage is constant, thereby ensures that leakage current is effectively suppressed.
Table 1

Claims (2)

1. a three-phase four-arm photovoltaic combining inverter drain current suppressing method, is characterized in that: the methodContent comprises the steps:
(1), for the carrier modulation strategy of three-phase four-arm photovoltaic combining inverter drain current suppressing, be by openingClose signal modulation system and realize, by modulating waveRespectively with triangular carrier VCBy comparator 1,Comparator 2, comparator 3 obtain logical signal Sa、Sb、Sc；
(2) by logical signal Sa、Sb、ScThe logic circuit of delivering to after comparator obtains switching signalS1aS2aS1bS2bS1cS2cS1dS2d, detailed process is:
Logical signal Sa、SbAnd ScBy or door 1 obtain logical signal a, logical signal Sa、SbAnd ScWithTime by obtaining logical signal b with door 1, logical signal a and logical signal b are patrolled by XOR gate 1Collect signal c, logical signal c obtains logical signal d by not gate 1;
Logical signal SaObtain logical signal e with logical signal d by XOR gate 2, logical signal SbWith patrolCollect signal d and obtain logical signal f by XOR gate 3, logical signal ScPass through XOR gate 4 with logical signal dObtain logical signal g;
Conducting enable signal generator has three kinds of duties in turn, and corresponding three kinds of output states are as follows:
1) in turn conducting enable signal generator at [0～T] given Continuity signal S in the cycleT1Be 1, conducting letterNumber ST2Be 0, Continuity signal ST3Be 0;
Logical signal e obtains switching signal S1a；
Switching signal S1aObtain switching signal S by not gate 22a；
Logical signal SbObtain switching signal S1b；
Switching signal S1bObtain switching signal S by not gate 32b；
Logical signal ScObtain switching signal S1c；
Switching signal S1cObtain switching signal S by not gate 42c；
Switching signal S1a, switching signal S1bWith switching signal S1cObtain switching signal S by XOR gate 51d；
Switching signal S1dObtain switching signal S by not gate 52d；
2) in turn conducting enable signal generator at [T～2T] given Continuity signal S in the cycleT1Be 0, conducting letterNumber ST2Be 1, Continuity signal ST3Be 0;
Logical signal SaObtain switching signal S1a；
Switching signal S1aObtain switching signal S by not gate 22a；
Logical signal f obtains switching signal S1b；
Switching signal S1bObtain switching signal S by not gate 32b；
Logical signal ScObtain switching signal S1c；
Switching signal S1cObtain switching signal S by not gate 42c；
Switching signal S1a, switching signal S1bWith switching signal S1cObtain switching signal S by XOR gate 51d；
Switching signal S1dObtain switching signal S by not gate 52d；
3) in turn conducting enable signal generator at [2T～3T] given Continuity signal S in the cycleT1Be 0, conductingSignal ST2Be 0, Continuity signal ST3Be 1;
Logical signal SaObtain switching signal S1a；
Switching signal S1aObtain switching signal S by not gate 22a；
Logical signal SbObtain switching signal S1b；
Switching signal S1bObtain switching signal S by not gate 32b；
Logical signal g obtains switching signal S1c；
Switching signal S1cObtain switching signal S by not gate 42c；
Switching signal S1a, switching signal S1bWith switching signal S1cObtain switching signal S by XOR gate 51d；
Switching signal S1dObtain switching signal S by not gate 52d。
2. a kind of three-phase four-arm photovoltaic combining inverter according to claim 1 drain current suppressing sideMethod, is characterized in that:
Described switching signal modulation system belongs to carrier modulation mode, and carrier wave used is single carrier, without sentencingSector, disconnected reference vector place, also without compute vectors action time.
CN201410131070.0A 2014-04-01 2014-04-01 A kind of three-phase four-arm photovoltaic combining inverter drain current suppressing method Expired - Fee Related CN103956890B (en)

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CN104467021B (en) * 2014-12-29 2017-01-11 武汉理工大学 Three-phase multi-direction grid-connected inverter
CN106130383B (en) * 2016-07-04 2018-09-04 燕山大学 A kind of coupling inductance photovoltaic combining inverter drain current suppressing method
CN107681911B (en) * 2017-09-08 2019-05-28 燕山大学 A kind of three level four bridge legs photovoltaic DC-to-AC converter control method of the source Z
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CN108011563B (en) * 2017-12-22 2020-03-31 燕山大学 Control method for multiphase motor driver
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CN117155100B (en) * 2023-10-30 2024-01-05 燕山大学 Leakage current suppression method for three-phase four-bridge-arm grid-connected inverter

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