CN116505747A - Specific harmonic wave elimination modulation method for eliminating current source inverter current-overlapping time effect - Google Patents
Specific harmonic wave elimination modulation method for eliminating current source inverter current-overlapping time effect Download PDFInfo
- Publication number
- CN116505747A CN116505747A CN202310651977.9A CN202310651977A CN116505747A CN 116505747 A CN116505747 A CN 116505747A CN 202310651977 A CN202310651977 A CN 202310651977A CN 116505747 A CN116505747 A CN 116505747A
- Authority
- CN
- China
- Prior art keywords
- power switch
- switch tube
- current source
- source inverter
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 46
- 230000008030 elimination Effects 0.000 title claims abstract description 38
- 238000003379 elimination reaction Methods 0.000 title claims abstract description 38
- 230000001550 time effect Effects 0.000 title claims abstract description 30
- 230000014509 gene expression Effects 0.000 claims description 24
- 230000000903 blocking effect Effects 0.000 claims description 8
- 230000002441 reversible effect Effects 0.000 claims description 8
- 239000003990 capacitor Substances 0.000 claims description 4
- 238000001914 filtration Methods 0.000 claims description 4
- 238000000354 decomposition reaction Methods 0.000 claims description 3
- 230000003111 delayed effect Effects 0.000 claims description 2
- 230000005669 field effect Effects 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 claims description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 2
- 238000006243 chemical reaction Methods 0.000 claims 1
- 229910044991 metal oxide Inorganic materials 0.000 claims 1
- 150000004706 metal oxides Chemical class 0.000 claims 1
- 229910010271 silicon carbide Inorganic materials 0.000 claims 1
- 238000001208 nuclear magnetic resonance pulse sequence Methods 0.000 abstract description 17
- 238000010586 diagram Methods 0.000 description 5
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 238000010248 power generation Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000011217 control strategy Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 239000013598 vector Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/12—Arrangements for reducing harmonics from ac input or output
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0048—Circuits or arrangements for reducing losses
- H02M1/0054—Transistor switching losses
- H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
- H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
- H02M7/53875—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/40—Arrangements for reducing harmonics
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
The invention discloses a specific harmonic wave elimination modulation method for eliminating the current source inverter current-overlapping time effect, which modulates a current source inverter adopting an H7 topological structure, and comprises the following steps: setting harmonic frequency to be eliminated, and determining the number of switch angles in specific harmonic elimination modulation; constraint condition for eliminating modulation according to specific harmonic wave and power switch tube S 7 Is used for constructing a power switch tube S 1 ~S 7 A driving pulse model of (2); solving the switch angle under different modulation ratios; based on the driving pulse model of each power switch tube and the switch angle of each power switch tube, specific harmonic elimination modulation is realized; introducing overlap time based on set rulesThe circuit of the current source inverter is always in a closed state. The invention changes the pulse sequence of the power switch, and the power switch S in the post-stage H6 converter bridge 1 ~S 6 Zero-current switching is realized, the influence of the current-overlapping time on the electric energy quality is eliminated, and the power switch S is reduced 1 ~S 6 Is not limited, and is not limited.
Description
Technical Field
The invention belongs to the technical field of current source inverters, and particularly relates to a specific harmonic wave elimination modulation method for eliminating a current source inverter current-overlapping time effect.
Background
The statements in this section merely provide background information related to the present disclosure and may not necessarily constitute prior art.
The inverter is a converter for converting direct current electric energy (including a battery, an accumulator jar and the like) into constant frequency and constant voltage or frequency and voltage-regulating alternating current (generally 220V/50Hz sine wave), and consists of an inverter bridge, control logic and a filter circuit, and is generally divided into a current source inverter and a voltage source inverter. The inverter is an indispensable part of new energy power generation as an interface device for connecting new energy and a power grid. The three-phase current source inverter has the advantages of higher reliability, boosting capacity and the like, can be applied to renewable energy power generation systems such as photovoltaic, wind energy, ocean energy and the like, and has good industrial value and application prospect.
High power current source inverters (Current Source Inverter, CSI) typically operate at lower switching frequencies to reduce switching losses. However, this also results in a substantial increase in harmonics, especially low harmonic content, of the output power of the high power current source inverter, which in turn affects the quality of the output power. Meanwhile, in order to ensure the normal operation of the current source inverter, a period of current folding time is required to be introduced between driving signals of the switching tube in the modulation process of the current source inverter so as to ensure that the circuit is always in a closed state. However, the existence of the overlap time will increase the harmonic distortion rate of the output current at the ac side, thereby deteriorating the quality of the electric energy.
Currently, a specific harmonic cancellation technique (Selected Harmonic Elimination Pulse Width Modulation, shewm) is one of modulation methods commonly used for CSI, and the specific harmonic cancellation technique can achieve harmonic cancellation at a lower switching frequency through selection of switching time, so that a harmonic problem is effectively relieved. As in the prior art, journal document Generalized techniques of selective harmonic elimination and current control in current source inverters/converters proposes a general technique for specific harmonic cancellation based on an H6 current source inverter, and implements application of the specific harmonic cancellation technique in the current source inverter, but the above solution does not consider the problem of the current foldback time effect. That is, there is no method for solving the problem of the overlap time by using a specific harmonic cancellation technique in the prior art.
Disclosure of Invention
In order to solve the defects in the prior art, the invention provides a specific harmonic wave elimination modulation method for eliminating the current-overlapping time effect of a current source inverter, which adopts an H7 current source inverter as the topological structure of a converter, and changes the pulse sequence of a power switch to change the power switch S in a post-stage H6 converter bridge 1 ~S 6 Zero-current switching is realized, so that not only is the influence of the current-overlapping time on the power quality eliminated, but also the power switch S is reduced 1 ~S 6 The problem of influencing the power quality due to the increase of the harmonic wave of the output power is avoided.
In a first aspect, the present disclosure provides a specific harmonic cancellation modulation method that cancels the current source inverter foldback time effect.
A specific harmonic elimination modulation method for eliminating the current source inverter current-overlapping time effect is provided, which modulates the current source inverter adopting an H7 topological structure, and comprises the following steps:
setting harmonic frequency to be eliminated, and determining the number of switch angles in specific harmonic elimination modulation;
constructing a power switch tube S according to the constraint condition of specific harmonic elimination modulation of a current source inverter 1 ~S 6 A driving pulse model of (2);
according to power switching tube S in current source inverter 7 Is used for constructing a power switch tube S 7 A driving pulse model of (2);
according to the constructed driving pulse model of each power switching tube, solving the switching angle under different modulation ratios by combining the harmonic frequency and the switching angle number to be eliminated;
based on power switch tube S 1 ~S 7 The driving pulse model and the solved switching angle are used for realizing specific harmonic elimination modulation;
set in the power switch tube S 7 Power switch tube S at on or off time 1 ~S 6 The turn-off or turn-on time of the current source inverter is introduced based on a set rule, and the circuit of the current source inverter is ensured to be always in a closed state.
According to a further technical scheme, the adopted H7 current source inverter topological structure is as follows:
the topological structure is divided into a front stage and a rear stage, and a front stage circuit is formed by a direct-current voltage source U dc An inductance L dc And a power switch tube S connected in parallel with the bus 7 Composition; the post-stage circuit adopts a power switch tube S 1 ~S 6 An H6 converter bridge structure is formed; the three phases of the alternating current output are respectively connected with a capacitor for filtering.
The one or more of the above technical solutions have the following beneficial effects:
1. the invention provides a specific harmonic wave elimination modulation method for eliminating the current source inverter current-overlapping time effect, which adopts an H7 current source inverter as the topological structure of a converter, and changes the pulse sequence of a power switch to realize the subsequent stagePower switch S in H6 converter bridge 1 ~S 6 Zero-current switching is realized, so that not only is the influence of the current-overlapping time on the power quality eliminated, but also the power switch S is reduced 1 ~S 6 The problem of influencing the power quality due to the increase of the harmonic wave of the output power is avoided.
2. In the modulation method provided by the invention, a pulse sequence model of each power switch tube in the inverter is provided, and a specific rule of on/off time of each power switch tube is set, so that specific harmonic elimination modulation for eliminating the current source inverter current-overlapping time effect is realized.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention.
FIG. 1 is a topology diagram of an H6 current source inverter of the prior art;
FIG. 2 is a topology diagram of an H7 current source inverter employed in an embodiment of the present invention;
fig. 3 shows a low-speed power switch tube S 1 ~S 6 Is a device pattern diagram;
fig. 4 shows a high-performance power switch tube S 7 Is a device pattern diagram;
FIG. 5 is a flow chart of a specific harmonic cancellation modulation method for canceling the current source inverter foldback time effect according to an embodiment of the present invention;
fig. 6 shows a power switch tube S according to an embodiment of the invention 1 ~S 6 Two different types of switching states at pi/6;
FIG. 7 shows a first type of lower power switching transistor S in an embodiment of the invention 1 ~S 7 And a pulse sequence model of the output current;
FIG. 8 shows a second type of lower power switching transistor S in accordance with an embodiment of the present invention 1 ~S 7 And a pulse sequence model of the output current;
fig. 9 shows a power switch tube S according to an embodiment of the invention 1 ~S 6 On/off of (a)Schematic diagram of break moment;
fig. 10 is a pulse sequence model of n=2 in the embodiment of the present invention;
fig. 11 is a solution result of the switching angle at different modulation ratios when n=2 in the embodiment of the present invention;
fig. 12 is a pulse sequence model of n=4 in the embodiment of the present invention;
fig. 13 is a solution result of the switching angle at different modulation ratios when n=4 in the embodiment of the present invention;
fig. 14 is a pulse sequence model of n=6 in the embodiment of the present invention;
fig. 15 is a solution result of the switching angle at different modulation ratios when n=6 in the embodiment of the present invention.
Detailed Description
It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the invention. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the present invention. As used herein, the singular is also intended to include the plural unless the context clearly indicates otherwise, and furthermore, it is to be understood that the terms "comprises" and/or "comprising" when used in this specification are taken to specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof.
Example 1
In order to eliminate the influence of the current foldback time effect on the power quality, further reduce the loss of the power switch of the current source inverter and avoid the problem of influencing the power quality due to the increase of output power harmonic waves, and consider that the current method for eliminating the influence of the current foldback time mainly comprises a method for compensating harmonic components generated by the current foldback time through adjusting a control strategy and a method for directly eliminating the influence of the current foldback time through changing the topological structure or a modulation strategy of the inverter.
The topology of a conventional current source inverter is shown in FIG. 1, and a converter bridge of the structure is composed of a power switch tube S 1 ~S 6 The DC side circuit is composed of a DC voltage source U dc And an inductance L dc The series connection is formed, and the alternating current output is filtered by a three-phase capacitor. Based on the traditional current source inverter topology structure, an H7 current source inverter topology structure is provided, the H7 current source inverter is adopted as the topology structure of the current transformer in the embodiment, and specific harmonic cancellation and overlapping time effect cancellation modulation are carried out on the H7 current source inverter through the method. As shown in fig. 2, the topology structure of the H7 current source inverter is divided into a front stage and a rear stage, and the front stage circuit is composed of a dc voltage source U dc An inductance L dc And a power switch tube S connected in parallel with the bus 7 Composition; the post-stage circuit adopts a power switch tube S 1 ~S 6 The traditional H6 converter bridge structure is formed, and the alternating current output is filtered by a three-phase capacitor.
In this embodiment, in the topology of the H7 current source inverter:
(1) Power switch tube S 1 ~S 6 The configuration scheme of the traditional high-power current source inverter is reserved, and a low-speed power switch tube is adopted, as shown in (a), (b) and (c) in fig. 3, a Gate Turn-Off thyristor (GTO), a reverse blocking type Integrated Gate thyristor (Integrated Gate-Commutated Thyristor, IGCT), a reverse blocking type insulated Gate bipolar transistor (Insulated Gate Bipolar Transistor, IGBT) and the like can be selected.
(2) Power switch tube S 7 As shown in fig. 4 (a) and (b), a reverse blocking type high-speed Insulated Gate Bipolar Transistor (IGBT), a silicon carbide (SiC) -based reverse blocking type Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), or the like may be selected.
Based on the above H7 current source inverter topology, this embodiment discloses a specific harmonic cancellation modulation method for canceling the current source inverter current folding time effect, which modulates a current source inverter adopting the H7 current source inverter topology, as shown in fig. 5, and includes the following steps:
step S1, setting harmonic frequencies to be eliminated, and determining the number of switch angles in specific harmonic elimination modulation;
step S2, constructing a power switch tube S according to constraint conditions of specific harmonic elimination modulation of the current source inverter 1 ~S 6 A driving pulse model of (2);
step S3, according to the power switch tube S in the current source inverter 7 Is used for constructing a power switch tube S 7 A driving pulse model of (2);
s4, according to the constructed driving pulse model of each power switch tube, solving the switch angle under different modulation ratios by combining the harmonic frequency and the number of switch angles to be eliminated;
step S5, based on power switch tube S 1 ~S 7 The driving pulse model and the solved switching angle are used for realizing specific harmonic elimination modulation;
step S6, setting in the power switch tube S 7 Power switch tube S at on or off time 1 ~S 6 The turn-off or turn-on time of the current source inverter is introduced based on a set rule, and the circuit of the current source inverter is ensured to be always in a closed state.
Specifically, in the step S1, the number of harmonics to be eliminated is set, and the number of switching angles in the specific harmonic elimination modulation of the current source inverter is determined.
In the steps S2 and S3, the power switching tube S is constructed according to the constraint condition of the specific harmonic cancellation modulation of the current source inverter 1 ~S 6 A driving pulse model of (2); according to power switching tube S in current source inverter 7 Is used for constructing a power switch tube S 7 Is a driving pulse model of (a).
Specifically, first, the specific harmonics executed by the conventional current source inverter will be described with (0, 2 pi) as one periodEliminating constraints in modulation techniques and power switch S employed in this embodiment 7 The characteristics of the driving pulse.
The constraint conditions when the traditional current source inverter executes the specific harmonic elimination modulation technology are as follows:
(1) Output current of current source inverter (i a ,i b ,i c ) The conditions are to be satisfied: the output current satisfies half-wave symmetry, i.e., is centered about the (pi, 0) point; the output current satisfies quarter-wave symmetry, i.e. about the x=pi/2 axis; output three-phase current i a ,i b ,i c The phases of (2 pi/3) are sequentially different.
(2) Let the initial free angle be α, i.e. the switching angle be α, the number of switching angles be N, the switching angle α needs to satisfy the following conditions:
0<α 1 <α 2 <…<α N <π/6。
(3) Power switch tube S 1 ~S 6 The driving pulse of (2) is required to satisfy the condition: power switch tube S 1 ~S 6 Which in turn differ by pi/3.
Power switch tube S in H7 current source inverter adopted in embodiment 7 The driving pulse of (2) is characterized in that:
(1) Power switch tube S 7 The driving pulse of (2) is within the interval of (0, pi/3), and the power switch tube S 7 Is symmetrical about the pi/6 axis;
(2) Power switch tube S 7 The driving pulses of (2) are identical in waveform in the (0, pi/3), (pi/3, 2 pi/3) and (2 pi/3, pi) intervals.
According to the constraint condition and the driving pulse characteristics, a power switch tube S is constructed 1 ~S 7 The driving pulse model of (a) is that of obtaining the power switch tube S 1 ~S 7 Is provided. On this basis, the modulation of the current source inverter also needs to determine the magnitude of each switching angle, so the solution is performed by the following steps.
And S4, according to the constructed driving pulse model of each power switch tube, solving the magnitude of the switch angle (namely the switch angle) under different modulation ratios by combining the harmonic frequency and the number of the switch angles to be eliminated.
The number of switch angles of the specific harmonic elimination technology has two forms of odd number and even number, and in order to meet the solving condition, the number of switch angles in the embodiment should be even number. According to the power switching tube S 1 ~S 6 The pulse sequence model of the power switch tube is divided into two types at pi/6, and the pulse sequence model is shown in fig. 6.
The first type is a case that the number of switching angles is n=4k+2 (k=0, 1,2, …), and (a) in fig. 6 is a switching state of the first type at pi/6, and the power switch tube S is shown by taking a phase as an example 1 、S 3 、S 5 、S 7 Switch state at pi/6.
Taking phase a as an example, a first type of pulse sequence model is shown in fig. 7. Fig. 7 shows a switch S 1 ~S 7 The method for constructing the pulse sequence provides the modulation waveform (before filtering) of the output current. Wherein α is a set switching angle, which means the entire pulse model (S 1 ~S 7 ) Free angle of i a The current is output for phase a.
Specifically, firstly, based on a constructed driving pulse model of a power switch tube, an output current waveform of a current source inverter is obtained, an output current expression of the current source inverter is written, and Fourier decomposition is carried out on the output current expression, so that an n-th harmonic expression of the output current is obtained. Equation (1) and equation (2) are the fourier-decomposed expressions of the output current i (ωt); equation (3) is an n-harmonic expression I of the first type of output current a,n 。
Then, the magnitude of the switching angle (i.e., the switching angle) at different modulation ratios is solved according to the n-th harmonic expression of the output current. Wherein the modulation ratio m and the direct current I dc And amplitude I of fundamental wave current on alternating current side a,1 In relation, the formula (4) is satisfied. By controlling the modulation ratio, the n-order harmonic expression I of the harmonic to be eliminated is achieved a,n =0, a nonlinear equation set is constructed, so that the magnitude of the switching angle under different modulation ratios is solved.
The second type is a case where the number of switching angles is n=4k (k=1, 2,3, …), and (b) in fig. 6 is a switching state of the second type at pi/6.
Taking phase a as an example, a second type of pulse sequence model is shown in fig. 8. Fig. 8 shows a switch S 1 ~S 7 The method for constructing the pulse sequence provides the modulation waveform (before filtering) of the output current.
Similarly, step S4 is executed, where the output current waveform of the current source inverter is obtained according to the constructed driving pulse model of the power switch tube, the output current expression of the current source inverter is calculated, and fourier decomposition is performed on the output current expression, so as to obtain an n-th harmonic expression of the output current.
Equation (5) is an n-harmonic expression I of the second type of output current a,n 。
Based on the same method, the n-order harmonic expression I of the harmonic to be eliminated is achieved by controlling the modulation ratio a,n =0, constructing a nonlinear equation set, and solving to obtain each switching tube S under different modulation ratios 1 ~S 7 Switch of (2)The size of the angle.
At this time, step S5 is performed based on the power switch tube S 1 ~S 7 And (3) the driving pulse model and the solved switching angle size, and specific harmonic elimination modulation is realized.
In addition, to ensure that the circuit is always in the closed state, it is often necessary to introduce a period of overlap between the drive signals of the switching tubes, thus requiring adjustment of the power switching tubes S 1 ~S 6 On/off time of (c) is set. In this embodiment, a current source inverter of an H7 topology is selected, S 7 When closed and conducted, the power switch S in the subsequent-stage circuit 1 ~S 6 Is short-circuited at this time S 1 ~S 6 Actually performing zero-current switching during the period S 1 ~S 6 The on/off of (a) does not affect the waveform of the output current, and is accordingly set in the power switch S 7 Power switch tube S at on or off time 1 ~S 6 Is used for the turn-off or turn-on time of the battery.
That is, step S6 is performed afterwards, and the overlap time is set or introduced according to the following rule, and the introduction of the overlap time does not affect the output current, thereby eliminating the influence of the overlap time effect. Specifically, power switching tube S is set 1 ~S 6 The specific rules of the on/off time of (2) are as follows:
for at S 7 The power switch tube turned off at the on time is turned off in a delayed manner (as shown by S in FIG. 9 x X=1, 2,3,4,5, 6), the delay time is noted as t d (t as shown in FIG. 9) d In interval (0, t) s ) Internal value, t s Is S 7 On-time of (c) of the following rule: the turn-off time of the power switch tube should lag behind S 7 Is set at the on time of (2); the turn-off time of the power switch tube is advanced to S 7 Is turned off at the time of the turn-off; delay time is not greater than S 7 Is set to be on-time t s 。
For at S 7 The power switch tube turned on at the turn-off time is turned on in advance (as shown in S in FIG. 9 y Y=1, 2,3,4,5, 6), and the advance time is noted as t e (t as shown in FIG. 9) e In interval (0, t) s ) Internal valueThe rules are: the conduction time of the power switch tube should lag behind S 7 Is set at the on time of (2); the conducting time of the power switch tube is advanced than S 7 Is turned off at the time of the turn-off; the advance time is not greater than S 7 Is set to be on-time t s 。
Power switch S 1 ~S 7 The generated loss is mainly divided into on-state loss, off-state loss and switching loss. The modulation method proposed in this embodiment is applied to the power switch S 1 ~S 6 Zero vectors are introduced before and after the on/off of (2), so S 1 ~S 6 The commutation is zero-current switching, and the switching loss is high-performance power switch S 7 Bearing, power switch S 7 The conduction of (2) can eliminate the influence of the current-overlapping time on the output electric energy, and further reduce the power switch S 1 ~S 6 Is not limited, and is not limited.
Further, in order to explain the modulation method in more detail in this embodiment, 2 switching angles (elimination of 5 th Harmonics), the modulation method described in this embodiment will be described.
Setting 2 switch angles alpha 1 、α 2 (elimination 5) th Harmonic). Construction of the Power switching tubes S 1 ~S 7 The driving pulse pattern of n=2 is shown in fig. 10, belonging to the first type. Equation (6) is an N-th harmonic expression of the output current of n=2. Fig. 11 shows the result of solving the switching angle at different modulation ratios for n=2, where, as shown in fig. 11, the modulation ratio mmax is 0.87 at n=2, and the switching angle solved when m is greater than 0.87 does not satisfy the constraint condition, i.e. the switching angle is not solved when m is greater than 0.87.
By controlling the modulation ratio to be less than 0.87, the n-order harmonic expression I of the harmonic to be eliminated is simultaneously achieved a,n =0, constructing a nonlinear equation set, solving to obtain the switching angle size under the modulation ratio smaller than 0.87, and based on the power switch tube S 1 ~S 7 And (3) the driving pulse model and the solved switching angle size, and specific harmonic elimination modulation is realized. Afterwards, power switch tube S is set 7 Power switch tube S in on or off state 1 ~S 6 The current-overlapping time is introduced based on the set rule, so that the circuit of the current source inverter is always in a closed state, the introduction of the current-overlapping time does not influence the finally output current, and the elimination of the influence of the current-overlapping time effect is realized.
Example two
In the second embodiment, the switching angles of 4 are set (5 is eliminated th 、7 th 、11 th Harmonics), a specific harmonic cancellation modulation method for canceling the current source inverter current folding time effect according to the present embodiment will be described.
Setting 4 switch angles alpha 1 、α 2 、α 3 、α 4 (elimination 5) th 、7 th 、11 th Harmonic). The pulse sequence model of n=4, as shown in fig. 12, belongs to the second type. Equation (7) is an N-th harmonic expression of the output current of n=4. Fig. 13 is a solution of the switching angle at different modulation ratios for n=4. As shown in fig. 13, when n=4, the modulation ratio mmax is 0.88, and when m is greater than 0.88, the switching angle is not satisfied, that is, when m is greater than 0.88, the switching angle is not solved.
By controlling the modulation ratio to be less than 0.88, the n-order harmonic expression I of the harmonic to be eliminated is simultaneously achieved a,n =0, constructing a nonlinear equation set, solving to obtain the switching angle size under the modulation ratio smaller than 0.88, and based on the power switch tube S 1 ~S 7 And (3) the driving pulse model and the solved switching angle size, and specific harmonic elimination modulation is realized. Afterwards, power switch tube S is set 7 Power switch tube S in on or off state 1 ~S 6 Is based on the set rule to introduce the overlap time to ensure the currentThe circuit of the source inverter is always in a closed state, and the introduction of the current folding time does not influence the finally output current, so that the influence of the current folding time effect is eliminated.
Example III
In the third embodiment, 6 switching angles are set (elimination of 5 th 、7 th 、11 th 、13 th 、17 th Harmonics), a specific harmonic cancellation modulation method for canceling the current source inverter current folding time effect according to the present embodiment will be described.
Setting 6 switch angles alpha 1 、α 2 、α 3 、α 4 、α 5 、α 6 (elimination 5) th 、7 th 、11 th 、13 th 、17 th Harmonic). The pulse sequence model of n=6, as shown in fig. 14, belongs to the first type. Equation (8) is an N-th harmonic expression of the output current of n=6. Fig. 15 is a solution of the switching angle at different modulation ratios for n=6. As shown in fig. 15, when n=6, the modulation ratio mmax is 0.86, and when m is greater than 0.86, the switching angle is not satisfied, that is, when m is greater than 0.86, the switching angle is not solved.
By controlling the modulation ratio to be smaller than 0.86, the n-order harmonic expression I of the harmonic to be eliminated is simultaneously achieved a,n =0, constructing a nonlinear equation set, solving to obtain the switching angle size under the modulation ratio smaller than 0.86, and based on the power switching tube S 1 ~S 7 And (3) the driving pulse model and the solved switching angle size, and specific harmonic elimination modulation is realized. Afterwards, power switch tube S is set 7 Power switch tube S in on or off state 1 ~S 6 The current-overlapping time is introduced based on the set rule, so that the circuit of the current source inverter is always in a closed state, the introduction of the current-overlapping time does not influence the finally output current, and the elimination of the influence of the current-overlapping time effect is realized.
It will be appreciated by those skilled in the art that the steps of the invention described above may be implemented by general-purpose computer means, alternatively they may be implemented by program code executable by computing means, whereby they may be stored in storage means for execution by computing means, or they may be separately fabricated into individual integrated circuit modules, or a plurality of modules or steps in them may be fabricated into a single integrated circuit module. The present invention is not limited to any specific combination of hardware and software.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
While the foregoing description of the embodiments of the present invention has been presented in conjunction with the drawings, it should be understood that it is not intended to limit the scope of the invention, but rather, it is intended to cover all modifications or variations within the scope of the invention as defined by the claims of the present invention.
Claims (10)
1. A specific harmonic elimination modulation method for eliminating the current source inverter current-overlapping time effect is characterized in that the modulation adopts a current source inverter with an H7 topological structure, and the specific harmonic elimination modulation method comprises the following steps:
setting harmonic frequency to be eliminated, and determining the number of switch angles in specific harmonic elimination modulation;
constructing a power switch tube S according to the constraint condition of specific harmonic elimination modulation of a current source inverter 1 ~S 6 A driving pulse model of (2);
according to power switching tube S in current source inverter 7 Is used for constructing a power switch tube S 7 A driving pulse model of (2);
according to the constructed driving pulse model of each power switching tube, solving the switching angle under different modulation ratios by combining the harmonic frequency and the switching angle number to be eliminated;
based on power switch tube S 1 ~S 7 The driving pulse model and the solved switching angle are used for realizing specific harmonic elimination modulation;
set in the power switch tube S 7 Power switch tube S at on or off time 1 ~S 6 The turn-off or turn-on time of the current source inverter is introduced based on a set rule, and the circuit of the current source inverter is ensured to be always in a closed state.
2. The specific harmonic cancellation modulation method for canceling current source inverter foldback time effect according to claim 1, wherein power switching tube S in said current source inverter 7 Comprises:
power switch tube S 7 The driving pulse of (2) is within the interval of (0, pi/3), and the power switch tube S 7 Is symmetrical about the pi/6 axis;
power switch tube S 7 The driving pulses of (2) are identical in waveform in the (0, pi/3), (pi/3, 2 pi/3) and (2 pi/3, pi) intervals.
3. The specific harmonic cancellation modulation method for canceling current source inverter current folding time effect according to claim 1, wherein said solving the switching angle of each power switch tube under different modulation ratio according to the constructed driving pulse model of each power switch tube by combining the number of harmonic times and the number of switching angles to be cancelled comprises:
obtaining an output current waveform of the current source inverter according to the constructed driving pulse model of the power switching tube, and writing an output current expression of the current source inverter;
performing Fourier decomposition on the output current expression to obtain an n-th harmonic expression of the output current; solving each power switch tube S under different modulation ratios according to the n-order harmonic expression of the output current 1 ~S 7 Is provided.
4. The cancellation of claim 3The specific harmonic elimination modulation method of the current source inverter current-overlapping time effect is characterized in that according to an n-order harmonic expression of output current, each power switch tube S under different modulation ratios is solved 1 ~S 7 Is provided, comprising:
controlling the modulation ratio to make the n-order harmonic expression of the harmonic to be eliminated equal to 0, constructing a nonlinear equation set, and further solving to obtain each power switch tube S under different modulation ratios 1 ~S 7 Is provided.
5. The specific harmonic cancellation modulation method for canceling a current source inverter foldback time effect according to claim 1, wherein the modulation ratio is a ratio of an amplitude of an ac side fundamental current to a dc side current.
6. The specific harmonic cancellation modulation method for canceling current source inverter foldback time effect according to claim 1, wherein power switching tube S is set 1 ~S 6 The rules of the on or off time of (c) are as follows:
for power switch tube S 7 The power switch tube turned off at the on time is turned off in a delayed manner, and the method comprises the following steps: the turn-off time of the power switch tube lags behind the power switch tube S 7 Is set at the on time of (2); the turn-off time of the power switch tube is ahead of that of the power switch tube S 7 Is turned off at the time of the turn-off; delay time is not longer than power switch tube S 7 Is set to be on-time.
7. The specific harmonic cancellation modulation method for canceling current source inverter foldback time effect according to claim 1, wherein power switching tube S is set 1 ~S 6 The rules of the on or off time of (c) are as follows:
s is to the power switch tube 7 The power switching tube which is conducted at the turn-off moment conducts in advance, and the method comprises the following steps: the turn-on time of the power switch tube lags behind the power switch tube S 7 Is set at the on time of (2); the conduction time of the power switch tube is advanced in advance of that of the power switch tube S 7 Is turned off at the time of the turn-off; advance timeNot larger than power switch tube S 7 Is set to be on-time.
8. The specific harmonic cancellation modulation method for canceling current source inverter foldback time effects of claim 1 wherein the adopted H7 current source inverter topology is:
the topological structure is divided into a front stage and a rear stage, and a front stage circuit is formed by a direct-current voltage source U dc An inductance L dc And a power switch tube S connected in parallel with the bus 7 Composition; the post-stage circuit adopts a power switch tube S 1 ~S 6 An H6 converter bridge structure is formed; the three phases of the alternating current output are respectively connected with a capacitor for filtering.
9. The specific harmonic cancellation modulation method for canceling current source inverter foldback time effect of claim 8 wherein power switching tube S 1 ~S 6 The low-speed power switch tube is adopted and comprises a gate turn-off thyristor, a reverse blocking type integrated gate control thyristor and a reverse blocking type insulated gate bipolar transistor.
10. The specific harmonic cancellation modulation method for canceling current source inverter foldback time effect of claim 8 wherein power switching tube S 7 The fully-controlled device with high-speed current conversion capability is adopted, and the fully-controlled device comprises a reverse blocking type high-speed insulated gate bipolar transistor and a silicon carbide-based reverse blocking type metal oxide semiconductor field effect transistor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202310651977.9A CN116505747A (en) | 2023-06-02 | 2023-06-02 | Specific harmonic wave elimination modulation method for eliminating current source inverter current-overlapping time effect |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202310651977.9A CN116505747A (en) | 2023-06-02 | 2023-06-02 | Specific harmonic wave elimination modulation method for eliminating current source inverter current-overlapping time effect |
Publications (1)
Publication Number | Publication Date |
---|---|
CN116505747A true CN116505747A (en) | 2023-07-28 |
Family
ID=87324873
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202310651977.9A Pending CN116505747A (en) | 2023-06-02 | 2023-06-02 | Specific harmonic wave elimination modulation method for eliminating current source inverter current-overlapping time effect |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN116505747A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN117240120A (en) * | 2023-09-18 | 2023-12-15 | 山东科技大学 | Specific detuning modulation method for zero current switching of two-stage five-level current source inverter |
-
2023
- 2023-06-02 CN CN202310651977.9A patent/CN116505747A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN117240120A (en) * | 2023-09-18 | 2023-12-15 | 山东科技大学 | Specific detuning modulation method for zero current switching of two-stage five-level current source inverter |
CN117240120B (en) * | 2023-09-18 | 2024-07-09 | 山东科技大学 | Specific detuning modulation method for zero current switching of two-stage five-level current source inverter |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Ahmed et al. | New multilevel inverter topology with minimum number of switches | |
CN112234808B (en) | Double-frequency ripple suppression circuit and suppression method of single-phase inverter | |
CN110572057B (en) | Current source converter specific harmonic suppression method under extremely low switching frequency | |
CN110920422B (en) | High-power electric vehicle charging device based on current source and control method | |
CN103916040B (en) | Inverter topological circuit, inverting method and inverter | |
CN107134937B (en) | Three-level multi-pulse output transformerless inverter circuit | |
CN107733272B (en) | Four-level three-phase grid-connected inverter, modulation method thereof and power generation system | |
CN116505747A (en) | Specific harmonic wave elimination modulation method for eliminating current source inverter current-overlapping time effect | |
CN107196491A (en) | A kind of pair of buck combining inverter half periods current distortion suppression system and its method | |
WO2018171769A1 (en) | Z-source network active neutral point clamped five-level photovoltaic grid-connected inverter system | |
Wang et al. | A maximum power factor of control algorithms of three-level Vienna rectifier without current distortion at current zero-crossing point | |
WO2021093838A1 (en) | Pulse width modulation method, inverter and controller | |
CN107404249B (en) | Low-leakage-current grid-connected inverter circuit and control method thereof | |
Zhang et al. | Three-Level PWM rectifier based high efficiency batteries charger for EV | |
Shi et al. | Improved double line voltage synthesis strategies of matrix converter for input/output quality enhancement | |
CN112803808A (en) | Control method for reducing high-frequency pulsating current on direct current side of modular multilevel converter | |
KR20220054821A (en) | Soft-Switching Current Source Inverter | |
CN110048631B (en) | Neutral current suppression method for three-phase four-wire grid-connected inverter | |
CN107689740A (en) | A kind of modulator approach of single-phase current code converter | |
CN117240120B (en) | Specific detuning modulation method for zero current switching of two-stage five-level current source inverter | |
CN111245272A (en) | T-shaped nested neutral point clamped hybrid multilevel converter and power generation system | |
Lou et al. | An Improved Modulation Scheme for “Si&SiC” Hybrid 3L-Active NPC Rectifiers with Low Conduction Losses | |
CN205847122U (en) | A kind of converter | |
CN117375384B (en) | Specific detuning modulation method for width modulation ratio of two-stage five-level current source inverter | |
Sundaravel et al. | A Modified Cascaded H-Bridge Multilevel Inverter topology with Reduced Number of Power Electronic Switching Components |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |