CN103943687A - 具有CrCu合金势垒的肖特基势垒二极管 - Google Patents

具有CrCu合金势垒的肖特基势垒二极管 Download PDF

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CN103943687A
CN103943687A CN201410114248.0A CN201410114248A CN103943687A CN 103943687 A CN103943687 A CN 103943687A CN 201410114248 A CN201410114248 A CN 201410114248A CN 103943687 A CN103943687 A CN 103943687A
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schottky barrier
alloy
crcu
crcu alloy
barrier
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刘彦涛
王斌
黄福成
田振兴
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JILIN MAGIC SEMICONDUCTOR Co Ltd
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JILIN MAGIC SEMICONDUCTOR Co Ltd
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    • CCHEMISTRY; METALLURGY
    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22CALLOYS
    • C22C27/00Alloys based on rhenium or a refractory metal not mentioned in groups C22C14/00 or C22C16/00
    • C22C27/06Alloys based on chromium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/47Schottky barrier electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes

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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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  • Ceramic Engineering (AREA)
  • Computer Hardware Design (AREA)
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Abstract

具有CrCu合金势垒的肖特基势垒二极管属于分立半导体器件技术领域。现有技术普遍使用Cr作为肖特基势垒二极管的材料势垒,然而,Cr的功函数较低,导致器件IR参数能力较弱。虽然Pt的功函数较高,但是价格昂贵。而采用CrNi合金取代Cr所获得的IR参数不稳定。本发明之具有CrCu合金势垒的肖特基势垒二极管其特征在于,与N型硅半导体材料形成肖特基势垒层的金属材料为CrCu合金,Cu在CrCu合金中的质量百分含量为0.5~0.35%。本发明其技术效果在于,使得肖特基势垒二极管的IR的值能够降低30%以上,如从40μA降低到20μA,参数能力得到明显改善。

Description

具有CrCu合金势垒的肖特基势垒二极管
技术领域
本发明涉及一种具有CrCu合金势垒的肖特基势垒二极管,属于分立半导体器件技术领域。
背景技术
如附图所示,肖特基势垒二极管管芯结构如下:N+衬底上侧为N-外延层,下侧为背面金属层1;N-外延层上侧周边分布环形氧化层2;在N-外延层上表层内,与环形氧化层2内圆对应,分布P+扩散保护环;正面金属层3覆盖N-外延层未被环形氧化层2遮掩部分及未被P+扩散保护环占用部分的表面,并且正面金属层3与环形氧化层2适当搭接,形成搭接区;正面金属层3与N-外延层之间的金属-半导体界面为肖特基势垒层4。肖特基势垒是指具有整流特性的金属-半导体接触,是在金属-半导体界面上形成的具有整流作用的区域。
肖特基势垒二极管主要参数有VR(反向击穿电压)、IR(反向漏电流)和VF(正向压降),其中IR参数又决定了Tjmax(最高工作结温)。提高IR参数能力能够明显改善肖特基势垒二极管性能。IR参数能力包括参数大小及稳定性。IR参数能力决定于肖特基势垒高度φBn,而肖特基势垒高度φBn又与构成肖特基势垒层4的金属材料功函数密切相关。虽然构成肖特基势垒层4的金属材料,也就是正面金属层3所用金属材料有多种,如Cr、Ni、Pt、Al、Ti等,但是,在该领域普遍使用的金属材料为Cr,Cr材料势垒是已被广泛认知,具有Cr材料势垒的肖特基势垒二极管为很多企业量产。不同金属材料具有不同的功函数,Cr的功函数为4.5eV,相比之下该数值较低,导致势垒高度φBn较低,进一步导致IR参数能力较弱,具有由Cr与N型硅半导体材料形成的肖特基势垒层4的肖特基势垒二极管其IR值大概在40μA左右,并不理想,参数能力较低,有待改善。虽然Pt的功函数高达5.65eV,但是,材料价格昂贵。
现有技术虽然尝试采用CrNi合金取代Cr,然而,所获得的IR参数不稳定。
发明内容
为了提高具有由Cr与N型硅半导体材料形成的肖特基势垒层的肖特基势垒二极管的IR参数能力,我们发明了一种具有CrCu合金势垒的肖特基势垒二极管。
本发明之具有CrCu合金势垒的肖特基势垒二极管其特征在于,与N型硅半导体材料形成肖特基势垒层4的金属材料为CrCu合金,Cu在CrCu合金中的质量百分含量为0.5~0.35%。
本发明其技术效果在于,Cu的功函数为4.65eV,以0.5~0.35%的比率与Cr以合金的方式参与形成肖特基势垒层4,使得具有这种势垒层的肖特基势垒二极管的IR的值能够降低30%,甚至更多,参数能力得到明显改善,例如,当所述CrCu合金Cu的含量为0.5%时,IR的值大幅降低到20μA,并且十分稳定。另外,在CrCu合金中Cu的含量很低,这种合金靶材易于制作,材料成本和制作成本均较低,所以价格较低,适合用到肖特基势垒二极管管芯的批量生产中。
附图说明
附图是具有由金属与N型硅半导体形成的肖特基势垒层的肖特基势垒二极管管芯结构示意图,该图同时作为摘要附图。
具体实施方式
本发明具体方案如下。
与N型硅半导体材料形成肖特基势垒层4的金属材料为CrCu合金,Cu在CrCu合金中的质量百分含量为0.5~0.35%。按照现有工艺即可完成这种肖特基势垒层4的形成,例如,在淀积正面金属层3时,在真空条件下以蒸发或者溅射的方式进行,靶材为Cu的质量百分比为0.5~0.35%的CrCu合金,正面金属层3时淀积完毕,继续在450~550℃温度下持续保温45~55min,完成CrCu合金与硅的合金化,在正面金属层3与N-外延层接触界面生成CrCuSi金属硅化物,正式形成肖特基势垒层4。合金化过程充氮气保护,避免Cr、Cu因高温而被氧化。

Claims (2)

1.一种具有CrCu合金势垒的肖特基势垒二极管,其特征在于,与N型硅半导体材料形成肖特基势垒层(4)的金属材料为CrCu合金,Cu在CrCu合金中的质量百分含量为0.5~0.35%。
2.根据权利要求1所述的具有CrCu合金势垒的肖特基势垒二极管,其特征在于,所述肖特基势垒层(4)的形成方法为,在淀积正面金属层(3)时,在真空条件下以蒸发或者溅射的方式进行,靶材为Cu的质量百分比为0.5~0.35%的CrCu合金,正面金属层(3)时淀积完毕,继续在450~550℃温度下持续保温45~55min,完成CrCu合金与硅的合金化,在正面金属层(3)与N-外延层接触界面生成CrCuSi金属硅化物,合金化过程充氮气保护,正式形成肖特基势垒层(4)。
CN201410114248.0A 2014-03-24 2014-03-24 具有CrCu合金势垒的肖特基势垒二极管 Pending CN103943687A (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105328193A (zh) * 2014-08-12 2016-02-17 有研亿金新材料有限公司 一种粉末冶金靶材及其制造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105328193A (zh) * 2014-08-12 2016-02-17 有研亿金新材料有限公司 一种粉末冶金靶材及其制造方法

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