CN103904182A - Inverted LED chip with patterned substrate and preparation method thereof - Google Patents
Inverted LED chip with patterned substrate and preparation method thereof Download PDFInfo
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- CN103904182A CN103904182A CN201210579025.2A CN201210579025A CN103904182A CN 103904182 A CN103904182 A CN 103904182A CN 201210579025 A CN201210579025 A CN 201210579025A CN 103904182 A CN103904182 A CN 103904182A
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- sapphire substrate
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- 239000000758 substrate Substances 0.000 title claims abstract description 59
- 238000002360 preparation method Methods 0.000 title claims abstract description 14
- 229910052594 sapphire Inorganic materials 0.000 claims abstract description 54
- 239000010980 sapphire Substances 0.000 claims abstract description 54
- 238000005530 etching Methods 0.000 claims abstract description 9
- 238000001259 photo etching Methods 0.000 claims abstract description 9
- 238000005498 polishing Methods 0.000 claims abstract description 9
- 239000011248 coating agent Substances 0.000 claims abstract description 5
- 238000000576 coating method Methods 0.000 claims abstract description 5
- 239000010410 layer Substances 0.000 claims description 51
- 238000010276 construction Methods 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 11
- 238000002161 passivation Methods 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 9
- 239000004065 semiconductor Substances 0.000 claims description 5
- 238000004026 adhesive bonding Methods 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 229910044991 metal oxide Inorganic materials 0.000 claims description 4
- 150000004706 metal oxides Chemical class 0.000 claims description 4
- 229920002120 photoresistant polymer Polymers 0.000 claims description 4
- 239000011241 protective layer Substances 0.000 claims description 4
- 238000007598 dipping method Methods 0.000 claims description 3
- 238000001312 dry etching Methods 0.000 claims description 2
- 238000001039 wet etching Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 4
- 238000000605 extraction Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
- Led Devices (AREA)
Abstract
The invention discloses an inverted LED chip with a patterned substrate and a preparation method thereof. Patterned processing is performed on the sapphire substrate of the inverted chip and thus a light incident area of the chip is increased so that the light-emitting efficiency of the chip is improved. A preparation process is as follows: an InGaIN multilayer structure is firstly prepared on the sapphire substrate and then thinning, polishing, resist coating, photoetching and etching processing are performed on the back face of the sapphire substrate of the inverted chip so that the inverted LED chip device, the patterned shape of the sapphire substrate of which is any common regular pattern such as a triangular pyramid, an inverted cone or a hemisphere and the like, is formed.
Description
Technical field
The present invention relates to a kind of light emitting semiconductor device and preparation method thereof, especially patterned LED chip of Sapphire Substrate and preparation method thereof.
Background technology
High-power and high-luminance LED has become the emphasis of LED industry development at present, is widely used in indoor and outdoor lighting.Consider that traditional formal dress Sapphire Substrate high-power chip P-GaN layer conductivity is not high, need to electric current be uniformly distributed more at the translucent Ni/Au conductive layer of P type layer upper surface deposition one deck, this current-diffusion layer can absorb a part of light and reduce light efficiency, and the low chip thermal resistance that causes of sapphire thermal conductivity coefficient is high simultaneously.For overcoming above-mentioned deficiency, flip-chip is proposed.The light that send active area like this takes out through transparent Sapphire Substrate, has eliminated the absorption of current-diffusion layer and electrode pair light, and wherein downward part upwards ejaculation through reflective layer reflects after, has greatly improved light efficiency.Heat is directly transferred on substrate by electrode simultaneously, and heat conductivility is good.
Summary of the invention
First technical problem that the present invention will solve is: a kind of light-emitting diode flip chip structure that improves light extraction efficiency is provided, and this structure is for improving the light efficiency of chip.
Second technical problem that the present invention will solve is: a kind of preparation method of the light-emitting diode flip-chip that improves light extraction efficiency is provided, and the method is for improving the light efficiency of chip.
In order to solve above-mentioned first technical problem, the present invention proposes a kind of light-emitting diode flip chip structure that improves light extraction efficiency, comprise the Sapphire Substrate for bright dipping, the InGaAlN sandwich construction forming in described Sapphire Substrate, graphical etching has been carried out on described Sapphire Substrate surface.
Preferably: described InGaAlN sandwich construction comprises N-type GaN layer, active layer and P type GaN layer, the reflector forming on described P type GaN layer, be etched in surface element subregion, reflector and expose the N electrode hole that N-type GaN layer forms, at the passivation layer of the subregion on surface, reflector and the formation of the sidewall of N electrode hole, in N electrode hole plated metal and by multiple N electrode holes couple together form N electrode, be not passivated the P electrode forming on the reflector of layer covering, described passivation layer separates N electrode and P electrode
Preferably: the thickness of described Sapphire Substrate is 100 μ m～200 μ m.
Preferably: the graphics shape of described patterned Sapphire Substrate is that triangular pyramid is capable, the common regular shape arbitrarily such as turbination or hemisphere.
In order to solve above-mentioned second technical problem, the present invention proposes a kind of preparation method of the light-emitting diode flip-chip that improves light extraction efficiency, comprise the following steps: in Sapphire Substrate, prepare InGaAlN sandwich construction; Attenuate and polishing are carried out in the Sapphire Substrate back side; Gluing, metal or metal oxide semiconductor for face outside the Sapphire Substrate back side are protected; Resist coating in Sapphire Substrate after attenuate and polishing, carries out photoetching treatment; Sapphire Substrate after photoetching treatment is carried out to graphical etching; Remove photoresist; Remove the protective layer of the face outside the Sapphire Substrate back side.
Preferably: described InGaAlN sandwich construction comprises N-type GaN layer, active layer and P type GaN layer, the reflector forming on described P type GaN layer, be etched in surface element subregion, reflector and expose the N electrode hole that N-type GaN layer forms, at the passivation layer of the subregion on surface, reflector and the formation of the sidewall of N electrode hole, in N electrode hole plated metal and by multiple N electrode holes couple together form N electrode, be not passivated the P electrode forming on the reflector of layer covering, described passivation layer separates N electrode and P electrode.
Preferably: described Sapphire Substrate is thinned and is polished to 100 μ m～200 μ m.
Preferably: the graphical lithographic method of described Sapphire Substrate is dry etching.
Preferably: the graphical lithographic method of described Sapphire Substrate is wet etching.
Preferably: described graphical process is carried out on whole wafer or singulated dies.
Preferably: the figure of described etching can be that triangular pyramid is capable, the common regular shape arbitrarily such as turbination or hemisphere.
Beneficial effect of the present invention is as follows:
Compared to existing technology, the present invention, due to the Sapphire Substrate of flip-chip has been carried out to graphical treatment, has reduced the total reflection effect of light in chip, impels more light to transmit in chip, be equivalent to and increased chip light-emitting area, thereby greatly improved the luminous efficiency of chip.
Brief description of the drawings
Fig. 1 is the patterned a kind of shape vertical view of Sapphire Substrate of the present invention.
Fig. 2 is the patterned another kind of shape vertical view of Sapphire Substrate of the present invention.
Fig. 3 is the patterned another kind of shape vertical view of Sapphire Substrate of the present invention.
Fig. 4 and Fig. 5 are the schematic diagram of the manufacture process of first embodiment of the invention.
Fig. 6 and Fig. 7 are the schematic diagram of the manufacture process of second embodiment of the invention.
Embodiment
The present invention proposes a kind of flip LED chips structure, comprise the graphical Sapphire Substrate for bright dipping, the InGaAlN sandwich construction forming in described Sapphire Substrate, the patterned shape of described Sapphire Substrate can be that the triangular pyramid shown in Fig. 1 is capable, the common regular shape arbitrarily such as turbination, the hemisphere shown in Fig. 3 shown in Fig. 2.
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in further detail.
Fig. 4 and Fig. 5 are the schematic diagram of first embodiment of the invention manufacture process, as shown in Figure 4, prepare InGaAlN sandwich construction in Sapphire Substrate 15.Described InGaAlN sandwich construction comprises N-type GaN layer 14, active layer 13 and P type GaN layer 12.On P type GaN layer 12, prepare P electrode 11, on N-type GaN layer 14, prepare N electrode 16.As shown in Figure 5; attenuate and polishing are carried out in flip-chip Sapphire Substrate 15 back sides; gluing, metal or metal oxide semiconductor for face outside the flip-chip Sapphire Substrate back side are protected; resist coating in Sapphire Substrate 15 after attenuate and polishing; carry out photoetching treatment, the Sapphire Substrate after photoetching treatment 15 is carried out to graphical etching, remove photoresist; remove the protective layer of the face outside the Sapphire Substrate back side, form the substrate of graphical shape 19.Finally on N electrode, prepare N-type welding electrode 17, on P electrode, prepare P type welding electrode 18.Chip profile structure after having prepared as shown in Figure 5.
Fig. 6 and Fig. 7 are the schematic diagram of second embodiment of the invention manufacture process, as shown in Figure 6, prepare InGaAlN sandwich construction in Sapphire Substrate 21.Described InGaAlN sandwich construction comprises N-type GaN layer 22, active layer 23 and P type GaN layer 24, the reflector 25 forming on described P type GaN layer 24, be etched to and expose the N electrode hole 26 that N-type GaN layer 22 forms in 25 surface element subregions, reflector, the passivation layer 27 forming at surface element subregion and the N electrode hole sidewall in reflector 25.As shown in Figure 7, plated metal multiple N electrode holes are coupled together and form N electrode 28 in N electrode hole, forms P electrode 29 not being passivated on the reflector that layer covers, and described passivation layer separates N electrode and P electrode.Attenuate and polishing are carried out in flip-chip Sapphire Substrate 21 back sides; gluing, metal or metal oxide semiconductor for face outside flip-chip Sapphire Substrate 21 back sides are protected; resist coating in Sapphire Substrate 21 after attenuate and polishing; carry out photoetching treatment; Sapphire Substrate after photoetching treatment 21 is carried out to graphical etching; remove photoresist, finally remove the protective layer of the face outside the Sapphire Substrate back side, form the substrate of graphical shape 20.Chip profile structure after having prepared as shown in Figure 7.
Claims (10)
1. a flip LED chips, comprises the Sapphire Substrate for bright dipping, and the InGaAlN sandwich construction forming in described Sapphire Substrate, is characterized in that: graphical etching has been carried out on the Sapphire Substrate surface of described flip LED chips.
2. flip LED chips as claimed in claim 1, it is characterized in that: described InGaAlN sandwich construction comprises N-type GaN layer, active layer and P type GaN layer, the reflector forming on described P type GaN layer, be etched in surface element subregion, reflector and expose the N electrode hole that N-type GaN layer forms, at the passivation layer of the subregion on surface, reflector and the formation of the sidewall of N electrode hole, in N electrode hole plated metal and by multiple N electrode holes couple together form N electrode, be not passivated the P electrode forming on the reflector of layer covering, described passivation layer separates N electrode and P electrode.
3. flip LED chips as claimed in claim 1 or 2, is characterized in that: the thickness of described Sapphire Substrate is 100 μ m～200 μ m.
4. flip LED chips as claimed in claim 1 or 2, is characterized in that: the graphics shape of described patterned Sapphire Substrate is that triangular pyramid is capable, the common regular shape arbitrarily such as turbination or hemisphere.
5. a preparation method for flip LED chips, comprises the following steps:
In Sapphire Substrate, prepare InGaAlN sandwich construction;
Attenuate and polishing are carried out in the described Sapphire Substrate back side;
Gluing, metal or metal oxide semiconductor for face outside the described Sapphire Substrate back side are protected;
Resist coating in Sapphire Substrate after attenuate and polishing, carries out photoetching treatment;
Sapphire Substrate after photoetching treatment is carried out to graphical etching;
Remove photoresist;
Remove the protective layer of the face outside the Sapphire Substrate back side.
6. the preparation method of flip LED chips as claimed in claim 6, it is characterized in that: described InGaAlN sandwich construction comprises N-type GaN layer, active layer and P type GaN layer, the reflector forming on described P type GaN layer, be etched in surface element subregion, reflector and expose the N electrode hole that N-type GaN layer forms, at the passivation layer of the subregion on surface, reflector and the formation of the sidewall of N electrode hole, in N electrode hole plated metal and by multiple N electrode holes couple together form N electrode, be not passivated the P electrode forming on the reflector of layer covering, described passivation layer separates N electrode and P electrode.
7. the preparation method of flip LED chips as claimed in claim 6, is characterized in that: the graphical lithographic method of described Sapphire Substrate is dry etching.
8. the preparation method of flip LED chips as claimed in claim 6, is characterized in that: the graphical lithographic method of described Sapphire Substrate is wet etching.
9. the preparation method of flip LED chips as claimed in claim 6, is characterized in that: described graphical process is carried out on whole wafer or singulated dies.
10. the preparation method of flip LED chips as claimed in claim 6, is characterized in that: the figure of described etching can be that triangular pyramid is capable, the common regular shape arbitrarily such as turbination or hemisphere.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210579025.2A CN103904182A (en) | 2012-12-28 | 2012-12-28 | Inverted LED chip with patterned substrate and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210579025.2A CN103904182A (en) | 2012-12-28 | 2012-12-28 | Inverted LED chip with patterned substrate and preparation method thereof |
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| Publication Number | Publication Date |
|---|---|
| CN103904182A true CN103904182A (en) | 2014-07-02 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210579025.2A Pending CN103904182A (en) | 2012-12-28 | 2012-12-28 | Inverted LED chip with patterned substrate and preparation method thereof |
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| Country | Link |
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| CN (1) | CN103904182A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104183678A (en) * | 2014-08-22 | 2014-12-03 | 江苏鑫博电子科技有限公司 | LED flip chip and patterned substrate and manufacturing method of LED flip chip |
| CN104952992A (en) * | 2015-04-30 | 2015-09-30 | 华南理工大学 | Arc triangular pyramid patterned LED (light emitting diode) substrate and LED chip |
| WO2021212312A1 (en) * | 2020-04-21 | 2021-10-28 | 重庆康佳光电技术研究院有限公司 | Light-emitting diode and light purification method therefor |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050269588A1 (en) * | 2004-06-03 | 2005-12-08 | Samsung Electro-Mechanics Co., Ltd. | Flip chip type nitride semiconductor light-emitting diode |
| CN102270633A (en) * | 2011-07-29 | 2011-12-07 | 贵州大学 | High-power flip-chip array LED chip and manufacturing method thereof |
| CN102354723A (en) * | 2011-10-24 | 2012-02-15 | 南昌黄绿照明有限公司 | Flip semiconductor luminescent device and manufacturing method thereof |
-
2012
- 2012-12-28 CN CN201210579025.2A patent/CN103904182A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050269588A1 (en) * | 2004-06-03 | 2005-12-08 | Samsung Electro-Mechanics Co., Ltd. | Flip chip type nitride semiconductor light-emitting diode |
| CN102270633A (en) * | 2011-07-29 | 2011-12-07 | 贵州大学 | High-power flip-chip array LED chip and manufacturing method thereof |
| CN102354723A (en) * | 2011-10-24 | 2012-02-15 | 南昌黄绿照明有限公司 | Flip semiconductor luminescent device and manufacturing method thereof |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104183678A (en) * | 2014-08-22 | 2014-12-03 | 江苏鑫博电子科技有限公司 | LED flip chip and patterned substrate and manufacturing method of LED flip chip |
| CN104952992A (en) * | 2015-04-30 | 2015-09-30 | 华南理工大学 | Arc triangular pyramid patterned LED (light emitting diode) substrate and LED chip |
| WO2021212312A1 (en) * | 2020-04-21 | 2021-10-28 | 重庆康佳光电技术研究院有限公司 | Light-emitting diode and light purification method therefor |
| US11658270B2 (en) | 2020-04-21 | 2023-05-23 | Chongqing Konka Photoelectric Technology Research Institute Co., Ltd. | Light emitting diode and light purification method therefor |
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Application publication date: 20140702 |