CN103904026B - 微电子芯片用低介电常数薄膜层的制造工艺 - Google Patents

微电子芯片用低介电常数薄膜层的制造工艺 Download PDF

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CN103904026B
CN103904026B CN201410136439.7A CN201410136439A CN103904026B CN 103904026 B CN103904026 B CN 103904026B CN 201410136439 A CN201410136439 A CN 201410136439A CN 103904026 B CN103904026 B CN 103904026B
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dielectric constant
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孙旭辉
夏雨健
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Foshan Pingfeng Machinery Equipment Co.,Ltd.
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]

Abstract

本发明公开一种低介电常数薄膜层的制备方法，当炉体内真空度小于10‑3Pa时，启动射频电源和匹配器；开启第二质量流量计后，通入用于排净炉体内残存气体的排气氮气；将八甲基环四硅氧烷、环己烷混合均匀并注入所述耐压不锈钢釜内，关闭手动挡板阀，将鼓泡氮气、惰性气体分别从第一进气管、第二进气管注入并依次经过第一耐压混气罐、耐压不锈钢釜、第一喷嘴送入炉体内，从而将八甲基环四硅氧烷、环己烷带入炉体内，八甲基环四硅氧烷、环己烷、鼓泡氮气和惰性气体在等离子条件下在基底表面沉积一薄膜层。本发明实现了便捷精确调控薄膜介电常数值并获得了低介电常数值的薄膜层，此薄膜层化学成分更均匀，具有较好的热稳定性、硬度，提高了薄膜的平整度。

Description

微电子芯片用低介电常数薄膜层的制造工艺
技术领域
本发明涉及一种微电子芯片用低介电常数薄膜层的制造工艺，属于半导体技术领域。
背景技术
在集成电路内部，各个器件间的链接主要是靠金属导线。随着集成电路技术的发展，芯片中互联线密度不断增加，互连线的宽度和间距不断减小，由此产生的互联电阻（R）和电容（C）所产生的寄生效应越来越明显。为了降低互联RC延迟，提升芯片性能，具有低介电常数（k）的材料不断被提出和采用，并成为主要发展趋势。
用于制备低介电常数材料层的方法通常有等离子体增强化学气相沉积（PECVD）和旋涂（spin-caoting）两种方法。其中，等离子体增强化学气相沉积由于具有薄膜均匀，成本低等特点，被广泛应用于半导体工业中。
在众多可用于制备低介电常数材料的物质中，正硅酸四乙酯（TEOS）得到了极为广泛的应用，在集成电路发展的前期作为绝缘材料的常用前驱体，然而由于其碳硅比较低，随着芯片制造水平的提高，有正硅酸四乙酯直接制备的绝缘材料由于其介电常数值较高，越来越不适合作为超大规模集成电路中的绝缘材料，因此，越来越的研究者开始尝试通过改变生产工艺或者添加其他材料来进一步降低所制得的材料的介电常数值。然而，由于硅氧烷材料的崛起，越来越多的科学家转向研究新型材料。正硅酸四乙酯由于得不到较高关注，加之本身碳硅比较低的劣势，仍然需要大量地研究来改进其性能。
发明内容
本发明目的是提供一种微电子芯片用低介电常数薄膜层的制造工艺，该实现了便捷精确调控薄膜介电常数值并获得了低介电常数值的薄膜层，此薄膜层化学成分更均匀，具有较好的热稳定性、硬度，提高了薄膜的平整度。
为达到上述目的，本发明采用的技术方案是：一种微电子芯片用低介电常数薄膜层的制造工艺，所述制造工艺基于一沉积装置，该沉积装置包括炉体、分别位于炉体两侧的耐压不锈钢釜、真空泵，所述炉体前半段缠绕有感应线圈，此感应线圈依次连接到13.36MHz射频电源和匹配器，炉体后半段为加热温区；包括以下步骤：
步骤一、抽除炉体内气体形成低于10-3Pa时真空条件，启动13.36MHz射频电源和匹配器；
步骤二、将正硅酸四乙酯注入所述耐压不锈钢釜内，此耐压不锈钢釜与炉体一端通过管路密封连接，将分别来自2个进气管的氮气和含碳气体混合后通入储存有正硅酸四乙酯的耐压不锈钢釜，正硅酸四乙酯在氮气和含碳气体带动下注入炉体内，所述含碳气体为甲烷、乙烯、乙烷、乙炔中的至少一种，同时向炉体注入惰性气体；
步骤三、正硅酸四乙酯、氮气和含碳气体在13.36MHz射频电源和匹配器激发下形成等离子从而在基底表面沉积一薄膜层；
步骤四、沉积结束后，关闭13.36MHz射频电源和匹配器，对炉体进行放气，待炉体内压力恢复至大气压时，将已沉积的薄膜层转移至炉体的加热温区内后，抽除炉体内残余气体，当炉体内真空度小于10-3Pa时，加热至300℃~800℃保温进行退火处理后，退火的条件为真空无气流，从而获得所述低介电常数薄膜层。
上述技术方案中进一步改进的方案如下：
1. 上述方案中，所述步骤二中含碳气体为由甲烷、乙烯组成的混合气体，其中，甲烷流量为50sccm，乙烯流量为30sccm。
2. 上述方案中，所述步骤二中含碳气体为由乙烯、丙烷组成的混合气体，其中，乙烯流量为40sccm，丙烷流量为30sccm。
3. 上述方案中，所述步骤二中氮气和含碳气体混合后流量为0.1sccm~1000sccm。
4. 上述方案中，所述步骤五三中13.36MHz射频电源、匹配器的功率为25W~300W，沉积时间为30秒~1小时。
由于上述技术方案运用，本发明与现有技术相比具有下列优点和效果：
本发明微电子芯片用低介电常数薄膜层的制造工艺，其将正硅酸四乙酯注入所述耐压不锈钢釜内，此耐压不锈钢釜与炉体一端通过管路密封连接，将分别来自2个进气管的氮气和含碳气体混合后通入储存有正硅酸四乙酯的耐压不锈钢釜，正硅酸四乙酯在氮气和含碳气体带动下注入炉体内，实现了便捷精确调控薄膜介电常数值并获得了低介电常数值的薄膜层，此薄膜层化学成分更均匀，具有较好的热稳定性、硬度，提高了薄膜的平整度；其次，将已沉积的薄膜层加热至300℃~800℃保温进行退火处理后，退火的条件为真空无气流，由于隔绝了大气的影响，性能重复性大大提高了，也避免了存在湍流，样品表面气体氛围较为均匀，同时样品表面温度更加接近设定温度，因而具有更好的均匀性与可靠性；再次，将正硅酸四乙酯注入所述耐压不锈钢釜内，正硅酸四乙酯在氮气和含碳气体带动下注入炉体内，含碳气体为甲烷、乙烯、乙烷、乙炔中的至少一种，同时向炉体注入惰性气体，此气流所起的作用主要为带动正硅酸四乙酯、含碳气体，使其均匀分布并能覆盖待沉积的样品区。
具体实施方式
下面结合实施例对本发明作进一步描述：
实施例1~7：一种微电子芯片用低介电常数薄膜层的制造工艺，其特征在于：所述制造工艺基于一沉积装置，该沉积装置包括炉体、分别位于炉体两侧的耐压不锈钢釜、真空泵，所述炉体前半段缠绕有感应线圈，此感应线圈依次连接到13.36MHz射频电源和匹配器，炉体后半段为加热温区；包括以下步骤：
步骤一、抽除炉体内气体形成低于10-3Pa时真空条件，启动13.36MHz射频电源和匹配器；
步骤二、将正硅酸四乙酯注入所述耐压不锈钢釜内，此耐压不锈钢釜与炉体一端通过管路密封连接，将分别来自2个进气管的氮气和含碳气体混合后通入储存有正硅酸四乙酯的耐压不锈钢釜，正硅酸四乙酯在氮气和含碳气体带动下注入炉体内，所述含碳气体为甲烷、乙烯、乙烷、乙炔中的至少一种，同时向炉体注入惰性气体；
步骤三、正硅酸四乙酯、氮气和含碳气体在13.36MHz射频电源和匹配器激发下形成等离子从而在基底表面沉积一薄膜层；
步骤四、沉积结束后，关闭13.36MHz射频电源和匹配器，对炉体进行放气，待炉体内压力恢复至大气压时，将已沉积的薄膜层转移至炉体的加热温区内后，抽除炉体内残余气体，当炉体内真空度小于10-3Pa时，加热至300℃~800℃保温进行退火处理后，退火的条件为真空无气流，从而获得所述低介电常数薄膜层。
上述步骤二中含碳气体为由甲烷、乙烯组成的混合气体，其中，甲烷流量为50sccm，乙烯流量为30sccm。
上述步骤五三中13.36MHz射频电源、匹配器的功率为25W~300W，沉积时间为30秒~1小时。
实施例1：
实施例2：
实施例3：
实施例4：
实施实例5：
实施例6：
实施例7：
上述实施例只为说明本发明的技术构思及特点，其目的在于让熟悉此项技术的人士能够了解本发明的内容并据以实施，并不能以此限制本发明的保护范围。凡根据本发明精神实质所作的等效变化或修饰，都应涵盖在本发明的保护范围之内。

Claims (4)

1.一种微电子芯片用低介电常数薄膜层的制造工艺，其特征在于：所述制造工艺基于一沉积装置，该沉积装置包括炉体、分别位于炉体两侧的耐压不锈钢釜、真空泵，所述炉体前半段缠绕有感应线圈，此感应线圈依次连接到13.36MHz射频电源和匹配器，炉体后半段为加热温区；包括以下步骤：
步骤一、抽除炉体内气体形成低于10-3Pa的真空条件，启动13.36MHz射频电源和匹配器；
步骤二、将正硅酸四乙酯注入所述耐压不锈钢釜内，此耐压不锈钢釜与炉体一端通过管路密封连接，将分别来自2个进气管的氮气和含碳气体混合后通入储存有正硅酸四乙酯的耐压不锈钢釜，正硅酸四乙酯在氮气和含碳气体带动下注入炉体内，所述含碳气体为甲烷、乙烯、乙烷、乙炔中的至少一种，同时向炉体注入惰性气体；
步骤三、正硅酸四乙酯、氮气和含碳气体在13.36MHz射频电源和匹配器激发下形成等离子从而在基底表面沉积一薄膜层；
步骤四、沉积结束后，关闭13.36MHz射频电源和匹配器，对炉体进行放气，待炉体内压力恢复至大气压时，将已沉积的薄膜层转移至炉体的加热温区内后，抽除炉体内残余气体，当炉体内真空度小于10-3Pa时，加热至300℃~800℃保温进行退火处理后，退火的条件为真空无气流，从而获得所述低介电常数薄膜层。
2.根据权利要求1所述的低介电常数薄膜层的制造工艺，其特征在于：所述步骤二中含碳气体为由甲烷、乙烯组成的混合气体，其中，甲烷流量为50sccm，乙烯流量为30sccm。
3.根据权利要求1所述的低介电常数薄膜层的制造工艺，其特征在于：所述步骤二中氮气和含碳气体混合后流量为0.1sccm~1000sccm。
4.根据权利要求1所述的低介电常数薄膜层的制造工艺，其特征在于：所述步骤三中13.36MHz射频电源、匹配器的功率为25W~300W，沉积时间为30秒~1小时。
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