CN103885848B - The deadlock of a kind of microprocessor, the protection circuit of program fleet fault and implementation method - Google Patents
The deadlock of a kind of microprocessor, the protection circuit of program fleet fault and implementation method Download PDFInfo
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- CN103885848B CN103885848B CN201410091945.9A CN201410091945A CN103885848B CN 103885848 B CN103885848 B CN 103885848B CN 201410091945 A CN201410091945 A CN 201410091945A CN 103885848 B CN103885848 B CN 103885848B
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Abstract
The invention discloses a kind of for microprocessor deadlock, the protection circuit of program fleet fault, this protection circuit is located between microprocessor module and outside execution circuit, including hardware protection unit and three state buffer signal processing unit；The input of hardware protection unit is connected with microprocessor module, and outfan is connected with the Enable Pin of three state buffer signal processing unit；The input of three state buffer signal processing unit is connected with microprocessor module, and outfan performs circuit with outside and is connected；When deadlock or program fleet fault occurs in microprocessor module, three state buffer signal processing unit performs circuit output high-impedance state and drives signal to outside.The present invention improves the response speed that microprocessor crashes, program fleet is protected, and then greatly reduces industry frequency conversion motor actuator device and the abnormal operation of related industries automation equipment and damage risk.
Description
Technical field
The present invention relates to a kind of protection circuit, be specifically related to a kind of protection circuit and implementation thereof that under microprocessor deadlock, program fleet fault, outside is performed circuit.
Background technology
Industrial automation electronic equipment is widely used in people's production process at present, is greatly improved labor productivity, creates immeasurable economic benefit.
But in severe electromagnetic interference environment occasion, microprocessor in industrial automation electronic equipment is likely to occur the abnormal phenomenas such as deadlock and program fleet, now microprocessor controls the outside duty performing circuit is unpredictable, is likely to result in serious people's property and human loss.
The most conventional technology is to use microprocessor internal or increase watchdog circuit monitoring microprocessor internal processes execution state outside microprocessor.Occurring crashing and after the abnormal phenomena such as program fleet at microprocessor in theory, watchdog circuit can force microprocessor to carry out the operation that resets, and normally works recovering microprocessor.But the shortcoming of this technology maximum is, when the program execution cycle is longer, the cycle of watch dog monitoring lengthens the most therewith, and occurring that abnormal conditions find to house dog and perform to reset in operation during this period of time, microprocessor controls the duty of outside execution circuit and is still that unpredictable.And along with the development of science and technology, people are more and more higher for the requirement of industrial automation electronic equipment, and the program of microprocessor internal also becomes increasingly complex so that the problems referred to above need all the more to cause concern.
It is therefore desirable to introduce the deadlock of a kind of microprocessor, the protection circuit device of program fleet fault and its implementation to solve the problems referred to above.
Summary of the invention
The invention aims to solve industrial automation electronic equipment, in severe electromagnetic interference occasion, microprocessor deadlock, the abnormal phenomena of program fleet occur, and cause the outside problem performing runaway electric circuit.
In order to achieve the above object, the invention provides the deadlock of a kind of microprocessor, the protection circuit of program fleet fault, this protection circuit is located between microprocessor module and outside execution circuit, including hardware protection unit and three state buffer signal processing unit；
The input of hardware protection unit is connected with microprocessor module, and outfan is connected with the Enable Pin of three state buffer signal processing unit；
The input of three state buffer signal processing unit is connected with microprocessor module, and outfan performs circuit with outside and is connected；
When deadlock or program fleet fault occurs in microprocessor module, three state buffer signal processing unit performs circuit output high-impedance state and drives signal to outside.
Being further improvement of the present invention: when deadlock or program fleet fault occurs in microprocessor module, hardware protection unit sends high level to three state buffer signal processing unit after receiving the status signal that microprocessor module exports and enables signal.
nullWherein，In hardware protection unit，One end of resistance R7 is connected to described microprocessor module，This end is simultaneously connected with one end of resistance R9，The other end of resistance R7 is connected with one end of electric capacity C2，The other end of resistance R9 is connected and ground connection with the anode of diode D2，The other end of electric capacity C2 and the anode of diode D1、The negative electrode of diode D2 is connected，The anode of diode D2 and one end of resistance R8、One end of electric capacity C3 is connected，The negative electrode of diode D1 and the other end of resistance R8、The other end of electric capacity C3、The in-phase end of comparator U1 is connected，The end of oppisite phase of comparator U1 and one end of resistance R1、One end of resistance R2 is connected，Another termination power of resistance R1，The other end ground connection of resistance R2，The outfan of comparator U1 is connected with one end of resistance R4，The other end of resistance R4 and resistance R3、The base stage of positive-negative-positive triode Q1 is connected，The other end of resistance R3、The emitter stage of audion Q1 is connected with power supply，The colelctor electrode of audion Q1 and one end of resistance R5、One end of resistance R6 is connected，The other end of resistance R5 and three state buffer signal processing unit、One end of electric capacity C1 is connected，The other end ground connection of electric capacity C1，The other end ground connection of resistance R6.
Three state buffer signal processing unit comprises three-state buffer circuit.
Present invention also offers the implementation method of above-mentioned protection circuit, comprise the following steps:
Step one, working state signal and the microprocessor module control signal of microprocessor module internal processes are separately input into hardware protection unit and three state buffer signal processing unit by microprocessor module；
Step 2, status signal is converted to enable signal, is sent to three state buffer signal processing unit by hardware protection unit；
Step 3, three state buffer signal processing unit is according to the control signal received and enables signal, and the driving signal of output correspondence performs circuit to outside.
Wherein, above-mentioned status signal is high low duty ratio level signal, high level signal, low level signal or high-impedance state, controls the output of its I/O mouth according to the instruction of microprocessor module internal processes.
Enabling signal is high level signal or low level signal.
Control signal is high low duty ratio level signal, high level signal, low level signal or high-impedance state.
Driving signal is high low duty ratio level signal, high level signal, low level signal or high-impedance state.
The present invention has the advantage that compared to existing technology
1, the present invention improves the response speed that microprocessor crashes, program fleet is protected, and then greatly reduces industry frequency conversion motor actuator device and the abnormal operation of related industries automation equipment and damage risk；
2, apparatus structure of the present invention is simple, effect is obvious, reliability is high, in the circuit design outside industrial automation equipment electronic equipment, can use flexibly, it is achieved its protected effect.
Accompanying drawing explanation
Fig. 1 is the structured flowchart of protection circuit of the present invention；
Fig. 2 is the circuit diagram of hardware protection unit in Fig. 1；
Fig. 3 is the protection circuit of the present invention structural representation for inverter circuit；
Fig. 4 is the protection circuit of the present invention structural representation for industrial automatic control circuit.
Detailed description of the invention
The present invention is described in detail below in conjunction with the accompanying drawings.
Fig. 1 is the structured flowchart of the protection circuit of a kind of microprocessor of the present invention deadlock, program fleet fault; this protection circuit is located at microprocessor module and the outside of microprocessor module control performs between circuit, including hardware protection unit, three state buffer signal processing unit.Further, microprocessor module couples hardware protection unit, three state buffer signal processing unit；Hardware protection unit couples microprocessor module, three state buffer signal processing unit；Three state buffer signal processing unit couples microprocessor module, hardware protection unit, outside execution circuit.
Wherein: microprocessor module is microprocessor (MCU), single-chip microcomputer, digital signal processor (DSP), CPLD (CPLD) or the circuit module of Programmable Logic Controller (PLC) comprising CPU (CPU)；Three state buffer signal processing unit comprises the circuit module of three state buffer；In conjunction with Fig. 2; hardware protection unit is by resistance R1, R2, R3, R4, R5, R6, R7, R8, R9; electric capacity C1, C2, C3; diode D1, D2; PNP type triode Q1 and comparator U1 are constituted, and each composition mutual relation is: C2 with R7 connects, R7 with R9 connects; the other end of C2 is connected with the negative electrode of D2, and the other end of R9 is connected with the anode of D2 ground connection；The negative electrode of D2 is connected with the anode of D1, and in parallel with C3 after D1, D2 series connection, C3 with R8 is in parallel, and the negative electrode of D1 is connected with the in-phase end of U1；R1 with R2 connects, another termination power of R1, the other end ground connection of R2, and R1, R2 common point is connected with the end of oppisite phase of U1；R3 with R4 connects, another termination power of R3, and the other end of R4 is connected with the outfan of U1；The emitter stage of Q1 connects power supply, and base stage is connected with the common point of R3, R4, colelctor electrode be connected with R6 after ground connection；R5, C1 connect, and the other end of R5 is connected with the colelctor electrode of Q1, the other end ground connection of C1；The common point of R7, R9 couples mutually with microprocessor module；The common point of R5, C1 couples mutually with three state buffer signal processing unit.
Above-mentioned protection circuit, its work implementation method is:
Step one, the program work status signal State within microprocessor module and microprocessor control signals Control is inputed to hardware protection unit and three state buffer signal processing unit by microprocessor module respectively；
Step 2, status signal State is converted to enable signal EN, is sent to three state buffer signal processing unit by hardware protection unit；
Step 3, three state buffer signal processing unit is according to control signal Control received and enables signal EN, and the driving signal Drive of output correspondence performs circuit module to outside.
Generally, above-mentioned microprocessor internal program work status signal State is high low duty ratio level signal, high level signal, low level signal or high-impedance state, is to control the output of its I/O mouth according to described microprocessor module microprocessor internal programmed instruction；Enabling signal EN is high level signal or low level signal further；Control signal Control is high low duty ratio level signal, high level signal or low level signal or high-impedance state further；Driving signal Drive is high low duty ratio level signal, high level signal, low level signal or high-impedance state further.
Concrete condition is as follows:
When in microprocessor module, CPU is working properly, it is high low duty ratio level signal that microprocessor module sends status signal State, through R7, R8, R9, C2, C3, D1, D2 constitute every directly, logical friendship, filter circuit, a high level signal is produced at U1 in-phase end, and more than by R1, the high level signal that R2 dividing potential drop produces at U1 end of oppisite phase, U1 in-phase end, backward end signal is after U1 processes, U1 output high level or high-impedance state, Q1 is made to be in cut-off duty, therefore, it is low level that hardware protection unit sends enable signal EN, after the three state buffer in three state buffer signal processing unit receives judgement, the driving signal Drive of output is high low duty ratio level signal or high level signal or low level signal.
When in microprocessor module, crashing with program fleet abnormal work occurs in CPU, it is high level signal that microprocessor module sends status signal State, low level signal or high-impedance state, through R7, R8, R9, C2, C3, D1, D2 constitute every directly, logical friendship, filter circuit, a low level signal is produced at U1 in-phase end, and less than by R1, the high level signal that R2 dividing potential drop produces at U1 end of oppisite phase, U1 in-phase end, backward end signal is after U1 processes, U1 output low level, Q1 is made to be in saturated, therefore, it is high level that hardware protection unit module sends enable signal EN, after the three state buffer in three state buffer signal processing unit receives judgement, the driving signal Drive of output is high-impedance state.
Fig. 3 specifically describes the present invention and is applied to the schematic diagram of inverter circuit embodiment, specifically, it is the driving signal Drive of the present invention to be exported to inverter or frequency conversion motor driver or the inverter circuit of servo-driver, occur crashing and under program fleet abnormal conditions at microprocessor, the problem that effectively prevent microprocessor uncontrolled driving inverter circuit electronic power converter part.
Fig. 4 specifically describes the present invention and is applied to the schematic diagram of industrial automatic control circuit embodiments, specifically, it is that the driving signal Drive of the present invention is exported to industrial automation switch device circuit, occur crashing and under program fleet abnormal conditions at microprocessor, it is possible to effectively prevent the problem that microprocessor is out of control to industrial automation switch device circuit.
Claims (7)
1., for microprocessor deadlock, a protection circuit for program fleet fault, described protection circuit is located between microprocessor module and outside execution circuit；It is characterized in that: described protection circuit includes hardware protection unit and three state buffer signal processing unit；
The input of described hardware protection unit is connected with microprocessor module, and outfan is connected with the Enable Pin of three state buffer signal processing unit；
The input of described three state buffer signal processing unit is connected with microprocessor module, and outfan performs circuit with outside and is connected；
When deadlock or program fleet fault occurs in microprocessor module, described three state buffer signal processing unit performs circuit output high-impedance state and drives signal to outside；
When deadlock or program fleet fault occurs in microprocessor module, described hardware protection unit receives the backward described three state buffer signal processing unit of status signal of microprocessor module output and sends high level enable signal；
nullIn described hardware protection unit，One end of resistance R7 is connected to described microprocessor module，This end is simultaneously connected with one end of resistance R9，The other end of described resistance R7 is connected with one end of electric capacity C2，The other end of described resistance R9 is connected and ground connection with the anode of diode D2，The other end of described electric capacity C2 and the anode of diode D1、The negative electrode of diode D2 is connected，The anode of described diode D2 and one end of resistance R8、One end of electric capacity C3 is connected，The negative electrode of described diode D1 and the other end of resistance R8、The other end of electric capacity C3、The in-phase end of comparator U1 is connected，The end of oppisite phase of described comparator U1 and one end of resistance R1、One end of resistance R2 is connected，Another termination power of described resistance R1，The other end ground connection of described resistance R2，The outfan of described comparator U1 is connected with one end of resistance R4，The other end of described resistance R4 and resistance R3、The base stage of positive-negative-positive triode Q1 is connected，The other end of described resistance R3、The emitter stage of audion Q1 is connected with power supply，The colelctor electrode of described audion Q1 and one end of resistance R5、One end of resistance R6 is connected，The other end of described resistance R5 and described three state buffer signal processing unit、One end of electric capacity C1 is connected，The other end ground connection of described electric capacity C1，The other end ground connection of described resistance R6.
Protection circuit the most according to claim 1, it is characterised in that: described three state buffer signal processing unit comprises three-state buffer circuit.
3. protection circuit described in claim 1 or 2 performs the guard method of circuit to outside, it is characterised in that comprise the following steps:
Step one, working state signal and the microprocessor module control signal of microprocessor module internal processes are separately input into described hardware protection unit and three state buffer signal processing unit by described microprocessor module；
Step 2, status signal is converted to enable signal, is sent to described three state buffer signal processing unit by described hardware protection unit；
Step 3, described three state buffer signal processing unit is according to the control signal received and enable signal, and the driving signal of output correspondence gives described outside execution circuit.
Guard method the most according to claim 3, it is characterised in that: described status signal is high low duty ratio level signal, high level signal, low level signal or high-impedance state.
Guard method the most according to claim 3, it is characterised in that: described enable signal is high level signal or low level signal.
Guard method the most according to claim 3, it is characterised in that: described control signal is high low duty ratio level signal, high level signal, low level signal or high-impedance state.
Guard method the most according to claim 3, it is characterised in that: described driving signal is high low duty ratio level signal, high level signal, low level signal or high-impedance state.
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| CN107357283A (en) * | 2017-07-10 | 2017-11-17 | 博耐尔汽车电气系统有限公司 | A kind of watchdog circuit for automotive air-conditioning controller |
| CN108121430B (en) * | 2017-12-20 | 2021-04-02 | 福建利利普光电科技有限公司 | Apply to soft start circuit of taking battery route of data acquisition system |
| CN109687396B (en) * | 2018-12-21 | 2019-11-22 | 南京科远驱动技术有限公司 | A kind of IGBT short-circuit protection circuit and its implementation |
| CN111104240B (en) * | 2019-11-28 | 2024-05-10 | 中国航空工业集团公司西安航空计算技术研究所 | FPGA fault self-recovery circuit and method |
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