CN103871954A - Method for optimizing shallow-trench isolation etching line width - Google Patents

Method for optimizing shallow-trench isolation etching line width Download PDF

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Publication number
CN103871954A
CN103871954A CN201410106820.9A CN201410106820A CN103871954A CN 103871954 A CN103871954 A CN 103871954A CN 201410106820 A CN201410106820 A CN 201410106820A CN 103871954 A CN103871954 A CN 103871954A
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Prior art keywords
shallow
trench isolation
photoresist
etching
live width
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CN103871954B (en
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许进
束伟夫
任昱
张旭升
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Shanghai Huali Microelectronics Corp
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Shanghai Huali Microelectronics Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials

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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

The invention discloses a method for optimizing the shallow-trench isolation etching line width. The method includes the following steps: measuring the angles of photoresist with different features under different exposure conditions, and building the relation between the measuring results and the shallow-trench isolation etching critical sizes to define the etching time of the shallow-trench isolation etching critical size control step. By means of the method, the angles of the features of the photoresist are measured and quantized through an optical line width measuring apparatus, the etching time of the shallow-trench isolation etching critical size control step is adjusted, the shallow-trench isolation critical sizes are accurately controlled accordingly, the defect that in the past, the shallow-trench line width can only be roughly adjusted according to the line width of the photoresist is overcome, it is guaranteed that the shallow-trench critical sizes are accurately controlled under the condition that the line width and the angles of the photoresist are changed at the same time, and the shallow-trench isolation development efficiency and the product yield are greatly improved.

Description

A kind of method of optimizing shallow-trench isolation etching live width
Technical field
The present invention relates to semiconductor shallow trench isolation technology, relate in particular to a kind of method of optimizing shallow-trench isolation etching live width.
Background technology
Along with reducing of dimensions of semiconductor devices, shallow trench isolation from the electrical impact of critical size on device and final yield more and more responsive.
In 65nm and following technology, for improving circuit performance, obtain higher device density, use and developed shallow trench isolation technology, the critical size of groove on device electrically and yield have extremely important impact: along with reducing of semiconductor device critical size, the size of shallow-trench isolation is on more and more sensitivity of the electrical impact of device, and in some region, in the time that very little variation occurs size, electrically may produce sudden change, as shown in Figure 1; The yield of the size of groove to product or final stability also have tremendous influence: in the time that shallow trench size changes between certain limit region, can cause the sharply decline of yield even to zero, cause product rejection, as shown in Figure 2.
Chinese patent (CN102983096A) discloses a kind of method of optimizing shallow-trench isolation etching technics, the method is by first adjusting etch period to obtain the shallow trench of the different tops sphering radian pattern under the different etching time, and carry out top sphering arc measurement, set up the corresponding relation between shallow trench top sphering radian and etch period; Then according to the trend between the electrical specification of device and shallow trench top sphering radian, obtain the actual corresponding shallow trench top sphering radian of device of different electrically specifications; Finally, according to the corresponding relation between the device of the electrical specification of difference actual corresponding shallow trench top sphering radian and shallow trench top sphering radian and etch period, calculate and regulate etch period, accurately to control the also shallow trench top sphering radian of stabilizing device.
When reaching its maturity, shallow ditch groove separation process technology exists some following problems:
1) under the different exposure of working region, traditional method for measurement can only measure the live width at photoresist top, can not measure the angle of photoresist, cannot obtain the relation of the critical size of photoresist angle and shallow trench;
2), when product exposes, due to reasons such as itself exposure bench skews, can make the live width of photoresist and angle be offset;
3), in the process of product etching, due to the atmosphere of etching cavity, the change of the uncertain factors such as the drift of parameter, easily causes the critical size at groove top away from the specification of setting;
4) in the situation that mask aligner and etching machine bench change simultaneously, can cause cannot judging online the change in size root of shallow trench, cannot circulate smoothly at line products, bring huge loss to production;
Scanning electron microscopy was applying electronic bundle excites secondary electron imaging electron microscope in sample surfaces scanning in the past, and existence can only measure live width, cannot measure the drawback of photoresist angle, thereby cannot accurately feed back the actual information of photoresist pattern.
Summary of the invention
In view of this, the object of this invention is to provide a kind of method of optimizing shallow-trench isolation etching live width, by utilizing the angle of optics live width measuring instrument detection limit service area photoresist, set up the relation between angle and shallow trench live width, by adjusting the etch period of shallow-trench isolation etching live width control step, thereby accurately control shallow trench top live width, change and can only regulate and control the wide shortcoming of shallow trench isolation off-line according to the live width of photoresist in the past, greatly improve the method for shallow trench isolation from development efficiency and product yield.
In order to achieve the above object, the object of the invention is to be achieved through the following technical solutions:
A method of optimizing shallow-trench isolation etching live width, comprises the following steps:
Measure the angle of the photoresist of different-shape under different exposure;
Set up the relation between above-mentioned measurement result and shallow-trench isolation etching critical size, to define the etch period of shallow trench isolation from critical size control step.
The method of above-mentioned optimization shallow-trench isolation etching live width, wherein, the focusing while exposure by adjusting service area photoresist obtains the photoresist pattern with different angles.
The method of above-mentioned optimization shallow-trench isolation etching live width, wherein, uses optics live width measuring instrument to measure the angle of the different photoresist patterns that obtain under different gathering.
The method of above-mentioned optimization shallow-trench isolation etching live width, wherein, collect the critical size after all wafer etchings, set up the etching front and back linewidth difference relational model corresponding with photoresist angle, according to the relational model selective etching time, make to obtain identical shallow trench live width under different photoresist angles.
Compared with the prior art, beneficial effect of the present invention is:
By utilizing optics live width measuring instrument to detect the angle that quantizes photoresist pattern, adjust the etch period of shallow groove isolation etching live width control step, thereby accurately control the critical size of shallow-trench isolation, change the shortcoming that in the past can only adjust roughly shallow trench live width according to photoresist live width, the critical size of accomplishing accurately to control shallow trench in the situation that photoresist live width and angle change simultaneously, improves shallow-trench isolation development efficiency and product yield greatly.
Accompanying drawing explanation
With reference to appended accompanying drawing, to describe more fully embodiments of the invention.But appended accompanying drawing only, for explanation and elaboration, does not form limitation of the scope of the invention.
Fig. 1 is different live width respective devices saturation current schematic diagrames in prior art;
Fig. 2 is live width respective devices yield schematic diagram different in prior art;
Fig. 3 is that the present invention optimizes in the method for shallow-trench isolation etching live width and under photoresist angle, obtains identical shallow trench live width schematic diagram;
Fig. 4 is that the present invention optimizes in the method for shallow-trench isolation etching live width and under another photoresist angle, obtains identical shallow trench live width schematic diagram.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Based on the embodiment in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
It should be noted that, in the situation that not conflicting, the feature in embodiment and embodiment in the present invention can combine mutually.
The present invention optimizes the method for shallow-trench isolation etching live width, first measure the angle of the photoresist of different-shape under different exposure, then set up the relation between above-mentioned measurement result and shallow-trench isolation etching critical size, to define the etch period of shallow trench isolation from critical size control step.
Particularly, in existing technological process, the focusing while adjusting service area photoresist exposure, obtains the photoresist pattern with different angles; Use optics live width measuring instrument, accurately measure the angle of the different photoresist patterns that obtain under different focusing, use same Zhi Caidan to carry out etching to the wafer of different photoresist patterns, and collect the critical size after all wafer etchings.Optics live width measuring instrument is to absorb by analysis the contained information of the curve of spectrum reflecting from sample surfaces obtaining, to reach the object of measurement.Due to the special nature of optics, it not only can measure the live width of sample, can also measure thickness and pattern etc., and angular surveying is had to very powerful function.
Set up the etching front and back linewidth difference relational model corresponding with photoresist angle, shown in Fig. 3, specifically comprise following formula:
CD 0bias=CD 0AE1-CD AD1
Wherein, CD 0AE1for angle angle 0critical size after etching, CD aD1for the critical size before etching, CD 0biasfor angle angle 0critical size before and after etching is poor;
CD 1bias=CD 1AE1-CD AD1
Wherein, CD 1AE1for angle angle 1critical size after etching, CD aD1for the critical size before etching, CD 1biasfor angle angle 1critical size before and after etching is poor;
CD 0bias=2*THK2/tg(angle 0)
CD1 bias=2*THK2/tg(angle 1)
Wherein, tg (angle 0) and tg (angle 1) being respectively the tan of different photoresist angles, THK2 is the thickness of BARC bottom antireflective coating (Bottom Anti-Reflective Coating).
According to the relational model of setting up, select suitable etch period, thereby reach the object that obtains identical shallow trench live width under different photoresist angles, accurately control and be stabilized in the critical size of line products, shown in Fig. 4, specifically comprise following formula:
CD AE1=CD AD1+CD 0bias+d*t 0=CD AD1+CD 1bias+d*t 1
Wherein, t 0and t 1be respectively corresponding angle 0and angle 1the trim time, d is trim speed.
The present invention is by utilizing optics live width measuring instrument to detect the angle that quantizes photoresist pattern, adjust the time of shallow groove isolation etching, thereby accurately control shallow trench isolation from critical size, change the shortcoming that in the past can only adjust roughly shallow trench live width according to photoresist live width, the critical size of accomplishing accurately to control shallow trench in the situation that photoresist live width and angle change simultaneously, improves shallow-trench isolation development efficiency and product yield greatly.
Above specific embodiments of the invention be have been described in detail, but the present invention is not restricted to specific embodiment described above, it is just as example.To those skilled in the art, any equivalent modifications and alternative also all among category of the present invention.Therefore, equalization conversion and the modification done without departing from the spirit and scope of the invention, all should contain within the scope of the invention.

Claims (4)

1. a method of optimizing shallow-trench isolation etching live width, is characterized in that, comprises the following steps:
Measure the angle of the photoresist of different-shape under different exposure;
Set up the relation between above-mentioned measurement result and shallow-trench isolation etching critical size, to define the etch period of shallow trench isolation from critical size control step.
2. the method for optimizing according to claim 1 shallow-trench isolation etching live width, is characterized in that, the focusing while exposure by adjusting service area photoresist obtains the photoresist pattern with different angles.
3. the method for optimizing according to claim 2 shallow-trench isolation etching live width, is characterized in that, uses optics live width measuring instrument to measure the angle of the different photoresist patterns that obtain under different gathering.
4. optimize according to claim 1 the method for shallow-trench isolation etching live width, it is characterized in that, collect the critical size after all wafer etchings, set up the etching front and back linewidth difference relational model corresponding with photoresist angle, according to the relational model selective etching time, make to obtain identical shallow trench live width under different photoresist angles.
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104362085A (en) * 2014-09-30 2015-02-18 上海华力微电子有限公司 Polycrystalline silicon etching method for adjustment of electric properties of high-voltage devices
CN104900510A (en) * 2015-06-29 2015-09-09 上海华力微电子有限公司 Method for etching mapping relation model and controlling shallow-trench isolation etching key size
CN106252253A (en) * 2016-08-31 2016-12-21 上海华力微电子有限公司 A kind of method testing the round and smooth degree in active area top
CN108091560A (en) * 2017-12-07 2018-05-29 上海华力微电子有限公司 Optimize the method for shallow-trench isolation etch topography under different light transmittances
CN109065465A (en) * 2018-07-13 2018-12-21 上海华力集成电路制造有限公司 Shallow groove isolation step height stability measurement method
CN109143951A (en) * 2017-06-27 2019-01-04 亚智科技股份有限公司 process monitoring method and process monitoring system

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US6808942B1 (en) * 2003-05-23 2004-10-26 Texas Instruments Incorporated Method for controlling a critical dimension (CD) in an etch process
US20060015206A1 (en) * 2004-07-14 2006-01-19 Tokyo Electron Limited Formula-based run-to-run control
CN102955378A (en) * 2012-11-12 2013-03-06 上海集成电路研发中心有限公司 Morphology characterization method for photoresist
CN102983096A (en) * 2012-11-29 2013-03-20 上海华力微电子有限公司 Method for optimizing shallow slot isolating etching process

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6808942B1 (en) * 2003-05-23 2004-10-26 Texas Instruments Incorporated Method for controlling a critical dimension (CD) in an etch process
US20060015206A1 (en) * 2004-07-14 2006-01-19 Tokyo Electron Limited Formula-based run-to-run control
CN102955378A (en) * 2012-11-12 2013-03-06 上海集成电路研发中心有限公司 Morphology characterization method for photoresist
CN102983096A (en) * 2012-11-29 2013-03-20 上海华力微电子有限公司 Method for optimizing shallow slot isolating etching process

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104362085A (en) * 2014-09-30 2015-02-18 上海华力微电子有限公司 Polycrystalline silicon etching method for adjustment of electric properties of high-voltage devices
CN104362085B (en) * 2014-09-30 2017-11-14 上海华力微电子有限公司 It is a kind of to adjust the electrical polycrystalline silicon etching method of high tension apparatus
CN104900510A (en) * 2015-06-29 2015-09-09 上海华力微电子有限公司 Method for etching mapping relation model and controlling shallow-trench isolation etching key size
CN104900510B (en) * 2015-06-29 2018-01-26 上海华力微电子有限公司 Etch mapping relations model and the method for controlling shallow-trench isolation etch critical dimension
CN106252253A (en) * 2016-08-31 2016-12-21 上海华力微电子有限公司 A kind of method testing the round and smooth degree in active area top
CN106252253B (en) * 2016-08-31 2019-02-01 上海华力微电子有限公司 A kind of method of test active area top round and smooth degree
CN109143951A (en) * 2017-06-27 2019-01-04 亚智科技股份有限公司 process monitoring method and process monitoring system
CN108091560A (en) * 2017-12-07 2018-05-29 上海华力微电子有限公司 Optimize the method for shallow-trench isolation etch topography under different light transmittances
CN109065465A (en) * 2018-07-13 2018-12-21 上海华力集成电路制造有限公司 Shallow groove isolation step height stability measurement method

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