CN103824838A - Integrated circuit module - Google Patents
Integrated circuit module Download PDFInfo
- Publication number
- CN103824838A CN103824838A CN201410080433.2A CN201410080433A CN103824838A CN 103824838 A CN103824838 A CN 103824838A CN 201410080433 A CN201410080433 A CN 201410080433A CN 103824838 A CN103824838 A CN 103824838A
- Authority
- CN
- China
- Prior art keywords
- interconnecting member
- integrated circuit
- electrode
- power
- bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
Landscapes
- Inverter Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The invention discloses an integrated circuit module which comprises a semiconductor unpacked chip, a first insulating layer and power buses with the number of i, wherein the semiconductor unpacked chip comprises a plurality of electronic devices which are divided into m groups; each electronic device comprises electrodes with the number of n, wherein the electrodes have different polarities, and m and n are integers which are more than 1; the first insulating layer is arranged above the surface of the semiconductor unpacked chip; the power buses with the number of i are respectively arranged at a plane extending part on the first insulating layer and a plurality of vertical channel parts of the electrodes passing through a first insulating layer connector, wherein i is an integer which is more than 1 and less than or equal to m*n; at least one of the power buses with the number of i is used for electrically connecting the electrodes of at least two electronic devices; and all the power buses with the number of i are respectively taken as an external connection terminal. After the integrated circuit module is adopted, a lead frame of a finger-shaped pin can be avoided being used, so that the design of the lead frame is simplified, an interconnection resistor is reduced, and the heat dissipation is improved.
Description
Technical field
The present invention relates to semiconductor package, relate more specifically to be applied to the integrated circuit package of switch type regulator.
Background technology
Switch type regulator, for example DC-DC converter, is used for providing stable voltage source to various electric systems.In low power-supply device, (as laptop computer, mobile phone etc.) battery management especially needs high efficiency DC-DC converter.Switch type regulator converts high-frequency voltage to input direct voltage, then high-frequency output voltage is carried out to filtering and then converts VD to.
Fig. 1 shows the circuit diagram of typical switch type regulator 10.This switch type regulator comprises controlled stage and power stage.Controlled stage comprises control chip U1.Power stage comprises power device Q1 and Q2.Power device is for example field-effect transistor or bipolar transistor.Power device Q1 and Q2 are connected between input voltage vin and ground GND, and its intermediate node is as output Lx.The input and output electrode of control chip U1 is connected to input and output electrode IOs, and its drive electrode is connected to the gate electrode separately of power device Q1 and Q2, for conducting and the disconnection of power ratio control device Q1 and Q2, thereby produces output current.
In order to meet the demand of the miniaturization to switch type regulator, low control voltage and large output current, in switch type regulator, can adopt multiple power devices in parallel to replace single power device.But the electrical connection of multiple power devices need to be used the lead frame that comprises multiple finger-like pins, thereby may introduce additional interconnection resistance and heat dissipation problem.
Therefore,, in the integrated circuit package that is applied to switch type regulator, expect further to improve layout and the connected mode of power device.
Summary of the invention
In view of this, the object of the present invention is to provide a kind of integrated circuit package, to solve the electrical connection of multiple electronic devices, its performance is caused the problem of adverse effect.
According to an aspect of the present invention, provide a kind of integrated circuit package, comprising: semiconductor bare chip, comprise the multiple electronic devices that are divided into m group, each electronic device comprises n electrode of opposed polarity, wherein m and n are greater than 1 integer; The first insulating barrier, is positioned at the described surface of semiconductor bare chip; And i power bus, comprise respectively the planar extension being positioned on the first insulating barrier and multiple vertical channel parts of passing each electrode of the first insulating barrier interface unit, wherein i is greater than 1 and be less than or equal to the integer of m*n, wherein, at least one power bus in a described i power bus is electrically connected to each other an electrode of all devices at least two electronic device groups, and each in a described i power bus is as an external connection terminals.
Preferably, in described integrated circuit package, described electronic device is at least one being selected from diode, transistor, resistance, inductance.
Preferably, in described integrated circuit package, the planar extension of at least one the first power bus in a described i power bus is ribbon; And the planar extension of at least one second source bus in a described i power bus is sinuous polyline shaped, the direction of current flow of described at least one second source bus is changed with respect to the direction of current flow of described at least one the first power bus.
Preferably, described integrated circuit package, also comprises: the second insulating barrier, between semiconductor bare chip and the first insulating barrier; And j interconnecting member, comprise respectively the planar extension being positioned on the second insulating barrier and the multiple vertical channel parts that are connected each electrode of power device through the second insulating barrier, wherein, at least two interconnecting members in a described j interconnecting member are electrically connected to each other an electrode of all devices in an electronic device group respectively, and at least one power bus in a described i power bus is electrically connected to each other described at least two interconnecting members.
Preferably, in described integrated circuit package, the plane bearing of trend of a described i power bus is first direction, and the plane bearing of trend of a described j interconnecting member is second direction, and first direction intersects with second direction.
Preferably, in described integrated circuit package, first direction is vertical with second direction.
Preferably, in described integrated circuit package, at least one in a described j interconnecting member is segmentation, and at least one in a described i power bus is electrically connected the different sections of segmentation interconnecting member.
Preferably, in described integrated circuit package, at least one in a described i power bus is segmentation, and at least one in a described j interconnecting member is electrically connected the different sections of Segmented electrical source bus.
Preferably, in described integrated circuit package, the plane bearing of trend of the Segmented electrical source bus in a described i power bus, vertical with the plane bearing of trend of the segmentation interconnecting member in a described j interconnecting member, make the direction of current flow in Segmented electrical source bus vertical with the direction of current flow in segmentation interconnecting member.
Preferably, described integrated circuit package also comprises lead frame, and described lead frame just at least two different sections of Segmented electrical source bus is electrically connected.
Preferably, in described integrated circuit package, described electronic device is field-effect transistor, and the electrode of described field-effect transistor comprises source electrode, drain and gate.
Preferably, described integrated circuit package also comprises lead frame, and a wherein said i power bus is connected to described lead frame.
Preferably, described integrated circuit package also comprises encapsulating compound, and described encapsulating compound covers described semiconductor bare chip, and covers at least a portion of described lead frame, and end or the bottom-exposed of the pin of lead frame are electrically connected for outside.
According to a further aspect in the invention, a kind of integrated circuit package that is applied to switch type regulator is provided, comprise: semiconductor bare chip, comprise the multiple power devices that are divided into two groups, each power device is included in the first electrode and the second electrode that on the surface of semiconductor bare chip, expose, the first insulating barrier, is positioned at the described surface of semiconductor bare chip, and first to the 3rd power bus, comprise respectively the planar extension being positioned on the first insulating barrier and the multiple vertical channel parts that are connected each electrode of power device through the first insulating barrier, wherein, the first power bus is electrically connected to each other the first electrode of first group of power device, second source bus is electrically connected to each other the first electrode of the second electrode of first group of power device and second group of power device, the 3rd power bus is electrically connected to each other the second electrode of second group of power device, and first to the 3rd each in power bus as an external connection terminals.
Preferably, in described integrated circuit package, first and the planar extension of the 3rd power bus be ribbon; And the planar extension of second source bus is sinuous polyline shaped, the direction of current flow that makes second source bus with respect to first and the direction of current flow of the 3rd power bus change.
Preferably, described integrated circuit package also comprises: the second insulating barrier, between semiconductor bare chip and the first insulating barrier, and first to fourth interconnecting member, comprise respectively the planar extension being positioned on the second insulating barrier and the multiple vertical channel parts that are connected each electrode of power device through the second insulating barrier, wherein, the first interconnecting member is electrically connected to each other the first electrode of first group of power device, the second interconnecting member is electrically connected to each other the second electrode of first group of power device, the 3rd interconnecting member is electrically connected to each other the first electrode of second group of power device, the 4th interconnecting member is electrically connected to each other the second electrode of second group of power device, and first power bus connect the first interconnecting member, second source bus connection second and the 3rd interconnecting member, the 3rd power bus connects the 4th interconnecting member.
Preferably, in described integrated circuit package, the plane bearing of trend of the first to the 3rd power bus is first direction, and the plane bearing of trend of first to fourth interconnecting member is second direction, and first direction intersects with second direction.
Preferably, in described integrated circuit package, first direction is vertical with second direction.
Preferably, in described integrated circuit package, at least one of first to fourth interconnecting member is segmentation, and the first to the 3rd power bus is electrically connected the different sections of segmentation interconnecting member.
Preferably, in described integrated circuit package, at least one in the first to the 3rd power bus is segmentation, and first to fourth interconnecting member is electrically connected the different sections of Segmented electrical source bus.
Preferably, in described integrated circuit package, the second interconnecting member, the 3rd interconnecting member and second source bus are segmentation, every section of the second interconnecting member and every section of the 3rd interconnecting member stagger, and every section of bearing of trend of second source bus is vertical with every section of bearing of trend in the second interconnecting member, the 3rd interconnecting member, makes the direction of current flow in the second interconnecting member, the 3rd interconnecting member vertical with the direction of current flow in second source bus.
Preferably, described integrated circuit package also comprises lead frame, and described lead frame is electrically connected the different sections of Segmented electrical source bus.
Preferably, in described integrated circuit package, described power device is field-effect transistor, the source electrode that described the first electrode is field-effect transistor and drain electrode in one, the source electrode that described the second electrode is field-effect transistor and drain electrode in another.
Preferably, described integrated circuit package also comprises lead frame, and the wherein said first to the 3rd power bus is connected to described lead frame.
Preferably, described integrated circuit package also comprises encapsulating compound, and described encapsulating compound covers described semiconductor bare chip, and covers at least a portion of described lead frame, and end or the bottom-exposed of the pin of lead frame are electrically connected for outside.
According to integrated circuit package of the present invention, lead frame needn't design for power device group the finger-like pin of complex topology, thereby can simplify the design of lead frame.Even if the power device quantity in power device group changes, also can adopt the lead frame of same size, thereby can realize the standardization of lead frame.Further, above-mentioned power bus can and lead frame between realize large area and contact, thereby can reduce interconnection resistance and improve radiating effect.
In a preferred embodiment, power bus and optional interconnecting member can be segmentations, thereby not only can improve the layout degree of freedom, and can reduce stress.
In a preferred embodiment, power bus and optional interconnecting member can change direction of current flow, thereby have reduced stray inductance, have improved electrical property.
Accompanying drawing explanation
By the description to the embodiment of the present invention referring to accompanying drawing, above-mentioned and other objects of the present invention, feature and advantage will be more clear, in the accompanying drawings:
Fig. 1 shows the circuit diagram of typical switch type regulator;
Fig. 2 a, 2b and 2c illustrate respectively the sectional view intercepting according to the perspective view of the integrated circuit package that is applied to switch type regulator of the first embodiment of the present invention with along different directions;
The sectional view that Fig. 3 a, 3b and 3c illustrate respectively the perspective view of the integrated circuit package that is applied to switch type regulator according to a second embodiment of the present invention and intercept along different directions;
Fig. 4 a, 4b and 4c illustrate respectively a third embodiment in accordance with the invention the integrated circuit package that is applied to switch type regulator perspective view and along different directions intercept sectional view;
Fig. 5 a, 5b and 5c illustrate respectively a fourth embodiment in accordance with the invention the integrated circuit package that is applied to switch type regulator decomposition diagram and along different directions intercept sectional view; And
Fig. 6 a, 6b, 6c and 6d illustrate respectively a fourth embodiment in accordance with the invention the integrated circuit package that is applied to switch type regulator decomposition diagram and along different directions intercept sectional view.
Embodiment
Hereinafter with reference to accompanying drawing, various embodiment of the present invention is described in more detail.In each accompanying drawing, identical element adopts same or similar Reference numeral to represent.
For the sake of clarity, the various piece in accompanying drawing is not drawn in proportion.For brevity, the modular construction obtaining can be described in a width figure after several steps.In addition, also may omit some known details, for example, at all attached not shown scolder and encapsulating compound, the not shown backing material for supporting wire frame and/or external frame in some drawings.
Be to be understood that, in the time describing modular construction, when one deck, region are called be positioned at another layer, another region " above " or when " top ", can refer to be located immediately at another layer, another is above region, or its and another layer, also comprise between another region other layer or region.And if by device upset, this one deck, a region will be positioned at another layer, another region " below " or " below ".If be located immediately at another layer, another situation above region in order to describe, will adopt herein " directly exist ... above " or " ... above and with it in abutting connection with " form of presentation.
Described hereinafter many specific details of the present invention, structure, material, size, treatment process and the technology of for example integrated circuit package, to more clearly understand the disclosure.But just as the skilled person will understand, can realize the disclosure not according to these specific details.
Fig. 2 a, 2b and 2c illustrate respectively according to the perspective view of the integrated circuit package that is applied to switch type regulator 100 of the first embodiment of the present invention, and the sectional view of AA along the line and line BB intercepting.As shown in Figure 2 a, line AA is across not the first electrode and second electrode of power switch on the same group, and line BB is across the first electrode of all power switchs of same group of power switch.
Power device is for example the one that is selected from bipolar transistor and field-effect transistor.Under the situation of bipolar transistor, the first electrode of power device is in emitter and collector, and the second electrode is another in emitter and collector, and control electrode is base stage.Under the transistorized situation of being on the scene effect, the first electrode of power device is in source electrode and drain electrode, and the second electrode is another in source electrode and leakage, and control electrode is grid.
In this embodiment, integrated circuit package 100 comprises 2 power device groups, and each power device group comprises 3 power devices, thereby forms the array of 2 × 3 power devices.In alternative embodiment, each power device group can comprise 2 or more power device.Power device of the first power device group and a corresponding power device of the second power device group form a line.For example, a power device of the first power device group comprises the first electrode 111-1a and the second electrode 111-2a, a power device of the second power device group comprises the first electrode 112-1a and the second electrode 112-2a, and the first electrode 112-1a of a power device is adjacent with the second electrode 111-2a of another power device, as shown in Figure 2 b.3 power devices of the first power device group are in line, and 3 power devices of the second power device group are lined up another row, thereby form the array of power device.For example, the second electrode 111-2a, 111-2b and the 111-2c of 3 power devices of the first power device group are adjacent one another are, as shown in Figure 2 c.
For outside electrical connection is provided, between the first power bus 116a, second source bus 116b and the 3rd power bus 116c and lead frame, can be connected via conductive projection and/or soldered ball.In switch type regulator, a part of the first power bus 116a can be used as voltage signal terminal Vin, a part of second source bus 116b can be used as switching node signal terminal LX, and a part of the 3rd power bus 116c can be used as earth terminal GND.
In above-mentioned integrated circuit package 100, owing to using the first to the 3rd power bus, lead frame needn't design for power device group the finger-like pin of complex topology, thereby can simplify the design of lead frame.Even if the power device quantity in power device group changes, also can adopt the lead frame of same size, thereby can realize the standardization of lead frame.Further, above-mentioned power bus can and lead frame between realize large area and contact, thereby can reduce interconnection resistance and improve radiating effect.
Fig. 3 a, 3b and 3c illustrate respectively the perspective view of the integrated circuit package that is applied to switch type regulator 200 according to a second embodiment of the present invention, and the sectional view of AA along the line and line BB intercepting.As shown in Figure 3 a, line AA is across not the first electrode and second electrode of power switch on the same group, and line BB is across the first electrode of all power switchs of same group of power switch.
Integrated circuit package 200 comprises the first insulating barrier 215 and the first power bus 216a, second source bus 216b and the 3rd power bus 216c for outside electrical connection.The first insulating barrier 215 is for example made up of silica, is positioned on the surface of semiconductor bare chip 210.The first power bus 216a, second source bus 216b and the 3rd power bus 216c are for example made up of aluminium or copper, comprise respectively the planar extension being positioned on the first insulating barrier 215 and the multiple vertical channel parts that contact the electrode of power device through the first insulating barrier 215.The first power bus 216a is electrically connected with the first electrode of each power device in first power device group.The first electrode of each power device in the second electrode and second power device group of second source bus 216b and each power device in first power device group is electrically connected.The 3rd power bus 216c is electrically connected with the second electrode of each power device in second power device group.
For outside electrical connection is provided, between the first power bus 216a, second source bus 216b and the 3rd power bus 216c and lead frame, can be connected via conductive projection and/or soldered ball.In switch type regulator, a part of the first power bus 216a can be used as voltage signal terminal Vin, a part of second source bus 216b can be used as switching node signal terminal LX, and a part of the 3rd power bus 216c can be used as earth terminal GND.
The difference of the second embodiment and the first embodiment is: in integrated circuit package 200, the planar extension of second source bus 216b is sinuous polyline shaped.According to other parts of the integrated circuit package 200 of the second embodiment with identical according to the appropriate section of the integrated circuit package 100 of the first embodiment.
Above-mentioned, according in the integrated circuit package 200 of the second embodiment, with respect to the first adjacent power bus 216a and the 3rd power bus 216b, electric current is along the flow direction almost parallel sometimes of second source bus 216b, sometimes substantially vertical.Therefore, integrated circuit package 200 has further reduced stray inductance, has improved the electrical property of integrated circuit package.
Fig. 4 a, 4b and 4c illustrate respectively the perspective view of the integrated circuit package that is applied to switch type regulator 300 of a third embodiment in accordance with the invention, and the sectional view of AA along the line and line BB intercepting.As shown in Fig. 4 a, line AA is across not the first electrode and second electrode of power switch on the same group, and line BB is across the first electrode of all power switchs of same group of power switch.
Integrated circuit package 300 comprises the first insulating barrier 313 and the first interconnecting member 314a, the second interconnecting member 314b, the 3rd interconnecting member 314c and the 4th interconnecting member 314d for interlayer electrical connection.The first insulating barrier 313 is for example made up of silica, is positioned on the surface of semiconductor bare chip 310.The first interconnecting member 314a, the second interconnecting member 314b, the 3rd interconnecting member 314c and the 4th interconnecting member 314d are for example made up of aluminium or copper, comprise respectively the planar extension being positioned on the first insulating barrier 313 and the multiple vertical channel parts that contact the electrode of power device through the first insulating barrier 313.
The planar extension separately of above-mentioned interconnecting member is for example ribbon and parallel to each other.The first interconnecting member 314a is electrically connected with the first electrode of each power device in first power device group.The second interconnecting member 314b is electrically connected with the second electrode of each power device in first power device group.The 3rd interconnecting member 314c is electrically connected with the first electrode of each power device in second power device group.The 4th interconnecting member 314d is electrically connected with the second electrode of each power device in second power device group.
Integrated circuit package 300 also comprises the second insulating barrier 315 and the first power bus 316a, second source bus 316b and the 3rd power bus 316c for outside electrical connection.The second insulating barrier 315 is for example made up of silica, is positioned on the surface of the first insulating barrier 313.The first power bus 316a, second source bus 316b and the 3rd power bus 316c are for example made up of aluminium or copper, comprise respectively the planar extension being arranged on the second insulating barrier 315 and the multiple vertical channel parts that contact at least one interconnecting member of the first interconnecting member 314a, the second interconnecting member 314b, the 3rd interconnecting member 314c and the 4th interconnecting member 314d through the second insulating barrier 315.
The planar extension separately of above-mentioned power bus is for example ribbon and parallel to each other.The bearing of trend of the planar extension of power bus intersects with the bearing of trend of the extension of interconnecting member.Preferably, the bearing of trend of the bearing of trend of the planar extension of power bus and the extension of interconnecting member is perpendicular to one another.The first power bus 316a is electrically connected with the first interconnecting member 314a.Second source bus 316b is all electrically connected with the second interconnecting member 314b and the 3rd interconnecting member 314c.The 3rd power bus 316c is electrically connected with the 4th interconnecting member 314a.
For outside electrical connection is provided, between the first power bus 316a, second source bus 316b and the 3rd power bus 316c and lead frame, can be connected via conductive projection and/or soldered ball.In switch type regulator, a part of the first power bus 316a can be used as voltage signal terminal Vin, a part of second source bus 316b can be used as switching node signal terminal LX, and a part of the 3rd power bus 316c can be used as earth terminal GND.
The difference of the 3rd embodiment and the first embodiment is: in integrated circuit package 300, the first power bus 316a, second source bus 316b and the 3rd power bus 316c are connected to each electrode of power device via the first interconnecting member 314a, the second interconnecting member 314b, the 3rd interconnecting member 314c and the 4th interconnecting member 314.According to other parts of the integrated circuit package 300 of the 3rd embodiment with identical according to the appropriate section of the integrated circuit package 100 of the first embodiment.
Above-mentioned according in the integrated circuit package 300 of the 3rd embodiment, even if the corresponding power device in a power device in first power device group and second power device group is spaced from each other, or centre arranges other elements, all power devices that also can utilize interconnecting member first to interconnect mutually on the same group, then utilize power bus to realize outside connection.Therefore, integrated circuit package 300 further provides the layout degree of freedom of power device.
Fig. 5 a, 5b and 5c illustrate respectively the decomposition diagram of the integrated circuit package that is applied to switch type regulator 400 of a fourth embodiment in accordance with the invention, and the sectional view of AA along the line and line BB intercepting.As shown in Figure 5 a, line AA is across not the first electrode and second electrode of power switch on the same group, and line BB is across the first electrode of all power switchs of same group of power switch.
Integrated circuit package 400 comprises the first insulating barrier 413 and the first interconnecting member 414a, the second interconnecting member 414b, the 3rd interconnecting member 414c and the 4th interconnecting member 414d for interlayer electrical connection.The first insulating barrier 413 is for example made up of silica, is positioned on the surface of semiconductor bare chip 410.The first interconnecting member 414a, the second interconnecting member 414b, the 3rd interconnecting member 414c and the 4th interconnecting member 414d are for example made up of aluminium or copper, comprise respectively the planar extension being positioned on the first insulating barrier 413 and the multiple vertical channel parts that contact the electrode of power device through the first insulating barrier 413.
The planar extension separately of above-mentioned interconnecting member is for example ribbon and parallel to each other.The first interconnecting member 414a is electrically connected with the first electrode of each power device in first power device group.The second interconnecting member 414b is electrically connected with the second electrode of each power device in first power device group.The 3rd interconnecting member 414c is electrically connected with the first electrode of each power device in second power device group.The 4th interconnecting member 414d is electrically connected with the second electrode of each power device in second power device group.
Integrated circuit package 400 comprises the second insulating barrier 415 and the first power bus 416a, second source bus 416b and the 3rd power bus 416c for outside electrical connection.The second insulating barrier 415 is for example made up of silica, is positioned on the surface of the first insulating barrier 413.The first power bus 416a, second source bus 416b and the 3rd power bus 416c are for example made up of aluminium or copper, comprise respectively the planar extension being arranged on the second insulating barrier 415 and the multiple vertical channel parts that contact at least one interconnecting member of the first interconnecting member 414a, the second interconnecting member 414b, the 3rd interconnecting member 414c and the 4th interconnecting member 414d through the second insulating barrier 415.
The planar extension separately of above-mentioned power bus is for example ribbon and parallel to each other.The bearing of trend of the bearing of trend of the planar extension of power bus and the extension of interconnecting member is parallel or intersect.Preferably, the bearing of trend of the bearing of trend of the planar extension of power bus and the extension of interconnecting member is perpendicular to one another.The first power bus 416a is electrically connected with the first interconnecting member 414a.Second source bus 416b is all electrically connected with the second interconnecting member 414b and the 3rd interconnecting member 414c.The 3rd power bus 416c is electrically connected with the 4th interconnecting member 414d.
For outside electrical connection is provided, between the first power bus 416a, second source bus 416b and the 3rd power bus 416c and lead frame, can be connected via conductive projection and/or soldered ball.In switch type regulator, a part of the first power bus 416a can be used as voltage signal terminal Vin, a part of second source bus 416b can be used as switching node signal terminal LX, and a part of the 3rd power bus 416c can be used as earth terminal GND.
The difference of the 4th embodiment and the 3rd embodiment is: in integrated circuit package 400, the second interconnecting member 414b, the 3rd interconnecting member 414c and second source bus 416b are segmentation, as shown in Fig. 5 b and 5c.Every section of the second interconnecting member 414b and every section of the 3rd interconnecting member 414c stagger.Every section of bearing of trend of second source bus 416b is vertical with every section of bearing of trend in the second interconnecting member 414b, the 3rd interconnecting member 414c, and connects a section in the second interconnecting member 414b a section and the 3rd interconnecting member 414c.The second interconnecting member 414b and the 3rd interconnecting member 414c link together the different sections of second source bus 416b.On the other hand, the different sections of second source bus 416b link together the different sections of the second interconnecting member 414b and the 3rd interconnecting member 414c.According to other parts of the integrated circuit package 400 of the 4th embodiment with identical according to the appropriate section of the integrated circuit package 100 of the 3rd embodiment.
Above-mentioned, according in the integrated circuit package 400 of the 4th embodiment, the power bus of segmentation and interconnecting member not only can improve the layout degree of freedom, and can reduce stress.In addition, the direction of current flow in the second interconnecting member 414b, the 3rd interconnecting member 414c is vertical with the direction of current flow in second source bus 416b.With respect to the first adjacent power bus 416a and the 3rd power bus 416b, electric current is along the flow direction almost parallel sometimes of the second interconnecting member 414b, the 3rd interconnecting member 414c and second source bus 416b, sometimes substantially vertical.Therefore, integrated circuit package 400 has further reduced stray inductance, has improved the electrical property of integrated circuit package.
Fig. 6 a, 6b, 6c and 6d illustrate respectively the decomposition diagram of the integrated circuit package that is applied to switch type regulator 500 according to a fifth embodiment of the invention, and the sectional view of AA, line B1B1 along the line and B2B2 intercepting.As shown in Figure 6 a, line AA is across not the first electrode and second electrode of power switch on the same group, and line B1B1 is across the second electrode of all power switchs of second group of power switch, and line B2B2 is across the second electrode of all power switchs of first group of power switch.
Integrated circuit package 500 comprises the first insulating barrier 513 and the first interconnecting member 514a, the second interconnecting member 514b, the 3rd interconnecting member 514c and the 4th interconnecting member 514d for interlayer electrical connection.The first insulating barrier 513 is for example made up of silica, is positioned on the surface of semiconductor bare chip 410.The first interconnecting member 514a, the second interconnecting member 514b, the 3rd interconnecting member 514c and the 4th interconnecting member 514d are for example made up of aluminium or copper, comprise respectively the planar extension being positioned on the first insulating barrier 513 and the multiple vertical channel parts that contact the electrode of power device through the first insulating barrier 513.
The planar extension separately of above-mentioned interconnecting member is for example ribbon and parallel to each other.The first interconnecting member 514a is electrically connected with the first electrode of each power device in first power device group.The second interconnecting member 514b is electrically connected with the second electrode of each power device in first power device group.The 3rd interconnecting member 514c is electrically connected with the first electrode of each power device in second power device group.The 4th interconnecting member 514d is electrically connected with the second electrode of each power device in second power device group.
Integrated circuit package 500 comprises the second insulating barrier 515 and the first power bus 516a, second source bus 516b and the 3rd power bus 516c for outside electrical connection.The second insulating barrier 515 is for example made up of silica, is positioned on the surface of the first insulating barrier 513.The first power bus 516a, second source bus 516b and the 3rd power bus 516c are for example made up of aluminium or copper, comprise respectively the planar extension being arranged on the second insulating barrier 515 and the multiple vertical channel parts that contact at least one interconnecting member of the first interconnecting member 514a, the second interconnecting member 514b, the 3rd interconnecting member 514c and the 4th interconnecting member 514d through the second insulating barrier 515.
The planar extension separately of above-mentioned power bus is for example ribbon and parallel to each other.The bearing of trend of the planar extension of power bus intersects with the bearing of trend of the extension of interconnecting member.Preferably, the bearing of trend of the bearing of trend of the planar extension of power bus and the extension of interconnecting member is perpendicular to one another.The first power bus 516a is all electrically connected with the second interconnecting member 514b and the 4th interconnecting member 514d.Second source bus 516b is electrically connected with the 3rd interconnecting member 514c.The 3rd power bus 516c is electrically connected with the first interconnecting member 514a.
For outside electrical connection is provided, between the first power bus 516a, second source bus 516b and the 3rd power bus 516c and lead frame, can be connected via conductive projection and/or soldered ball.In switch type regulator, a part of the first power bus 516a can be used as voltage signal terminal LX, a part of second source bus 516b can be used as switching node signal terminal Vin, and a part of the 3rd power bus 516c can be used as earth terminal GND.
The difference of the 5th embodiment and the 3rd embodiment is: in integrated circuit package 500, the first interconnecting member 514a, the 3rd interconnecting member 514c and the 4th power bus 514d are segmentation, as shown in Fig. 5 b and 5c.Every section of the first interconnecting member 514a, the 3rd interconnecting member 514c and the 4th power bus 514d is staggered.The first power bus 516a is not only electrically connected the second interconnecting member 514b and the 4th interconnecting member 514d, and the different sections of the 4th interconnecting member 514d are electrically connected.Second source bus 516b is electrically connected the different sections of the 3rd interconnecting member 514c.The 3rd power bus 516c is electrically connected the different sections of the first interconnecting member 514a.According to other parts of the integrated circuit package 500 of the 5th embodiment with identical according to the appropriate section of the integrated circuit package 100 of the 3rd embodiment.
Above-mentioned, according in the integrated circuit package 500 of the 5th embodiment, the interconnecting member of segmentation not only can improve the layout degree of freedom, and can reduce stress.Even if the corresponding power device in a power device in first power device group and second power device group is spaced from each other, or centre arranges other elements, all power devices that also can utilize interconnecting member first to interconnect mutually on the same group, then utilize power bus to realize outside connection.Therefore, integrated circuit package 500 further provides the layout degree of freedom of power device.
In the above-described embodiments, the integrated circuit package that comprises power device and power bus has been described.But according to technique needs, integrated circuit package of the present invention may further include lead frame, make above-mentioned power bus be connected to lead frame.And can comprise encapsulating compound.Described encapsulating compound coverage power device, and at least a portion of covering lead frame, make end or the bottom-exposed of the pin of lead frame be electrically connected for outside, thereby form package assembling.
In alternative embodiment, can adopt at least one electronic device being selected from diode, transistor, resistance, inductance to replace power device.
In addition, in alternative embodiment, electronic device can be divided into m group, and each electronic device can comprise n electrode, and wherein m and n are greater than 1 integer.The first insulating barrier is positioned at the described surface of semiconductor bare chip.Integrated circuit package also comprises i power bus, comprises respectively the planar extension that is positioned on the first insulating barrier and the multiple vertical channel parts through each electrode of the first insulating barrier interface unit, and wherein i is greater than 1 and be less than or equal to the integer of m*n.At least one power bus in a described i power bus is electrically connected to each other an electrode of all devices at least two electronic device groups, and each in a described i power bus is as an external connection terminals.
Should be noted that, in this article, relational terms such as the first and second grades is only used for an entity or operation to separate with another entity or operating space, and not necessarily requires or imply and between these entities or operation, have the relation of any this reality or sequentially.And, term " comprises ", " comprising " or its any other variant are intended to contain comprising of nonexcludability, thereby the process, method, article or the equipment that make to comprise a series of key elements not only comprise those key elements, but also comprise other key elements of clearly not listing, or be also included as the intrinsic key element of this process, method, article or equipment.The in the situation that of more restrictions not, the key element being limited by statement " comprising ... ", and be not precluded within process, method, article or the equipment that comprises described key element and also have other identical element.
According to embodiments of the invention as described above, these embodiment do not have all details of detailed descriptionthe, and also not limiting this invention is only described specific embodiment.Obviously,, according to above description, can make many modifications and variations.These embodiment are chosen and specifically described to this specification, is in order to explain better principle of the present invention and practical application, thereby under making, technical field technical staff can utilize the present invention and the modification on basis of the present invention to use well.The present invention is only subject to the restriction of claims and four corner and equivalent.
Claims (25)
1. an integrated circuit package, comprising:
Semiconductor bare chip, comprises the multiple electronic devices that are divided into m group, and each electronic device comprises n electrode of opposed polarity, and wherein m and n are greater than 1 integer;
The first insulating barrier, is positioned at the described surface of semiconductor bare chip; And
I power bus, comprises respectively the planar extension that is positioned on the first insulating barrier and the multiple vertical channel parts through each electrode of the first insulating barrier interface unit, and wherein i is greater than 1 and be less than or equal to the integer of m*n,
Wherein, at least one power bus in a described i power bus is electrically connected to each other an electrode of all devices at least two electronic device groups, and
Each in a described i power bus is as an external connection terminals.
2. integrated circuit package according to claim 1, wherein said electronic device is at least one being selected from diode, transistor, resistance, inductance.
3. integrated circuit package according to claim 1, wherein
The planar extension of at least one the first power bus in a described i power bus is ribbon; And
The planar extension of at least one the second source bus in a described i power bus is sinuous polyline shaped, and the direction of current flow of described at least one second source bus is changed with respect to the direction of current flow of described at least one the first power bus.
4. integrated circuit package according to claim 1, also comprises:
The second insulating barrier, between semiconductor bare chip and the first insulating barrier; And
J interconnecting member, comprises respectively the planar extension being positioned on the second insulating barrier and the multiple vertical channel parts that are connected each electrode of power device through the second insulating barrier,
Wherein, at least two interconnecting members in a described j interconnecting member are electrically connected to each other an electrode of all devices in an electronic device group respectively, and
At least one power bus in a described i power bus is electrically connected to each other described at least two interconnecting members.
5. integrated circuit package according to claim 4, the plane bearing of trend of a wherein said i power bus is first direction, the plane bearing of trend of a described j interconnecting member is second direction, and first direction intersects with second direction.
6. integrated circuit package according to claim 5, wherein first direction is vertical with second direction.
7. integrated circuit package according to claim 4, wherein
At least one in a described j interconnecting member is segmentation, and at least one in a described i power bus is electrically connected the different sections of segmentation interconnecting member.
8. integrated circuit package according to claim 7, wherein
At least one in a described i power bus is segmentation, and at least one in a described j interconnecting member is electrically connected the different sections of Segmented electrical source bus.
9. integrated circuit package according to claim 8, wherein
The plane bearing of trend of the Segmented electrical source bus in a described i power bus, vertical with the plane bearing of trend of the segmentation interconnecting member in a described j interconnecting member, make the direction of current flow in Segmented electrical source bus vertical with the direction of current flow in segmentation interconnecting member.
10. the integrated circuit package described according to Claim 8, also comprises lead frame, and described lead frame just at least two different sections of Segmented electrical source bus is electrically connected.
11. according to the integrated circuit package described in any one in claim 1-9, and wherein said electronic device is field-effect transistor, and the electrode of described field-effect transistor comprises source electrode, drain and gate.
12. according to the integrated circuit package described in any one in claim 1-9, also comprises lead frame, and a wherein said i power bus is connected to described lead frame.
13. integrated circuit packages according to claim 12, also comprise encapsulating compound, described encapsulating compound covers described semiconductor bare chip, and covers at least a portion of described lead frame, and end or the bottom-exposed of the pin of lead frame are electrically connected for outside.
14. 1 kinds are applied to the integrated circuit package of switch type regulator, comprise:
Semiconductor bare chip, comprises the multiple power devices that are divided into two groups, and each power device is included in the first electrode and the second electrode that on the surface of semiconductor bare chip, expose;
The first insulating barrier, is positioned at the described surface of semiconductor bare chip; And
The first to the 3rd power bus, comprises respectively the planar extension being positioned on the first insulating barrier and the multiple vertical channel parts that are connected each electrode of power device through the first insulating barrier,
Wherein, the first power bus is electrically connected to each other the first electrode of first group of power device, second source bus is electrically connected to each other the first electrode of the second electrode of first group of power device and second group of power device, the 3rd power bus is electrically connected to each other the second electrode of second group of power device, and
Each in the first to the 3rd power bus is as an external connection terminals.
15. integrated circuit packages according to claim 14, wherein
First and the planar extension of the 3rd power bus be ribbon; And
The planar extension of second source bus is sinuous polyline shaped, the direction of current flow that makes second source bus with respect to first and the direction of current flow of the 3rd power bus change.
16. integrated circuit packages according to claim 14, also comprise:
The second insulating barrier, between semiconductor bare chip and the first insulating barrier; And
First to fourth interconnecting member, comprises respectively the planar extension being positioned on the second insulating barrier and the multiple vertical channel parts that are connected each electrode of power device through the second insulating barrier,
Wherein, the first interconnecting member is electrically connected to each other the first electrode of first group of power device, the second interconnecting member is electrically connected to each other the second electrode of first group of power device, the 3rd interconnecting member is electrically connected to each other the first electrode of second group of power device, the 4th interconnecting member is electrically connected to each other the second electrode of second group of power device, and
The first power bus connects the first interconnecting member, second source bus connection second and the 3rd interconnecting member, and the 3rd power bus connects the 4th interconnecting member.
17. integrated circuit packages according to claim 16, wherein the plane bearing of trend of the first to the 3rd power bus is first direction, the plane bearing of trend of first to fourth interconnecting member is second direction, and first direction intersects with second direction.
18. integrated circuit packages according to claim 16, wherein first direction is vertical with second direction.
19. integrated circuit packages according to claim 16, wherein
At least one of first to fourth interconnecting member is segmentation, and the first to the 3rd power bus is electrically connected the different sections of segmentation interconnecting member.
20. integrated circuit packages according to claim 19, wherein
At least one in the first to the 3rd power bus is segmentation, and first to fourth interconnecting member is electrically connected the different sections of Segmented electrical source bus.
21. integrated circuit packages according to claim 20, wherein
The second interconnecting member, the 3rd interconnecting member and second source bus are segmentation, every section of the second interconnecting member and every section of the 3rd interconnecting member stagger, and every section of bearing of trend of second source bus is vertical with every section of bearing of trend in the second interconnecting member, the 3rd interconnecting member, makes the direction of current flow in the second interconnecting member, the 3rd interconnecting member vertical with the direction of current flow in second source bus.
22. according to the integrated circuit package described in claim 20, also comprises lead frame, and described lead frame is electrically connected the different sections of Segmented electrical source bus.
23. according to the integrated circuit package described in any one in claim 14-21, wherein said power device is field-effect transistor, the source electrode that described the first electrode is field-effect transistor and drain electrode in one, the source electrode that described the second electrode is field-effect transistor and drain electrode in another.
24. according to the integrated circuit package described in any one in claim 14-21, also comprises lead frame, and the wherein said first to the 3rd power bus is connected to described lead frame.
25. integrated circuit packages according to claim 24, also comprise encapsulating compound, described encapsulating compound covers described semiconductor bare chip, and covers at least a portion of described lead frame, and end or the bottom-exposed of the pin of lead frame are electrically connected for outside.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410080433.2A CN103824838A (en) | 2014-03-06 | 2014-03-06 | Integrated circuit module |
| CN201410242479.XA CN103985694B (en) | 2014-03-06 | 2014-05-30 | Integrated circuit package and package assembling thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410080433.2A CN103824838A (en) | 2014-03-06 | 2014-03-06 | Integrated circuit module |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN103824838A true CN103824838A (en) | 2014-05-28 |
Family
ID=50759815
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410080433.2A Pending CN103824838A (en) | 2014-03-06 | 2014-03-06 | Integrated circuit module |
| CN201410242479.XA Active CN103985694B (en) | 2014-03-06 | 2014-05-30 | Integrated circuit package and package assembling thereof |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410242479.XA Active CN103985694B (en) | 2014-03-06 | 2014-05-30 | Integrated circuit package and package assembling thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (2) | CN103824838A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108807316B (en) * | 2017-08-14 | 2020-07-10 | 苏州捷芯威半导体有限公司 | Semiconductor packaging structure and semiconductor device |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07142480A (en) * | 1993-11-17 | 1995-06-02 | Hitachi Ltd | Semiconductor integrated circuit device and fabrication thereof |
| US5563446A (en) * | 1994-01-25 | 1996-10-08 | Lsi Logic Corporation | Surface mount peripheral leaded and ball grid array package |
| US7727859B2 (en) * | 2005-06-30 | 2010-06-01 | Semiconductor Energy Laboratory Co., Ltd | Semiconductor device and manufacturing method thereof |
| CN102646681B (en) * | 2006-10-04 | 2015-08-05 | 株式会社半导体能源研究所 | Semiconductor device |
-
2014
- 2014-03-06 CN CN201410080433.2A patent/CN103824838A/en active Pending
- 2014-05-30 CN CN201410242479.XA patent/CN103985694B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN103985694B (en) | 2016-11-02 |
| CN103985694A (en) | 2014-08-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9431491B2 (en) | Semiconductor device and method of manufacturing the same | |
| CN105531813A (en) | Semiconductor device | |
| CN103824853B (en) | Integrated circuit module applied to switch type regulator | |
| TWI502702B (en) | Semiconductor device | |
| CN102244053A (en) | Semiconductor light emitting device and power semiconductor device | |
| CN102842564A (en) | Flip-chip package device for integrated switching power supply and flip-chip packaging method | |
| CN110637358B (en) | Semiconductor integrated circuit device having a plurality of semiconductor chips | |
| CN114121931A (en) | Electrostatic protection device and electrostatic protection circuit | |
| CN103858228A (en) | Semiconductor device and method of manufacture thereof | |
| CN111033720B (en) | Semiconductor integrated circuit device having a plurality of semiconductor chips | |
| CN103824838A (en) | Integrated circuit module | |
| CN105789183A (en) | Semiconductor device | |
| US11508844B2 (en) | Semiconductor device | |
| JP2020043200A (en) | Semiconductor device | |
| US20190326249A1 (en) | Multi-point stacked die wirebonding for improved power delivery | |
| TWI575747B (en) | Semiconductor device | |
| CN105322943B (en) | Integrated circuit with interface circuit, and interface unit for interface circuit | |
| US11764141B2 (en) | Semiconductor device | |
| CN102856280A (en) | Pad and chip | |
| CN103094277B (en) | Semiconductor device | |
| US10388784B2 (en) | Power chip and structure of transistor | |
| US20240128220A1 (en) | Semiconductor device | |
| KR101383106B1 (en) | Mos metal merged capacitor based on double patterning technology | |
| KR100638887B1 (en) | Electrostatic discharge device for bonding pad | |
| CN108511420A (en) | Semiconductor structure and chip |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20140528 |