CN103794504A - Flash memory and manufacturing method thereof - Google Patents
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- CN103794504A CN103794504A CN201210425017.2A CN201210425017A CN103794504A CN 103794504 A CN103794504 A CN 103794504A CN 201210425017 A CN201210425017 A CN 201210425017A CN 103794504 A CN103794504 A CN 103794504A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42324—Gate electrodes for transistors with a floating gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/6656—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
Abstract
The invention provides a flash memory and a manufacturing method thereof. The manufacturing method of the flash memory includes: providing a semiconductor substrate, forming a storage structure on the semiconductor substrate, and the storage structure including a first dielectric layer, a floating gate on the first dielectric layer, a second dielectric layer on the floating gate, and a control gate on the second dielectric layer; forming a protective layer on a side wall of the storage structure; and after forming protective layer, forming a side wall around the storage structure, and the protective layer being used for preventing the side wall of the storage structure from reacting with substances forming the side wall. By adoption of the manufacturing method of the flash memory in the invention, reading, writing and erasing efficiency and capabilities of the flash memory are improved.
Description
Technical field
The present invention relates to semiconductor applications, particularly flash memory and preparation method thereof.
Background technology
In current semiconductor industry, integrated circuit (IC) products mainly can be divided into three major types type: logic, memory and analog circuit, wherein memory device has accounted for sizable ratio in integrated circuit (IC) products.And in memory device, the development of flash memory (flash memory) is particularly rapid in recent years.Its main feature is can keep for a long time canned data in the situation that not powering up, have integrated level high, faster access speed, be easy to wipe and the multiple advantages such as rewriting, thereby be widely used in multinomial fields such as microcomputer, automation controls.
In various flash memories, be substantially divided into two types: folded gate device and point gate device, folded gate device has floating boom and control gate, wherein, control gate is positioned at floating boom top, and the method for manufacturing folded gate device is simpler than manufacturing point gate device, but circuit design is more complicated.A control gate of grid dividing structure is simultaneously as selecting transistor (Select transistor), and circuit design is relatively simple.
The standard physical structure of flash memory is called flash cell (bit).To fold gate device as example, the structure of flash cell is different from conventional MOS transistor.Between the grid (gate) of conventional MOS transistor and conducting channel, separated by gate insulator, be generally oxide layer (oxide); And flash cell more than between control gate (CG:control gate is equivalent to the grid of conventional MOS transistor) and conducting channel layer of substance, be referred to as floating boom (FG:floating gate).Due to the existence of floating boom, make flash memory can complete three kinds of basic manipulation modes: i.e. reading and writing, wipe.Even if in the situation that not having power supply to supply with, the existence of floating boom can keep storing the integrality of data.
Be the information that can also find more flash memory in the CN1681046B Chinese patent literature of (day for announcing: on July 13rd, 2011) at notification number.
Fig. 1 to Fig. 3 is the generalized section of the manufacture method of existing flash memory.
Please refer to Fig. 1, substrate 200 is provided, described substrate 200 surfaces are formed with tunnel oxide 210, floating gate polysilicon layer 220, silicon nitride layer 230, control gate polysilicon layer 240 successively, etching control gate polysilicon layer 240, silicon nitride layer 230, floating gate polysilicon layer 220, tunnel oxide 210 successively, forms storage organization.
With reference to figure 2, adopt thermal oxidation technology, form the oxide layer 250 that covers described storage organization.
With reference to figure 3, described oxide layer 250 is returned to quarter, form side wall 260.
Reading and writing and the efficiency of erasing ability of the flash memory that said method forms are low.
Summary of the invention
The problem that the present invention solves is that reading and writing and the ability of wiping of the flash memory that forms of existing method is low.
For addressing the above problem, the invention provides a kind of manufacture method of flash memory, comprising:
Semiconductor substrate is provided, in described Semiconductor substrate, forms storage organization, described storage organization comprises: first medium layer, the floating boom on first medium layer, the second medium layer on floating boom, control gate on second medium layer;
Sidewall at described storage organization forms protective layer;
Form after protective layer, around described storage organization, form side wall; Described protective layer used in preventing that the sidewall of described storage organization and the material of formation side wall from reacting.
Optionally, the method that forms protective layer at the sidewall of described storage organization is, adopts containing nitrogen plasma described storage organization sidewall is bombarded, and so that described storage organization sidewall is carried out to nitrogenize, forms nitration case, and described nitration case is described protective layer.
Optionally, described is nitrogen plasma containing nitrogen plasma, is formed by nitrogen plasma.
Optionally, the dosage of described nitrogen plasma injection is 1 × 10
15atom/cm
2～5 × 10
16atom/cm
2, radio-frequency power when described nitrogen plasma injects is 200W～2000W, the time that described nitrogen plasma injects is 10s～70s.
Optionally, the thickness of described protective layer is 3 dust～30 dusts.
Optionally, the material of described first medium layer is silica, silicon nitride, silicon oxynitride.
Optionally, described second medium layer is single layer structure or laminated construction.
Optionally, in the time that second medium layer is single layer structure, the material of described second medium layer is silica, silicon nitride or silicon oxynitride.
Optionally, in the time that second medium layer is laminated construction, the material from bottom to top layer is followed successively by silica, silicon nitride and silicon oxynitride.
Optionally, described floating boom is polysilicon layer.
Optionally, described control gate is polysilicon layer.
Optionally, on described control gate, there is mask layer.
The present invention also provides a kind of flash memory, comprising:
Substrate;
Be positioned at the storage organization on substrate, described storage organization comprises: first medium layer, the floating boom on first medium layer, the second medium layer on floating boom, control gate on second medium layer;
Storage organization sidewall has protective layer;
Described storage organization has side wall around.
Optionally, the material of described protective layer is nitration case.
Optionally, the thickness of described protective layer is 3 dust～30 dusts.
Optionally, described first medium layer material is silica, silicon nitride, silicon oxynitride.
Optionally, described second medium layer is single layer structure or laminated construction.
Optionally, in the time that second medium layer is single layer structure, the material of described second medium layer is silica, silicon nitride or silicon oxynitride.
Optionally, in the time that second medium layer is laminated construction, the material from bottom to top layer is followed successively by silica, silicon nitride and silicon oxynitride.
Compared with prior art, technical scheme of the present invention has the following advantages:
Sidewall at described storage organization forms protective layer; the material of the floating boom in storage organization and control gate and follow-up formation side wall is isolated; prevent that this material from reacting generation silica with floating boom and control gate; prevent that the floating boom of storage organization side-walls and the thickness of control gate from reducing, prevent first medium layer and the second medium layer thickening of storage organization side-walls.Make first medium layer and second medium layer thickness homogeneous in storage organization, solve " smiling face " problem.Dielectric layer in storage organization can thickening in side-walls, has reduced the tunnelling resistance of original tunnelling electronics, has improved reading and writing and the efficiency of erasing of flash memory; And the thickness homogeneous of the dielectric layer in storage organization, is evenly distributed the threshold voltage of flash memory, relative increase the operation window of memory device, improved reading of flash memory, write capability and wipe ability,, improved the performance of flash memory.
Accompanying drawing explanation
Fig. 1 to Fig. 3 is the generalized section of the manufacture method of existing flash memory;
Fig. 4 is the manufacture method flow chart of the flash memory that provides of one embodiment of the invention;
Fig. 5 to Fig. 9 is the generalized section of the manufacture method of the flash memory that provides of one embodiment of the invention.
Embodiment
Inventor through research find occur the reading and writing of flash memory and the ability of wiping low former because of:
Referring to figs. 1 to Fig. 3, in the process of oxide layer 250 that forms the described storage organization of covering, the floating gate polysilicon layer 220 of storage organization side-walls and control gate polysilicon layer 240 are owing to being exposed in the middle of the material that forms side wall, also participated in oxidation reaction,, silicon in floating gate polysilicon layer 220 and the control gate polysilicon layer 240 of storage organization sidewall reacts with the oxygen composition of the material that forms side wall, generates silica.And described Yang Cheng branch is being parallel to sidewall direction and perpendicular to the diffusion of sidewall direction place, therefore making the boundary line between polysilicon and the described dielectric layer of storage organization side-walls is camber line, and described camber line caves in to the direction of described polysilicon.Therefore, the polysilicon attenuation of storage organization side-walls, and make the dielectric layer thickening of storage organization side-walls.That is, make the thickness of dielectric layers heterogeneity in storage organization, intermediate thin, edge are thick, cause " smiling face " effect.Edge's thickening of the dielectric layer in storage organization has increased the tunnelling resistance of tunnelling electronics, and the reading and writing of flash memory and efficiency of erasing are reduced.
In addition, the thickness difference of the dielectric layer in storage organization is larger, and the threshold voltage distribution of flash memory is dispersed and inhomogeneous, the relative operation window that has dwindled memory device, makes the reading and writing ability of flash memory and wipes ability reduction.When serious, flash memory cannot be worked.
In order to overcome the above problems, inventor, through creative work, has obtained a kind of manufacture method of flash memory, specifically please refer to Fig. 4.Below by specific embodiment, technical scheme of the present invention is carried out to clear, complete description.
With reference to figure 5 and Fig. 6, step S11 in execution graph 4, Semiconductor substrate 500 is provided, in described Semiconductor substrate 500, form storage organization, described storage organization comprises: first medium layer 510, the floating boom 520 on first medium layer, the second medium layer 530 on floating boom 520, control gate 540 on second medium layer 530.
Wherein, Semiconductor substrate 500 can be monocrystalline, silicon-on-insulator (SOI), or can also comprise other material, for example indium antimonide, lead telluride, indium arsenide, indium phosphide, GaAs or gallium antimonide.Certainly, it can be also other backing material well-known to those skilled in the art.Wherein, well region, isolation structure etc. in Semiconductor substrate 500, are formed with, such as carrying out local oxide isolation structure (LOCOS) or fleet plough groove isolation structure (STI) etc.
First medium layer 510 can be silica, silicon nitride, silicon oxynitride or similar dielectric material according to the difference of flash memories kind.The present embodiment is tunnel oxide, and material is silica, and the thickness of the tunnel oxide forming is 20～100 dusts.The thickness of described tunnel oxide is too large, can increase the distance between floating boom and the Semiconductor substrate 500 of follow-up formation, thereby reduce the electric capacity between follow-up floating boom and Semiconductor substrate 500, reduces the efficiency that the reading and writing of flash memory enter and wipe.
Tunnel oxide can adopt the method for thermal oxidation to form.Also can adopt the technique of deposition to form tunnel oxide, the gas that depositing operation uses comprises silicon-containing gas and oxygen, and described silicon-containing gas is SiH2Cl2 or SiH2, is subject to the restriction of vacuum condition, also comprises N2 in gas.
Floating gate layer 520 ', the present embodiment is floating gate polysilicon, adopts the method for deposition to form.
Control grid layer 540 ', the present embodiment is control gate polysilicon, adopts the method for deposition to form.The present embodiment also can carry out control gate polysilicon in-situ doped, and the material of doping is phosphorus, arsenic or other similar substance, can improve the conductance of control gate polysilicon.
Then, in conjunction with reference to figure 5 and Fig. 6, form patterned mask layer 550 on described control grid layer 540 ' surface, and take patterned mask layer 550 as mask is etched to and exposes described Semiconductor substrate 500 control grid layer 540 ', second medium layer 530, floating gate layer 520 ' and first medium layer 510 successively, form storage organization.
Wherein, described mask layer 550 can be single layer structure or laminated construction.In the time that mask layer 550 is single layer structure, described mask layer 550 is photoresist.In the time that mask layer 550 is laminated construction, the top layer of described mask layer 550 is photoresist, and bottom is hard mask layer.The material of described hard mask layer is silica, silicon oxynitride, boron nitride, tantalum nitride or metal hard mask, and described metal hard mask is titanium nitride or boron nitride.The mask layer 550 of laminated construction can provide better pattern control.In the present embodiment, the material of mask layer 550 is photoresist.
In the present embodiment, described etching is dry etching.For well known field, do not repeating at this.
In other embodiments, can remove mask layer 550.
Then,, with reference to figure 7, the step S12 in execution graph 4, forms protective layer 570 at the sidewall of described storage organization.
Sidewall at storage organization forms protective layer 570; floating boom in storage organization 520 and control gate 540 are isolated with the reacting gas of follow-up formation side wall; prevent that the oxygen composition in this reacting gas from reacting generation silica with floating boom 520 and control gate 540; further prevent that the floating boom 520 of storage organization side-walls and the thickness of control gate 540 from reducing;, prevent first medium layer 510 and second medium layer 520 thickening of storage organization side-walls.
In the present embodiment, the protective layer 570 forming at the sidewall of storage organization is nitration case.In other embodiments, also passable as long as can reach other protective layers of following effect.Described acting as: the floating boom in storage organization 520 and control gate 540 can be isolated with the reacting gas of follow-up formation side wall, prevent that the oxygen composition in this reacting gas from reacting generation silica with floating boom 520 and control gate 540, further prevent that the floating boom 520 of storage organization side-walls and the thickness of control gate 540 from reducing.
In the present embodiment, nitration case is by containing nitrogen plasma, described storage organization sidewall being bombarded, so that described storage organization sidewall is carried out nitrogenize and to be formed.In other embodiments, also can form by other means nitrogenous layer.
Wherein, be to be formed at plasm reaction cavity ionic medium by the gas that comprises nitrogen containing nitrogen plasma.Described plasma reaction chamber can be DPN (Decoupled Plasma Nitridation, uncoupling pecvd nitride chamber), MMT (Modified Magnetron Tped, modified model magnetoelectricity tubular type) plasma reaction chamber, SPA (Slot Plan Antenna, groove shape surface antenna type) plasma reaction chamber or other similar plasm reaction cavity.The more excellent employing nitrogen plasma of the present embodiment to described storage organization sidewall bombard form nitration case, employing be that DPN carries out plasma to nitrogen.The concrete technique that forms is that the radio-frequency power when radio-frequency power of DPN is nitrogen plasma injection, is 200W～2000W; The dosage that nitrogen plasma injects is 1 × 10
15atom/cm
2～5 × 10
16atom/cm
2.The time that described nitrogen plasma injects is 10s～70s.The dosage, energy that nitrogen plasma injects is too large or the time is oversize, easily causes the waste of production cost; Dosage, energy that nitrogen plasma injects are too little or the time is shorter, and the nitration case of formation is densification or thickness low LCL not, makes nitration case not have the effect of protection.Adopting said method is 3 dust～30 dusts at the thickness of the nitration case of storage organization sidewall formation.In other embodiments, can regulate thickness range according to the size of device.In other embodiments, nitrogen plasma Implantation Energy and the time different and plasma apparatus according to concrete technology is different and different.
In addition, it should be noted that, the protective layer 570 of the present embodiment is to realize in the atmosphere by whole storage organization being enclosed in to nitrogen plasma, can form protective layer 570 in the sidewall locations of storage organization.
In addition, also it should be noted that, in other embodiments, if there is no mask layer 550, even if form protective layer 570 at the top of control gate 540, because protective layer 570 is very thin, negligible, therefore can not affect the carrying out of subsequent technique.
Then,, with reference to figure 8 and Fig. 9, the step S13 in execution graph 4, forms after protective layer 570, forms side wall 590 around described storage organization; Described protective layer 570 reacts with the material that forms side wall 590 for the sidewall that prevents described storage organization.
Wherein, the formation method of side wall is: with reference to figure 8, around described storage organization, covering the 3rd dielectric layer 580, the three dielectric layers 580 can be single layer structure or laminated construction.Therefore the side wall 590 being formed by the 3rd dielectric layer 580 can be also single layer structure or laminated construction.In the time that the 3rd dielectric layer 580 is single layer structure, the material of the 3rd dielectric layer 580 can be silica, silicon nitride, silicon oxynitride or fire sand.In the time that the 3rd dielectric layer 580 is double-decker, the bottom of described the 3rd dielectric layer 580 is the laminated construction that silicon oxide layer, top are silicon nitride layer.In the present embodiment, the material of described the 3rd dielectric layer 580 is silica.Formation method can be Quick Oxidation method (Rapid Thermal Oxidation, RTO), situ steam generating process (In-Situ Steam Generation, ISSG), tropism's oxidizing process (BatchIsotropic Oxidation such as boiler tube formula, BIO), low pressure atom oxidizing process (Low Pressure Radical Oxidation, LPRO).
Wherein, in the process of the 3rd dielectric layer 580 around forming storage organization, the nitration case of storage organization sidewall, the floating boom of storage organization side-walls 520 and control gate 540 are isolated with the material that forms side wall, the floating boom 520 and the control gate 540 that prevent storage organization side-walls generate silica, prevent that the floating boom 520 of storage organization side-walls and the thickness of control gate 540 from reducing, prevent dielectric layer thickening between the grid of storage organization side-walls.Make thickness of dielectric layers homogeneous between the grid in storage organization, solve " smiling face " problem.Between the grid in storage organization, the edge of dielectric layer can thickening, has reduced the tunnelling resistance of original tunnelling electronics, has improved reading and writing and the efficiency of erasing of flash memory; And the thickness homogeneous of the dielectric layer in storage organization, is evenly distributed the threshold voltage of flash memory, relative increase the operation window of memory device, improved reading of flash memory, write capability and wipe ability,, improved the performance of flash memory.
Then, with reference to figure 9, described the 3rd dielectric layer 580 is returned to quarter, form side wall 590.Described etching is dry etching, for those skilled in the art know field, is not repeating at this.
The present invention is applicable to nand memory, NOR memory.And the present invention is not only applicable to folded grid memory and is also applicable to a point grid memory.
With reference to figure 9, the present invention also provides a kind of flash memory, comprising:
Be positioned at the storage organization in Semiconductor substrate, described storage organization comprises: first medium layer 510, the floating boom 520 on first medium layer 510, the second medium layer 530 on floating boom, control gate 540 on second medium layer 530;
Storage organization sidewall has protective layer 570;
Described storage organization has side wall 590 around.
The present invention forms the flash memory structure relating in the method for flash memory, the content of material can be incorporated herein, and at this, the structure to flash memory, material do not repeat.
Although the present invention with preferred embodiment openly as above; but it is not for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can utilize method and the technology contents of above-mentioned announcement to make possible variation and modification to technical solution of the present invention; therefore; every content that does not depart from technical solution of the present invention; any simple modification, equivalent variations and the modification above embodiment done according to technical spirit of the present invention, all belong to the protection range of technical solution of the present invention.
Claims (19)
1. a manufacture method for flash memory, is characterized in that, comprising:
Semiconductor substrate is provided, in described Semiconductor substrate, forms storage organization, described storage organization comprises: first medium layer, the floating boom on first medium layer, the second medium layer on floating boom, control gate on second medium layer;
Sidewall at described storage organization forms protective layer;
Form after protective layer, around described storage organization, form side wall; Described protective layer used in preventing that the sidewall of described storage organization and the material of formation side wall from reacting.
2. the manufacture method of flash memory according to claim 1; it is characterized in that; the method that forms protective layer at the sidewall of described storage organization is; adopt containing nitrogen plasma described storage organization sidewall is bombarded; so that described storage organization sidewall is carried out to nitrogenize; form nitration case, described nitration case is described protective layer.
3. the manufacture method of flash memory according to claim 2, is characterized in that, described is nitrogen plasma containing nitrogen plasma, is formed by nitrogen plasma.
4. the manufacture method of flash memory according to claim 3, is characterized in that, the dosage that described nitrogen plasma injects is 1 × 10
15atom/cm
2～5 × 10
16atom/cm
2, radio-frequency power when described nitrogen plasma injects is 200W～2000W, the time that described nitrogen plasma injects is 10s～70s.
5. the manufacture method of flash memory according to claim 1, is characterized in that, the thickness of described protective layer is 3 dust～30 dusts.
6. the manufacture method of flash memory according to claim 1, is characterized in that, the material of described first medium layer is silica, silicon nitride, silicon oxynitride.
7. the manufacture method of flash memory according to claim 1, is characterized in that, described second medium layer is single layer structure or laminated construction.
8. the manufacture method of flash memory according to claim 7, is characterized in that, in the time that second medium layer is single layer structure, the material of described second medium layer is silica, silicon nitride or silicon oxynitride.
9. follow the manufacture method according to flash memory claimed in claim 7, it is characterized in that, in the time that second medium layer is laminated construction, the material from bottom to top layer is followed successively by silica, silicon nitride and silicon oxynitride.
10. the manufacture method of flash memory according to claim 1, is characterized in that, described floating boom is polysilicon layer.
The manufacture method of 11. flash memories according to claim 1, is characterized in that, described control gate is polysilicon layer.
The manufacture method of 12. flash memories according to claim 1, is characterized in that, on described control gate, has mask layer.
13. 1 kinds of flash memories, is characterized in that, comprising:
Semiconductor substrate;
Be positioned at the storage organization in described Semiconductor substrate, described storage organization comprises: first medium layer, the floating boom on first medium layer, the second medium layer on floating boom, control gate on second medium layer;
Storage organization sidewall has protective layer;
Described storage organization has side wall around.
14. flash memories according to claim 13, is characterized in that, the material of described protective layer is nitration case.
15. flash memories according to claim 13, is characterized in that, the thickness of described protective layer is 3 dust～30 dusts.
16. flash memories according to claim 13, is characterized in that, the material of described first medium layer is silica, silicon nitride, silicon oxynitride.
17. flash memories according to claim 13, is characterized in that, described second medium layer is single layer structure or laminated construction.
18. flash memories according to claim 17, is characterized in that, in the time that second medium layer is single layer structure, the material of described second medium layer is silica, silicon nitride or silicon oxynitride.
19. follow according to the flash memory described in claim 17, it is characterized in that, in the time that second medium layer is laminated construction, the material from bottom to top layer is followed successively by silica, silicon nitride and silicon oxynitride.
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Cited By (1)
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