CN103763870A - Bonding pad graphic design method for reducing stress - Google Patents
Bonding pad graphic design method for reducing stress Download PDFInfo
- Publication number
- CN103763870A CN103763870A CN201410000283.XA CN201410000283A CN103763870A CN 103763870 A CN103763870 A CN 103763870A CN 201410000283 A CN201410000283 A CN 201410000283A CN 103763870 A CN103763870 A CN 103763870A
- Authority
- CN
- China
- Prior art keywords
- pad
- area
- bonding pad
- stress
- right angles
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The invention belongs to the technical field of design of circuit boards of aerospace electronic products, and particularly relates to a bonding pad graphic design method. According to the technical scheme, the bonding pad graphic design method for reducing stress comprises the steps that a bonding pad large in area is cut into a plurality of small bonding pad bodies, and sharp corner design is avoided. Through the method, the problems of local mismatch and overall mismatch in the welding process due to the difference of a ceramic device and a metal base expansion coefficient can be effectively solved, the reliability and safety of the electronic products are improved, and the obvious benefits are achieved in the field of high-reliability electronic assemblies.
Description
Technical field
The invention belongs to aerospace electron product circuit plate design field, be specifically related to a kind of graphical design method of pad.
Background technology
Along with aerospace electron product is to high density, multifunction development, make power electronic product become inexorable trend to efficient, high power future development, the high-power output electronic product that the power source products of particularly take is representative, heat dissipation problem is emphasis and the difficult point in Product Process design often.The metal base printed board with good heat dispersion that development in recent years is got up can effectively solve power component heat dissipation problem.
But good heat dispersion makes again to occur new problem in the circuit assembly process of metal base printed circuit board.Because the base material of metal base printed circuit board is metal (such as aluminium alloy), the intrinsic coefficient of expansion of metal material is larger, and the high-grade surface mounting component that spacecraft is selected is generally ceramic base material, there is the less coefficient of expansion, therefore the coefficient of expansion matching performance of the two is poor, in welding cooling procedure, because shrinking to differ, causes solder joint and components and parts self to bear welding stress; The situations such as under the environmental condition of variations in temperature, each variations in temperature all can be brought the STRESS VARIATION of solder joint, thereby causes ceramic body cracking, and even device solder joint is impaired, reliability reduces, and high reliability aerospace electron product is brought to hidden danger.
Particularly for the larger components and parts of some package dimensions, its bonding pad area is also large (bonding pad area is greater than 3mm * 5mm) generally, and Fig. 1 is components and parts outline drawing and the corresponding land pattern of SMD-1 encapsulation.Because top solder side strengthens, scolder is used many, and contraction distortion during solder cools strengthens, and welding stress strengthens; In addition, in temperature cycling test, the also larger stress of generation that expands with heat and contract with cold of circuit board and scolder, these stress are corresponding larger to the active force of components and parts, cause components and parts body cracking, device failure when serious.
Summary of the invention
The object of the invention is: the components and parts land pattern method for designing that a kind of SMD-1 of being directed to encapsulation is provided, to alleviate because of the fatigue failure of solder joint plastic creep and component thermal stress damage that between components and parts and pcb board, solder joint, coefficient of expansion mismatch is caused, improve electronic product power supply reliability and fail safe.
Technical scheme of the present invention is: a kind of for slowing down the land pattern method for designing of effect of stress, it comprises the following steps:
A. the pad that is directed to the components and parts of SMD-1 encapsulation carries out the differentiation on area, picks out the pad that area is greater than 3mm * 5mm;
B. in the situation that keeping whole length and width constant, the pad that area is greater than to 3mm * 5mm is divided into two or more rectangular pads;
C. four right angles of rectangular pads being carried out to chamfering or fillet processes;
D. adjacent rectangular pads is interconnected by printed conductor;
E. four right angles of the pad of not picking out in steps A being carried out to chamfering or fillet processes.
The invention has the beneficial effects as follows: the present invention starts with by theory analysis with from solving differential expansion mismatch problems, tack weld area of stress concentration, change pad design mode, the stressed problem of avoiding large area pad and stresses of parts to concentrate position to cause, pad is cut into several little pads, avoid pointed design, local mismatches and whole mismatch problems in the time of can effectively alleviating being welded that ceramic component and metal substrate expansion coefficient difference bring, improve reliability and the fail safe of electronic product, in highly reliable electronics dress connection field, benefit is particularly evident.
Accompanying drawing explanation
Fig. 1 is components and parts outline drawing and the corresponding land pattern of the SMD-1 encapsulation described in background technology;
Fig. 2 is a kind of embodiment of the present invention;
Fig. 3 is a kind of embodiment of the present invention;
Fig. 4 is a kind of embodiment of the present invention.
Embodiment
Referring to accompanying drawing 1, a kind of for slowing down the land pattern method for designing of effect of stress, it comprises the following steps:
A. the pad that is directed to the components and parts of SMD-1 encapsulation carries out the differentiation on area, picks out the pad that area is greater than 3mm * 5mm;
B. in the situation that keeping whole length and width constant, the pad that area is greater than to 3mm * 5mm is divided into two or more rectangular pads;
C. four right angles of rectangular pads being carried out to chamfering or fillet processes;
D. adjacent rectangular pads is interconnected by printed conductor;
E. four right angles of the pad of not picking out in steps A being carried out to chamfering or fillet processes.
Above-mentioned steps, by reducing bonding pad area and changing bond pad shapes, to reduce the quantity of solder joint, thereby bring reducing of welding stress, because the welding stress producing on each solder joint is separate, solder joint integral rigidity reduces, and the total stress bearing for components and parts welding ends electrode reduces;
Because having carried out chamfer design (or fillet), processes pad, the edge and the four jiaos of iso-stress that also make components and parts termination electrode force part leave termination electrode are concentrated position, avoid structure weakest link to produce the problem of cracking, further reduced the impaired possibility of components and parts; Utilize this method, do not change former electrical interface characteristic, still use reflow soldering process to weld.
Below, provided and utilized three kinds of embodiments of the present invention:
Referring to accompanying drawing 2, in step B, the pad that area is greater than to 3mm * 5mm is divided into two rectangular pads; In step C, four of each rectangular pad right angles are carried out to chamfered.
Referring to accompanying drawing 3, in step B, the pad that area is greater than to 3mm * 5mm is divided into two rectangular pads; In step C, four of each rectangular pad right angles are carried out to fillet processing.
Referring to accompanying drawing 4, in step B, the pad that area is greater than to 3mm * 5mm is divided into four rectangular pads; In step C, four of each rectangular pads right angles are carried out to chamfered.
According to actual designing requirement, the pad that area can also be greater than to 3mm * 5mm is separated into the different piece numbers such as three, six, nine.
Claims (4)
1. for slowing down a land pattern method for designing for effect of stress, it is characterized in that, it comprises the following steps:
A. the pad that is directed to the components and parts of SMD-1 encapsulation carries out the differentiation on area, picks out the pad that area is greater than 3mm * 5mm;
B. in the situation that keeping whole length and width constant, the pad that area is greater than to 3mm * 5mm is divided into two or more rectangular pads;
C. four right angles of rectangular pads being carried out to chamfering or fillet processes;
D. adjacent rectangular pads is interconnected by printed conductor;
E. four right angles of the pad of not picking out in steps A being carried out to chamfering or fillet processes.
2. as claimed in claim 1 a kind ofly it is characterized in that for slowing down the pad attaching method of effect of stress, in step B, the pad that area is greater than to 3mm * 5mm is divided into two rectangular pads; In step C, four of each rectangular pad right angles are carried out to chamfered.
3. as claimed in claim 1 a kind ofly it is characterized in that for slowing down the land pattern method for designing of effect of stress, in step B, the pad that area is greater than to 3mm * 5mm is divided into two rectangular pads; In step C, four of each rectangular pad right angles are carried out to fillet processing.
4. as claimed in claim 1 a kind ofly it is characterized in that for slowing down the land pattern method for designing of effect of stress, in step B, the pad that area is greater than to 3mm * 5mm is divided into four rectangular pads; In step C, four of each rectangular pads right angles are carried out to chamfered.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410000283.XA CN103763870A (en) | 2014-01-02 | 2014-01-02 | Bonding pad graphic design method for reducing stress |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410000283.XA CN103763870A (en) | 2014-01-02 | 2014-01-02 | Bonding pad graphic design method for reducing stress |
Publications (1)
Publication Number | Publication Date |
---|---|
CN103763870A true CN103763870A (en) | 2014-04-30 |
Family
ID=50531003
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410000283.XA Pending CN103763870A (en) | 2014-01-02 | 2014-01-02 | Bonding pad graphic design method for reducing stress |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN103763870A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107072067A (en) * | 2017-04-14 | 2017-08-18 | 深圳市牧泰莱电路技术有限公司 | A kind of manufacture method of the circuit board of groove at side surface |
CN107484349A (en) * | 2017-10-17 | 2017-12-15 | 珠海杰赛科技有限公司 | A kind of method for preventing printed circuit board welding resistance crackle |
CN108447837A (en) * | 2017-02-16 | 2018-08-24 | 中芯国际集成电路制造(上海)有限公司 | A kind of semiconductor devices |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102378484A (en) * | 2010-08-13 | 2012-03-14 | 雅达电子有限公司 | Method for improving solder joint reliability, printed circuit board, packaging device and packaging module |
JP2013089795A (en) * | 2011-10-19 | 2013-05-13 | Mitsubishi Electric Corp | Printed wiring board and mounting structure of electronic component using the same |
-
2014
- 2014-01-02 CN CN201410000283.XA patent/CN103763870A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102378484A (en) * | 2010-08-13 | 2012-03-14 | 雅达电子有限公司 | Method for improving solder joint reliability, printed circuit board, packaging device and packaging module |
JP2013089795A (en) * | 2011-10-19 | 2013-05-13 | Mitsubishi Electric Corp | Printed wiring board and mounting structure of electronic component using the same |
Non-Patent Citations (1)
Title |
---|
成钢等: "铝基PCB板可靠性研究", 《电子产品可靠性与环境试验》, vol. 31, no. 6, 31 December 2013 (2013-12-31), pages 55 - 59 * |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108447837A (en) * | 2017-02-16 | 2018-08-24 | 中芯国际集成电路制造(上海)有限公司 | A kind of semiconductor devices |
CN107072067A (en) * | 2017-04-14 | 2017-08-18 | 深圳市牧泰莱电路技术有限公司 | A kind of manufacture method of the circuit board of groove at side surface |
CN107484349A (en) * | 2017-10-17 | 2017-12-15 | 珠海杰赛科技有限公司 | A kind of method for preventing printed circuit board welding resistance crackle |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103000559B (en) | The positioning fixture of semiconductor chip and the manufacture method of semiconductor device | |
CN103025080A (en) | Method for connecting printed circuit boards | |
JP6483440B2 (en) | Semiconductor device and manufacturing method thereof | |
US20150014031A1 (en) | Compound carrier board structure of flip-chip chip-scale package and manufacturing method thereof | |
JP2013080742A (en) | Semiconductor package, wiring board unit, and electronic apparatus | |
JP2011044512A (en) | Semiconductor component | |
CN103763870A (en) | Bonding pad graphic design method for reducing stress | |
CN104900627A (en) | Semiconductor device, method of manufacturing a semiconductor device, and positioning jig | |
US20080180900A1 (en) | Electronic Component for an Electronic Carrier Substrate | |
CN103582302A (en) | Printed circuit board and method for manufacturing printed circuit board | |
CN103369813A (en) | Structure of printed circuit board | |
US9793189B2 (en) | Printed wiring board assembly, electrical device, and method for assembling printed wiring board assembly | |
JP6319477B1 (en) | Module, module manufacturing method, package | |
CN201256490Y (en) | Heat tolerant tray for printed circuit board wave peak and reflow soldering | |
CN104363698B (en) | The row leaded package and encapsulation design method and wiring board of wiring board | |
JP6962095B2 (en) | Electronics and joining methods | |
CN201113221Y (en) | Semiconductor laser with combined heat dispersion substrate | |
CN205611039U (en) | Component side sinks nickel gold with heavy nickel printed wiring board of face of weld | |
CN203589005U (en) | Recessed welding point package | |
TWM586919U (en) | Circuit module and printed circuit board thereof | |
CN203386741U (en) | Pin frame | |
CN216146519U (en) | Connecting structure of surface-mounted element | |
CN203590609U (en) | Steel plate structure | |
CN108258036A (en) | A kind of patch triode | |
CN102984883B (en) | Structure capable of avoiding cold solder joint of elements and method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20140430 |