CN103762867A - Double-input three-phase nine-switch-block MMC rectifier and control method thereof - Google Patents
Double-input three-phase nine-switch-block MMC rectifier and control method thereof Download PDFInfo
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- CN103762867A CN103762867A CN201410042977.XA CN201410042977A CN103762867A CN 103762867 A CN103762867 A CN 103762867A CN 201410042977 A CN201410042977 A CN 201410042977A CN 103762867 A CN103762867 A CN 103762867A
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Abstract
The invention provides a double-input three-phase nine-switch-block MMC rectifier and a control method thereof. The rectifier comprises two three-phase voltage sources, two sets of three-phase inductors, a first bridge arm, a second bridge arm, a third bridge arm and a rectification load. Each of the first bridge arm, the second bridge arm and the third bridge arm is formed by connecting an upper switch block, a middle switch block, a lower switch block and two inductors in series. Each switch block is formed by connecting N power switch units. The rectifier is controlled through carrier phase-shifting PWM. Two input alternating-current power supplies are converted into alternating-current input of the three-phase 2N+1 level, rectified and overlapped and provide power for the load. The voltage stress borne by each switching tube in each MMC power switch unit is only 1/N of the voltage of a direct-current power supply, the voltage sharing problem of the switching tubes is well solved, and the double-input three-phase nine-switch-block MMC rectifier is suitable for high-voltage and large-power occasions where two three-phase alternating-current power supplies are input.
Description
Technical field
The present invention relates to module combination multi-level converter (MMC) field, be specifically related to a kind of dual input three-phase nine switches set MMC rectifier and control methods thereof.
Background technology
, there is the direction of two kinds of improvement rectifiers at present power rectifier forward miniaturization, high reliability and low-loss future development: reduce passive device or improve rectifier topology structure and using and reduce active device as the new development that reduces active device direction under this trend.Three-phase nine switching rectifiers close rectifier with respect to traditional twelvemo and have reduced three switches and corresponding drive circuit, in the application of considering cost and volume, occupy certain advantage.Yet the two-way three-phase input of nine switching rectifiers is two level, input AC current waveform is poor.In addition, half that the voltage stress that in nine switches, each switch bears is DC bus-bar voltage, and there is the voltage-sharing of switching tube, this has limited the application of three-phase nine switching rectifiers in high pressure and large-power occasions greatly.
In recent years, multilevel technology is constantly promoted, and successful Application is at industrial circles such as high voltage direct current transmission, Electric Drive, active power filtering, static synchroballistic, common voltage-type multi-level rectifier topology is broadly divided into case bit-type and the large class of unit cascaded type two at present.Module combination multi-level converter (Modular Multilevel Converter, MMC) as a kind of novel many level topologys, except having advantages of traditional multi-level rectifier, module combination multi-level rectifier adopts Modular Structure Design, is convenient to System Expansion and redundancy of effort; Have unbalanced operation ability, fault traversing and recovery capability, system reliability is high; Owing to having common DC bus, module combination multi-level rectifier is particularly useful for HVDC (High Voltage Direct Current) transmission system application.Yet, when the alternating current circuit of two different frequencies connected, needing 2 MMC rectifiers, this has increased engineering cost greatly.
Summary of the invention
The object of the invention is to overcome above-mentioned the deficiencies in the prior art, propose a kind of dual input three-phase nine switches set MMC rectifier and control methods thereof.
The technical solution used in the present invention is as follows.
Dual input three-phase nine switches set MMC rectifiers comprise the first three-phase voltage source, the second three-phase voltage source, first group of inductance, second group of inductance, the first brachium pontis, the second brachium pontis, the 3rd brachium pontis and load, the first three-phase voltage source comprises a u phase voltage source, a v phase voltage source and a w phase voltage source, the second three-phase voltage source comprises the 2nd u phase voltage source, the 2nd v phase voltage source and the 2nd w phase voltage source, first group of inductance comprises a u phase inductance, a v phase inductance and a w phase inductance, second group of inductance comprises the 2nd u phase inductance, the 2nd v phase inductance and the 2nd w phase inductance, all each is freely gone up switches set, the first inductance, middle switches set, the second inductance, lower switches set and is in series for described the first brachium pontis, the second brachium pontis and the 3rd brachium pontis, the upper switches set of the first brachium pontis is in series by N power switch unit, the middle switches set of the first brachium pontis is in series by N power switch unit, the lower switches set of the first brachium pontis is connected by N power switch unit, the upper switches set of the second brachium pontis is in series by N power switch unit, the middle switches set of the second brachium pontis is in series by N power switch unit, the lower switches set of the second brachium pontis is in series by N power switch unit, the upper switches set of the 3rd brachium pontis is in series by N power switch unit, the middle switches set of the 3rd brachium pontis is in series by N power switch unit, the lower switches set of the 3rd brachium pontis is in series by N power switch unit, the one u phase voltage source, a v phase voltage source and a w phase voltage source are as the input of first via three-phase, and the 2nd u phase voltage source, the 2nd v phase voltage source and the 2nd w phase voltage source are as the second road three-phase input, and N is positive integer.
In above-mentioned dual input three-phase nine switches set MMC rectifiers, two inductance of two inductance of the first brachium pontis, the second brachium pontis and two inductance of the 3rd brachium pontis substitute by coupling inductance.
In above-mentioned dual input three-phase nine switches set MMC rectifiers, the lower end of the upper switches set of the first brachium pontis is connected with one end of the first inductance of the first brachium pontis, the other end of the first inductance of the first brachium pontis is connected with the upper end of the middle switches set of the first brachium pontis, the lower end of the middle switches set of the first brachium pontis is connected with one end of the second inductance of the first brachium pontis, and the other end of the second inductance of the first brachium pontis is connected with the upper end of the lower switches set of the first brachium pontis, the structure of the structure of the structure of the second brachium pontis, the 3rd brachium pontis and the first brachium pontis is in full accord, the one end in the one u phase voltage source is connected with one end of a u phase inductance, the other end of the one u phase inductance is connected with the upper end of the middle switches set of the first brachium pontis, the one end in the other end in the one u phase voltage source and a v phase voltage source, the one end in the one w phase voltage source connects, the other end in the one v phase voltage source is connected with one end of a v phase inductance, the other end of the one v phase inductance is connected with the upper end of the middle switches set of the second brachium pontis, the other end in the one w phase voltage source is connected with one end of a w phase inductance, the other end of the one w phase inductance is connected with the upper end of the middle switches set of the 3rd brachium pontis, the one end in the 2nd u phase voltage source is connected with one end of the 2nd u phase inductance, the other end of the 2nd u phase inductance is connected with the lower end of the middle switches set of the first brachium pontis, the one end in the other end in the 2nd u phase voltage source and the 2nd v phase voltage source, the one end in the 2nd w phase voltage source connects, the other end in the 2nd v phase voltage source is connected with one end of the 2nd v phase inductance, the other end of the 2nd v phase inductance is connected with the lower end of the middle switches set of the second brachium pontis, the other end in the 2nd w phase voltage source is connected with one end of the 2nd w phase inductance, the other end of the 2nd w phase inductance is connected with the lower end of the middle switches set of the 3rd brachium pontis, the upper end of the upper switches set of the first brachium pontis with the upper end of the upper switches set of the second brachium pontis, the upper end of upper switches set of the 3rd brachium pontis, one end of load be connected, the other end of load with the lower end of the lower switches set of the first brachium pontis, the lower end of the lower switches set of the second brachium pontis, the lower end of the lower switches set of the 3rd brachium pontis, hold and be connected.
In above-mentioned dual input three-phase nine switches set MMC rectifiers, power switch unit consists of the first switching tube, second switch pipe, the first diode, the second diode and electric capacity; Wherein, the positive pole of electric capacity is connected with the collector electrode of the first switching tube, the negative electrode of the first diode, the emitter of the first switching tube is connected with the anode of the first diode, the negative electrode of the collector electrode of second switch pipe, the second diode, and the emitter of second switch pipe is connected with the anode of the second diode, the negative pole of electric capacity; The collector electrode of second switch pipe is as the first output, and the emitter of second switch pipe is as the second output.
In above-mentioned dual input three-phase nine switches set MMC rectifiers, the second output of j power switch unit of each switches set is connected with the first output of j+1 power switch unit, and wherein the value of j is 1～N-1.
In the control method of above-mentioned dual input three-phase nine switches set MMC rectifiers, adopt phase-shifting carrier wave PWM to control the opening and turn-offing of switching tube of each switches set; J power switch unit of the upper switches set of the first brachium pontis, j the power switch unit of lower switches set of the first brachium pontis, j the power switch unit of upper switches set of the second brachium pontis, j the power switch unit of lower switches set of the second brachium pontis, j power switch unit of j power switch unit of the upper switches set of the 3rd brachium pontis and the lower switches set of the 3rd brachium pontis adopts identical triangular wave as j carrier wave C
j, wherein the value of j is 1～N; N carrier wave be 360 °/N of lagging phase angle successively; The upper switches set of the first brachium pontis adopts primary sinusoid R
authe first direct current biasing R superposes
doathe first modulating wave R as the first brachium pontis
au+ R
doa, the lower switches set of the first brachium pontis adopts the second sinusoidal wave R
buthe second direct current biasing R superposes
dobthe second modulating wave R as the first brachium pontis
bu+ R
dob, the upper switches set of the second brachium pontis adopts the 3rd sinusoidal wave R
avthe first direct current biasing R superposes
doathe first modulating wave R as the second brachium pontis
av+ R
doa, the lower switches set of the second brachium pontis adopts the 4th sinusoidal wave R
bvthe second direct current biasing R superposes
dobthe second modulating wave R as the second brachium pontis
bv+ R
dob, the upper switches set of the 3rd brachium pontis adopts the 5th sinusoidal wave R
awthe first direct current biasing R superposes
doathe first modulating wave R as the 3rd brachium pontis
aw+ R
doa, the lower switches set of the 3rd brachium pontis adopts the 6th sinusoidal wave R
bwthe second direct current biasing R superposes
dobthe second modulating wave R as the 3rd brachium pontis
bw+ R
dob.
In above-mentioned control method, the first modulating wave R of the first brachium pontis
au+ R
doawith j carrier wave C
jby the first comparator, obtain the control level of second switch pipe gate pole of j power switch unit of the upper switches set of the first brachium pontis, as the first modulating wave R of the first brachium pontis
au+ R
doabe greater than j carrier wave C
jtime, the first comparator output high level, as the first modulating wave R of the first brachium pontis
au+ R
doabe less than j carrier wave C
jtime, the first comparator output low level, wherein the value of j is 1～N; The second modulating wave R of the first brachium pontis
bu+ R
dobwith j carrier wave C
jby the second comparator, obtain the control level of second switch pipe gate pole in j the power switch unit of lower switches set of the first brachium pontis, as the second modulating wave R of the first brachium pontis
bu+ R
dobbe less than j carrier wave C
jtime, the second comparator output high level, as the second modulating wave R of the first brachium pontis
bu+ R
dobbe greater than j carrier wave C
jtime, the second comparator output low level; In the control level of second switch pipe gate pole of j power switch unit of the upper switches set of the first brachium pontis and j power switch unit of the lower switches set of the first brachium pontis, the control level of second switch pipe gate pole is by the first XOR gate 307, obtains the control level of second switch pipe gate pole in j the power switch unit of middle switches set of the first brachium pontis; The first modulating wave R of the second brachium pontis
av+ R
doawith j carrier wave C
jby the 3rd comparator, obtain the control level of second switch pipe gate pole in j the power switch unit of upper switches set of the second brachium pontis, as the first modulating wave R of the second brachium pontis
av+ R
doabe greater than j carrier wave C
jtime, the 3rd comparator output high level, as the first modulating wave R of the second brachium pontis
av+ R
doabe less than j carrier wave C
jtime, the 3rd comparator output low level; The second modulating wave R of the second brachium pontis
bv+ R
dobwith j carrier wave C
jby the 4th comparator, obtain the control level of second switch pipe gate pole in j the power switch unit of lower switches set of the second brachium pontis, as the second modulating wave R of the second brachium pontis
bv+ R
dobbe less than j carrier wave C
j, the 4th comparator output high level, as the second modulating wave R of the second brachium pontis
bv+ R
dobbe greater than j carrier wave C
j, the 4th comparator output low level; In j power switch unit of the upper switches set of the second brachium pontis, in j power switch unit of the control level of second switch pipe gate pole and the lower switches set of the second brachium pontis, the control level of second switch pipe gate pole by the second XOR gate 308, obtains the control level of second switch pipe gate pole in j the power switch unit of middle switches set of second brachium pontis; The first modulating wave R of the 3rd brachium pontis
aw+ R
doawith j carrier wave C
jby the 5th comparator, obtain the control level of second switch pipe gate pole in j the power switch unit of upper switches set of the 3rd brachium pontis, as the first modulating wave R of the 3rd brachium pontis
aw+ R
doabe greater than j carrier wave C
j, the 5th comparator output high level, as the first modulating wave R of the 3rd brachium pontis
aw+ R
doabe less than j carrier wave C
j, the 5th comparator output low level; The second modulating wave R of the 3rd brachium pontis
bw+ R
dobwith j carrier wave C
jby the 6th comparator, obtain the control level of second switch pipe gate pole in j the power switch unit of lower switches set of the 3rd brachium pontis, as the second modulating wave R of the 3rd brachium pontis
bw+ R
dobbe less than j carrier wave C
j, the 6th comparator output high level, as the second modulating wave R of the 3rd brachium pontis
bw+ R
dobbe greater than j carrier wave C
j, the 6th comparator output low level; In j power switch unit of the upper switches set of the 3rd brachium pontis, in j power switch unit of the control level of second switch pipe gate pole and the lower switches set of the 3rd brachium pontis, the control level of second switch pipe gate pole by the 3rd XOR gate 309, obtains the control level of second switch pipe gate pole in j the power switch unit of middle switches set of the 3rd brachium pontis.
The mode of operation of dual input three-phase nine switches set MMC rectifiers comprises same pattern and alien frequencies pattern frequently, and in frequency pattern, the frequency that first via output is exported with the second tunnel is identical, and amplitude is not identical; In alien frequencies pattern, frequency and the amplitude of first via output and the output of the second tunnel are all not identical.
Compared with prior art, the advantage that the present invention has is: two-way three-phase alternating current input power is all converted to the three-phase alternating current input that two-route wire voltage is 2N+1 level, input current waveform is of high quality, the voltage stress that in power switch unit, each switching tube bears is only the 1/N of DC bus-bar voltage, can guarantee that the voltage that in the rectifier course of work, all switching tubes bear equates, has well solved the voltage-sharing of switching tube simultaneously.Compare with existing three-phase nine switching rectifiers, the two-way three-phase alternating current input power of dual input three-phase nine switches set MMC rectifiers provided by the present invention is all converted to the three-phase alternating current input that two-route wire voltage is 2N+1 level, and the quality of input AC current waveform is greatly improved.In addition, the voltage stress bearing of each switching tube is only the 1/N of DC bus-bar voltage, and control method provided by the present invention equates the voltage that in the rectifier course of work, all switching tubes bear, well solved the voltage-sharing of switching tube, this will be very beneficial for the application of dual input three-phase nine switches set MMC rectifiers in high pressure and large-power occasions.Compare with existing MMC rectifier, dual input three-phase nine switches set MMC rectifiers provided by the present invention have two-way and exchange output, can be directly used in being connected of alternating current circuit of two different frequencies, greatly reduce engineering cost.
Accompanying drawing explanation
Fig. 1 is the circuit structure diagram of dual input three-phase nine switches set MMC rectifiers of the present invention;
Fig. 2 is the circuit structure diagram of the power switch unit of the dual input three-phase nine switches set MMC rectifiers shown in Fig. 1;
Fig. 3 is the phase-shifting carrier wave PWM control structure figure of the dual input three-phase nine switches set MMC rectifiers shown in Fig. 1;
Fig. 4 a, 4b are that the dual input three-phase nine switches set MMC rectifiers shown in Fig. 1 work in respectively the modulating wave under CF pattern and DF pattern;
Fig. 5 a, 5b are that dual input three-phase nine switches set nine level MMC rectifiers work in the simulation waveform figure under frequency pattern and alien frequencies pattern.
Embodiment
For further setting forth content of the present invention and feature, below in conjunction with accompanying drawing, specific embodiment of the invention scheme is described, but enforcement of the present invention is not limited to this.
With reference to figure 1, dual input three-phase nine switches set MMC rectifiers of the present invention, comprise a u phase voltage source u
ua, a v phase voltage source u
va, a w phase voltage source u
wa, a u phase inductance L
ua, a v phase inductance L
va, a w phase inductance L
wa, the 2nd u phase voltage source u
ub, the 2nd v phase voltage source u
vb, the 2nd w phase voltage source u
wb, the 2nd u phase inductance L
ub, the 2nd v phase inductance L
vb, the 2nd w phase inductance L
wb, the first brachium pontis, the second brachium pontis, the 3rd brachium pontis and load R; Described the first brachium pontis, the second brachium pontis and the 3rd brachium pontis are by upper switches set (H
u, H
v, H
w), middle switches set (M
u, M
v, M
w), lower switches set (L
u, L
v, L
w) and two inductance (L
hu, L
lu, L
hv, L
lv, L
hw, L
lw) be in series; The upper switches set H of the first brachium pontis
uby N power switch unit (SM
hu1, SM
hu2..., SM
huN) be in series, the middle switches set M of the first brachium pontis
uby N power switch unit (SM
mu1, SM
mu2..., SM
muN) be in series, the lower switches set L of the first brachium pontis
uby N power switch unit (SM
lu1, SM
lu2..., SM
luN) series connection, the upper switches set H of the second brachium pontis
vby N power switch unit (SM
hv1, SM
hv2..., SM
hvN) be in series, the middle switches set M of the second brachium pontis
vby N power switch unit (SM
mv1, SM
mv2..., SM
mvN) be in series, the lower switches set L of the second brachium pontis
vby N power switch unit (SM
lv1, SM
lv2..., SM
lvN) be in series, the upper switches set H of the 3rd brachium pontis
wby N power switch unit (SM
hw1, SM
hw2..., SM
hwN) be in series, the middle switches set M of the 3rd brachium pontis
wby N power switch unit (SM
mw1, SM
mw2..., SM
mwN) be in series, the lower switches set L of the 3rd brachium pontis
wby N power switch unit (SM
lw1, SM
lw2..., SM
lwN) be in series; The one u phase voltage source u
ua, a v phase voltage source u
vawith a w phase voltage source u
waas the input of first via three-phase, the 2nd u phase voltage source u
ub, the 2nd v phase voltage source u
vbwith the 2nd w phase voltage source u
wbas the second road three-phase input.
The upper switches set H of the first brachium pontis
ulower end p and the first inductance L of the first brachium pontis
huone end connect, the first inductance L of the first brachium pontis
huthe other end and the middle switches set M of the first brachium pontis
uupper end o connect, the middle switches set M of the first brachium pontis
ulower end and the second inductance L of the first brachium pontis
luone end connect, the second inductance L of the first brachium pontis
luthe other end and the lower switches set L of the first brachium pontis
uupper end connect; The structure of the structure of the structure of the second brachium pontis, the 3rd brachium pontis and the first brachium pontis is in full accord; The one u phase voltage source u
uaone end and a u phase inductance L
uaone end connect, a u phase inductance L
uathe other end and the middle switches set M of the first brachium pontis
uupper end connect, a u phase voltage source u
uathe other end and a v phase voltage source u
vaone end, a w phase voltage source u
waone end connect, a v phase voltage source u
vathe other end and a v phase inductance L
vaone end connect, a v phase inductance L
vathe other end and the middle switches set M of the second brachium pontis
vupper end connect, a w phase voltage source u
wathe other end and a w phase inductance L
waone end connect, a w phase inductance L
wathe other end and the middle switches set M of the 3rd brachium pontis
wupper end connect; The 2nd u phase voltage source u
ubone end and the 2nd u phase inductance L
ubone end connect, the 2nd u phase inductance L
ubthe other end and the middle switches set M of the first brachium pontis
ulower end connect, the 2nd u phase voltage source u
ubthe other end and the 2nd v phase voltage source u
vbone end, the 2nd w phase voltage source u
wbone end connect, the 2nd v phase voltage source u
vbthe other end and the 2nd v phase inductance L
vbone end connect, the 2nd v phase inductance L
vbthe other end and the middle switches set M of the second brachium pontis
vlower end connect, the 2nd w phase voltage source u
wbthe other end and the 2nd w phase inductance L
wbone end connect, the 2nd w phase inductance L
wbthe other end and the middle switches set M of the 3rd brachium pontis
wlower end connect; The upper switches set H of the first brachium pontis
uupper end and the upper switches set H of the second brachium pontis
uupper end, the upper switches set H of the 3rd brachium pontis
uone end of upper end, load R connect, the lower switches set L of the other end of load R and the first brachium pontis
ulower end, the lower switches set L of the second brachium pontis
vlower end, the lower switches set L of the 3rd brachium pontis
wlower end, hold n to connect.
Fig. 2 illustrates the circuit structure of the power switch unit of the three-phase of dual input shown in Fig. 1 nine switches set MMC rectifiers.Power switch unit is by the first switching tube S
1, second switch pipe S
2, the first diode D
1, the second diode D
2and capacitor C
sMform; Wherein, capacitor C
sMpositive pole and the first switching tube S
1collector electrode, the first diode D
1negative electrode connect, the first switching tube S
1emitter and the first diode D
1anode, second switch pipe S
2collector electrode, the second diode D
2negative electrode connect, second switch pipe S
2emitter and the second diode D
2anode, capacitor C
sMnegative pole connect; Second switch pipe S
2collector electrode as the first output, second switch pipe S
2emitter as the second output.
As shown in Figure 1, the second output of j power switch unit of each switches set is connected with the first output of j+1 power switch unit, and wherein the value of j is 1～N-1.
Make a u phase voltage source be
the one v phase voltage source is
the one w phase voltage source is
the 2nd u phase voltage source is
the 2nd v phase voltage source is
the 2nd w phase voltage source is
:
In formula, U
ofor output voltage.
Dual input three-phase nine switches set MMC rectifiers shown in Fig. 1 adopt phase-shifting carrier wave PWM to control, as shown in Figure 3.
The upper switches set H of the first brachium pontis
uj power switch unit SM
huj, the first brachium pontis lower switches set L
uj power switch unit SM
luj, the second brachium pontis upper switches set H
vj power switch unit SM
hvj, the second brachium pontis lower switches set L
vj power switch unit SM
lvj, the 3rd brachium pontis upper switches set H
wj power switch unit SM
hwjlower switches set L with the 3rd brachium pontis
wj power switch unit SM
lwjadopt identical triangular wave as j carrier wave C
j, wherein the value of j is 1～N; N carrier wave C
1, C
2..., C
n360 °/N of lagging phase angle successively; The upper switches set H of the first brachium pontis
uadopt primary sinusoid R
authe first direct current biasing R superposes
doathe first modulating wave R as the first brachium pontis
au+ R
doa, the lower switches set L of the first brachium pontis
uadopt the second sinusoidal wave R
buthe second direct current biasing R superposes
dobthe second modulating wave R as the first brachium pontis
bu+ R
dob, the upper switches set H of the second brachium pontis
vadopt the 3rd sinusoidal wave R
avthe first direct current biasing R superposes
doathe first modulating wave R as the second brachium pontis
av+ R
doa, the lower switches set L of the second brachium pontis
vadopt the 4th sinusoidal wave R
bvthe second direct current biasing R superposes
dobthe second modulating wave R as the second brachium pontis
bv+ R
dob, the upper switches set H of the 3rd brachium pontis
wadopt the 5th sinusoidal wave R
awthe first direct current biasing R superposes
doathe first modulating wave R as the 3rd brachium pontis
aw+ R
doa, the lower switches set L of the 3rd brachium pontis
wadopt the 6th sinusoidal wave R
bwthe second direct current biasing R superposes
dobthe second modulating wave R as the 3rd brachium pontis
bw+ R
dob.
The first modulating wave R of the first brachium pontis
au+ R
doawith j carrier wave C
jby the first comparator 301, obtain the upper switches set H of the first brachium pontis
uj power switch unit SM
hujsecond switch pipe S
2the control level S of gate pole
huj, as the first modulating wave R of the first brachium pontis
au+ R
doabe greater than j carrier wave C
jtime, the first comparator output high level, as the first modulating wave R of the first brachium pontis
au+ R
doabe less than j carrier wave C
jtime, the first comparator output low level, wherein the value of j is 1～N; The second modulating wave R of the first brachium pontis
bu+ R
dobwith j carrier wave C
jby the second comparator 302, obtain the lower switches set L of the first brachium pontis
uj power switch unit SM
lujmiddle second switch pipe S
2the control level S of gate pole
luj, as the second modulating wave R of the first brachium pontis
bu+ R
dobbe less than j carrier wave C
jtime, the second comparator output high level, as the second modulating wave R of the first brachium pontis
bu+ R
dobbe greater than j carrier wave C
jtime, the second comparator output low level; The upper switches set H of the first brachium pontis
uj power switch unit SM
hujsecond switch pipe S
2the control level S of gate pole
hujlower switches set L with the first brachium pontis
uj power switch unit SM
lujmiddle second switch pipe S
2the control level S of gate pole
lujby the first XOR gate, obtain the middle switches set M of the first brachium pontis
uj power switch unit SM
mujmiddle second switch pipe S
2the control level S of gate pole
muj; The first modulating wave R of the second brachium pontis
av+ R
doawith j carrier wave C
jby the 3rd comparator 303, obtain the upper switches set H of the second brachium pontis
vj power switch unit SM
hvjmiddle second switch pipe S
2the control level S of gate pole
hvj, as the first modulating wave R of the second brachium pontis
av+ R
doabe greater than j carrier wave C
jtime, the 3rd comparator output high level, as the first modulating wave R of the second brachium pontis
av+ R
doabe less than j carrier wave C
jtime, the 3rd comparator output low level; The second modulating wave R of the second brachium pontis
bv+ R
dobwith j carrier wave C
jby the 4th comparator 304, obtain the lower switches set L of the second brachium pontis
vj power switch unit SM
lvjmiddle second switch pipe S
2the control level S of gate pole
lvj, as the second modulating wave R of the second brachium pontis
bv+ R
dobbe less than j carrier wave C
j, the 4th comparator output high level, as the second modulating wave R of the second brachium pontis
bv+ R
dobbe greater than j carrier wave C
j, the 4th comparator output low level; The upper switches set H of the second brachium pontis
vj power switch unit SM
hvjmiddle second switch pipe S
2the control level S of gate pole
hvjlower switches set L with the second brachium pontis
vj power switch unit SM
lvjmiddle second switch pipe S
2the control level S of gate pole
lvjby the second XOR gate, obtain the middle switches set M of second brachium pontis
vj power switch unit SM
mvjmiddle second switch pipe S
2the control level S of gate pole
mvj; The first modulating wave R of the 3rd brachium pontis
aw+ R
doawith j carrier wave C
jby the 5th comparator 305, obtain the upper switches set H of the 3rd brachium pontis
wj power switch unit SM
hwjmiddle second switch pipe S
2the control level S of gate pole
hwj, as the first modulating wave R of the 3rd brachium pontis
aw+ R
doabe greater than j carrier wave C
j, the 5th comparator output high level, as the first modulating wave R of the 3rd brachium pontis
aw+ R
doabe less than j carrier wave C
j, the 5th comparator output low level; The second modulating wave R of the 3rd brachium pontis
bw+ R
dobwith j carrier wave C
jby the 6th comparator 306, obtain the lower switches set L of the 3rd brachium pontis
wj power switch unit SM
lwjmiddle second switch pipe S
2the control level S of gate pole
lwj, as the second modulating wave R of the 3rd brachium pontis
bw+ R
dobbe less than j carrier wave C
j, the 6th comparator output high level, as the second modulating wave R of the 3rd brachium pontis
bw+ R
dobbe greater than j carrier wave C
j, the 6th comparator output low level; The upper switches set H of the 3rd brachium pontis
wj power switch unit SM
hwjmiddle second switch pipe S
2the control level S of gate pole
hwjlower switches set L with the 3rd brachium pontis
wj power switch unit SM
lwjmiddle second switch pipe S
2the control level S of gate pole
lwjby the 3rd XOR gate, obtain the middle switches set M of the 3rd brachium pontis
wj power switch unit SM
mwjmiddle second switch pipe S
2the control level S of gate pole
mwj.
Described control method can guarantee the upper switches set (H of the first brachium pontis of described rectifier
u), the middle switches set (M of the first brachium pontis
u) and the lower switches set (L of the first brachium pontis
u) at each, constantly have the output voltage u of N power switch unit
sM=E, the output voltage u of total 2N power switch unit
sM=0, meet u
hu+ u
mu+ u
lu=U
o; Guarantee the upper switches set (H of the second brachium pontis
v), the middle switches set (M of the second brachium pontis
v) and the lower switches set (L of the second brachium pontis
v) at each, constantly have the output voltage u of N power switch unit
sM=E, the output voltage u of total 2N power switch unit
sM=0, meet u
hv+ u
mv+ u
lv=U
o; Guarantee the upper switches set (H of the 3rd brachium pontis
w), the middle switches set (M of the 3rd brachium pontis
w) and the lower switches set (L of the 3rd brachium pontis
w) at each, constantly have the output voltage u of N power switch unit
sM=E, the output voltage u of total 2N power switch unit
sM=0, meet u
hw+ u
mw+ u
lw=U
o; U wherein
hu, u
hv, u
hwbe respectively the upper switches set H of the first brachium pontis
u, the second brachium pontis upper switches set H
vupper switches set H with the 3rd brachium pontis
woutput voltage, u
mu, u
mv, u
mwbe respectively the middle switches set M of the first brachium pontis
u, the second brachium pontis middle switches set M
vmiddle switches set M with the 3rd brachium pontis
woutput voltage, u
lu, u
lv, u
lwbe respectively the lower switches set L of the first brachium pontis
u, the second brachium pontis lower switches set L
vlower switches set L with the 3rd brachium pontis
woutput voltage, capacitor C in each power switch unit that E is each switches set
sMvoltage, and have E=U
o/ N, the voltage stress that in power switch unit, each switching tube bears is only the 1/N of DC bus-bar voltage, can guarantee that the voltage that in the rectifier course of work, all switching tubes bear equates, has well solved the voltage-sharing of switching tube simultaneously.
Fig. 4 a illustrates dual input three-phase nine switches set MMC rectifiers and works in the first modulating wave R with the first brachium pontis under frequency pattern
au+ R
doa, the first brachium pontis the second modulating wave R
bu+ R
dobwith j carrier wave C
jrelation.From Fig. 4 a, can find out the primary sinusoid R of the first brachium pontis
authe second sinusoidal wave R with the second brachium pontis
buelectric voltage frequency identical, and the primary sinusoid R of the first brachium pontis
authe second sinusoidal wave R with the second brachium pontis
buvoltage magnitude maximum be 1, wherein the value of j is 1～N.Fig. 4 b illustrates the first modulating wave R that dual input three-phase nine switches set MMC rectifiers work in the first brachium pontis under alien frequencies pattern
au+ R
doa, the first brachium pontis the second modulating wave R
bu+ R
dobwith j carrier wave C
jrelation.From Fig. 4 b, can find out the primary sinusoid R of the first brachium pontis
authe second sinusoidal wave R with the second brachium pontis
buelectric voltage frequency not identical, and the primary sinusoid R of the first brachium pontis
authe second sinusoidal wave R with the second brachium pontis
buvoltage magnitude peaked and be 1/2.The first modulating wave R of the second brachium pontis
av+ R
doa, the 3rd brachium pontis the first modulating wave R
aw+ R
doathe first modulating wave R with the first brachium pontis
au+ R
doawith j carrier wave C
jrelation identical, the second modulating wave R of the second brachium pontis
bv+ R
dob, the 3rd brachium pontis the second modulating wave R
bw+ R
dobthe second modulating wave R with the first brachium pontis
b1+ R
dobwith j carrier wave C
jrelation identical.
Fig. 5 a is that dual input three-phase nine switches set nine level MMC inverters (N=4) work in the simulation waveform figure of pattern frequently, from top to bottom a u phase voltage source u successively
ua, a v phase voltage source u
va, a w phase voltage source u
wa, three line voltage (u providing of first via three-phase alternating-current supply
uva, u
vwa, u
wua), the 2nd u phase voltage source u
ub, the 2nd v phase voltage source u
vb, the 2nd w phase voltage source u
wb, three line voltage (u providing of No. second three-phase alternating-current supply
uvb, u
vwb, u
wub) and output voltage U
o, identical with the phase voltage frequency of No. second three-phase alternating-current supply from the visible first via three-phase alternating-current supply of Fig. 5 a, the phase voltage amplitude of first via three-phase alternating-current supply and No. second three-phase alternating-current supply is not identical; Fig. 5 b is the simulation waveform figure that dual input three-phase nine switches set nine level MMC inverters work in alien frequencies pattern, is a u phase voltage source u from top to bottom successively
ua, a v phase voltage source u
va, a w phase voltage source u
wa, three line voltage (u providing of first via three-phase alternating-current supply
uva, u
vwa, u
wua), the 2nd u phase voltage source u
ub, the 2nd v phase voltage source u
vb, the 2nd w phase voltage source u
wb, three line voltage (u providing of No. second three-phase alternating-current supply
uvb, u
vwb, u
wub) and output voltage U
o, all not identical from phase voltage frequency and the amplitude of the visible first via three-phase alternating-current supply of Fig. 5 b and No. second three-phase alternating-current supply.
Above-described embodiment is preferably execution mode of the present invention; but embodiments of the present invention are not limited by the examples; other any do not deviate from change, the modification done under Spirit Essence of the present invention and principle, substitutes, combination, simplify; all should be equivalent substitute mode, within being included in protection scope of the present invention.
Claims (8)
1. dual input three-phase nine switches set MMC rectifiers, is characterized in that: comprise the first three-phase voltage source, the second three-phase voltage source, first group of inductance, second group of inductance, the first brachium pontis, the second brachium pontis, the 3rd brachium pontis and load (
r); The first three-phase voltage source comprise a u phase voltage source (
u ua ), a v phase voltage source (
u va ) and a w phase voltage source (
u wa ); The second three-phase voltage source comprise the 2nd u phase voltage source (
u ub ), the 2nd v phase voltage source (
u vb ) and the 2nd w phase voltage source (
u wb ); First group of inductance comprise a u phase inductance (
l ua ), a v phase inductance (
l va ) and a w phase inductance (
l wa ); Second group of inductance comprise the 2nd u phase inductance (
l ub ), the 2nd v phase inductance (
l vb ) and the 2nd w phase inductance (
l wb ); All each is freely gone up switches set, the first inductance, middle switches set, the second inductance, lower switches set and is in series for described the first brachium pontis, the second brachium pontis and the 3rd brachium pontis; Upper switches set (the H of the first brachium pontis
u) by N power switch unit (SM
hu1, SM
hu2..., SM
huN) be in series, the middle switches set (M of the first brachium pontis
u) by N power switch unit (SM
mu1, SM
mu2..., SM
muN) be in series, the lower switches set (L of the first brachium pontis
u) by N power switch unit (SM
lu1, SM
lu2..., SM
luN) series connection, the upper switches set (H of the second brachium pontis
v) by N power switch unit (SM
hv1, SM
hv2..., SM
hvN) be in series, the middle switches set (M of the second brachium pontis
v) by N power switch unit (SM
mv1, SM
mv2..., SM
mvN) be in series, the lower switches set (L of the second brachium pontis
v) by N power switch unit (SM
lv1, SM
lv2..., SM
lvN) be in series, the upper switches set (H of the 3rd brachium pontis
w) by N power switch unit (SM
hw1, SM
hw2..., SM
hwN) be in series, the middle switches set (M of the 3rd brachium pontis
w) by N power switch unit (SM
mw1, SM
mw2..., SM
mwN) be in series, the lower switches set (L of the 3rd brachium pontis
w) by N power switch unit (SM
lw1, SM
lw2..., SM
lwN) be in series; The one u phase voltage source (
u ua ), a v phase voltage source (
u va ) and a w phase voltage source (
u wa ) as the input of first via three-phase, the 2nd u phase voltage source (
u ub ), the 2nd v phase voltage source (
u vb ) and the 2nd w phase voltage source (
u wb ) as the second road three-phase input, N is positive integer.
2. dual input three-phase nine switches set MMC rectifiers according to claim 1, is characterized in that: two inductance of the first brachium pontis (
l hu ,
l lu ), two inductance of the second brachium pontis (
l hv ,
l lv ) and two inductance of the 3rd brachium pontis (
l hw ,
l lw ) by coupling inductance, substitute.
3. dual input three-phase nine switches set MMC rectifiers according to claim 1, is characterized in that: the upper switches set (H of the first brachium pontis
u) lower end (p) and the first brachium pontis the first inductance (
l hu ) one end connect, the first inductance of the first brachium pontis (
l hu ) the other end and the middle switches set (M of the first brachium pontis
u) upper end (o) connect, the middle switches set (M of the first brachium pontis
u) lower end and the second inductance of the first brachium pontis (
l lu ) one end connect, the second inductance of the first brachium pontis (
l lu ) the other end and the lower switches set (L of the first brachium pontis
u) upper end connect; The structure of the structure of the structure of the second brachium pontis, the 3rd brachium pontis and the first brachium pontis is in full accord; The one u phase voltage source (
u ua ) one end and a u phase inductance (
l ua ) one end connect, a u phase inductance (
l ua ) the other end and the middle switches set (M of the first brachium pontis
u) upper end connect, a u phase voltage source (
u ua ) the other end and a v phase voltage source (
u va ) one end, a w phase voltage source (
u wa ) one end connect, a v phase voltage source (
u va ) the other end and a v phase inductance (
l va ) one end connect, a v phase inductance (
l va ) the other end and the middle switches set (M of the second brachium pontis
v) upper end connect, a w phase voltage source (
u wa ) the other end and a w phase inductance (
l wa ) one end connect, a w phase inductance (
l wa ) the other end and the middle switches set (M of the 3rd brachium pontis
w) upper end connect; The 2nd u phase voltage source (
u ub ) one end and the 2nd u phase inductance (
l ub ) one end connect, the 2nd u phase inductance (
l ub ) the other end and the middle switches set (M of the first brachium pontis
u) lower end connect, the 2nd u phase voltage source (
u ub ) the other end and the 2nd v phase voltage source (
u vb ) one end, the 2nd w phase voltage source (
u wb ) one end connect, the 2nd v phase voltage source (
u vb ) the other end and the 2nd v phase inductance (
l vb ) one end connect, the 2nd v phase inductance (
l vb ) the other end and the middle switches set (M of the second brachium pontis
v) lower end connect, the 2nd w phase voltage source (
u wb ) the other end and the 2nd w phase inductance (
l wb ) one end connect, the 2nd w phase inductance (
l wb ) the other end and the middle switches set (M of the 3rd brachium pontis
w) lower end connect; Upper switches set (the H of the first brachium pontis
u) upper end and the upper switches set (H of the second brachium pontis
u) upper end, the upper switches set (H of the 3rd brachium pontis
u) upper end, load (
r) one end connect, load (
r) the other end and the lower switches set (L of the first brachium pontis
u) lower end, the lower switches set (L of the second brachium pontis
v) lower end, the lower switches set (L of the 3rd brachium pontis
w) lower end, hold (
n) connect.
4. dual input three-phase nine switches set MMC rectifiers according to claim 1, is characterized in that: power switch unit by the first switching tube (
s 1 ), second switch pipe (
s 2 ), the first diode (
d 1 ), the second diode (
d 2 ) and electric capacity (
c sM ) form; Wherein, electric capacity (
c sM ) positive pole and the first switching tube (
s 1 ) collector electrode, the first diode (
d 1 ) negative electrode connect, the first switching tube (
s 1 ) emitter and the first diode (
d 1 ) anode, second switch pipe (
s 2 ) collector electrode, the second diode (
d 2 ) negative electrode connect, second switch pipe (
s 2 ) emitter and the second diode (
d 2 ) anode, electric capacity (
c sM ) negative pole connect; Second switch pipe (
s 2 ) collector electrode as the first output, second switch pipe (
s 2 ) emitter as the second output.
5. dual input three-phase nine switches set MMC rectifiers according to claim 1, it is characterized in that: the second output of j power switch unit of each switches set is connected with the first output of j+1 power switch unit, wherein the value of j is 1 ~ N-1.
6. dual input three-phase nine switches set MMC rectifiers according to claim 1, is characterized in that: mode of operation comprises same pattern and alien frequencies pattern frequently, and in frequency pattern, the frequency that first via output is exported with the second tunnel is identical, and amplitude is not identical; In alien frequencies pattern, frequency and the amplitude of first via output and the output of the second tunnel are all not identical.
7. for the control method of dual input three-phase nine switches set MMC rectifiers claimed in claim 1, it is characterized in that: adopt phase-shifting carrier wave PWM to control the opening and turn-offing of switching tube of each switches set; Upper switches set (the H of the first brachium pontis
u) j power switch unit (SM
huj), the lower switches set (L of the first brachium pontis
u) j power switch unit (SM
luj), the upper switches set (H of the second brachium pontis
v) j power switch unit (SM
hvj), the lower switches set (L of the second brachium pontis
v) j power switch unit (SM
lvj), the upper switches set (H of the 3rd brachium pontis
w) j power switch unit (SM
hwj) and the lower switches set (L of the 3rd brachium pontis
w) j power switch unit (SM
lwj) adopt identical triangular wave as j carrier wave
c j , wherein the value of j is 1 ~ N; N carrier wave (
c 1 , C 2 ..., C n ) 360 °/N of lagging phase angle successively; Upper switches set (the H of the first brachium pontis
u) the employing primary sinusoid
r au the first direct current biasing superposes
r doa the first modulating wave as the first brachium pontis
r au +
r doa , the lower switches set (L of the first brachium pontis
u) employing the second sine wave
r bu the second direct current biasing superposes
r dob the second modulating wave as the first brachium pontis
r bu +
r dob , the upper switches set (H of the second brachium pontis
v) employing the 3rd sine wave
r av the first direct current biasing superposes
r doa the first modulating wave as the second brachium pontis
r av +
r doa , the lower switches set (L of the second brachium pontis
v) employing the 4th sine wave
r bv the second direct current biasing superposes
r dob the second modulating wave as the second brachium pontis
r bv +
r dob , the upper switches set (H of the 3rd brachium pontis
w) employing the 5th sine wave
r aw the first direct current biasing superposes
r doa the first modulating wave as the 3rd brachium pontis
r aw +
r doa , the lower switches set (L of the 3rd brachium pontis
w) employing the 6th sine wave
r bw the second direct current biasing superposes
r dob the second modulating wave as the 3rd brachium pontis
r bw +
r dob .
8. control method according to claim 7, is characterized in that: the first modulating wave of the first brachium pontis
R Au +
R doa With j carrier wave
C j Obtain the upper switches set (H of the first brachium pontis by the first comparator
u) j power switch unit (SM
Huj) second switch pipe (
S 2 ) gate pole control level (
S Huj ), when the first modulating wave of the first brachium pontis
R Au +
R doa Be greater than j carrier wave
C j Time, the first comparator output high level, when the first modulating wave of the first brachium pontis
R Au +
R doa Be less than j carrier wave
C j Time, the first comparator output low level, wherein the value of j is 1 ~ N;The second modulating wave of the first brachium pontis
R Bu +
R dob With j carrier wave
C j Obtain the lower switches set (L of the first brachium pontis by the second comparator
u) j power switch unit (SM
Luj) middle second switch pipe (
S 2 ) gate pole control level (
S Luj ), when the second modulating wave of the first brachium pontis
R Bu +
R dob Be less than j carrier wave
C j Time, the second comparator output high level, when the second modulating wave of the first brachium pontis
R Bu +
R dob Be greater than j carrier wave
C j Time, the second comparator output low level;Upper switches set (the H of the first brachium pontis
u) j power switch unit (SM
Huj) second switch pipe (
S 2 ) gate pole control level (
S Huj ) and the lower switches set (L of the first brachium pontis
u) j power switch unit (SM
Luj) middle second switch pipe (
S 2 ) gate pole control level (
S Luj ) by the first XOR gate, obtain the middle switches set (M of the first brachium pontis
u) j power switch unit (SM
Muj) middle second switch pipe (
S 2 ) gate pole control level (
S Muj ); The first modulating wave of the second brachium pontis
R Av +
R doa With j carrier wave
C j Obtain the upper switches set (H of the second brachium pontis by the 3rd comparator
v) j power switch unit (SM
Hvj) middle second switch pipe (
S 2 ) gate pole control level (
S Hvj ), when the first modulating wave of the second brachium pontis
R Av +
R doa Be greater than j carrier wave
C j Time, the 3rd comparator output high level, when the first modulating wave of the second brachium pontis
R Av +
R doa Be less than j carrier wave
C j Time, the 3rd comparator output low level; The second modulating wave of the second brachium pontis
R Bv +
R dob With j carrier wave
C j Obtain the lower switches set (L of the second brachium pontis by the 4th comparator
v) j power switch unit (SM
Lvj) middle second switch pipe (
S 2 ) gate pole control level (
S Lvj ), when the second modulating wave of the second brachium pontis
R Bv +
R dob Be less than j carrier wave
C j , the 4th comparator output high level, when the second modulating wave of the second brachium pontis
R Bv +
R dob Be greater than j carrier wave
C j , the 4th comparator output low level; Upper switches set (the H of the second brachium pontis
v) j power switch unit (SM
Hvj) middle second switch pipe (
S 2 ) gate pole control level (
S Hvj ) and the lower switches set (L of the second brachium pontis
v) j power switch unit (SM
Lvj) middle second switch pipe (
S 2 ) gate pole control level (
S Lvj ) by the second XOR gate, obtain the middle switches set (M of second brachium pontis
v) j power switch unit (SM
Mvj) middle second switch pipe (
S 2 ) gate pole control level (
S Mvj ); The first modulating wave of the 3rd brachium pontis
R Aw +
R doa With j carrier wave
C j Obtain the upper switches set (H of the 3rd brachium pontis by the 5th comparator
w) j power switch unit (SM
Hwj) middle second switch pipe (
S 2 ) gate pole control level (
S Hwj ),When the first modulating wave of the 3rd brachium pontis
R Aw +
R doa Be greater than j carrier wave
C j , the 5th comparator output high level, when the first modulating wave of the 3rd brachium pontis
R Aw +
R doa Be less than j carrier wave
C j , the 5th comparator output low level; The second modulating wave of the 3rd brachium pontis
R Bw +
R dob With j carrier wave
C j Obtain the lower switches set (L of the 3rd brachium pontis by the 6th comparator
w) j power switch unit (SM
Lwj) middle second switch pipe (
S 2 ) gate pole control level (
S Lwj ),When the second modulating wave of the 3rd brachium pontis
R Bw +
R dob Be less than j carrier wave
C j , the 6th comparator output high level, when the second modulating wave of the 3rd brachium pontis
R Bw +
R dob Be greater than j carrier wave
C j , the 6th comparator output low level; Upper switches set (the H of the 3rd brachium pontis
w) j power switch unit (SM
Hwj) middle second switch pipe (
S 2 ) gate pole control level (
S Hwj ) and the lower switches set (L of the 3rd brachium pontis
w) j power switch unit (SM
Lwj) middle second switch pipe (
S 2 ) gate pole control level (
S Lwj ) by the 3rd XOR gate,Obtain the middle switches set (M of the 3rd brachium pontis
w) j power switch unit (SM
Mwj) middle second switch pipe (
S 2 ) gate pole control level (
S Mwj ).
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| CN109510492A (en) * | 2018-11-28 | 2019-03-22 | 浙江大学 | A kind of dual output MMC topology based on bridge arm bifurcation structure |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109347335A (en) * | 2018-09-13 | 2019-02-15 | 国家电网有限公司 | A kind of multi-level inverter bridge arm topology suitable for current source control |
| CN109510492A (en) * | 2018-11-28 | 2019-03-22 | 浙江大学 | A kind of dual output MMC topology based on bridge arm bifurcation structure |
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