CN103762867B - Dual input three-phase nine switches set MMC rectifier and control method thereof - Google Patents
Dual input three-phase nine switches set MMC rectifier and control method thereof Download PDFInfo
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- CN103762867B CN103762867B CN201410042977.XA CN201410042977A CN103762867B CN 103762867 B CN103762867 B CN 103762867B CN 201410042977 A CN201410042977 A CN 201410042977A CN 103762867 B CN103762867 B CN 103762867B
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Abstract
The present invention provides dual input three-phase nine switches set MMC rectifier and control method thereof.The commutator of the present invention includes two three-phase voltage sources, two groups of three pole reactors, the first brachium pontis, the second brachium pontis, the 3rd brachium pontis and a rectification load；Described first brachium pontis, the second brachium pontis and the 3rd brachium pontis are in series by upper switches set, breaker in middle group, lower switches set and two inductance；Each switches set is in series by N number of power switch unit.This commutator adopts phase-shifting carrier wave PWM to control, 2 input ac powers are transformed into the exchange input of three-phase 2N+1 level, powering load after rectification superposition, and the voltage stress that in MMC power switch unit, each switching tube bears is only the 1/N of direct current power source voltage, well solve the voltage-sharing of switching tube, be suitable for the application of 2 three-phase alternating-current supply inputs, high pressure and large-power occasions.
Description
Technical field
The present invention relates to block combiner multi-level converter (MMC) field, be specifically related to a kind of dual input three-phase nine switches set MMC rectifier and control method thereof.
Background technology
Current power rectifier forward miniaturization, high reliability and low-loss direction are developed, and occur two kinds of directions improving commutator under this trend: reduce passive device or improve rectifier topology structure to reduce the active device new development as minimizing active device direction.Three-phase nine switching rectifier closes commutator relative to traditional twelvemo and decreases three switches and corresponding drive circuit, occupies certain advantage in considering the cost application with volume.But, the two-way three-phase input of nine switching rectifiers is two level, and input AC current waveform is poor.Additionally, the half that voltage stress is DC bus-bar voltage born of each switch in nine switches, and there is the voltage-sharing of switching tube, this significantly limit the application at high pressure and large-power occasions of three-phase nine switching rectifier.
In recent years, multilevel technology is constantly promoted, and it being successfully applied in the industrial circles such as such as D.C. high voltage transmission, Electric Drive, active power filtering, Static Synchronous compensation, voltage-type multi-level rectifier topology common at present is broadly divided into case bit-type and the big class of unit cascaded type two.Block combiner multi-level converter (ModularMultilevelConverter, MMC) as a kind of novel many level topology, except having the advantage of traditional multi-level commutator, block combiner multi-level rectifier adopts Modular Structure Design, it is simple to System Expansion and redundancy of effort；Having off-center operation ability, fault traversing and recovery capability, system reliability is high；Owing to having common DC bus, block combiner multi-level rectifier is particularly suited for HVDC transmission system application.But, when alternating current circuit connected of two different frequencies, it is necessary to 2 MMC rectifier, this significantly increases engineering cost.
Summary of the invention
It is an object of the invention to overcome above-mentioned the deficiencies in the prior art, it is proposed to a kind of dual input three-phase nine switches set MMC rectifier and control method thereof.
The technical solution used in the present invention is as follows.
Dual input three-phase nine switches set MMC rectifier includes the first three-phase voltage source, the second three-phase voltage source, first group of inductance, second group of inductance, the first brachium pontis, the second brachium pontis, the 3rd brachium pontis and load；First three-phase voltage source includes a u phase voltage source, a v phase voltage source and a w phase voltage source；Second three-phase voltage source includes the 2nd u phase voltage source, the 2nd v phase voltage source and the 2nd w phase voltage source；First group of inductance includes a u phase inductance, a v phase inductance and a w phase inductance；Second group of inductance includes the 2nd u phase inductance, the 2nd v phase inductance and the 2nd w phase inductance；In described first brachium pontis, the second brachium pontis and all each freedom of the 3rd brachium pontis, switches set, the first inductance, breaker in middle group, the second inductance, lower switches set are in series；The upper switches set of the first brachium pontis is in series by N number of power switch unit, the breaker in middle group of the first brachium pontis is in series by N number of power switch unit, the lower switches set of the first brachium pontis is connected by N number of power switch unit, the upper switches set of the second brachium pontis is in series by N number of power switch unit, the breaker in middle group of the second brachium pontis is in series by N number of power switch unit, the lower switches set of the second brachium pontis is in series by N number of power switch unit, the upper switches set of the 3rd brachium pontis is in series by N number of power switch unit, the breaker in middle group of the 3rd brachium pontis is in series by N number of power switch unit, the lower switches set of the 3rd brachium pontis is in series by N number of power switch unit；Oneth u phase voltage source, a v phase voltage source and a w phase voltage source input as first via three-phase, and the 2nd u phase voltage source, the 2nd v phase voltage source and the 2nd w phase voltage source are as the second road three-phase input, and N is positive integer.
In above-mentioned dual input three-phase nine switches set MMC rectifier, two inductance of the first brachium pontis, two inductance of the second brachium pontis and two inductance of the 3rd brachium pontis substitute by coupling inductance.
In above-mentioned dual input three-phase nine switches set MMC rectifier, the lower end of the upper switches set of the first brachium pontis is connected with one end of the first inductance of the first brachium pontis, the upper end of the other end of the first inductance of the first brachium pontis and the breaker in middle group of the first brachium pontis connects, the lower end of the breaker in middle group of the first brachium pontis is connected with one end of the second inductance of the first brachium pontis, and the upper end of the other end of the second inductance of the first brachium pontis and the lower switches set of the first brachium pontis connects；The structure of the second brachium pontis, the 3rd brachium pontis the structure of structure and the first brachium pontis completely the same；The one end in the oneth u phase voltage source is connected with one end of a u phase inductance, the upper end of the other end of the oneth u phase inductance and the breaker in middle group of the first brachium pontis connects, the other end in the oneth u phase voltage source and the one end in a v phase voltage source, the one end in the oneth w phase voltage source connects, the other end in the oneth v phase voltage source and one end of a v phase inductance connect, the upper end of the other end of the oneth v phase inductance and the breaker in middle group of the second brachium pontis connects, the other end in the oneth w phase voltage source and one end of a w phase inductance connect, the upper end of the other end of the oneth w phase inductance and the breaker in middle group of the 3rd brachium pontis connects；The one end in the 2nd u phase voltage source is connected with one end of the 2nd u phase inductance, the lower end of the other end of the 2nd u phase inductance and the breaker in middle group of the first brachium pontis connects, the other end in the 2nd u phase voltage source and the one end in the 2nd v phase voltage source, the one end in the 2nd w phase voltage source connects, the other end in the 2nd v phase voltage source and one end of the 2nd v phase inductance connect, the lower end of the other end of the 2nd v phase inductance and the breaker in middle group of the second brachium pontis connects, the other end in the 2nd w phase voltage source and one end of the 2nd w phase inductance connect, the lower end of the other end of the 2nd w phase inductance and the breaker in middle group of the 3rd brachium pontis connects；The upper end of the upper switches set of the first brachium pontis and the upper end of upper switches set of the second brachium pontis, the upper end of upper switches set of the 3rd brachium pontis, load one end be connected, the other end of load and the lower end of lower switches set of the first brachium pontis, the lower end of lower switches set of the second brachium pontis, the 3rd brachium pontis lower switches set lower end, hold connection.
In above-mentioned dual input three-phase nine switches set MMC rectifier, power switch unit is made up of the first switching tube, second switch pipe, the first diode, the second diode and electric capacity；Wherein, the negative electrode of the positive pole of electric capacity and the colelctor electrode of the first switching tube, the first diode connects, the emitter stage of the first switching tube and the anode of the first diode, the colelctor electrode of second switch pipe, the second diode negative electrode connect, the negative pole connection of the emitter stage of second switch pipe and the anode of the second diode, electric capacity；The colelctor electrode of second switch pipe is as the first outfan, and the emitter stage of second switch pipe is as the second outfan.
In above-mentioned dual input three-phase nine switches set MMC rectifier, the first outfan of+1 power switch unit of the second outfan and jth of the jth power switch unit of each switches set is connected, and wherein the value of j is 1～N-1.
In the control method of above-mentioned dual input three-phase nine switches set MMC rectifier, employing phase-shifting carrier wave PWM controls opening and shutoff of the switching tube of each switches set；The jth power switch unit of the lower switches set of the jth power switch unit of the upper switches set of the first brachium pontis, the jth power switch unit of lower switches set of the first brachium pontis, the jth power switch unit of upper switches set of the second brachium pontis, the jth power switch unit of lower switches set of the second brachium pontis, the jth power switch unit of upper switches set of the 3rd brachium pontis and the 3rd brachium pontis adopts identical triangular wave as jth carrier wave Cj, wherein the value of j is 1～N；N number of carrier wave is 360 °/N of lagging phase angle successively；The upper switches set of the first brachium pontis adopts primary sinusoid RauSuperposition the first direct current biasing RdoaThe first modulating wave R as the first brachium pontisau+Rdoa, the lower switches set of the first brachium pontis adopts the second sinusoidal wave RbuSuperposition the second direct current biasing RdobThe second modulating wave R as the first brachium pontisbu+Rdob, the upper switches set of the second brachium pontis adopts the 3rd sinusoidal wave RavSuperposition the first direct current biasing RdoaThe first modulating wave R as the second brachium pontisav+Rdoa, the lower switches set of the second brachium pontis adopts the 4th sinusoidal wave RbvSuperposition the second direct current biasing RdobThe second modulating wave R as the second brachium pontisbv+Rdob, the upper switches set of the 3rd brachium pontis adopts the 5th sinusoidal wave RawSuperposition the first direct current biasing RdoaThe first modulating wave R as the 3rd brachium pontisaw+Rdoa, the lower switches set of the 3rd brachium pontis adopts the 6th sinusoidal wave RbwSuperposition the second direct current biasing RdobThe second modulating wave R as the 3rd brachium pontisbw+Rdob。
In above-mentioned control method, the first modulating wave R of the first brachium pontisau+RdoaWith jth carrier wave CjThe control level of the second switch pipe gate pole of the jth power switch unit of the upper switches set of the first brachium pontis is obtained, as the first modulating wave R of the first brachium pontis by the first comparatorau+RdoaMore than jth carrier wave CjTime, the first comparator output high level, as the first modulating wave R of the first brachium pontisau+RdoaLess than jth carrier wave CjTime, the first comparator output low level, wherein the value of j is 1～N；Second modulating wave R of the first brachium pontisbu+RdobWith jth carrier wave CjObtained by the second comparator the first brachium pontis lower switches set jth power switch unit in the control level of second switch pipe gate pole, as the second modulating wave R of the first brachium pontisbu+RdobLess than jth carrier wave CjTime, the second comparator output high level, as the second modulating wave R of the first brachium pontisbu+RdobMore than jth carrier wave CjTime, the second comparator output low level；In the jth power switch unit of the control level of the second switch pipe gate pole of the jth power switch unit of the upper switches set of the first brachium pontis and the lower switches set of the first brachium pontis, the control level of second switch pipe gate pole passes through the first XOR gate 307, obtain the first brachium pontis breaker in middle group jth power switch unit in the control level of second switch pipe gate pole；First modulating wave R of the second brachium pontisav+RdoaWith jth carrier wave CjObtained by the 3rd comparator the second brachium pontis upper switches set jth power switch unit in the control level of second switch pipe gate pole, as the first modulating wave R of the second brachium pontisav+RdoaMore than jth carrier wave CjTime, the 3rd comparator output high level, as the first modulating wave R of the second brachium pontisav+RdoaLess than jth carrier wave CjTime, the 3rd comparator output low level；Second modulating wave R of the second brachium pontisbv+RdobWith jth carrier wave CjObtained by the 4th comparator the second brachium pontis lower switches set jth power switch unit in the control level of second switch pipe gate pole, as the second modulating wave R of the second brachium pontisbv+RdobLess than jth carrier wave Cj, the 4th comparator output high level, as the second modulating wave R of the second brachium pontisbv+RdobMore than jth carrier wave Cj, the 4th comparator output low level；In the jth power switch unit of the upper switches set of the second brachium pontis in the jth power switch unit of the lower switches set of the control level of second switch pipe gate pole and the second brachium pontis the control level of second switch pipe gate pole by the second XOR gate 308, obtain second brachium pontis breaker in middle group jth power switch unit in the control level of second switch pipe gate pole；First modulating wave R of the 3rd brachium pontisaw+RdoaWith jth carrier wave CjObtained by the 5th comparator the 3rd brachium pontis upper switches set jth power switch unit in the control level of second switch pipe gate pole, as the first modulating wave R of the 3rd brachium pontisaw+RdoaMore than jth carrier wave Cj, the 5th comparator output high level, as the first modulating wave R of the 3rd brachium pontisaw+RdoaLess than jth carrier wave Cj, the 5th comparator output low level；Second modulating wave R of the 3rd brachium pontisbw+RdobWith jth carrier wave CjObtained by the 6th comparator the 3rd brachium pontis lower switches set jth power switch unit in the control level of second switch pipe gate pole, as the second modulating wave R of the 3rd brachium pontisbw+RdobLess than jth carrier wave Cj, the 6th comparator output high level, as the second modulating wave R of the 3rd brachium pontisbw+RdobMore than jth carrier wave Cj, the 6th comparator output low level；In the jth power switch unit of the upper switches set of the 3rd brachium pontis in the jth power switch unit of the lower switches set of the control level of second switch pipe gate pole and the 3rd brachium pontis the control level of second switch pipe gate pole by the 3rd XOR gate 309, obtain the 3rd brachium pontis breaker in middle group jth power switch unit in the control level of second switch pipe gate pole.
The mode of operation of dual input three-phase nine switches set MMC rectifier includes with frequency pattern and alien frequencies pattern, and with in frequency pattern, first via output is identical with the frequency of the second tunnel output, and amplitude differs；In alien frequencies pattern, frequency and the amplitude of first via output and the output of the second tunnel all differ.
Compared with prior art, the present invention has the advantage that and is converted into, for: two-way three-phase alternating current input power, the three-phase alternating current input that two-route wire voltage is 2N+1 level, input current waveform is of high quality, the voltage stress that in power switch unit, each switching tube bears is only the 1/N of DC bus-bar voltage, can guarantee that the voltage that in commutator work process, all switching tubes bear is equal simultaneously, well solve the voltage-sharing of switching tube.Compared with existing three-phase nine switching rectifier, the two-way three-phase alternating current input power of dual input three-phase nine switches set MMC rectifier provided by the present invention is converted into the three-phase alternating current input that two-route wire voltage is 2N+1 level, and the quality of input AC current waveform is greatly improved.In addition, the voltage stress born of each switching tube is only the 1/N of DC bus-bar voltage, and control method provided by the present invention makes the voltage that in commutator work process, all switching tubes bear equal, well solving the voltage-sharing of switching tube, this will be very beneficial for the application at high pressure and large-power occasions of the dual input three-phase nine switches set MMC rectifier.Compared with existing MMC rectifier, dual input three-phase nine switches set MMC rectifier provided by the present invention has two-way exchange output, can be directly used for being connected of the alternating current circuit of two different frequencies, greatly reduces engineering cost.
Accompanying drawing explanation
Fig. 1 is the circuit structure diagram of the dual input three-phase nine switches set MMC rectifier of the present invention；
Fig. 2 is the circuit structure diagram of the power switch unit of the dual input three-phase nine switches set MMC rectifier shown in Fig. 1；
Fig. 3 is the phase-shifting carrier wave PWM control structure figure of the dual input three-phase nine switches set MMC rectifier shown in Fig. 1；
Fig. 4 a, 4b are that the dual input three-phase nine switches set MMC rectifier shown in Fig. 1 works in the modulating wave under CF pattern and DF pattern respectively；
Fig. 5 a, 5b are that dual input three-phase nine switches set nine level MMC rectifier works in the simulation waveform figure under frequency pattern and alien frequencies pattern.
Detailed description of the invention
For present disclosure and feature are expanded on further, below in conjunction with accompanying drawing, specific embodiments of the present invention are illustrated, but the enforcement of the present invention is not limited to this.
With reference to Fig. 1, the dual input three-phase nine switches set MMC rectifier of the present invention, including a u phase voltage source uua, a v phase voltage source uva, a w phase voltage source uwa, a u phase inductance Lua, a v phase inductance Lva, a w phase inductance Lwa, the 2nd u phase voltage source uub, the 2nd v phase voltage source uvb, the 2nd w phase voltage source uwb, the 2nd u phase inductance Lub, the 2nd v phase inductance Lvb, the 2nd w phase inductance Lwb, the first brachium pontis, the second brachium pontis, the 3rd brachium pontis and load R；Described first brachium pontis, the second brachium pontis and the 3rd brachium pontis are by upper switches set (Hu、Hv、Hw), breaker in middle group (Mu、Mv、Mw), lower switches set (Lu、Lv、Lw) and two inductance (LHu、LLu, LHv、LLv, LHw、LLw) be in series；The upper switches set H of the first brachium pontisuBy N number of power switch unit (SMHu1、SMHu2、…、SMHuN) be in series, the breaker in middle group M of the first brachium pontisuBy N number of power switch unit (SMMu1、SMMu2、…、SMMuN) be in series, the lower switches set L of the first brachium pontisuBy N number of power switch unit (SMLu1、SMLu2、…、SMLuN) series connection, the upper switches set H of the second brachium pontisvBy N number of power switch unit (SMHv1、SMHv2、…、SMHvN) be in series, the breaker in middle group M of the second brachium pontisvBy N number of power switch unit (SMMv1、SMMv2、…、SMMvN) be in series, the lower switches set L of the second brachium pontisvBy N number of power switch unit (SMLv1、SMLv2、…、SMLvN) be in series, the upper switches set H of the 3rd brachium pontiswBy N number of power switch unit (SMHw1、SMHw2、…、SMHwN) be in series, the breaker in middle group M of the 3rd brachium pontiswBy N number of power switch unit (SMMw1、SMMw2、…、SMMwN) be in series, the lower switches set L of the 3rd brachium pontiswBy N number of power switch unit (SMLw1、SMLw2、…、SMLwN) be in series；Oneth u phase voltage source uua, a v phase voltage source uvaWith a w phase voltage source uwaInput as first via three-phase, the 2nd u phase voltage source uub, the 2nd v phase voltage source uvbWith the 2nd w phase voltage source uwbAs the second road three-phase input.
The upper switches set H of the first brachium pontisuLower end p and the first inductance L of the first brachium pontisHuOne end connect, the first inductance L of the first brachium pontisHuThe other end and the breaker in middle group M of the first brachium pontisuUpper end o connect, the breaker in middle group M of the first brachium pontisuThe second inductance L of lower end and the first brachium pontisLuOne end connect, the second inductance L of the first brachium pontisLuThe other end and the lower switches set L of the first brachium pontisuUpper end connect；The structure of the second brachium pontis, the 3rd brachium pontis the structure of structure and the first brachium pontis completely the same；Oneth u phase voltage source uuaOne end and a u phase inductance LuaOne end connect, a u phase inductance LuaThe other end and the breaker in middle group M of the first brachium pontisuUpper end connect, a u phase voltage source uuaThe other end and a v phase voltage source uvaOne end, a w phase voltage source uwaOne end connect, a v phase voltage source uvaThe other end and a v phase inductance LvaOne end connect, a v phase inductance LvaThe other end and the breaker in middle group M of the second brachium pontisvUpper end connect, a w phase voltage source uwaThe other end and a w phase inductance LwaOne end connect, a w phase inductance LwaThe other end and the breaker in middle group M of the 3rd brachium pontiswUpper end connect；2nd u phase voltage source uubOne end and the 2nd u phase inductance LubOne end connect, the 2nd u phase inductance LubThe other end and the breaker in middle group M of the first brachium pontisuLower end connect, the 2nd u phase voltage source uubThe other end and the 2nd v phase voltage source uvbOne end, the 2nd w phase voltage source uwbOne end connect, the 2nd v phase voltage source uvbThe other end and the 2nd v phase inductance LvbOne end connect, the 2nd v phase inductance LvbThe other end and the breaker in middle group M of the second brachium pontisvLower end connect, the 2nd w phase voltage source uwbThe other end and the 2nd w phase inductance LwbOne end connect, the 2nd w phase inductance LwbThe other end and the breaker in middle group M of the 3rd brachium pontiswLower end connect；The upper switches set H of the first brachium pontisuThe upper switches set H of upper end and the second brachium pontisuUpper end, the 3rd brachium pontis upper switches set HuUpper end, load R one end connect, the other end of load R and the lower switches set L of the first brachium pontisuLower end, the second brachium pontis lower switches set LvLower end, the 3rd brachium pontis lower switches set LwLower end, hold n to connect.
Fig. 2 illustrates the circuit structure of the power switch unit of dual input three-phase shown in Fig. 1 nine switches set MMC rectifier.Power switch unit is by the first switching tube S1, second switch pipe S2, the first diode D1, the second diode D2With electric capacity CSMConstitute；Wherein, electric capacity CSMPositive pole and the first switching tube S1Colelctor electrode, the first diode D1Negative electrode connect, the first switching tube S1Emitter stage and the first diode D1Anode, second switch pipe S2Colelctor electrode, the second diode D2Negative electrode connect, second switch pipe S2Emitter stage and the second diode D2Anode, electric capacity CSMNegative pole connect；Second switch pipe S2Colelctor electrode as the first outfan, second switch pipe S2Emitter stage as the second outfan.
As it is shown in figure 1, the first outfan of+1 power switch unit of the second outfan and jth of the jth power switch unit of each switches set is connected, wherein the value of j is 1～N-1.
The u phase voltage source is made to beOneth v phase voltage source isOneth w phase voltage source is2nd u phase voltage source is2nd v phase voltage source is2nd w phase voltage source isThen:
In formula, UoFor output voltage.
Dual input three-phase nine switches set MMC rectifier shown in Fig. 1 adopts phase-shifting carrier wave PWM to control, as shown in Figure 3.
The upper switches set H of the first brachium pontisuJth power switch unit SMHuj, the first brachium pontis lower switches set LuJth power switch unit SMLuj, the second brachium pontis upper switches set HvJth power switch unit SMHvj, the second brachium pontis lower switches set LvJth power switch unit SMLvj, the 3rd brachium pontis upper switches set HwJth power switch unit SMHwjLower switches set L with the 3rd brachium pontiswJth power switch unit SMLwjAdopt identical triangular wave as jth carrier wave Cj, wherein the value of j is 1～N；N number of carrier wave C1、C2、…、CN360 °/N of lagging phase angle successively；The upper switches set H of the first brachium pontisuAdopt primary sinusoid RauSuperposition the first direct current biasing RdoaThe first modulating wave R as the first brachium pontisau+Rdoa, the lower switches set L of the first brachium pontisuAdopt the second sinusoidal wave RbuSuperposition the second direct current biasing RdobThe second modulating wave R as the first brachium pontisbu+Rdob, the upper switches set H of the second brachium pontisvAdopt the 3rd sinusoidal wave RavSuperposition the first direct current biasing RdoaThe first modulating wave R as the second brachium pontisav+Rdoa, the lower switches set L of the second brachium pontisvAdopt the 4th sinusoidal wave RbvSuperposition the second direct current biasing RdobThe second modulating wave R as the second brachium pontisbv+Rdob, the upper switches set H of the 3rd brachium pontiswAdopt the 5th sinusoidal wave RawSuperposition the first direct current biasing RdoaThe first modulating wave R as the 3rd brachium pontisaw+Rdoa, the lower switches set L of the 3rd brachium pontiswAdopt the 6th sinusoidal wave RbwSuperposition the second direct current biasing RdobThe second modulating wave R as the 3rd brachium pontisbw+Rdob。
First modulating wave R of the first brachium pontisau+RdoaWith jth carrier wave CjThe upper switches set H of the first brachium pontis is obtained by the first comparator 301uJth power switch unit SMHujSecond switch pipe S2The control level S of gate poleHuj, as the first modulating wave R of the first brachium pontisau+RdoaMore than jth carrier wave CjTime, the first comparator output high level, as the first modulating wave R of the first brachium pontisau+RdoaLess than jth carrier wave CjTime, the first comparator output low level, wherein the value of j is 1～N；Second modulating wave R of the first brachium pontisbu+RdobWith jth carrier wave CjThe lower switches set L of the first brachium pontis is obtained by the second comparator 302uJth power switch unit SMLujMiddle second switch pipe S2The control level S of gate poleLuj, as the second modulating wave R of the first brachium pontisbu+RdobLess than jth carrier wave CjTime, the second comparator output high level, as the second modulating wave R of the first brachium pontisbu+RdobMore than jth carrier wave CjTime, the second comparator output low level；The upper switches set H of the first brachium pontisuJth power switch unit SMHujSecond switch pipe S2The control level S of gate poleHujLower switches set L with the first brachium pontisuJth power switch unit SMLujMiddle second switch pipe S2The control level S of gate poleLujBy the first XOR gate, obtain the breaker in middle group M of the first brachium pontisuJth power switch unit SMMujMiddle second switch pipe S2The control level S of gate poleMuj；First modulating wave R of the second brachium pontisav+RdoaWith jth carrier wave CjThe upper switches set H of the second brachium pontis is obtained by the 3rd comparator 303vJth power switch unit SMHvjMiddle second switch pipe S2The control level S of gate poleHvj, as the first modulating wave R of the second brachium pontisav+RdoaMore than jth carrier wave CjTime, the 3rd comparator output high level, as the first modulating wave R of the second brachium pontisav+RdoaLess than jth carrier wave CjTime, the 3rd comparator output low level；Second modulating wave R of the second brachium pontisbv+RdobWith jth carrier wave CjThe lower switches set L of the second brachium pontis is obtained by the 4th comparator 304vJth power switch unit SMLvjMiddle second switch pipe S2The control level S of gate poleLvj, as the second modulating wave R of the second brachium pontisbv+RdobLess than jth carrier wave Cj, the 4th comparator output high level, as the second modulating wave R of the second brachium pontisbv+RdobMore than jth carrier wave Cj, the 4th comparator output low level；The upper switches set H of the second brachium pontisvJth power switch unit SMHvjMiddle second switch pipe S2The control level S of gate poleHvjLower switches set L with the second brachium pontisvJth power switch unit SMLvjMiddle second switch pipe S2The control level S of gate poleLvjBy the second XOR gate, obtain the breaker in middle group M of second brachium pontisvJth power switch unit SMMvjMiddle second switch pipe S2The control level S of gate poleMvj；First modulating wave R of the 3rd brachium pontisaw+RdoaWith jth carrier wave CjThe upper switches set H of the 3rd brachium pontis is obtained by the 5th comparator 305wJth power switch unit SMHwjMiddle second switch pipe S2The control level S of gate poleHwj, as the first modulating wave R of the 3rd brachium pontisaw+RdoaMore than jth carrier wave Cj, the 5th comparator output high level, as the first modulating wave R of the 3rd brachium pontisaw+RdoaLess than jth carrier wave Cj, the 5th comparator output low level；Second modulating wave R of the 3rd brachium pontisbw+RdobWith jth carrier wave CjThe lower switches set L of the 3rd brachium pontis is obtained by the 6th comparator 306wJth power switch unit SMLwjMiddle second switch pipe S2The control level S of gate poleLwj, as the second modulating wave R of the 3rd brachium pontisbw+RdobLess than jth carrier wave Cj, the 6th comparator output high level, as the second modulating wave R of the 3rd brachium pontisbw+RdobMore than jth carrier wave Cj, the 6th comparator output low level；The upper switches set H of the 3rd brachium pontiswJth power switch unit SMHwjMiddle second switch pipe S2The control level S of gate poleHwjLower switches set L with the 3rd brachium pontiswJth power switch unit SMLwjMiddle second switch pipe S2The control level S of gate poleLwjBy the 3rd XOR gate, obtain the breaker in middle group M of the 3rd brachium pontiswJth power switch unit SMMwjMiddle second switch pipe S2The control level S of gate poleMwj。
Described control method can ensure that the upper switches set (H of the first brachium pontis of described commutatoru), the breaker in middle group (M of the first brachium pontisu) and the lower switches set (L of the first brachium pontisu) the output voltage u of N number of power switch unit is had in each momentSM=E, the output voltage u of total 2N power switch unitSM=0, namely meet uHu+uMu+uLu=Uo；Ensure the upper switches set (H of the second brachium pontisv), the breaker in middle group (M of the second brachium pontisv) and the lower switches set (L of the second brachium pontisv) the output voltage u of N number of power switch unit is had in each momentSM=E, the output voltage u of total 2N power switch unitSM=0, namely meet uHv+uMv+uLv=Uo；Ensure the upper switches set (H of the 3rd brachium pontisw), the breaker in middle group (M of the 3rd brachium pontisw) and the lower switches set (L of the 3rd brachium pontisw) the output voltage u of N number of power switch unit is had in each momentSM=E, the output voltage u of total 2N power switch unitSM=0, namely meet uHw+uMw+uLw=Uo；Wherein uHu、uHv、uHwThe respectively upper switches set H of the first brachium pontisu, the second brachium pontis upper switches set HvUpper switches set H with the 3rd brachium pontiswOutput voltage, uMu、uMv、uMwThe respectively breaker in middle group M of the first brachium pontisu, the second brachium pontis breaker in middle group MvBreaker in middle group M with the 3rd brachium pontiswOutput voltage, uLu、uLv、uLwThe respectively lower switches set L of the first brachium pontisu, the second brachium pontis lower switches set LvLower switches set L with the 3rd brachium pontiswOutput voltage, E be each switches set each power switch unit in electric capacity CSMVoltage, and have E=Uo/ N, the voltage stress that namely in power switch unit, each switching tube bears is only the 1/N of DC bus-bar voltage, can guarantee that the voltage that in commutator work process, all switching tubes bear is equal simultaneously, well solves the voltage-sharing of switching tube.
Fig. 4 a illustrates that dual input three-phase nine switches set MMC rectifier works in the first modulating wave R of the first brachium pontis under frequency patternau+Rdoa, the first brachium pontis the second modulating wave Rbu+RdobWith jth carrier wave CjRelation.From Fig. 4 a it can be seen that the primary sinusoid R of the first brachium pontisauWith the second of the second brachium pontis the sinusoidal wave RbuElectric voltage frequency identical, and the primary sinusoid R of the first brachium pontisauWith the second of the second brachium pontis the sinusoidal wave RbuVoltage magnitude maximum be 1, wherein the value of j is 1～N.Fig. 4 b illustrates that dual input three-phase nine switches set MMC rectifier works in the first modulating wave R of the first brachium pontis under alien frequencies patternau+Rdoa, the first brachium pontis the second modulating wave Rbu+RdobWith jth carrier wave CjRelation.It is seen from fig. 4b that the primary sinusoid R of the first brachium pontisauWith the second of the second brachium pontis the sinusoidal wave RbuElectric voltage frequency differ, and the primary sinusoid R of the first brachium pontisauWith the second of the second brachium pontis the sinusoidal wave RbuVoltage magnitude maximum and be 1/2.First modulating wave R of the second brachium pontisav+Rdoa, the 3rd brachium pontis the first modulating wave Raw+RdoaThe first modulating wave R with the first brachium pontisau+RdoaWith jth carrier wave CjRelation identical, the second modulating wave R of the second brachium pontisbv+Rdob, the 3rd brachium pontis the second modulating wave Rbw+RdobThe second modulating wave R with the first brachium pontisb1+RdobWith jth carrier wave CjRelation identical.
Fig. 5 a is the simulation waveform figure that dual input three-phase nine switches set nine level MMC inverter (N=4) works in frequency pattern, from top to bottom a u phase voltage source u successivelyua, a v phase voltage source uva, a w phase voltage source uwa, first via three-phase alternating-current supply provide three line voltage (uuva、uvwa、uwua), the 2nd u phase voltage source uub, the 2nd v phase voltage source uvb, the 2nd w phase voltage source uwb, three line voltage (u providing of No. second three-phase alternating-current supplyuvb、uvwb、uwub) and output voltage Uo, identical from the phase voltage frequency of Fig. 5 a visible first via three-phase alternating-current supply and No. second three-phase alternating-current supply, the phase voltage amplitude of first via three-phase alternating-current supply and No. second three-phase alternating-current supply differs；Fig. 5 b is the simulation waveform figure that dual input three-phase nine switches set nine level MMC inverter works in alien frequencies pattern, is a u phase voltage source u from top to bottom successivelyua, a v phase voltage source uva, a w phase voltage source uwa, first via three-phase alternating-current supply provide three line voltage (uuva、uvwa、uwua), the 2nd u phase voltage source uub, the 2nd v phase voltage source uvb, the 2nd w phase voltage source uwb, three line voltage (u providing of No. second three-phase alternating-current supplyuvb、uvwb、uwub) and output voltage Uo, all differ from phase voltage frequency and the amplitude of the visible first via three-phase alternating-current supply of Fig. 5 b and No. second three-phase alternating-current supply.
Above-described embodiment is the present invention preferably embodiment; but embodiments of the present invention are also not restricted by the embodiments; the change made under other any spirit without departing from the present invention and principle, modification, replacement, combination, simplification; all should be the substitute mode of equivalence, be included within protection scope of the present invention.
Claims (7)
1. dual input three-phase nine switches set MMC rectifier, it is characterised in that: include the first three-phase voltage source, the second three-phase voltage source, first group of inductance, second group of inductance, the first brachium pontis, the second brachium pontis, the 3rd brachium pontis and load (R)；First three-phase voltage source include a u phase voltage source (u ua ), a v phase voltage source (u va ) and a w phase voltage source (u wa )；Second three-phase voltage source include the 2nd u phase voltage source (u ub ), the 2nd v phase voltage source (u vb ) and the 2nd w phase voltage source (u wb )；First group of inductance include a u phase inductance (L ua ), a v phase inductance (L va ) and a w phase inductance (L wa )；Second group of inductance include the 2nd u phase inductance (L ub ), the 2nd v phase inductance (L vb ) and the 2nd w phase inductance (L wb )；In described first brachium pontis, the second brachium pontis and all each freedom of the 3rd brachium pontis, switches set, the first inductance, breaker in middle group, the second inductance, lower switches set are in series；Upper switches set (the H of the first brachium pontisu) by N number of power switch unit (SMHu1、SMHu2、…、SMHuN) be in series, the breaker in middle group (M of the first brachium pontisu) by N number of power switch unit (SMMu1、SMMu2、…、SMMuN) be in series, the lower switches set (L of the first brachium pontisu) by N number of power switch unit (SMLu1、SMLu2、…、SMLuN) series connection, the upper switches set (H of the second brachium pontisv) by N number of power switch unit (SMHv1、SMHv2、…、SMHvN) be in series, the breaker in middle group (M of the second brachium pontisv) by N number of power switch unit (SMMv1、SMMv2、…、SMMvN) be in series, the lower switches set (L of the second brachium pontisv) by N number of power switch unit (SMLv1、SMLv2、…、SMLvN) be in series, the upper switches set (H of the 3rd brachium pontisw) by N number of power switch unit (SMHw1、SMHw2、…、SMHwN) be in series, the breaker in middle group (M of the 3rd brachium pontisw) by N number of power switch unit (SMMw1、SMMw2、…、SMMwN) be in series, the lower switches set (L of the 3rd brachium pontisw) by N number of power switch unit (SMLw1、SMLw2、…、SMLwN) be in series；Oneth u phase voltage source (u ua ), a v phase voltage source (u va ) and a w phase voltage source (u wa ) input as first via three-phase, the 2nd u phase voltage source (u ub ), the 2nd v phase voltage source (u vb ) and the 2nd w phase voltage source (u wb ) as the second road three-phase input, N is positive integer；
Upper switches set (the H of the first brachium pontisu) lower end (p) and the first brachium pontis the first inductance (L Hu ) one end connect, the first inductance of the first brachium pontis (L Hu ) the other end and the breaker in middle group (M of the first brachium pontisu) upper end (o) connect, the breaker in middle group (M of the first brachium pontisu) lower end and the first brachium pontis the second inductance (L Lu ) one end connect, the second inductance of the first brachium pontis (L Lu ) the other end and the lower switches set (L of the first brachium pontisu) upper end connect；The structure of the second brachium pontis, the 3rd brachium pontis the structure of structure and the first brachium pontis completely the same；Oneth u phase voltage source (u ua ) one end and a u phase inductance (L ua ) one end connect, a u phase inductance (L ua ) the other end and the breaker in middle group (M of the first brachium pontisu) upper end connect, a u phase voltage source (u ua ) the other end and a v phase voltage source (u va ) one end, a w phase voltage source (u wa ) one end connect, a v phase voltage source (u va ) the other end and a v phase inductance (L va ) one end connect, a v phase inductance (L va ) the other end and the breaker in middle group (M of the second brachium pontisv) upper end connect, a w phase voltage source (u wa ) the other end and a w phase inductance (L wa ) one end connect, a w phase inductance (L wa ) the other end and the breaker in middle group (M of the 3rd brachium pontisw) upper end connect；2nd u phase voltage source (u ub ) one end and the 2nd u phase inductance (L ub ) one end connect, the 2nd u phase inductance (L ub ) the other end and the breaker in middle group (M of the first brachium pontisu) lower end connect, the 2nd u phase voltage source (u ub ) the other end and the 2nd v phase voltage source (u vb ) one end, the 2nd w phase voltage source (u wb ) one end connect, the 2nd v phase voltage source (u vb ) the other end and the 2nd v phase inductance (L vb ) one end connect, the 2nd v phase inductance (L vb ) the other end and the breaker in middle group (M of the second brachium pontisv) lower end connect, the 2nd w phase voltage source (u wb ) the other end and the 2nd w phase inductance (L wb ) one end connect, the 2nd w phase inductance (L wb ) the other end and the breaker in middle group (M of the 3rd brachium pontisw) lower end connect；Upper switches set (the H of the first brachium pontisu) the upper switches set (H of upper end and the second brachium pontisu) upper end, the 3rd brachium pontis upper switches set (Hu) upper end, load (R) one end connect, load (R) the other end and the lower switches set (L of the first brachium pontisu) lower end, the second brachium pontis lower switches set (Lv) lower end, the 3rd brachium pontis lower switches set (Lw) lower end, hold (n) connect.
2. dual input three-phase nine switches set MMC rectifier according to claim 1, it is characterised in that: two inductance of the first brachium pontis (L Hu 、L Lu ), two inductance of the second brachium pontis (L Hv 、L Lv ) and the 3rd brachium pontis two inductance (L Hw 、L Lw ) substitute by coupling inductance.
3. dual input three-phase nine switches set MMC rectifier according to claim 1, it is characterised in that: power switch unit by the first switching tube (S 1 ), second switch pipe (S 2 ), the first diode (D 1 ), the second diode (D 2 ) and electric capacity (C SM ) constitute；Wherein, electric capacity (C SM ) positive pole and the first switching tube (S 1 ) colelctor electrode, the first diode (D 1 ) negative electrode connect, the first switching tube (S 1 ) emitter stage and the first diode (D 1 ) anode, second switch pipe (S 2 ) colelctor electrode, the second diode (D 2 ) negative electrode connect, second switch pipe (S 2 ) emitter stage and the second diode (D 2 ) anode, electric capacity (C SM ) negative pole connect；Second switch pipe (S 2 ) colelctor electrode as the first outfan, second switch pipe (S 2 ) emitter stage as the second outfan.
4. dual input three-phase nine switches set MMC rectifier according to claim 1, it is characterised in that: the first outfan of+1 power switch unit of the second outfan and jth of the jth power switch unit of each switches set is connected, and wherein the value of j is 1 ~ N-1.
5. dual input three-phase nine switches set MMC rectifier according to claim 1, it is characterised in that: mode of operation includes with frequency pattern and alien frequencies pattern, and with in frequency pattern, the frequency of the first three-phase voltage source and the second three-phase voltage source is identical, and amplitude differs；In alien frequencies pattern, frequency and the amplitude of the first three-phase voltage source and the second three-phase voltage source all differ.
6. for the control method of the dual input three-phase nine switches set MMC rectifier described in claim 1, it is characterised in that: employing phase-shifting carrier wave PWM controls opening and shutoff of the switching tube of each switches set；Upper switches set (the H of the first brachium pontisu) jth power switch unit (SMHuj), the lower switches set (L of the first brachium pontisu) jth power switch unit (SMLuj), the upper switches set (H of the second brachium pontisv) jth power switch unit (SMHvj), the lower switches set (L of the second brachium pontisv) jth power switch unit (SMLvj), the upper switches set (H of the 3rd brachium pontisw) jth power switch unit (SMHwj) and the lower switches set (L of the 3rd brachium pontisw) jth power switch unit (SMLwj) adopt identical triangular wave as jth carrier waveC j , wherein the value of j is 1 ~ N；N number of carrier wave (C 1 、C 2 、…、C N ) 360 °/N of lagging phase angle successively；Upper switches set (the H of the first brachium pontisu) adopt the primary sinusoidR au Superposition the first direct current biasingR doa The first modulating wave as the first brachium pontisR au +R doa , the lower switches set (L of the first brachium pontisu) adopt the second sine waveR bu Superposition the second direct current biasingR dob The second modulating wave as the first brachium pontisR bu +R dob , the upper switches set (H of the second brachium pontisv) adopt the 3rd sine waveR av Superposition the first direct current biasingR doa The first modulating wave as the second brachium pontisR av +R doa , the lower switches set (L of the second brachium pontisv) adopt the 4th sine waveR bv Superposition the second direct current biasingR dob The second modulating wave as the second brachium pontisR bv +R dob , the upper switches set (H of the 3rd brachium pontisw) adopt the 5th sine waveR aw Superposition the first direct current biasingR doa The first modulating wave as the 3rd brachium pontisR aw +R doa , the lower switches set (L of the 3rd brachium pontisw) adopt the 6th sine waveR bw Superposition the second direct current biasingR dob The second modulating wave as the 3rd brachium pontisR bw +R dob 。
7. control method according to claim 6, it is characterised in that: the first modulating wave of the first brachium pontisR au +R doa With jth carrier waveC j Upper switches set (the H of the first brachium pontis is obtained by the first comparatoru) jth power switch unit (SMHuj) second switch pipe (S 2 ) gate pole control level (S Huj ), when the first modulating wave of the first brachium pontisR au +R doa More than jth carrier waveC j Time, the first comparator output high level, when the first modulating wave of the first brachium pontisR au +R doa Less than jth carrier waveC j Time, the first comparator output low level, wherein the value of j is 1 ~ N；Second modulating wave of the first brachium pontisR bu +R dob With jth carrier waveC j Lower switches set (the L of the first brachium pontis is obtained by the second comparatoru) jth power switch unit (SMLuj) in second switch pipe (S 2 ) gate pole control level (S Luj ), when the second modulating wave of the first brachium pontisR bu +R dob Less than jth carrier waveC j Time, the second comparator output high level, when the second modulating wave of the first brachium pontisR bu +R dob More than jth carrier waveC j Time, the second comparator output low level；Upper switches set (the H of the first brachium pontisu) jth power switch unit (SMHuj) second switch pipe (S 2 ) gate pole control level (S Huj ) and the lower switches set (L of the first brachium pontisu) jth power switch unit (SMLuj) in second switch pipe (S 2 ) gate pole control level (S Luj ) by the first XOR gate, obtain the breaker in middle group (M of the first brachium pontisu) jth power switch unit (SMMuj) in second switch pipe (S 2 ) gate pole control level (S Muj )；First modulating wave of the second brachium pontisR av +R doa With jth carrier waveC j Upper switches set (the H of the second brachium pontis is obtained by the 3rd comparatorv) jth power switch unit (SMHvj) in second switch pipe (S 2 ) gate pole control level (S Hvj ), when the first modulating wave of the second brachium pontisR av +R doa More than jth carrier waveC j Time, the 3rd comparator output high level, when the first modulating wave of the second brachium pontisR av +R doa Less than jth carrier waveC j Time, the 3rd comparator output low level；Second modulating wave of the second brachium pontisR bv +R dob With jth carrier waveC j Lower switches set (the L of the second brachium pontis is obtained by the 4th comparatorv) jth power switch unit (SMLvj) in second switch pipe (S 2 ) gate pole control level (S Lvj ), when the second modulating wave of the second brachium pontisR bv +R dob Less than jth carrier waveC j , the 4th comparator output high level, when the second modulating wave of the second brachium pontisR bv +R dob More than jth carrier waveC j , the 4th comparator output low level；Upper switches set (the H of the second brachium pontisv) jth power switch unit (SMHvj) in second switch pipe (S 2 ) gate pole control level (S Hvj ) and the lower switches set (L of the second brachium pontisv) jth power switch unit (SMLvj) in second switch pipe (S 2 ) gate pole control level (S Lvj ) by the second XOR gate, obtain the breaker in middle group (M of second brachium pontisv) jth power switch unit (SMMvj) in second switch pipe (S 2 ) gate pole control level (S Mvj )；First modulating wave of the 3rd brachium pontisR aw +R doa With jth carrier waveC j Upper switches set (the H of the 3rd brachium pontis is obtained by the 5th comparatorw) jth power switch unit (SMHwj) in second switch pipe (S 2 ) gate pole control level (S Hwj ), when the first modulating wave of the 3rd brachium pontisR aw +R doa More than jth carrier waveC j , the 5th comparator output high level, when the first modulating wave of the 3rd brachium pontisR aw +R doa Less than jth carrier waveC j , the 5th comparator output low level；Second modulating wave of the 3rd brachium pontisR bw +R dob With jth carrier waveC j Lower switches set (the L of the 3rd brachium pontis is obtained by the 6th comparatorw) jth power switch unit (SMLwj) in second switch pipe (S 2 ) gate pole control level (S Lwj ), when the second modulating wave of the 3rd brachium pontisR bw +R dob Less than jth carrier waveC j , the 6th comparator output high level, when the second modulating wave of the 3rd brachium pontisR bw +R dob More than jth carrier waveC j , the 6th comparator output low level；Upper switches set (the H of the 3rd brachium pontisw) jth power switch unit (SMHwj) in second switch pipe (S 2 ) gate pole control level (S Hwj ) and the lower switches set (L of the 3rd brachium pontisw) jth power switch unit (SMLwj) in second switch pipe (S 2 ) gate pole control level (S Lwj ) by the 3rd XOR gate, obtain the breaker in middle group (M of the 3rd brachium pontisw) jth power switch unit (SMMwj) in second switch pipe (S 2 ) gate pole control level (S Mwj ).
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| CN101546964A (en) * | 2009-05-12 | 2009-09-30 | 北京交通大学 | Module combined multi-level converter |
| CN103283140A (en) * | 2010-10-27 | 2013-09-04 | 阿尔斯通技术有限公司 | Modular multilevel converter |
| CN203691273U (en) * | 2014-01-28 | 2014-07-02 | 华南理工大学 | Double-input three-phase nine-switch-group MMC rectifier |
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