CN103761199A - CPCI bus digital-analog input module hardware architecture under VxWorks and CPCI bus digital-analog input timing-configurable driving method under VxWorks - Google Patents

CPCI bus digital-analog input module hardware architecture under VxWorks and CPCI bus digital-analog input timing-configurable driving method under VxWorks Download PDF

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CN103761199A
CN103761199A CN201410003517.6A CN201410003517A CN103761199A CN 103761199 A CN103761199 A CN 103761199A CN 201410003517 A CN201410003517 A CN 201410003517A CN 103761199 A CN103761199 A CN 103761199A
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cpci bus
input
interface
cpci
chip
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CN201410003517.6A
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马云彤
刘连胜
见其拓
李俊峰
彭宇
彭喜元
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Harbin Institute of Technology
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Harbin Institute of Technology
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Abstract

The invention relates to a CPCI bus digital-analog input timing-configurable driving method, in particular to a CPCI bus digital-analog input module hardware architecture under VxWorks and a CPCI bus digital-analog input timing-configurable driving method under VxWorks, and aims to solve the problem that existing device drivers fail in timing matching of digital input and analog input. A CPCI bus digital input module comprises a CPCI bus, a PCI9054 interface conversion chip, a configuration chip, an FPGA programmable logic device, a configuration power supply part, an optical coupler receiving part, and a signal input interface; an analog input module comprises a CPCI bus, a CI9054 interface conversion chip, a configuration chip, an FGPA programmable logic device, a configuration power supply part, an AD7865 acquisition chip, an eight-way analog switch, a 32-way isolation conditioning circuit and a signal input interface. The CPCI bus digital-analog input module hardware architecture under VxWorks and the CPCI bus digital-analog input timing-configurable driving method under VxWorks are applied to the field computer programs.

Description

Cpci bus digital quantity and analog input module hardware framework and the configurable driving method of sequential under VxWorks
Technical field
The present invention relates to the input of cpci bus digital quantity and the configurable driving method of analog input sequential.
Background technology
Digital quantity input apparatus based on cpci bus under vxworks operating system and analog input equipment, as conventional test module, are applied in Auto-Test System widely.The bridge that the driver of equipment is communicated by letter with bottom hardware as application program, application program realizes the control to bottom hardware by the driver of equipment.In some specific test macro application, user is as required when obtaining digital quantity input state, need the cooperation of analog input in sequential, and the driver of existing equipment can only be realized digital quantity input module and the independent control of analog input module, can not realize digital quantity and input with analog input coordinating in sequential.
Summary of the invention
The present invention will solve the driver of existing equipment can only realize digital quantity input module and the independent control of analog input module, can not realize digital quantity and input with analog input the problem coordinating in sequential, and cpci bus digital quantity and analog input module hardware framework and the configurable driving method of sequential under VxWorks are provided.
Under vxworks operating system, cpci bus digital quantity input module comprises cpci bus, PCI9054 interface conversion chip, configuring chip, FPGA programmable logic device (PLD), configuration power pack, optocoupler receiving unit and signal input interface;
The bus port of described PCI9054 interface conversion chip is connected with cpci bus, the configuring chip port of PCI9054 interface conversion chip is connected with configuring chip, the journey logical device port of PCI9054 interface conversion chip is connected with FPGA programmable logic device (PLD), configuration power pack is for powering to described FPGA programmable logic device (PLD), the optocoupler output terminal of FPGA programmable logic device (PLD) is connected with optocoupler receiving unit, and described optocoupler receiving unit is connected with signal input interface;
Described analog input module comprises cpci bus, PCI9054 interface conversion chip, configuring chip, FPGA programmable logic device (PLD), configuration power pack, AD7865 acquisition chip, 8 path analoging switch, 32 tunnel isolation modulate circuit and signal input interfaces;
The bus port of described PCI9054 interface conversion chip is connected with cpci bus, the configuring chip port of PCI9054 interface conversion chip is connected with configuring chip, the journey logical device port of PCI9054 interface conversion chip is connected with FPGA programmable logic device (PLD), the power pack that configures for to the power supply of described FPGA programmable logic device (PLD), FPGA programmable logic device (PLD) port is connected with AD7865 acquisition chip, described AD7865 acquisition chip port is connected with 8 path analoging switch, described 8 path analoging switch are connected with 32 tunnel isolation modulate circuits, described 32 tunnel isolation modulate circuits are connected with signal input interface.
Under vxworks operating system, the input of cpci bus digital quantity realizes according to the following steps with the configurable driving method of analog input sequential:
One, user can coordinate cpci bus digital quantity input message, required cpci bus analog input as required information and delayed data are write in allocation list file;
Two, configurable functionality is similar to the driving filtering function under Windows system, in the bottom hardware power function interface basis of having developed, according to user configuration information Reseal, once drive interface function, when application call drives interface function, can return to the required status data of user according to the function setting.
Invention effect:
The input of cpci bus digital quantity and the configurable driving method of analog input sequential under the vxworks operating system that the present invention proposes, when user is as required when carrying out digital quantity input, need the cooperation in time of corresponding analog input, configurable driver can be realized above-mentioned requirement, and dirigibility is good.
Accompanying drawing explanation
Fig. 1 is digital quantity input module hardware structure;
Fig. 2 is the analog input hardware module framework based on cpci bus;
Fig. 3 is configurable driver process flow diagram.
Embodiment
Embodiment one: under the vxworks operating system of present embodiment, cpci bus digital quantity input module comprises cpci bus, PCI9054 interface conversion chip, configuring chip, FPGA programmable logic device (PLD), configuration power pack, optocoupler receiving unit and signal input interface;
The bus port of described PCI9054 interface conversion chip is connected with cpci bus, the configuring chip port of PCI9054 interface conversion chip is connected with configuring chip, the journey logical device port of PCI9054 interface conversion chip is connected with FPGA programmable logic device (PLD), configuration power pack is for powering to described FPGA programmable logic device (PLD), the optocoupler output terminal of FPGA programmable logic device (PLD) is connected with optocoupler receiving unit, and described optocoupler receiving unit is connected with signal input interface;
Described analog input module comprises cpci bus, PCI9054 interface conversion chip, configuring chip, FPGA programmable logic device (PLD), configuration power pack, AD7865 acquisition chip, 8 path analoging switch, 32 tunnel isolation modulate circuit and signal input interfaces;
The bus port of described PCI9054 interface conversion chip is connected with cpci bus, the configuring chip port of PCI9054 interface conversion chip is connected with configuring chip, the journey logical device port of PCI9054 interface conversion chip is connected with FPGA programmable logic device (PLD), the power pack that configures for to the power supply of described FPGA programmable logic device (PLD), FPGA programmable logic device (PLD) port is connected with AD7865 acquisition chip, described AD7865 acquisition chip port is connected with 8 path analoging switch, described 8 path analoging switch are connected with 32 tunnel isolation modulate circuits, described 32 tunnel isolation modulate circuits are connected with signal input interface.
Cpci bus digital quantity and analog input module hardware framework and complete compatible with PCI 2.2 standards of the configurable driving method PCI9054 of sequential interface conversion chip under the VxWorks of present embodiment, and burst transfers of data speed is high, interface chip price is low simultaneously, versatility is good, can effectively reduce development difficulty.
Present embodiment effect:
The input of cpci bus digital quantity and the configurable driving method of analog input sequential under the vxworks operating system that present embodiment proposes, when user is as required when carrying out digital quantity input, need the cooperation in time of corresponding analog input, configurable driver can be realized above-mentioned requirement, and dirigibility is good.
Embodiment two: present embodiment is different from embodiment one: described cpci bus digital quantity input module operates in CPCI cabinet, carries out data transmission by cpci bus and control computing machine.
Other step and parameter are identical with embodiment one.
Embodiment three: present embodiment is different from embodiment one or two: need to realize cpci bus interface control circuit between described cpci bus and hardware capability circuit, cpci bus interface control circuit adopts the PCI9054 interface conversion chip of PLX company to realize, and cpci bus is transformed into local bus.
Other step and parameter are identical with embodiment one or two.
Embodiment four: present embodiment is different from one of embodiment one to three: described PCI9054 interface conversion chip local bus one side is used FPGA programmable logic device (PLD) to realize bus interface decoding, simultaneously, FPGA programmable logic device (PLD) indoor design control register, realizes the control to digital quantity input module.
Other step and parameter are identical with one of embodiment one to three.
Embodiment five: present embodiment is different from one of embodiment one to four: in described signal input interface, 32 road input signals are respectively after photoelectric coupler isolation, signal after isolation enters FPGA programmable logic device (PLD) and controls and treatment circuit, FPGA programmable logic device (PLD) is processed, changes and store input signal, then deliver to CPCI interface circuit, control computing machine and by CPCI interface, read the digital signal of input; Wherein, described photoelectrical coupler adopts the chip that the model of Toshiba is TLP521-2.
Other step and parameter are identical with one of embodiment one to four.
Embodiment six: present embodiment is different from one of embodiment one to five: described scan A/D C functional module is inserted in CPCI cabinet to be moved, controlling computing machine is realized the read-write of scan A/D C functional module is controlled by cpci bus, between cpci bus and scan A/D C functional circuit, need to realize cpci bus interface controller, cpci bus interface controller adopts the PCI9054 interface conversion chip of PLX company to realize, cpci bus is transformed into local bus, PCI9054 interface conversion chip local bus is used FPGA programmable logic device (PLD) to realize bus interface decoding, simultaneously, FPGA programmable logic device (PLD) indoor design control register, the control of realization to scan A/D C functional circuit, scan A/D C funtion part is by the AD7865 data acquisition chip of 1 successive approximation, 48 path analoging switch chips and 32 AD202 isolating chips form 32 tunnel scan A/D C functional circuits, 32 paths are isolated from each other, the simulating signal of outside input is after the isolation of AD202 chip and signal condition, input 48 and select 1 analog switch, after analog switch is selected, enter AD7865 modulus switching device and carry out analog quantity to the conversion of digital quantity.
Other step and parameter are identical with one of embodiment one to five.
Embodiment seven: under vxworks operating system, the input of cpci bus digital quantity realizes according to the following steps with the configurable driving method of analog input sequential:
One, user can coordinate cpci bus digital quantity input message, required cpci bus analog input as required information and delayed data are write in allocation list file, configurable functionality is similar to the driving filtering function under Windows system, in the bottom hardware power function interface basis of having developed, according to user configuration information Reseal, once drive interface function, when application call drives interface function, can return to the required data of user according to the function setting.
Embodiment eight: present embodiment is different from one of embodiment one to seven: in described step 2, application call driving function is specially:
One, first application call cpci bus switching value output module write operation drives interface function, controls the output of cpci bus switching value output channel, makes marks simultaneously and records hardware controls output valve;
Two, then resolve configurable driver, the cpci bus switching value output configuration information in configurable driver, required cpci bus analog output configuration information and time delay configuration information are saved;
Three, then by the switching value output configuration information comparison after resolving in switching value output token value and output configuration information, if contrast inconsistently, return to ERROR, finish; If comparison is consistent, checked before carrying out required analog quantity cooperation output whether have time delay configuration information, if there is time delay, the time that first time delay configures;
Four, the digital quantity analog quantity translation interface that then calls analog output module, carries out corresponding analog output.
Other step and parameter are identical with one of embodiment one to seven.

Claims (8)

  1. The hardware structure of the input of cpci bus digital quantity and analog input module under 1.VxWorks operating system, is characterized in that under vxworks operating system, cpci bus digital quantity input module comprises cpci bus, PCI9054 interface conversion chip, configuring chip, FPGA programmable logic device (PLD), configuration power pack, optocoupler receiving unit and signal input interface;
    The bus port of described PCI9054 interface conversion chip is connected with cpci bus, the configuring chip port of PCI9054 interface conversion chip is connected with configuring chip, the journey logical device port of PCI9054 interface conversion chip is connected with FPGA programmable logic device (PLD), configuration power pack is for powering to described FPGA programmable logic device (PLD), the optocoupler output terminal of FPGA programmable logic device (PLD) is connected with optocoupler receiving unit, and described optocoupler receiving unit is connected with signal input interface;
    Described analog input module comprises cpci bus, PCI9054 interface conversion chip, configuring chip, FPGA programmable logic device (PLD), configuration power pack, AD7865 acquisition chip, 8 path analoging switch, 32 tunnel isolation modulate circuit and signal input interfaces;
    The bus port of described PCI9054 interface conversion chip is connected with cpci bus, the configuring chip port of PCI9054 interface conversion chip is connected with configuring chip, the journey logical device port of PCI9054 interface conversion chip is connected with FPGA programmable logic device (PLD), the power pack that configures for to the power supply of described FPGA programmable logic device (PLD), FPGA programmable logic device (PLD) port is connected with AD7865 acquisition chip, described AD7865 acquisition chip port is connected with 8 path analoging switch, described 8 path analoging switch are connected with 32 tunnel isolation modulate circuits, described 32 tunnel isolation modulate circuits are connected with signal input interface.
  2. 2. the hardware structure of cpci bus digital quantity input and analog input module under vxworks operating system according to claim 1, it is characterized in that described cpci bus digital quantity input module operates in CPCI cabinet, by cpci bus and control computing machine, carry out data transmission.
  3. 3. the hardware structure of cpci bus digital quantity input and analog input module under vxworks operating system according to claim 1, it is characterized in that needing to realize cpci bus interface control circuit between described cpci bus and hardware capability circuit, cpci bus interface control circuit adopts the PCI9054 interface conversion chip of PLX company to realize, and cpci bus is transformed into local bus.
  4. 4. the hardware structure of cpci bus digital quantity input and analog input module under vxworks operating system according to claim 1, it is characterized in that described PCI9054 interface conversion chip local bus one side use FPGA programmable logic device (PLD) realizes bus interface decoding, simultaneously, FPGA programmable logic device (PLD) indoor design control register, realizes the control to digital quantity input module.
  5. 5. the hardware structure of cpci bus digital quantity input and analog input module under vxworks operating system according to claim 1, it is characterized in that in described signal input interface, 32 road input signals are respectively after photoelectric coupler isolation, signal after isolation enters FPGA programmable logic device (PLD) and controls and treatment circuit, FPGA programmable logic device (PLD) is processed, changes and store input signal, then deliver to CPCI interface circuit, control computing machine and by CPCI interface, read the digital signal of input; Wherein, described photoelectrical coupler adopts the chip that the model of Toshiba is TLP521-2.
  6. 6. the hardware structure of cpci bus digital quantity input and analog input module under vxworks operating system according to claim 1, it is characterized in that described scan A/D C functional module is inserted in CPCI cabinet moves, controlling computing machine is realized the read-write of scan A/D C functional module is controlled by cpci bus, between cpci bus and scan A/D C functional circuit, need to realize cpci bus interface controller, cpci bus interface controller adopts the PCI9054 interface conversion chip of PLX company to realize, cpci bus is transformed into local bus, PCI9054 interface conversion chip local bus is used FPGA programmable logic device (PLD) to realize bus interface decoding, simultaneously, FPGA programmable logic device (PLD) indoor design control register, the control of realization to scan A/D C functional circuit, scan A/D C funtion part is by the AD7865 data acquisition chip of 1 successive approximation, 48 path analoging switch chips and 32 AD202 isolating chips form 32 tunnel scan A/D C functional circuits, 32 paths are isolated from each other, the simulating signal of outside input is after the isolation of AD202 chip and signal condition, input 48 and select 1 analog switch, after analog switch is selected, enter AD7865 modulus switching device and carry out analog quantity to the conversion of digital quantity.
  7. 7. application rights requires the input of cpci bus digital quantity and the configurable driving method of analog input sequential under the vxworks operating system of the input of cpci bus digital quantity and the hardware structure of analog input module under the vxworks operating system described in 1, it is characterized in that under vxworks operating system, the input of cpci bus digital quantity realizes according to the following steps with the configurable driving method of analog input sequential:
    One, user can coordinate cpci bus digital quantity input message, required cpci bus analog input as required information and delayed data are write in allocation list file;
    Two, configurable functionality is similar to the driving filtering function under Windows system, in the bottom hardware power function interface basis of having developed, according to user configuration information Reseal, once drive interface function, when application call drives interface function, can return to the required status data of user according to the function setting.
  8. 8. the input of cpci bus digital quantity and the configurable driving method of analog input sequential under vxworks operating system according to claim 7, is characterized in that in described step 2, application call driving function is specially:
    One, first application call cpci bus switching value output module write operation drives interface function, controls the output of cpci bus switching value output channel, makes marks simultaneously and records hardware controls output valve;
    Two, then resolve configurable driver, the cpci bus switching value output configuration information in configurable driver, required cpci bus analog output configuration information and time delay configuration information are saved;
    Three, then by the switching value output configuration information comparison after resolving in switching value output token value and output configuration information, if contrast inconsistently, return to ERROR, finish; If comparison is consistent, checked before carrying out required analog quantity cooperation output whether have time delay configuration information, if there is time delay, the time that first time delay configures;
    Four, the digital quantity analog quantity translation interface that then calls analog output module, carries out corresponding analog output.
CN201410003517.6A 2014-01-03 2014-01-03 CPCI bus digital-analog input module hardware architecture under VxWorks and CPCI bus digital-analog input timing-configurable driving method under VxWorks Pending CN103761199A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106292336A (en) * 2016-10-10 2017-01-04 上海航天控制技术研究所 The fault simulation system of Satellite attitude and orbit control system based on embedded VxWorks and method
CN111027108A (en) * 2019-08-13 2020-04-17 哈尔滨安天科技集团股份有限公司 Sequential logic safety detection method and device of low-speed synchronous serial bus

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101776028A (en) * 2009-12-30 2010-07-14 北京宇航系统工程研究所 Simulation data source system for containment release
CN103309830A (en) * 2013-07-08 2013-09-18 哈尔滨工业大学 Driver of CPCI bus CAN communicating module under VxWorks operating system and driving method
CN103336747A (en) * 2013-07-05 2013-10-02 哈尔滨工业大学 Driver with configurable CPCI bus digital value input and switching value output in VxWorks operating system and driving method of driver
CN103412841A (en) * 2013-08-30 2013-11-27 哈尔滨工业大学 Driver and driving method for CPCI (Compact Peripheral Component Interconnect) bus RS422 communication module under VxWorks operating system
CN103412833A (en) * 2013-08-30 2013-11-27 哈尔滨工业大学 CPCI (Compact Peripheral Component Interconnect) bus scanning ADC (Analog-to-Digital Converter) function module driver under VxWorks operating system and control method thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101776028A (en) * 2009-12-30 2010-07-14 北京宇航系统工程研究所 Simulation data source system for containment release
CN103336747A (en) * 2013-07-05 2013-10-02 哈尔滨工业大学 Driver with configurable CPCI bus digital value input and switching value output in VxWorks operating system and driving method of driver
CN103309830A (en) * 2013-07-08 2013-09-18 哈尔滨工业大学 Driver of CPCI bus CAN communicating module under VxWorks operating system and driving method
CN103412841A (en) * 2013-08-30 2013-11-27 哈尔滨工业大学 Driver and driving method for CPCI (Compact Peripheral Component Interconnect) bus RS422 communication module under VxWorks operating system
CN103412833A (en) * 2013-08-30 2013-11-27 哈尔滨工业大学 CPCI (Compact Peripheral Component Interconnect) bus scanning ADC (Analog-to-Digital Converter) function module driver under VxWorks operating system and control method thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106292336A (en) * 2016-10-10 2017-01-04 上海航天控制技术研究所 The fault simulation system of Satellite attitude and orbit control system based on embedded VxWorks and method
CN111027108A (en) * 2019-08-13 2020-04-17 哈尔滨安天科技集团股份有限公司 Sequential logic safety detection method and device of low-speed synchronous serial bus
CN111027108B (en) * 2019-08-13 2024-02-13 安天科技集团股份有限公司 Sequential logic safety detection method and device for low-speed synchronous serial bus

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