CN103744334A - Data acquisition system based on field programmable gate array chip and Ethernet - Google Patents
Data acquisition system based on field programmable gate array chip and Ethernet Download PDFInfo
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- CN103744334A CN103744334A CN201410028916.8A CN201410028916A CN103744334A CN 103744334 A CN103744334 A CN 103744334A CN 201410028916 A CN201410028916 A CN 201410028916A CN 103744334 A CN103744334 A CN 103744334A
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Abstract
The invention relates to the field of electronic information, in particular to a data acquisition system based on a field programmable gate array (FPGA) chip and an Ethernet, which communicates with a PC (personal computer) through an RJ45 interface of the Ethernet. The system comprises the FPGA chip, a single-turn differentiator, an analog-digital converter (ADC), a network card control chip, an SDRAM (synchronous dynamic random access memory) chip and an FPGA configuration chip. The system has the characteristics of simple circuit, low power consumption and convenience in data transmission, and can be used for data acquisition of parameters, such as voltage, current and temperature.
Description
Technical field
The present invention relates to electronic information field, particularly a kind of data acquisition system (DAS) based on field programmable gate array chip and Ethernet, communicates by Ethernet RJ45 interface and PC.
Background technology
In the every profession and trade of commercial production and scientific and technical research, usually need various data to gather, as the collection of the information such as liquid level, temperature, pressure, frequency.In some fields such as image processing, transient signal detection, software radios, require especially data acquisition and the treatment technology of high-speed, high precision, high real-time.Development along with digital technology, some high performance DSP (digital signal processing) technology, FPGA (field programmable gate array) technology and A/D technology are at a high speed applied in data acquisition system (DAS), have greatly improved the measuring accuracy, data acquisition process speed, data rate of system etc.Along with the develop rapidly of microelectric technique, data acquisition technology has obtained significant progress.Based on Ethernet transmission, there is the data acquisition system (DAS) that the mass data storage degree of depth and high-speed ADC form and become Developing trend.For data acquisition system (DAS), along with continuing to increase of data volume and improving constantly of real-time processing requirements, proposed utilization field programmable gate array chip and carried out data processing, to improve the ability of real-time, reliability and the data quick storage of system.
Summary of the invention
In order to solve the problem of prior art, the invention provides a kind of data acquisition system (DAS) based on field programmable gate array chip and Ethernet, it realizes sequential control by field programmable gate array chip, by Ethernet RJ45 interface and PC, communicate, this system has the advantages such as acquisition speed is fast, low in energy consumption, data transmission is convenient.
The technical solution adopted in the present invention is as follows:
A data acquisition system (DAS) based on field programmable gate array chip and Ethernet, comprising:
Field programmable gate array chip, as the core cell of whole data acquisition system (DAS), carries out sequential control to all signal processings and storage, repeating process;
Singly turn difference engine, for single-ended simulating signal is converted to differential signal;
Analogue-to-digital converters, for converting digital signal to simulating signal;
Network interface card control chip, for from SDRAM reading out data and be sent to PC;
SDRAM chip, as the data buffer of this data acquisition system (DAS);
Field programmable gate array configuring chip, for storing the program of field programmable gate array chip.
Analogue-to-digital converters adopt single power supply, high-performance sample/hold amplifier and reference voltage source in a built-in sheet.
Field programmable gate array chip is connected with the bus mode of network interface card control chip with 16bit, with single work mode operation.
The present invention be take field programmable gate array chip as control core, comprising: field programmable gate array chip, singly turn difference engine, analogue-to-digital converters, network interface card control chip, SDRAM chip, field programmable gate array configuring chip.Integrated use of the present invention the technology such as FPGA, SDRAM, Ethernet transmission, the high sampling rate of system reaches 25MSPS.
The beneficial effect that technical scheme provided by the invention is brought is:
By field programmable gate array chip, realize sequential control, by Ethernet RJ45 interface and PC, communicate, this system has the advantages such as acquisition speed is fast, low in energy consumption, data transmission is convenient, can be used in the data acquisition of the parameters such as voltage, electric current, temperature.
Accompanying drawing explanation
Fig. 1 is the system construction drawing of a kind of data acquisition system (DAS) based on field programmable gate array chip and Ethernet of the present invention.
Embodiment
For making the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing, embodiment of the present invention is described further in detail.
Embodiment mono-
A kind of data acquisition system (DAS) based on field programmable gate array chip and Ethernet of the present invention consists of following ingredient:
1.FPGA chip: select the EP3C25F256C8 device of the low-cost CycloneIII series of U.S. altera corp, the total number of pins of this chip is 256, and wherein user I/O pin is 156, and RAM total amount is 78KB, 24624 of logical blocks (LE).Its IO interface quantity and internal resource can meet the demand of native system completely;
2. singly turning difference engine AD8138:AD8138 is a low distortion differential ADC driver of U.S. ADI company, has unique internal feedback function, and output gain and phase equilibrium coupling are provided, and effect is that single-ended analog input signal is converted to differential signal;
3. analogue-to-digital converters AD9225:AD9225 is a 12 of U.S. ADI company, the analog to digital converter (ADC) of 25 MSPS, adopts single power supply, high-performance sample/hold amplifier and reference voltage source in a built-in sheet; It adopts multistage differential pipeline framework, and built-in output error correction logic can provide 12 precision when 25MSPS data rate, and guarantees in whole operating temperature range without losing code;
4. network interface card control chip DM9000:DM9000 is a Fast Ethernet mac controller, meets IEEE802.3 standard.Inside has the SRAM of an adaptive PHY of 10/100M and 4K DWORD value, and the interface of media independent is provided, and connects home phone line network equipment or other transceivers of all Media Independent Interface functions that provide support.This DM9000 supports 8, and 16 and 32 interface accessing internal storages, to support different processors;
5. SDRAM chip: adopt the HY57V561620 chip of HYNIX company, this chip is a CMOS synchronous dram, and capacity is 32MB, and data bus interface is 16bit, and this chip is as the data buffering of data acquisition system (DAS);
6.FPGA configuring chip: adopt the EPCS4 chip of altera corp, this chip is used for storing the program of FPGA.
As shown in Figure 1, in the process of collection of simulant signal, first simulating signal inputs to AD converter through singly turning difference engine by the module by signal after adjusting, then after analog to digital conversion, the digital signal of 12bit is directly exported to FPGA, FPGA receives data and is stored in SDRAM, then by FIFO mode, read the data of storing in SDRAM and be transferred to network interface card controller DM9000, DM9000, can be further processed the data that receive at PC end to PC by Ethernet RJ45 interface output udp data.
AD8138 completes and single-ended signal is converted into AD9225 carries out AD converter and input needed difference form.Use difference form, the component of filtering even-order harmonic effectively, simultaneously to other common mode spurious signal (as the noise of being introduced by VDD-to-VSS) and the feedback signal of crystal oscillator is also had to fine inhibiting effect.
In this data acquisition system (DAS), FPGA is connected with the bus mode of 16bit with DM9000, with single work mode operation.When system powers on, by FPGA, by configuration DM9000 internal network control register (NCR), interrupt register (ISR) etc., complete the initialization of DM9000.Subsequently, DM9000 enters data transmit-receive waiting status.When processor will send Frame to Ethernet, first pack the data to UDP message bag, by the byte-by-byte data that send to DM9000 of 16bit bus, send in buffer memory, then the information such as data length are filled in the corresponding registers of DM9000, send subsequently enable command, DM9000A carries out MAC framing by the data of buffer memory and Frame information, by RJ45 interface, sends to PC.
The foregoing is only preferred embodiment of the present invention, in order to limit the present invention, within the spirit and principles in the present invention not all, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.
Claims (3)
1. the data acquisition system (DAS) based on field programmable gate array chip and Ethernet, comprising:
Field programmable gate array chip, as the core cell of whole data acquisition system (DAS), carries out sequential control to all signal processings and storage, repeating process;
Singly turn difference engine, for single-ended simulating signal is converted to differential signal;
Analogue-to-digital converters, for converting digital signal to simulating signal;
Network interface card control chip, for from SDRAM reading out data and be sent to PC;
SDRAM chip, as the data buffer of this data acquisition system (DAS);
Field programmable gate array configuring chip, for storing the program of field programmable gate array chip.
2. a kind of data acquisition system (DAS) based on field programmable gate array chip and Ethernet according to claim 1, it is characterized in that, described analogue-to-digital converters adopt single power supply, high-performance sample/hold amplifier and reference voltage source in a built-in sheet.
3. a kind of data acquisition system (DAS) based on field programmable gate array chip and Ethernet according to claim 1, it is characterized in that, described field programmable gate array chip is connected with the bus mode of network interface card control chip with 16bit, with single work mode operation.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104267911A (en) * | 2014-09-18 | 2015-01-07 | 湖南喜玛拉云技术有限公司 | Data storage controller and data processing method |
| CN104430133A (en) * | 2014-11-13 | 2015-03-25 | 无锡悟莘科技有限公司 | Fuzzy control system for aquaculture oxygen enrichment |
| CN104570858A (en) * | 2014-12-19 | 2015-04-29 | 深圳市科陆电子科技股份有限公司 | Analog signal sampling method and sampling system |
| WO2021129375A1 (en) * | 2019-12-26 | 2021-07-01 | 江西飞尚科技有限公司 | Synchronous data acquisition device powered by single power supply and acquisition method thereof |
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| CN103033800A (en) * | 2012-12-24 | 2013-04-10 | 天津七六四通信导航技术有限公司 | Precise distance measuring monitoring unit circuit and implement method of function |
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| CN104267911A (en) * | 2014-09-18 | 2015-01-07 | 湖南喜玛拉云技术有限公司 | Data storage controller and data processing method |
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| WO2021129375A1 (en) * | 2019-12-26 | 2021-07-01 | 江西飞尚科技有限公司 | Synchronous data acquisition device powered by single power supply and acquisition method thereof |
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